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[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [d30v-tdep.c] - Blame information for rev 104

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1 104 markom
/* Target-dependent code for Mitsubishi D30V, for GDB.
2
   Copyright (C) 1996, 1997, 2000 Free Software Foundation, Inc.
3
 
4
   This file is part of GDB.
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 2 of the License, or
9
   (at your option) any later version.
10
 
11
   This program is distributed in the hope that it will be useful,
12
   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, Inc., 59 Temple Place - Suite 330,
19
   Boston, MA 02111-1307, USA.  */
20
 
21
/*  Contributed by Martin Hunt, hunt@cygnus.com */
22
 
23
#include "defs.h"
24
#include "frame.h"
25
#include "obstack.h"
26
#include "symtab.h"
27
#include "gdbtypes.h"
28
#include "gdbcmd.h"
29
#include "gdbcore.h"
30
#include "gdb_string.h"
31
#include "value.h"
32
#include "inferior.h"
33
#include "dis-asm.h"
34
#include "symfile.h"
35
#include "objfiles.h"
36
 
37
#include "language.h" /* For local_hex_string() */
38
 
39
void d30v_frame_find_saved_regs PARAMS ((struct frame_info * fi,
40
                                         struct frame_saved_regs * fsr));
41
void d30v_frame_find_saved_regs_offsets PARAMS ((struct frame_info * fi,
42
                                            struct frame_saved_regs * fsr));
43
static void d30v_pop_dummy_frame PARAMS ((struct frame_info * fi));
44
static void d30v_print_flags PARAMS ((void));
45
static void print_flags_command PARAMS ((char *, int));
46
 
47
/* the following defines assume:
48
   fp is r61, lr is r62, sp is r63, and ?? is r22
49
   if that changes, they will need to be updated */
50
 
51
#define OP_MASK_ALL_BUT_RA      0x0ffc0fff      /* throw away Ra, keep the rest */
52
 
53
#define OP_STW_SPM              0x054c0fc0      /* stw Ra, @(sp-) */
54
#define OP_STW_SP_R0            0x05400fc0      /* stw Ra, @(sp,r0) */
55
#define OP_STW_SP_IMM0          0x05480fc0      /* st Ra, @(sp, 0x0) */
56
#define OP_STW_R22P_R0          0x05440580      /* stw Ra, @(r22+,r0) */
57
 
58
#define OP_ST2W_SPM             0x056c0fc0      /* st2w Ra, @(sp-) */
59
#define OP_ST2W_SP_R0           0x05600fc0      /* st2w Ra, @(sp, r0) */
60
#define OP_ST2W_SP_IMM0         0x05680fc0      /* st2w Ra, @(sp, 0x0) */
61
#define OP_ST2W_R22P_R0         0x05640580      /* st2w Ra, @(r22+, r0) */
62
 
63
#define OP_MASK_OPCODE          0x0ffc0000      /* just the opcode, ign operands */
64
#define OP_NOP                  0x00f00000      /* nop */
65
 
66
#define OP_MASK_ALL_BUT_IMM     0x0fffffc0      /* throw away imm, keep the rest */
67
#define OP_SUB_SP_IMM           0x082bffc0      /* sub sp,sp,imm */
68
#define OP_ADD_SP_IMM           0x080bffc0      /* add sp,sp,imm */
69
#define OP_ADD_R22_SP_IMM       0x08096fc0      /* add r22,sp,imm */
70
#define OP_STW_FP_SP_IMM        0x054bdfc0      /* stw fp,@(sp,imm) */
71
#define OP_OR_SP_R0_IMM         0x03abf000      /* or sp,r0,imm */
72
 
73
/* no mask */
74
#define OP_OR_FP_R0_SP          0x03a3d03f      /* or fp,r0,sp */
75
#define OP_OR_FP_SP_R0          0x03a3dfc0      /* or fp,sp,r0 */
76
#define OP_OR_FP_IMM0_SP        0x03abd03f      /* or fp,0x0,sp */
77
#define OP_STW_FP_R22P_R0       0x0547d580      /* stw fp,@(r22+,r0) */
78
#define OP_STW_LR_R22P_R0       0x0547e580      /* stw lr,@(r22+,r0) */
79
 
80
#define OP_MASK_OP_AND_RB       0x0ff80fc0      /* keep op and rb,throw away rest */
81
#define OP_STW_SP_IMM           0x05480fc0      /* stw Ra,@(sp,imm) */
82
#define OP_ST2W_SP_IMM          0x05680fc0      /* st2w Ra,@(sp,imm) */
83
#define OP_STW_FP_IMM           0x05480f40      /* stw Ra,@(fp,imm) */
84
#define OP_STW_FP_R0            0x05400f40      /* stw Ra,@(fp,r0) */
85
 
86
#define OP_MASK_FM_BIT          0x80000000
87
#define OP_MASK_CC_BITS         0x70000000
88
#define OP_MASK_SUB_INST        0x0fffffff
89
 
90
#define EXTRACT_RA(op)          (((op) >> 12) & 0x3f)
91
#define EXTRACT_RB(op)          (((op) >> 6) & 0x3f)
92
#define EXTRACT_RC(op)          (((op) & 0x3f)
93
#define EXTRACT_UIMM6(op)       ((op) & 0x3f)
94
#define EXTRACT_IMM6(op)        ((((int)EXTRACT_UIMM6(op)) << 26) >> 26)
95
#define EXTRACT_IMM26(op)       ((((op)&0x0ff00000) >> 2) | ((op)&0x0003ffff))
96
#define EXTRACT_IMM32(opl, opr) ((EXTRACT_UIMM6(opl) << 26)|EXTRACT_IMM26(opr))
97
 
98
 
99
int
100
d30v_frame_chain_valid (chain, fi)
101
     CORE_ADDR chain;
102
     struct frame_info *fi;     /* not used here */
103
{
104
#if 0
105
  return ((chain) != 0 && (fi) != 0 && (fi)->return_pc != 0);
106
#else
107
  return ((chain) != 0 && (fi) != 0 && (fi)->frame <= chain);
108
#endif
109
}
110
 
111
/* Discard from the stack the innermost frame, restoring all saved
112
   registers.  */
113
 
114
void
115
d30v_pop_frame ()
116
{
117
  struct frame_info *frame = get_current_frame ();
118
  CORE_ADDR fp;
119
  int regnum;
120
  struct frame_saved_regs fsr;
121
  char raw_buffer[8];
122
 
123
  fp = FRAME_FP (frame);
124
  if (frame->dummy)
125
    {
126
      d30v_pop_dummy_frame (frame);
127
      return;
128
    }
129
 
130
  /* fill out fsr with the address of where each */
131
  /* register was stored in the frame */
132
  get_frame_saved_regs (frame, &fsr);
133
 
134
  /* now update the current registers with the old values */
135
  for (regnum = A0_REGNUM; regnum < A0_REGNUM + 2; regnum++)
136
    {
137
      if (fsr.regs[regnum])
138
        {
139
          read_memory (fsr.regs[regnum], raw_buffer, 8);
140
          write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8);
141
        }
142
    }
143
  for (regnum = 0; regnum < SP_REGNUM; regnum++)
144
    {
145
      if (fsr.regs[regnum])
146
        {
147
          write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 4));
148
        }
149
    }
150
  if (fsr.regs[PSW_REGNUM])
151
    {
152
      write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 4));
153
    }
154
 
155
  write_register (PC_REGNUM, read_register (LR_REGNUM));
156
  write_register (SP_REGNUM, fp + frame->size);
157
  target_store_registers (-1);
158
  flush_cached_frames ();
159
}
160
 
161
static int
162
check_prologue (op)
163
     unsigned long op;
164
{
165
  /* add sp,sp,imm -- observed */
166
  if ((op & OP_MASK_ALL_BUT_IMM) == OP_ADD_SP_IMM)
167
    return 1;
168
 
169
  /* add r22,sp,imm -- observed */
170
  if ((op & OP_MASK_ALL_BUT_IMM) == OP_ADD_R22_SP_IMM)
171
    return 1;
172
 
173
  /* or  fp,r0,sp -- observed */
174
  if (op == OP_OR_FP_R0_SP)
175
    return 1;
176
 
177
  /* nop */
178
  if ((op & OP_MASK_OPCODE) == OP_NOP)
179
    return 1;
180
 
181
  /* stw  Ra,@(sp,r0) */
182
  if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SP_R0)
183
    return 1;
184
 
185
  /* stw  Ra,@(sp,0x0) */
186
  if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SP_IMM0)
187
    return 1;
188
 
189
  /* st2w  Ra,@(sp,r0) */
190
  if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SP_R0)
191
    return 1;
192
 
193
  /* st2w  Ra,@(sp,0x0) */
194
  if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SP_IMM0)
195
    return 1;
196
 
197
  /* stw fp, @(r22+,r0) -- observed */
198
  if (op == OP_STW_FP_R22P_R0)
199
    return 1;
200
 
201
  /* stw r62, @(r22+,r0) -- observed */
202
  if (op == OP_STW_LR_R22P_R0)
203
    return 1;
204
 
205
  /* stw Ra, @(fp,r0) -- observed */
206
  if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_FP_R0)
207
    return 1;                   /* first arg */
208
 
209
  /* stw Ra, @(fp,imm) -- observed */
210
  if ((op & OP_MASK_OP_AND_RB) == OP_STW_FP_IMM)
211
    return 1;                   /* second and subsequent args */
212
 
213
  /* stw fp,@(sp,imm) -- observed */
214
  if ((op & OP_MASK_ALL_BUT_IMM) == OP_STW_FP_SP_IMM)
215
    return 1;
216
 
217
  /* st2w Ra,@(r22+,r0) */
218
  if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_R22P_R0)
219
    return 1;
220
 
221
  /* stw  Ra, @(sp-) */
222
  if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SPM)
223
    return 1;
224
 
225
  /* st2w  Ra, @(sp-) */
226
  if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SPM)
227
    return 1;
228
 
229
  /* sub.?  sp,sp,imm */
230
  if ((op & OP_MASK_ALL_BUT_IMM) == OP_SUB_SP_IMM)
231
    return 1;
232
 
233
  return 0;
234
}
235
 
236
CORE_ADDR
237
d30v_skip_prologue (pc)
238
     CORE_ADDR pc;
239
{
240
  unsigned long op[2];
241
  unsigned long opl, opr;       /* left / right sub operations */
242
  unsigned long fm0, fm1;       /* left / right mode bits */
243
  unsigned long cc0, cc1;
244
  unsigned long op1, op2;
245
  CORE_ADDR func_addr, func_end;
246
  struct symtab_and_line sal;
247
 
248
  /* If we have line debugging information, then the end of the */
249
  /* prologue should the first assembly instruction of  the first source line */
250
  if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
251
    {
252
      sal = find_pc_line (func_addr, 0);
253
      if (sal.end && sal.end < func_end)
254
        return sal.end;
255
    }
256
 
257
  if (target_read_memory (pc, (char *) &op[0], 8))
258
    return pc;                  /* Can't access it -- assume no prologue. */
259
 
260
  while (1)
261
    {
262
      opl = (unsigned long) read_memory_integer (pc, 4);
263
      opr = (unsigned long) read_memory_integer (pc + 4, 4);
264
 
265
      fm0 = (opl & OP_MASK_FM_BIT);
266
      fm1 = (opr & OP_MASK_FM_BIT);
267
 
268
      cc0 = (opl & OP_MASK_CC_BITS);
269
      cc1 = (opr & OP_MASK_CC_BITS);
270
 
271
      opl = (opl & OP_MASK_SUB_INST);
272
      opr = (opr & OP_MASK_SUB_INST);
273
 
274
      if (fm0 && fm1)
275
        {
276
          /* long instruction (opl contains the opcode) */
277
          if (((opl & OP_MASK_ALL_BUT_IMM) != OP_ADD_SP_IMM) &&         /* add sp,sp,imm */
278
              ((opl & OP_MASK_ALL_BUT_IMM) != OP_ADD_R22_SP_IMM) &&     /* add r22,sp,imm */
279
              ((opl & OP_MASK_OP_AND_RB) != OP_STW_SP_IMM) &&   /* stw Ra, @(sp,imm) */
280
              ((opl & OP_MASK_OP_AND_RB) != OP_ST2W_SP_IMM))    /* st2w Ra, @(sp,imm) */
281
            break;
282
        }
283
      else
284
        {
285
          /* short instructions */
286
          if (fm0 && !fm1)
287
            {
288
              op1 = opr;
289
              op2 = opl;
290
            }
291
          else
292
            {
293
              op1 = opl;
294
              op2 = opr;
295
            }
296
          if (check_prologue (op1))
297
            {
298
              if (!check_prologue (op2))
299
                {
300
                  /* if the previous opcode was really part of the prologue */
301
                  /* and not just a NOP, then we want to break after both instructions */
302
                  if ((op1 & OP_MASK_OPCODE) != OP_NOP)
303
                    pc += 8;
304
                  break;
305
                }
306
            }
307
          else
308
            break;
309
        }
310
      pc += 8;
311
    }
312
  return pc;
313
}
314
 
315
static int end_of_stack;
316
 
317
/* Given a GDB frame, determine the address of the calling function's frame.
318
   This will be used to create a new GDB frame struct, and then
319
   INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
320
 */
321
 
322
CORE_ADDR
323
d30v_frame_chain (frame)
324
     struct frame_info *frame;
325
{
326
  struct frame_saved_regs fsr;
327
 
328
  d30v_frame_find_saved_regs (frame, &fsr);
329
 
330
  if (end_of_stack)
331
    return (CORE_ADDR) 0;
332
 
333
  if (frame->return_pc == IMEM_START)
334
    return (CORE_ADDR) 0;
335
 
336
  if (!fsr.regs[FP_REGNUM])
337
    {
338
      if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START)
339
        return (CORE_ADDR) 0;
340
 
341
      return fsr.regs[SP_REGNUM];
342
    }
343
 
344
  if (!read_memory_unsigned_integer (fsr.regs[FP_REGNUM], 4))
345
    return (CORE_ADDR) 0;
346
 
347
  return read_memory_unsigned_integer (fsr.regs[FP_REGNUM], 4);
348
}
349
 
350
static int next_addr, uses_frame;
351
static int frame_size;
352
 
353
static int
354
prologue_find_regs (op, fsr, addr)
355
     unsigned long op;
356
     struct frame_saved_regs *fsr;
357
     CORE_ADDR addr;
358
{
359
  int n;
360
  int offset;
361
 
362
  /* add sp,sp,imm -- observed */
363
  if ((op & OP_MASK_ALL_BUT_IMM) == OP_ADD_SP_IMM)
364
    {
365
      offset = EXTRACT_IMM6 (op);
366
      /*next_addr += offset; */
367
      frame_size += -offset;
368
      return 1;
369
    }
370
 
371
  /* add r22,sp,imm -- observed */
372
  if ((op & OP_MASK_ALL_BUT_IMM) == OP_ADD_R22_SP_IMM)
373
    {
374
      offset = EXTRACT_IMM6 (op);
375
      next_addr = (offset - frame_size);
376
      return 1;
377
    }
378
 
379
  /* stw Ra, @(fp, offset) -- observed */
380
  if ((op & OP_MASK_OP_AND_RB) == OP_STW_FP_IMM)
381
    {
382
      n = EXTRACT_RA (op);
383
      offset = EXTRACT_IMM6 (op);
384
      fsr->regs[n] = (offset - frame_size);
385
      return 1;
386
    }
387
 
388
  /* stw Ra, @(fp, r0) -- observed */
389
  if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_FP_R0)
390
    {
391
      n = EXTRACT_RA (op);
392
      fsr->regs[n] = (-frame_size);
393
      return 1;
394
    }
395
 
396
  /* or  fp,0,sp -- observed */
397
  if ((op == OP_OR_FP_R0_SP) ||
398
      (op == OP_OR_FP_SP_R0) ||
399
      (op == OP_OR_FP_IMM0_SP))
400
    {
401
      uses_frame = 1;
402
      return 1;
403
    }
404
 
405
  /* nop */
406
  if ((op & OP_MASK_OPCODE) == OP_NOP)
407
    return 1;
408
 
409
  /* stw Ra,@(r22+,r0) -- observed */
410
  if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_R22P_R0)
411
    {
412
      n = EXTRACT_RA (op);
413
      fsr->regs[n] = next_addr;
414
      next_addr += 4;
415
      return 1;
416
    }
417
#if 0                           /* subsumed in pattern above */
418
  /* stw fp,@(r22+,r0) -- observed */
419
  if (op == OP_STW_FP_R22P_R0)
420
    {
421
      fsr->regs[FP_REGNUM] = next_addr;         /* XXX */
422
      next_addr += 4;
423
      return 1;
424
    }
425
 
426
  /* stw r62,@(r22+,r0) -- observed */
427
  if (op == OP_STW_LR_R22P_R0)
428
    {
429
      fsr->regs[LR_REGNUM] = next_addr;
430
      next_addr += 4;
431
      return 1;
432
    }
433
#endif
434
  /* st2w Ra,@(r22+,r0) -- observed */
435
  if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_R22P_R0)
436
    {
437
      n = EXTRACT_RA (op);
438
      fsr->regs[n] = next_addr;
439
      fsr->regs[n + 1] = next_addr + 4;
440
      next_addr += 8;
441
      return 1;
442
    }
443
 
444
  /* stw  rn, @(sp-) */
445
  if ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SPM)
446
    {
447
      n = EXTRACT_RA (op);
448
      fsr->regs[n] = next_addr;
449
      next_addr -= 4;
450
      return 1;
451
    }
452
 
453
  /* st2w  Ra, @(sp-) */
454
  else if ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SPM)
455
    {
456
      n = EXTRACT_RA (op);
457
      fsr->regs[n] = next_addr;
458
      fsr->regs[n + 1] = next_addr + 4;
459
      next_addr -= 8;
460
      return 1;
461
    }
462
 
463
  /* sub  sp,sp,imm */
464
  if ((op & OP_MASK_ALL_BUT_IMM) == OP_SUB_SP_IMM)
465
    {
466
      offset = EXTRACT_IMM6 (op);
467
      frame_size += -offset;
468
      return 1;
469
    }
470
 
471
  /* st  rn, @(sp,0) -- observed */
472
  if (((op & OP_MASK_ALL_BUT_RA) == OP_STW_SP_R0) ||
473
      ((op & OP_MASK_ALL_BUT_RA) == OP_STW_SP_IMM0))
474
    {
475
      n = EXTRACT_RA (op);
476
      fsr->regs[n] = (-frame_size);
477
      return 1;
478
    }
479
 
480
  /* st2w  rn, @(sp,0) */
481
  if (((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SP_R0) ||
482
      ((op & OP_MASK_ALL_BUT_RA) == OP_ST2W_SP_IMM0))
483
    {
484
      n = EXTRACT_RA (op);
485
      fsr->regs[n] = (-frame_size);
486
      fsr->regs[n + 1] = (-frame_size) + 4;
487
      return 1;
488
    }
489
 
490
  /* stw fp,@(sp,imm) -- observed */
491
  if ((op & OP_MASK_ALL_BUT_IMM) == OP_STW_FP_SP_IMM)
492
    {
493
      offset = EXTRACT_IMM6 (op);
494
      fsr->regs[FP_REGNUM] = (offset - frame_size);
495
      return 1;
496
    }
497
  return 0;
498
}
499
 
500
/* Put here the code to store, into a struct frame_saved_regs, the
501
   addresses of the saved registers of frame described by FRAME_INFO.
502
   This includes special registers such as pc and fp saved in special
503
   ways in the stack frame.  sp is even more special: the address we
504
   return for it IS the sp for the next frame. */
505
void
506
d30v_frame_find_saved_regs (fi, fsr)
507
     struct frame_info *fi;
508
     struct frame_saved_regs *fsr;
509
{
510
  CORE_ADDR fp, pc;
511
  unsigned long opl, opr;
512
  unsigned long op1, op2;
513
  unsigned long fm0, fm1;
514
  int i;
515
 
516
  fp = fi->frame;
517
  memset (fsr, 0, sizeof (*fsr));
518
  next_addr = 0;
519
  frame_size = 0;
520
  end_of_stack = 0;
521
 
522
  uses_frame = 0;
523
 
524
  d30v_frame_find_saved_regs_offsets (fi, fsr);
525
 
526
  fi->size = frame_size;
527
 
528
  if (!fp)
529
    fp = read_register (SP_REGNUM);
530
 
531
  for (i = 0; i < NUM_REGS - 1; i++)
532
    if (fsr->regs[i])
533
      {
534
        fsr->regs[i] = fsr->regs[i] + fp + frame_size;
535
      }
536
 
537
  if (fsr->regs[LR_REGNUM])
538
    fi->return_pc = read_memory_unsigned_integer (fsr->regs[LR_REGNUM], 4);
539
  else
540
    fi->return_pc = read_register (LR_REGNUM);
541
 
542
  /* the SP is not normally (ever?) saved, but check anyway */
543
  if (!fsr->regs[SP_REGNUM])
544
    {
545
      /* if the FP was saved, that means the current FP is valid, */
546
      /* otherwise, it isn't being used, so we use the SP instead */
547
      if (uses_frame)
548
        fsr->regs[SP_REGNUM] = read_register (FP_REGNUM) + fi->size;
549
      else
550
        {
551
          fsr->regs[SP_REGNUM] = fp + fi->size;
552
          fi->frameless = 1;
553
          fsr->regs[FP_REGNUM] = 0;
554
        }
555
    }
556
}
557
 
558
void
559
d30v_frame_find_saved_regs_offsets (fi, fsr)
560
     struct frame_info *fi;
561
     struct frame_saved_regs *fsr;
562
{
563
  CORE_ADDR fp, pc;
564
  unsigned long opl, opr;
565
  unsigned long op1, op2;
566
  unsigned long fm0, fm1;
567
  int i;
568
 
569
  fp = fi->frame;
570
  memset (fsr, 0, sizeof (*fsr));
571
  next_addr = 0;
572
  frame_size = 0;
573
  end_of_stack = 0;
574
 
575
  pc = get_pc_function_start (fi->pc);
576
 
577
  uses_frame = 0;
578
  while (pc < fi->pc)
579
    {
580
      opl = (unsigned long) read_memory_integer (pc, 4);
581
      opr = (unsigned long) read_memory_integer (pc + 4, 4);
582
 
583
      fm0 = (opl & OP_MASK_FM_BIT);
584
      fm1 = (opr & OP_MASK_FM_BIT);
585
 
586
      opl = (opl & OP_MASK_SUB_INST);
587
      opr = (opr & OP_MASK_SUB_INST);
588
 
589
      if (fm0 && fm1)
590
        {
591
          /* long instruction */
592
          if ((opl & OP_MASK_ALL_BUT_IMM) == OP_ADD_SP_IMM)
593
            {
594
              /* add sp,sp,n */
595
              long offset = EXTRACT_IMM32 (opl, opr);
596
              frame_size += -offset;
597
            }
598
          else if ((opl & OP_MASK_ALL_BUT_IMM) == OP_ADD_R22_SP_IMM)
599
            {
600
              /* add r22,sp,offset */
601
              long offset = EXTRACT_IMM32 (opl, opr);
602
              next_addr = (offset - frame_size);
603
            }
604
          else if ((opl & OP_MASK_OP_AND_RB) == OP_STW_SP_IMM)
605
            {
606
              /* st Ra, @(sp,imm) */
607
              long offset = EXTRACT_IMM32 (opl, opr);
608
              short n = EXTRACT_RA (opl);
609
              fsr->regs[n] = (offset - frame_size);
610
            }
611
          else if ((opl & OP_MASK_OP_AND_RB) == OP_ST2W_SP_IMM)
612
            {
613
              /* st2w Ra, @(sp,offset) */
614
              long offset = EXTRACT_IMM32 (opl, opr);
615
              short n = EXTRACT_RA (opl);
616
              fsr->regs[n] = (offset - frame_size);
617
              fsr->regs[n + 1] = (offset - frame_size) + 4;
618
            }
619
          else if ((opl & OP_MASK_ALL_BUT_IMM) == OP_OR_SP_R0_IMM)
620
            {
621
              end_of_stack = 1;
622
            }
623
          else
624
            break;
625
        }
626
      else
627
        {
628
          /* short instructions */
629
          if (fm0 && !fm1)
630
            {
631
              op2 = opl;
632
              op1 = opr;
633
            }
634
          else
635
            {
636
              op1 = opl;
637
              op2 = opr;
638
            }
639
          if (!prologue_find_regs (op1, fsr, pc) || !prologue_find_regs (op2, fsr, pc))
640
            break;
641
        }
642
      pc += 8;
643
    }
644
 
645
#if 0
646
  fi->size = frame_size;
647
 
648
  if (!fp)
649
    fp = read_register (SP_REGNUM);
650
 
651
  for (i = 0; i < NUM_REGS - 1; i++)
652
    if (fsr->regs[i])
653
      {
654
        fsr->regs[i] = fsr->regs[i] + fp + frame_size;
655
      }
656
 
657
  if (fsr->regs[LR_REGNUM])
658
    fi->return_pc = read_memory_unsigned_integer (fsr->regs[LR_REGNUM], 4);
659
  else
660
    fi->return_pc = read_register (LR_REGNUM);
661
 
662
  /* the SP is not normally (ever?) saved, but check anyway */
663
  if (!fsr->regs[SP_REGNUM])
664
    {
665
      /* if the FP was saved, that means the current FP is valid, */
666
      /* otherwise, it isn't being used, so we use the SP instead */
667
      if (uses_frame)
668
        fsr->regs[SP_REGNUM] = read_register (FP_REGNUM) + fi->size;
669
      else
670
        {
671
          fsr->regs[SP_REGNUM] = fp + fi->size;
672
          fi->frameless = 1;
673
          fsr->regs[FP_REGNUM] = 0;
674
        }
675
    }
676
#endif
677
}
678
 
679
void
680
d30v_init_extra_frame_info (fromleaf, fi)
681
     int fromleaf;
682
     struct frame_info *fi;
683
{
684
  struct frame_saved_regs dummy;
685
 
686
  if (fi->next && (fi->pc == 0))
687
    fi->pc = fi->next->return_pc;
688
 
689
  d30v_frame_find_saved_regs_offsets (fi, &dummy);
690
 
691
  if (uses_frame == 0)
692
    fi->frameless = 1;
693
  else
694
    fi->frameless = 0;
695
 
696
  if ((fi->next == 0) && (uses_frame == 0))
697
    /* innermost frame and it's "frameless",
698
       so the fi->frame field is wrong, fix it! */
699
    fi->frame = read_sp ();
700
 
701
  if (dummy.regs[LR_REGNUM])
702
    {
703
      /* it was saved, grab it! */
704
      dummy.regs[LR_REGNUM] += (fi->frame + frame_size);
705
      fi->return_pc = read_memory_unsigned_integer (dummy.regs[LR_REGNUM], 4);
706
    }
707
  else
708
    fi->return_pc = read_register (LR_REGNUM);
709
}
710
 
711
void
712
d30v_init_frame_pc (fromleaf, prev)
713
     int fromleaf;
714
     struct frame_info *prev;
715
{
716
  /* default value, put here so we can breakpoint on it and
717
     see if the default value is really the right thing to use */
718
  prev->pc = (fromleaf ? SAVED_PC_AFTER_CALL (prev->next) : \
719
              prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ());
720
}
721
 
722
static void d30v_print_register PARAMS ((int regnum, int tabular));
723
 
724
static void
725
d30v_print_register (regnum, tabular)
726
     int regnum;
727
     int tabular;
728
{
729
  if (regnum < A0_REGNUM)
730
    {
731
      if (tabular)
732
        printf_filtered ("%08lx", (long) read_register (regnum));
733
      else
734
        printf_filtered ("0x%lx %ld",
735
                         (long) read_register (regnum),
736
                         (long) read_register (regnum));
737
    }
738
  else
739
    {
740
      char regbuf[MAX_REGISTER_RAW_SIZE];
741
 
742
      read_relative_register_raw_bytes (regnum, regbuf);
743
 
744
      val_print (REGISTER_VIRTUAL_TYPE (regnum), regbuf, 0, 0,
745
                 gdb_stdout, 'x', 1, 0, Val_pretty_default);
746
 
747
      if (!tabular)
748
        {
749
          printf_filtered ("    ");
750
          val_print (REGISTER_VIRTUAL_TYPE (regnum), regbuf, 0, 0,
751
                     gdb_stdout, 'd', 1, 0, Val_pretty_default);
752
        }
753
    }
754
}
755
 
756
static void
757
d30v_print_flags ()
758
{
759
  long psw = read_register (PSW_REGNUM);
760
  printf_filtered ("flags #1");
761
  printf_filtered ("   (sm) %d", (psw & PSW_SM) != 0);
762
  printf_filtered ("   (ea) %d", (psw & PSW_EA) != 0);
763
  printf_filtered ("   (db) %d", (psw & PSW_DB) != 0);
764
  printf_filtered ("   (ds) %d", (psw & PSW_DS) != 0);
765
  printf_filtered ("   (ie) %d", (psw & PSW_IE) != 0);
766
  printf_filtered ("   (rp) %d", (psw & PSW_RP) != 0);
767
  printf_filtered ("   (md) %d\n", (psw & PSW_MD) != 0);
768
 
769
  printf_filtered ("flags #2");
770
  printf_filtered ("   (f0) %d", (psw & PSW_F0) != 0);
771
  printf_filtered ("   (f1) %d", (psw & PSW_F1) != 0);
772
  printf_filtered ("   (f2) %d", (psw & PSW_F2) != 0);
773
  printf_filtered ("   (f3) %d", (psw & PSW_F3) != 0);
774
  printf_filtered ("    (s) %d", (psw & PSW_S) != 0);
775
  printf_filtered ("    (v) %d", (psw & PSW_V) != 0);
776
  printf_filtered ("   (va) %d", (psw & PSW_VA) != 0);
777
  printf_filtered ("    (c) %d\n", (psw & PSW_C) != 0);
778
}
779
 
780
static void
781
print_flags_command (args, from_tty)
782
     char *args;
783
     int from_tty;
784
{
785
  d30v_print_flags ();
786
}
787
 
788
void
789
d30v_do_registers_info (regnum, fpregs)
790
     int regnum;
791
     int fpregs;
792
{
793
  long long num1, num2;
794
  long psw;
795
 
796
  if (regnum != -1)
797
    {
798
      if (REGISTER_NAME (0) == NULL || REGISTER_NAME (0)[0] == '\000')
799
        return;
800
 
801
      printf_filtered ("%s ", REGISTER_NAME (regnum));
802
      d30v_print_register (regnum, 0);
803
 
804
      printf_filtered ("\n");
805
      return;
806
    }
807
 
808
  /* Have to print all the registers.  Format them nicely.  */
809
 
810
  printf_filtered ("PC=");
811
  print_address (read_pc (), gdb_stdout);
812
 
813
  printf_filtered (" PSW=");
814
  d30v_print_register (PSW_REGNUM, 1);
815
 
816
  printf_filtered (" BPC=");
817
  print_address (read_register (BPC_REGNUM), gdb_stdout);
818
 
819
  printf_filtered (" BPSW=");
820
  d30v_print_register (BPSW_REGNUM, 1);
821
  printf_filtered ("\n");
822
 
823
  printf_filtered ("DPC=");
824
  print_address (read_register (DPC_REGNUM), gdb_stdout);
825
 
826
  printf_filtered (" DPSW=");
827
  d30v_print_register (DPSW_REGNUM, 1);
828
 
829
  printf_filtered (" IBA=");
830
  print_address (read_register (IBA_REGNUM), gdb_stdout);
831
  printf_filtered ("\n");
832
 
833
  printf_filtered ("RPT_C=");
834
  d30v_print_register (RPT_C_REGNUM, 1);
835
 
836
  printf_filtered (" RPT_S=");
837
  print_address (read_register (RPT_S_REGNUM), gdb_stdout);
838
 
839
  printf_filtered (" RPT_E=");
840
  print_address (read_register (RPT_E_REGNUM), gdb_stdout);
841
  printf_filtered ("\n");
842
 
843
  printf_filtered ("MOD_S=");
844
  print_address (read_register (MOD_S_REGNUM), gdb_stdout);
845
 
846
  printf_filtered (" MOD_E=");
847
  print_address (read_register (MOD_E_REGNUM), gdb_stdout);
848
  printf_filtered ("\n");
849
 
850
  printf_filtered ("EIT_VB=");
851
  print_address (read_register (EIT_VB_REGNUM), gdb_stdout);
852
 
853
  printf_filtered (" INT_S=");
854
  d30v_print_register (INT_S_REGNUM, 1);
855
 
856
  printf_filtered (" INT_M=");
857
  d30v_print_register (INT_M_REGNUM, 1);
858
  printf_filtered ("\n");
859
 
860
  d30v_print_flags ();
861
  for (regnum = 0; regnum <= 63;)
862
    {
863
      int i;
864
 
865
      printf_filtered ("R%d-R%d ", regnum, regnum + 7);
866
      if (regnum < 10)
867
        printf_filtered (" ");
868
      if (regnum + 7 < 10)
869
        printf_filtered (" ");
870
 
871
      for (i = 0; i < 8; i++)
872
        {
873
          printf_filtered (" ");
874
          d30v_print_register (regnum++, 1);
875
        }
876
 
877
      printf_filtered ("\n");
878
    }
879
 
880
  printf_filtered ("A0-A1    ");
881
 
882
  d30v_print_register (A0_REGNUM, 1);
883
  printf_filtered ("    ");
884
  d30v_print_register (A1_REGNUM, 1);
885
  printf_filtered ("\n");
886
}
887
 
888
CORE_ADDR
889
d30v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p)
890
     char *dummyname;
891
     CORE_ADDR start_sp;
892
     CORE_ADDR fun;
893
     int nargs;
894
     value_ptr *args;
895
     struct type *type;
896
     int gcc_p;
897
{
898
  int regnum;
899
  CORE_ADDR sp;
900
  char buffer[MAX_REGISTER_RAW_SIZE];
901
  struct frame_info *frame = get_current_frame ();
902
  frame->dummy = start_sp;
903
  /*start_sp |= DMEM_START; */
904
 
905
  sp = start_sp;
906
  for (regnum = 0; regnum < NUM_REGS; regnum++)
907
    {
908
      sp -= REGISTER_RAW_SIZE (regnum);
909
      store_address (buffer, REGISTER_RAW_SIZE (regnum), read_register (regnum));
910
      write_memory (sp, buffer, REGISTER_RAW_SIZE (regnum));
911
    }
912
  write_register (SP_REGNUM, (LONGEST) sp);
913
  /* now we need to load LR with the return address */
914
  write_register (LR_REGNUM, (LONGEST) d30v_call_dummy_address ());
915
  return sp;
916
}
917
 
918
static void
919
d30v_pop_dummy_frame (fi)
920
     struct frame_info *fi;
921
{
922
  CORE_ADDR sp = fi->dummy;
923
  int regnum;
924
 
925
  for (regnum = 0; regnum < NUM_REGS; regnum++)
926
    {
927
      sp -= REGISTER_RAW_SIZE (regnum);
928
      write_register (regnum, read_memory_unsigned_integer (sp, REGISTER_RAW_SIZE (regnum)));
929
    }
930
  flush_cached_frames ();       /* needed? */
931
}
932
 
933
 
934
CORE_ADDR
935
d30v_push_arguments (nargs, args, sp, struct_return, struct_addr)
936
     int nargs;
937
     value_ptr *args;
938
     CORE_ADDR sp;
939
     int struct_return;
940
     CORE_ADDR struct_addr;
941
{
942
  int i, len, index = 0, regnum = 2;
943
  char buffer[4], *contents;
944
  LONGEST val;
945
  CORE_ADDR ptrs[10];
946
 
947
#if 0
948
  /* Pass 1. Put all large args on stack */
949
  for (i = 0; i < nargs; i++)
950
    {
951
      value_ptr arg = args[i];
952
      struct type *arg_type = check_typedef (VALUE_TYPE (arg));
953
      len = TYPE_LENGTH (arg_type);
954
      contents = VALUE_CONTENTS (arg);
955
      val = extract_signed_integer (contents, len);
956
      if (len > 4)
957
        {
958
          /* put on stack and pass pointers */
959
          sp -= len;
960
          write_memory (sp, contents, len);
961
          ptrs[index++] = sp;
962
        }
963
    }
964
#endif
965
  index = 0;
966
 
967
  for (i = 0; i < nargs; i++)
968
    {
969
      value_ptr arg = args[i];
970
      struct type *arg_type = check_typedef (VALUE_TYPE (arg));
971
      len = TYPE_LENGTH (arg_type);
972
      contents = VALUE_CONTENTS (arg);
973
      if (len > 4)
974
        {
975
          /* we need multiple registers */
976
          int ndx;
977
 
978
          for (ndx = 0; len > 0; ndx += 8, len -= 8)
979
            {
980
              if (regnum & 1)
981
                regnum++;       /* all args > 4 bytes start in even register */
982
 
983
              if (regnum < 18)
984
                {
985
                  val = extract_signed_integer (&contents[ndx], 4);
986
                  write_register (regnum++, val);
987
 
988
                  if (len >= 8)
989
                    val = extract_signed_integer (&contents[ndx + 4], 4);
990
                  else
991
                    val = extract_signed_integer (&contents[ndx + 4], len - 4);
992
                  write_register (regnum++, val);
993
                }
994
              else
995
                {
996
                  /* no more registers available.  put it on the stack */
997
 
998
                  /* all args > 4 bytes are padded to a multiple of 8 bytes
999
                     and start on an 8 byte boundary */
1000
                  if (sp & 7)
1001
                    sp -= (sp & 7);     /* align it */
1002
 
1003
                  sp -= ((len + 7) & ~7);       /* allocate space */
1004
                  write_memory (sp, &contents[ndx], len);
1005
                  break;
1006
                }
1007
            }
1008
        }
1009
      else
1010
        {
1011
          if (regnum < 18)
1012
            {
1013
              val = extract_signed_integer (contents, len);
1014
              write_register (regnum++, val);
1015
            }
1016
          else
1017
            {
1018
              /* all args are padded to a multiple of 4 bytes (at least) */
1019
              sp -= ((len + 3) & ~3);
1020
              write_memory (sp, contents, len);
1021
            }
1022
        }
1023
    }
1024
  if (sp & 7)
1025
    /* stack pointer is not on an 8 byte boundary -- align it */
1026
    sp -= (sp & 7);
1027
  return sp;
1028
}
1029
 
1030
 
1031
/* pick an out-of-the-way place to set the return value */
1032
/* for an inferior function call.  The link register is set to this  */
1033
/* value and a momentary breakpoint is set there.  When the breakpoint */
1034
/* is hit, the dummy frame is popped and the previous environment is */
1035
/* restored. */
1036
 
1037
CORE_ADDR
1038
d30v_call_dummy_address ()
1039
{
1040
  CORE_ADDR entry;
1041
  struct minimal_symbol *sym;
1042
 
1043
  entry = entry_point_address ();
1044
 
1045
  if (entry != 0)
1046
    return entry;
1047
 
1048
  sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile);
1049
 
1050
  if (!sym || MSYMBOL_TYPE (sym) != mst_text)
1051
    return 0;
1052
  else
1053
    return SYMBOL_VALUE_ADDRESS (sym);
1054
}
1055
 
1056
/* Given a return value in `regbuf' with a type `valtype',
1057
   extract and copy its value into `valbuf'.  */
1058
 
1059
void
1060
d30v_extract_return_value (valtype, regbuf, valbuf)
1061
     struct type *valtype;
1062
     char regbuf[REGISTER_BYTES];
1063
     char *valbuf;
1064
{
1065
  memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype));
1066
}
1067
 
1068
/* The following code implements access to, and display of, the D30V's
1069
   instruction trace buffer.  The buffer consists of 64K or more
1070
   4-byte words of data, of which each words includes an 8-bit count,
1071
   an 8-bit segment number, and a 16-bit instruction address.
1072
 
1073
   In theory, the trace buffer is continuously capturing instruction
1074
   data that the CPU presents on its "debug bus", but in practice, the
1075
   ROMified GDB stub only enables tracing when it continues or steps
1076
   the program, and stops tracing when the program stops; so it
1077
   actually works for GDB to read the buffer counter out of memory and
1078
   then read each trace word.  The counter records where the tracing
1079
   stops, but there is no record of where it started, so we remember
1080
   the PC when we resumed and then search backwards in the trace
1081
   buffer for a word that includes that address.  This is not perfect,
1082
   because you will miss trace data if the resumption PC is the target
1083
   of a branch.  (The value of the buffer counter is semi-random, any
1084
   trace data from a previous program stop is gone.)  */
1085
 
1086
/* The address of the last word recorded in the trace buffer.  */
1087
 
1088
#define DBBC_ADDR (0xd80000)
1089
 
1090
/* The base of the trace buffer, at least for the "Board_0".  */
1091
 
1092
#define TRACE_BUFFER_BASE (0xf40000)
1093
 
1094
static void trace_command PARAMS ((char *, int));
1095
 
1096
static void untrace_command PARAMS ((char *, int));
1097
 
1098
static void trace_info PARAMS ((char *, int));
1099
 
1100
static void tdisassemble_command PARAMS ((char *, int));
1101
 
1102
static void display_trace PARAMS ((int, int));
1103
 
1104
/* True when instruction traces are being collected.  */
1105
 
1106
static int tracing;
1107
 
1108
/* Remembered PC.  */
1109
 
1110
static CORE_ADDR last_pc;
1111
 
1112
/* True when trace output should be displayed whenever program stops.  */
1113
 
1114
static int trace_display;
1115
 
1116
/* True when trace listing should include source lines.  */
1117
 
1118
static int default_trace_show_source = 1;
1119
 
1120
struct trace_buffer
1121
  {
1122
    int size;
1123
    short *counts;
1124
    CORE_ADDR *addrs;
1125
  }
1126
trace_data;
1127
 
1128
static void
1129
trace_command (args, from_tty)
1130
     char *args;
1131
     int from_tty;
1132
{
1133
  /* Clear the host-side trace buffer, allocating space if needed.  */
1134
  trace_data.size = 0;
1135
  if (trace_data.counts == NULL)
1136
    trace_data.counts = (short *) xmalloc (65536 * sizeof (short));
1137
  if (trace_data.addrs == NULL)
1138
    trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof (CORE_ADDR));
1139
 
1140
  tracing = 1;
1141
 
1142
  printf_filtered ("Tracing is now on.\n");
1143
}
1144
 
1145
static void
1146
untrace_command (args, from_tty)
1147
     char *args;
1148
     int from_tty;
1149
{
1150
  tracing = 0;
1151
 
1152
  printf_filtered ("Tracing is now off.\n");
1153
}
1154
 
1155
static void
1156
trace_info (args, from_tty)
1157
     char *args;
1158
     int from_tty;
1159
{
1160
  int i;
1161
 
1162
  if (trace_data.size)
1163
    {
1164
      printf_filtered ("%d entries in trace buffer:\n", trace_data.size);
1165
 
1166
      for (i = 0; i < trace_data.size; ++i)
1167
        {
1168
          printf_filtered ("%d: %d instruction%s at 0x%s\n",
1169
                           i, trace_data.counts[i],
1170
                           (trace_data.counts[i] == 1 ? "" : "s"),
1171
                           paddr_nz (trace_data.addrs[i]));
1172
        }
1173
    }
1174
  else
1175
    printf_filtered ("No entries in trace buffer.\n");
1176
 
1177
  printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
1178
}
1179
 
1180
/* Print the instruction at address MEMADDR in debugged memory,
1181
   on STREAM.  Returns length of the instruction, in bytes.  */
1182
 
1183
static int
1184
print_insn (memaddr, stream)
1185
     CORE_ADDR memaddr;
1186
     struct ui_file *stream;
1187
{
1188
  /* If there's no disassembler, something is very wrong.  */
1189
  if (tm_print_insn == NULL)
1190
    internal_error ("print_insn: no disassembler");
1191
 
1192
  if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1193
    tm_print_insn_info.endian = BFD_ENDIAN_BIG;
1194
  else
1195
    tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
1196
  return (*tm_print_insn) (memaddr, &tm_print_insn_info);
1197
}
1198
 
1199
void
1200
d30v_eva_prepare_to_trace ()
1201
{
1202
  if (!tracing)
1203
    return;
1204
 
1205
  last_pc = read_register (PC_REGNUM);
1206
}
1207
 
1208
/* Collect trace data from the target board and format it into a form
1209
   more useful for display.  */
1210
 
1211
void
1212
d30v_eva_get_trace_data ()
1213
{
1214
  int count, i, j, oldsize;
1215
  int trace_addr, trace_seg, trace_cnt, next_cnt;
1216
  unsigned int last_trace, trace_word, next_word;
1217
  unsigned int *tmpspace;
1218
 
1219
  if (!tracing)
1220
    return;
1221
 
1222
  tmpspace = xmalloc (65536 * sizeof (unsigned int));
1223
 
1224
  last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2;
1225
 
1226
  /* Collect buffer contents from the target, stopping when we reach
1227
     the word recorded when execution resumed.  */
1228
 
1229
  count = 0;
1230
  while (last_trace > 0)
1231
    {
1232
      QUIT;
1233
      trace_word =
1234
        read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4);
1235
      trace_addr = trace_word & 0xffff;
1236
      last_trace -= 4;
1237
      /* Ignore an apparently nonsensical entry.  */
1238
      if (trace_addr == 0xffd5)
1239
        continue;
1240
      tmpspace[count++] = trace_word;
1241
      if (trace_addr == last_pc)
1242
        break;
1243
      if (count > 65535)
1244
        break;
1245
    }
1246
 
1247
  /* Move the data to the host-side trace buffer, adjusting counts to
1248
     include the last instruction executed and transforming the address
1249
     into something that GDB likes.  */
1250
 
1251
  for (i = 0; i < count; ++i)
1252
    {
1253
      trace_word = tmpspace[i];
1254
      next_word = ((i == 0) ? 0 : tmpspace[i - 1]);
1255
      trace_addr = trace_word & 0xffff;
1256
      next_cnt = (next_word >> 24) & 0xff;
1257
      j = trace_data.size + count - i - 1;
1258
      trace_data.addrs[j] = (trace_addr << 2) + 0x1000000;
1259
      trace_data.counts[j] = next_cnt + 1;
1260
    }
1261
 
1262
  oldsize = trace_data.size;
1263
  trace_data.size += count;
1264
 
1265
  free (tmpspace);
1266
 
1267
  if (trace_display)
1268
    display_trace (oldsize, trace_data.size);
1269
}
1270
 
1271
static void
1272
tdisassemble_command (arg, from_tty)
1273
     char *arg;
1274
     int from_tty;
1275
{
1276
  int i, count;
1277
  CORE_ADDR low, high;
1278
  char *space_index;
1279
 
1280
  if (!arg)
1281
    {
1282
      low = 0;
1283
      high = trace_data.size;
1284
    }
1285
  else if (!(space_index = (char *) strchr (arg, ' ')))
1286
    {
1287
      low = parse_and_eval_address (arg);
1288
      high = low + 5;
1289
    }
1290
  else
1291
    {
1292
      /* Two arguments.  */
1293
      *space_index = '\0';
1294
      low = parse_and_eval_address (arg);
1295
      high = parse_and_eval_address (space_index + 1);
1296
      if (high < low)
1297
        high = low;
1298
    }
1299
 
1300
  printf_filtered ("Dump of trace from %s to %s:\n",
1301
                   paddr_u (low),
1302
                   paddr_u (high));
1303
 
1304
  display_trace (low, high);
1305
 
1306
  printf_filtered ("End of trace dump.\n");
1307
  gdb_flush (gdb_stdout);
1308
}
1309
 
1310
static void
1311
display_trace (low, high)
1312
     int low, high;
1313
{
1314
  int i, count, trace_show_source, first, suppress;
1315
  CORE_ADDR next_address;
1316
 
1317
  trace_show_source = default_trace_show_source;
1318
  if (!have_full_symbols () && !have_partial_symbols ())
1319
    {
1320
      trace_show_source = 0;
1321
      printf_filtered ("No symbol table is loaded.  Use the \"file\" command.\n");
1322
      printf_filtered ("Trace will not display any source.\n");
1323
    }
1324
 
1325
  first = 1;
1326
  suppress = 0;
1327
  for (i = low; i < high; ++i)
1328
    {
1329
      next_address = trace_data.addrs[i];
1330
      count = trace_data.counts[i];
1331
      while (count-- > 0)
1332
        {
1333
          QUIT;
1334
          if (trace_show_source)
1335
            {
1336
              struct symtab_and_line sal, sal_prev;
1337
 
1338
              sal_prev = find_pc_line (next_address - 4, 0);
1339
              sal = find_pc_line (next_address, 0);
1340
 
1341
              if (sal.symtab)
1342
                {
1343
                  if (first || sal.line != sal_prev.line)
1344
                    print_source_lines (sal.symtab, sal.line, sal.line + 1, 0);
1345
                  suppress = 0;
1346
                }
1347
              else
1348
                {
1349
                  if (!suppress)
1350
                    /* FIXME-32x64--assumes sal.pc fits in long.  */
1351
                    printf_filtered ("No source file for address %s.\n",
1352
                                 local_hex_string ((unsigned long) sal.pc));
1353
                  suppress = 1;
1354
                }
1355
            }
1356
          first = 0;
1357
          print_address (next_address, gdb_stdout);
1358
          printf_filtered (":");
1359
          printf_filtered ("\t");
1360
          wrap_here ("    ");
1361
          next_address = next_address + print_insn (next_address, gdb_stdout);
1362
          printf_filtered ("\n");
1363
          gdb_flush (gdb_stdout);
1364
        }
1365
    }
1366
}
1367
 
1368
extern void (*target_resume_hook) PARAMS ((void));
1369
extern void (*target_wait_loop_hook) PARAMS ((void));
1370
 
1371
void
1372
_initialize_d30v_tdep ()
1373
{
1374
  tm_print_insn = print_insn_d30v;
1375
 
1376
  target_resume_hook = d30v_eva_prepare_to_trace;
1377
  target_wait_loop_hook = d30v_eva_get_trace_data;
1378
 
1379
  add_info ("flags", print_flags_command, "Print d30v flags.");
1380
 
1381
  add_com ("trace", class_support, trace_command,
1382
           "Enable tracing of instruction execution.");
1383
 
1384
  add_com ("untrace", class_support, untrace_command,
1385
           "Disable tracing of instruction execution.");
1386
 
1387
  add_com ("tdisassemble", class_vars, tdisassemble_command,
1388
           "Disassemble the trace buffer.\n\
1389
Two optional arguments specify a range of trace buffer entries\n\
1390
as reported by info trace (NOT addresses!).");
1391
 
1392
  add_info ("trace", trace_info,
1393
            "Display info about the trace data buffer.");
1394
 
1395
  add_show_from_set (add_set_cmd ("tracedisplay", no_class,
1396
                                  var_integer, (char *) &trace_display,
1397
                             "Set automatic display of trace.\n", &setlist),
1398
                     &showlist);
1399
  add_show_from_set (add_set_cmd ("tracesource", no_class,
1400
                           var_integer, (char *) &default_trace_show_source,
1401
                      "Set display of source code with trace.\n", &setlist),
1402
                     &showlist);
1403
 
1404
}

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