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/* Remote debugging interface for JTAG debugging protocol.
   Copyright 1993-1995, 2000 Free Software Foundation, Inc.
   Contributed by Cygnus Support.  Written by Marko Mlinar
   <markom@opencores.org>
 
   This file is part of GDB.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */
 
#include "defs.h"
#include "inferior.h"
#include "bfd.h"
#include "symfile.h"
#include "gdb_wait.h"
#include "gdbcmd.h"
#include "gdbcore.h"
#include "serial.h"
#include "target.h"
#include "remote-utils.h"
#include "gdb_string.h"
#include "tm.h"
 
#include <signal.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <fcntl.h>
 
#define TCLK (0x01)
#define TRST (0x02)
#define JTAG_WAIT()
#define NUM_RETRIES (16)
#define JTAG_RETRY_WAIT() usleep (100)
 
/* Selects crc trailer size in bits. Currently supported: 8 */
#define CRC_SIZE (8)
 
/* Scan chain size in bits.  */
#define SC_SIZE (4)
 
/* Scan chain info. */
/* *INDENT-OFF* */
static int chain_addr_size[] = { 0,  32, 0,  0,  5  };
static int chain_data_size[] = { 0,  32, 0,  32, 32 };
static int chain_is_valid[]  = { 0,  1,  0,  1,  1  };
static int chain_has_crc[]   = { 0,  1,  0,  1,  1  };
static int chain_has_rw[]    = { 0,  1,  0,  0,  1  };
/* *INDENT-OFF* */
 
/* Currently selected scan chain - just to prevent unnecessary
   transfers. */
 
static int current_chain;
 
/* Designates whether we are in SELECT_DR state, otherwise in
   RUN TEST/IDLE */
static int select_dr = 0;
 
/* Printer compatible device we have open.  */
static int lp;
 
/* Crc of current read or written data.  */
static int crc_r, crc_w = 0;
 
/* Generates new crc, sending in new bit input_bit */
static int
crc_calc (int crc, int input_bit)
{
  int c;
  int new_crc;
  int d;
 
#if (CRC_SIZE == 8)
  d = input_bit&1;
  c = crc;
 
  /* Move queue left.  */
  new_crc = crc << 1;
  /* Mask upper five bits.  */
  new_crc &= 0xF8;
 
  /* Set lower three bits */
  new_crc |= (d ^ ((c >> 7)&1));
  new_crc |= (d ^ ((c >> 0)&1) ^ ((c >> 7)&1)) << 1;
  new_crc |= (d ^ ((c >> 1)&1) ^ ((c >> 7)&1)) << 2;
  return new_crc;
#else
  return 0;
#endif
}
 
/* Resets JTAG.
   Writes TRST=0
   and    TRST=1 */
 
static void
jp1_reset_JTAG ()
{
  unsigned char data;
  data = 0;
  write (lp, &data, sizeof (data));
  JTAG_WAIT();
  data = TRST;
  write (lp, &data, sizeof (data));
  JTAG_WAIT();
}
 
/* Writes TCLK=0, TRST=1, TMS=bit0, TDI=bit1
   and    TCLK=1, TRST=1, TMS=bit0, TDI=bit1 */
 
static void
jp1_write_JTAG (packet)
     unsigned char packet;
{
  unsigned char data;
  data = ((packet & 3) << 2) | TRST;
  write (lp, &data, sizeof (data));
  JTAG_WAIT();
  crc_w = crc_calc (crc_w, (packet >> 1)&1);
 
  /* rise clock */
  data |= TCLK;
  write (lp, &data, sizeof (data));
  JTAG_WAIT();
}
 
/* Reads TDO, using IOCTL.  */
 
static int
jp1_read_JTAG ()
{
  int data;
  ioctl (data, 0x60b, &data);
  data = ((data & 0x80) != 0);
  crc_r = crc_calc (crc_r, data);
  return data;
}
 
/* Writes bitstream.  MS bit first.  */
 
static void
jp1_write_stream (stream, len, set_last_bit)
     unsigned long long int stream;
     int len;
     int set_last_bit;
{
  int i;
  if (len <= 0) return;
  for (i = len - 1; i > 0; i--)
    jp1_write_JTAG (((stream >> i) & 1) << 1);
 
  if (set_last_bit)
    jp1_write_JTAG (((stream & 1) << 1) | 1);
  else
    jp1_write_JTAG ((stream & 1) << 1);
}
 
/* Gets bitstream.  MS bit first.  */
 
static unsigned long long int
jp1_read_stream (len, stream, set_last_bit)
     int len;
     unsigned long stream;
     int set_last_bit;
{
  int i;
  unsigned long long int data;
 
  if (len <= 0) return;
  data = 0;
  for (i = 0; i < len-1; i++)
    {
      jp1_write_JTAG (0 + ((stream & 1) << 1));
      stream >>= 1;
      data <<= 1;
      data |= jp1_read_JTAG ();
    }
 
  if (set_last_bit)
    jp1_write_JTAG (1 + (stream & 1) << 1);
  else
    jp1_write_JTAG (0 + (stream & 1) << 1);
  data <<= 1;
  data |= jp1_read_JTAG ();
  return data;
}
 
/* Goes into SELECT_IR state. Should be called before every control write.  */
 
static void
jp1_prepare_control ()
{
  if (!select_dr)
    jp1_write_JTAG (1); /* SELECT_DR SCAN */
  jp1_write_JTAG (1); /* SELECT_IR SCAN */
  select_dr = 0;
}
 
/* Sets register/memory regno to data.  */
 
void
jtag_write_reg (regno, data)
     int regno;
     unsigned long long int data;
{
  int crc_read, crc_write, crc_ok, retry;
 
  if (!select_dr)
    jp1_write_JTAG (1); /* SELECT_DR SCAN */
  select_dr = 1;
 
  /* If we don't have rw bit, we assume chain
     is read only. */
  if (!chain_has_rw[current_chain])
    error ("Internal: Chain not writable.");
 
  for (retry = 0; retry < NUM_RETRIES; retry++)
    {
      jp1_write_JTAG (0); /* CAPTURE_DR */
      jp1_write_JTAG (0); /* SHIFT_DR */
      crc_w = 0;
      /* write addr */
      jp1_write_stream (regno, chain_addr_size[current_chain], 0);
      /* write (R/W=1) - we tested that previously. */
      jp1_write_JTAG (2);
      /* write data */
      jp1_write_stream (data, chain_data_size[current_chain], 0);
      if (chain_has_crc[current_chain])
        {
          crc_write = crc_w;
          /* write CRC, EXIT1_DR */
          crc_read = jp1_read_stream (crc_write, CRC_SIZE, 1);
        }
      jp1_write_JTAG (1); /* UPDATE_DR */
       /* Did JTAG receive packet correctly? */
      if (chain_has_crc[current_chain])
        crc_ok = jp1_read_JTAG ();
      jp1_write_JTAG (1); /* SELECT_DR */
      if (chain_has_crc[current_chain])
        {
          if ((crc_read == crc_write) && (crc_ok))
            return;
          JTAG_RETRY_WAIT();
        }
      else return;
    }
  err = ERR_CRC;
}
 
/* Reads register/memory from regno.  */
 
unsigned long long int
jtag_read_reg (regno)
     unsigned int regno;
{
  unsigned long long int data;
  int crc_read, crc_write, crc_actual_read,  retry, crc_ok;
 
  if (!select_dr)
    jp1_write_JTAG (1); /* SELECT_DR SCAN */
  select_dr = 1;
 
  for (retry = 0; retry < NUM_RETRIES; retry++)
    {
      jp1_write_JTAG (0); /* CAPTURE_DR */
      jp1_write_JTAG (0); /* SHIFT_DR */
      crc_w = 0;
      /* write addr */
      jp1_write_stream (regno, chain_addr_size[current_chain], 0);
      /* read (R/W=0) */
      if (chain_has_rw[current_chain])
        jp1_write_JTAG (0);
      if (chain_has_crc[current_chain])
        {
          crc_r = 0;
          /* data = 0 */
          data = jp1_read_stream (0, chain_data_size[current_chain], 0);
          crc_write = crc_w;
          crc_actual_read = crc_read;
          /* Send my crc, EXIT1_DR */
          crc_read = jp1_read_stream (crc_write, CRC_SIZE, 1);
        }
      jp1_write_JTAG (1); /* UPDATE_DR */
       /* Did JTAG receive packet correctly? */
      if (chain_has_crc[current_chain])
        crc_ok = jp1_read_JTAG ();
      jp1_write_JTAG (1); /* SELECT_DR */
      if (chain_has_crc[current_chain])
        {
          if ((crc_read == crc_actual_read) && (crc_ok))
            return;
          JTAG_RETRY_WAIT();
        }
      else
        return;
    }
  err = ERR_CRC;
}
 
/* Sets scan chain.  */
 
void
jtag_set_chain (chain)
     int chain;
{
  if (current_chain != chain)
    {
      if (!chain_is_valid[chain])
        error ("Chain not valid.");
 
      current_chain = chain;
      jp1_prepare_control ();
      jp1_write_stream (chain, SC_SIZE, 1);
    }
}
 
/* Initialize a new connection to the or1k board, and make sure we are
   really connected.  */
 
void
jtag_init (args)
     char * args;
{
  char *ptype;
  char *port_name;
  char **argv;
 
  if (args == 0)
    error ( "To open a or1k remote debugging connection, you need to specify what parallel\n"
            "port device is attached to the target board (e.g., /dev/lp0).\n");
 
  /* Parse the serial port name.  */
  if ((argv = buildargv (args)) == NULL)
    nomem (0);
  port_name = strsave (argv[0]);
  make_cleanup_freeargv (argv);
 
  /* Open and initialize the parallel port.  */
  lp = open (port_name, O_WRONLY);
  if (lp < 0)
    error ("Cannot open device.");
 
  printf_unfiltered ("Remote or1k debugging using %s\n", port_name);
 
  current_chain = -1;
  jp1_reset_JTAG ();
  jtag_set_chain (SC_RISC_DEBUG);
  free (port_name);
}
 
void
jtag_done ()
{
  close (lp);
}

Line No.	Rev	Author	Line
1	104	markom	`/* Remote debugging interface for JTAG debugging protocol.`
2			`Copyright 1993-1995, 2000 Free Software Foundation, Inc.`
3			`Contributed by Cygnus Support. Written by Marko Mlinar`
4			`<markom@opencores.org>`
5
6			`This file is part of GDB.`
7
8			`This program is free software; you can redistribute it and/or modify`
9			`it under the terms of the GNU General Public License as published by`
10			`the Free Software Foundation; either version 2 of the License, or`
11			`(at your option) any later version.`
12
13			`This program is distributed in the hope that it will be useful,`
14			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
15			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
16			`GNU General Public License for more details.`
17
18			`You should have received a copy of the GNU General Public License`
19			`along with this program; if not, write to the Free Software`
20			`Foundation, Inc., 59 Temple Place - Suite 330,`
21			`Boston, MA 02111-1307, USA. */`
22
23			`#include "defs.h"`
24			`#include "inferior.h"`
25			`#include "bfd.h"`
26			`#include "symfile.h"`
27			`#include "gdb_wait.h"`
28			`#include "gdbcmd.h"`
29			`#include "gdbcore.h"`
30			`#include "serial.h"`
31			`#include "target.h"`
32			`#include "remote-utils.h"`
33			`#include "gdb_string.h"`
34			`#include "tm.h"`
35
36			`#include <signal.h>`
37			`#include <sys/types.h>`
38			`#include <sys/stat.h>`
39			`#include <sys/ioctl.h>`
40			`#include <fcntl.h>`
41
42	113	markom	`#define TCLK (0x01)`
43			`#define TRST (0x02)`
44	104	markom	`#define JTAG_WAIT()`
45	113	markom	`#define NUM_RETRIES (16)`
46			`#define JTAG_RETRY_WAIT() usleep (100)`
47	104	markom
48	113	markom	`/* Selects crc trailer size in bits. Currently supported: 8 */`
49			`#define CRC_SIZE (8)`
50	104	markom
51	113	markom	`/* Scan chain size in bits. */`
52			`#define SC_SIZE (4)`
53
54			`/* Scan chain info. */`
55			`/* INDENT-OFF */`
56			`static int chain_addr_size[] = { 0, 32, 0, 0, 5 };`
57			`static int chain_data_size[] = { 0, 32, 0, 32, 32 };`
58			`static int chain_is_valid[] = { 0, 1, 0, 1, 1 };`
59			`static int chain_has_crc[] = { 0, 1, 0, 1, 1 };`
60			`static int chain_has_rw[] = { 0, 1, 0, 0, 1 };`
61			`/* INDENT-OFF */`
62
63			`/* Currently selected scan chain - just to prevent unnecessary`
64			`transfers. */`
65
66			`static int current_chain;`
67
68	104	markom	`/* Designates whether we are in SELECT_DR state, otherwise in`
69			`RUN TEST/IDLE */`
70			`static int select_dr = 0;`
71
72			`/* Printer compatible device we have open. */`
73			`static int lp;`
74
75			`/* Crc of current read or written data. */`
76			`static int crc_r, crc_w = 0;`
77
78			`/* Generates new crc, sending in new bit input_bit */`
79			`static int`
80			`crc_calc (int crc, int input_bit)`
81			`{`
82			`int c;`
83			`int new_crc;`
84			`int d;`
85
86	113	markom	`#if (CRC_SIZE == 8)`
87	104	markom	`d = input_bit&1;`
88			`c = crc;`
89
90			`/* Move queue left. */`
91			`new_crc = crc << 1;`
92			`/* Mask upper five bits. */`
93			`new_crc &= 0xF8;`
94
95			`/* Set lower three bits */`
96			`new_crc \|= (d ^ ((c >> 7)&1));`
97			`new_crc \|= (d ^ ((c >> 0)&1) ^ ((c >> 7)&1)) << 1;`
98			`new_crc \|= (d ^ ((c >> 1)&1) ^ ((c >> 7)&1)) << 2;`
99			`return new_crc;`
100	113	markom	`#else`
101			`return 0;`
102			`#endif`
103	104	markom	`}`
104
105			`/* Resets JTAG.`
106			`Writes TRST=0`
107			`and TRST=1 */`
108
109			`static void`
110			`jp1_reset_JTAG ()`
111			`{`
112			`unsigned char data;`
113			`data = 0;`
114			`write (lp, &data, sizeof (data));`
115			`JTAG_WAIT();`
116			`data = TRST;`
117			`write (lp, &data, sizeof (data));`
118			`JTAG_WAIT();`
119			`}`
120
121			`/* Writes TCLK=0, TRST=1, TMS=bit0, TDI=bit1`
122			`and TCLK=1, TRST=1, TMS=bit0, TDI=bit1 */`
123
124			`static void`
125			`jp1_write_JTAG (packet)`
126			`unsigned char packet;`
127			`{`
128			`unsigned char data;`
129			`data = ((packet & 3) << 2) \| TRST;`
130			`write (lp, &data, sizeof (data));`
131			`JTAG_WAIT();`
132			`crc_w = crc_calc (crc_w, (packet >> 1)&1);`
133
134			`/* rise clock */`
135			`data \|= TCLK;`
136			`write (lp, &data, sizeof (data));`
137			`JTAG_WAIT();`
138			`}`
139
140			`/* Reads TDO, using IOCTL. */`
141
142			`static int`
143			`jp1_read_JTAG ()`
144			`{`
145			`int data;`
146	113	markom	`ioctl (data, 0x60b, &data);`
147	104	markom	`data = ((data & 0x80) != 0);`
148			`crc_r = crc_calc (crc_r, data);`
149			`return data;`
150			`}`
151
152			`/* Writes bitstream. MS bit first. */`
153
154			`static void`
155			`jp1_write_stream (stream, len, set_last_bit)`
156	113	markom	`unsigned long long int stream;`
157	104	markom	`int len;`
158			`int set_last_bit;`
159			`{`
160			`int i;`
161			`if (len <= 0) return;`
162			`for (i = len - 1; i > 0; i--)`
163			`jp1_write_JTAG (((stream >> i) & 1) << 1);`
164
165			`if (set_last_bit)`
166			`jp1_write_JTAG (((stream & 1) << 1) \| 1);`
167			`else`
168			`jp1_write_JTAG ((stream & 1) << 1);`
169			`}`
170
171			`/* Gets bitstream. MS bit first. */`
172
173	113	markom	`static unsigned long long int`
174	104	markom	`jp1_read_stream (len, stream, set_last_bit)`
175			`int len;`
176			`unsigned long stream;`
177			`int set_last_bit;`
178			`{`
179			`int i;`
180	113	markom	`unsigned long long int data;`
181	104	markom
182			`if (len <= 0) return;`
183			`data = 0;`
184			`for (i = 0; i < len-1; i++)`
185			`{`
186			`jp1_write_JTAG (0 + ((stream & 1) << 1));`
187			`stream >>= 1;`
188			`data <<= 1;`
189			`data \|= jp1_read_JTAG ();`
190			`}`
191
192			`if (set_last_bit)`
193			`jp1_write_JTAG (1 + (stream & 1) << 1);`
194			`else`
195			`jp1_write_JTAG (0 + (stream & 1) << 1);`
196			`data <<= 1;`
197			`data \|= jp1_read_JTAG ();`
198			`return data;`
199			`}`
200
201			`/* Goes into SELECT_IR state. Should be called before every control write. */`
202
203			`static void`
204			`jp1_prepare_control ()`
205			`{`
206			`if (!select_dr)`
207			`jp1_write_JTAG (1); /* SELECT_DR SCAN */`
208			`jp1_write_JTAG (1); /* SELECT_IR SCAN */`
209			`select_dr = 0;`
210			`}`
211
212			`/* Sets register/memory regno to data. */`
213
214			`void`
215			`jtag_write_reg (regno, data)`
216			`int regno;`
217	113	markom	`unsigned long long int data;`
218	104	markom	`{`
219			`int crc_read, crc_write, crc_ok, retry;`
220
221			`if (!select_dr)`
222			`jp1_write_JTAG (1); /* SELECT_DR SCAN */`
223			`select_dr = 1;`
224
225	113	markom	`/* If we don't have rw bit, we assume chain`
226			`is read only. */`
227			`if (!chain_has_rw[current_chain])`
228			`error ("Internal: Chain not writable.");`
229
230	104	markom	`for (retry = 0; retry < NUM_RETRIES; retry++)`
231			`{`
232			`jp1_write_JTAG (0); /* CAPTURE_DR */`
233			`jp1_write_JTAG (0); /* SHIFT_DR */`
234			`crc_w = 0;`
235	113	markom	`/* write addr */`
236			`jp1_write_stream (regno, chain_addr_size[current_chain], 0);`
237			`/* write (R/W=1) - we tested that previously. */`
238			`jp1_write_JTAG (2);`
239			`/* write data */`
240			`jp1_write_stream (data, chain_data_size[current_chain], 0);`
241			`if (chain_has_crc[current_chain])`
242			`{`
243			`crc_write = crc_w;`
244			`/* write CRC, EXIT1_DR */`
245			`crc_read = jp1_read_stream (crc_write, CRC_SIZE, 1);`
246			`}`
247	104	markom	`jp1_write_JTAG (1); /* UPDATE_DR */`
248	113	markom	`/* Did JTAG receive packet correctly? */`
249			`if (chain_has_crc[current_chain])`
250			`crc_ok = jp1_read_JTAG ();`
251	104	markom	`jp1_write_JTAG (1); /* SELECT_DR */`
252	113	markom	`if (chain_has_crc[current_chain])`
253			`{`
254			`if ((crc_read == crc_write) && (crc_ok))`
255			`return;`
256			`JTAG_RETRY_WAIT();`
257			`}`
258			`else return;`
259	104	markom	`}`
260			`err = ERR_CRC;`
261			`}`
262
263			`/* Reads register/memory from regno. */`
264
265	113	markom	`unsigned long long int`
266	104	markom	`jtag_read_reg (regno)`
267			`unsigned int regno;`
268			`{`
269	113	markom	`unsigned long long int data;`
270	104	markom	`int crc_read, crc_write, crc_actual_read, retry, crc_ok;`
271
272			`if (!select_dr)`
273			`jp1_write_JTAG (1); /* SELECT_DR SCAN */`
274			`select_dr = 1;`
275
276			`for (retry = 0; retry < NUM_RETRIES; retry++)`
277			`{`
278			`jp1_write_JTAG (0); /* CAPTURE_DR */`
279			`jp1_write_JTAG (0); /* SHIFT_DR */`
280			`crc_w = 0;`
281	113	markom	`/* write addr */`
282			`jp1_write_stream (regno, chain_addr_size[current_chain], 0);`
283			`/* read (R/W=0) */`
284			`if (chain_has_rw[current_chain])`
285			`jp1_write_JTAG (0);`
286			`if (chain_has_crc[current_chain])`
287			`{`
288			`crc_r = 0;`
289			`/* data = 0 */`
290			`data = jp1_read_stream (0, chain_data_size[current_chain], 0);`
291			`crc_write = crc_w;`
292			`crc_actual_read = crc_read;`
293			`/* Send my crc, EXIT1_DR */`
294			`crc_read = jp1_read_stream (crc_write, CRC_SIZE, 1);`
295			`}`
296	104	markom	`jp1_write_JTAG (1); /* UPDATE_DR */`
297	113	markom	`/* Did JTAG receive packet correctly? */`
298			`if (chain_has_crc[current_chain])`
299			`crc_ok = jp1_read_JTAG ();`
300	104	markom	`jp1_write_JTAG (1); /* SELECT_DR */`
301	113	markom	`if (chain_has_crc[current_chain])`
302			`{`
303			`if ((crc_read == crc_actual_read) && (crc_ok))`
304			`return;`
305			`JTAG_RETRY_WAIT();`
306			`}`
307			`else`
308	104	markom	`return;`
309			`}`
310			`err = ERR_CRC;`
311			`}`
312
313	113	markom	`/* Sets scan chain. */`
314
315			`void`
316			`jtag_set_chain (chain)`
317			`int chain;`
318			`{`
319			`if (current_chain != chain)`
320			`{`
321			`if (!chain_is_valid[chain])`
322			`error ("Chain not valid.");`
323
324			`current_chain = chain;`
325			`jp1_prepare_control ();`
326			`jp1_write_stream (chain, SC_SIZE, 1);`
327			`}`
328			`}`
329
330	104	markom	`/* Initialize a new connection to the or1k board, and make sure we are`
331			`really connected. */`
332
333			`void`
334			`jtag_init (args)`
335			`char * args;`
336			`{`
337			`char *ptype;`
338			`char *port_name;`
339			`char **argv;`
340
341			`if (args == 0)`
342			`error ( "To open a or1k remote debugging connection, you need to specify what parallel\n"`
343			`"port device is attached to the target board (e.g., /dev/lp0).\n");`
344
345			`/* Parse the serial port name. */`
346			`if ((argv = buildargv (args)) == NULL)`
347			`nomem (0);`
348			`port_name = strsave (argv[0]);`
349			`make_cleanup_freeargv (argv);`
350
351			`/* Open and initialize the parallel port. */`
352			`lp = open (port_name, O_WRONLY);`
353			`if (lp < 0)`
354			`error ("Cannot open device.");`
355
356			`printf_unfiltered ("Remote or1k debugging using %s\n", port_name);`
357
358	113	markom	`current_chain = -1;`
359	104	markom	`jp1_reset_JTAG ();`
360	113	markom	`jtag_set_chain (SC_RISC_DEBUG);`
361	104	markom	`free (port_name);`
362			`}`
363
364			`void`
365			`jtag_done ()`
366			`{`
367			`close (lp);`
368			`}`

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[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [jtag.c] - Blame information for rev 113