URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [jtag.c] - Blame information for rev 118

Go to most recent revision | Details | Compare with Previous | View Log


/* Remote debugging interface for JTAG debugging protocol.
   JTAG connects to or1k target ops. See or1k-tdep.c
 
   Copyright 1993-1995, 2000 Free Software Foundation, Inc.
   Contributed by Cygnus Support.  Written by Marko Mlinar
   <markom@opencores.org>
 
   This file is part of GDB.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */
 
#include "defs.h"
#include "inferior.h"
#include "bfd.h"
#include "symfile.h"
#include "gdb_wait.h"
#include "gdbcmd.h"
#include "gdbcore.h"
#include "serial.h"
#include "target.h"
#include "remote-utils.h"
#include "gdb_string.h"
#include "tm.h"
 
#include <signal.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <fcntl.h>
 
#define TCLK (0x01)
#define TRST (0x02)
#define JTAG_WAIT()
#define NUM_RETRIES (16)
#define JTAG_RETRY_WAIT() usleep (100)
 
/* Selects crc trailer size in bits. Currently supported: 8 */
#define CRC_SIZE (8)
 
/* Scan chain size in bits.  */
#define SC_SIZE (4)
 
/* Scan chain info. */
/* *INDENT-OFF* */
static int chain_addr_size[] = { 0,  32, 0,  0,  5  };
static int chain_data_size[] = { 0,  32, 0,  32, 32 };
static int chain_is_valid[]  = { 0,  1,  0,  1,  1  };
static int chain_has_crc[]   = { 0,  1,  0,  1,  1  };
static int chain_has_rw[]    = { 0,  1,  0,  0,  1  };
/* *INDENT-OFF* */
 
/* Currently selected scan chain - just to prevent unnecessary
   transfers. */
static int current_chain;
 
/* Designates whether we are in SELECT_DR state, otherwise in
   RUN TEST/IDLE */
static int select_dr = 0;
 
/* Printer compatible device we have open.  */
static int lp;
 
/* Crc of current read or written data.  */
static int crc_r, crc_w = 0;
 
/* Generates new crc, sending in new bit input_bit */
 
static int
crc_calc (int crc, int input_bit)
{
  int c;
  int new_crc;
  int d;
 
#if (CRC_SIZE == 8)
  d = input_bit&1;
  c = crc;
 
  /* Move queue left.  */
  new_crc = crc << 1;
 
  /* Mask upper five bits.  */
  new_crc &= 0xF8;
 
  /* Set lower three bits */
  new_crc |= (d ^ ((c >> 7)&1));
  new_crc |= (d ^ ((c >> 0)&1) ^ ((c >> 7)&1)) << 1;
  new_crc |= (d ^ ((c >> 1)&1) ^ ((c >> 7)&1)) << 2;
  return new_crc;
#else
  return 0;
#endif
}
 
/* Resets JTAG.
   Writes TRST=0
   and    TRST=1 */
 
static void
jp1_reset_JTAG ()
{
  unsigned char data;
  data = 0;
  write (lp, &data, sizeof (data));
  JTAG_WAIT();
  data = TRST;
  write (lp, &data, sizeof (data));
  JTAG_WAIT();
}
 
/* Writes TCLK=0, TRST=1, TMS=bit0, TDI=bit1
   and    TCLK=1, TRST=1, TMS=bit0, TDI=bit1 */
 
static void
jp1_write_JTAG (packet)
     unsigned char packet;
{
  unsigned char data;
  data = ((packet & 3) << 2) | TRST;
  write (lp, &data, sizeof (data));
  JTAG_WAIT();
  crc_w = crc_calc (crc_w, (packet >> 1)&1);
 
  /* rise clock */
  data |= TCLK;
  write (lp, &data, sizeof (data));
  JTAG_WAIT();
}
 
/* Reads TDO, using IOCTL.  */
 
static int
jp1_read_JTAG ()
{
  int data;
  ioctl (data, 0x60b, &data);
  data = ((data & 0x80) != 0);
  crc_r = crc_calc (crc_r, data);
  return data;
}
 
/* Writes bitstream.  MS bit first.  */
 
static void
jp1_write_stream (stream, len, set_last_bit)
     unsigned long long int stream;
     int len;
     int set_last_bit;
{
  int i;
  if (len <= 0) return;
  for (i = len - 1; i > 0; i--)
    jp1_write_JTAG (((stream >> i) & 1) << 1);
 
  if (set_last_bit)
    jp1_write_JTAG (((stream & 1) << 1) | 1);
  else
    jp1_write_JTAG ((stream & 1) << 1);
}
 
/* Gets bitstream.  MS bit first.  */
 
static unsigned long long int
jp1_read_stream (len, stream, set_last_bit)
     int len;
     unsigned long stream;
     int set_last_bit;
{
  int i;
  unsigned long long int data;
 
  if (len <= 0) return;
  data = 0;
  for (i = 0; i < len-1; i++)
    {
      jp1_write_JTAG (0 + ((stream & 1) << 1));
      stream >>= 1;
      data <<= 1;
      data |= jp1_read_JTAG ();
    }
 
  if (set_last_bit)
    jp1_write_JTAG (1 + (stream & 1) << 1);
  else
    jp1_write_JTAG (0 + (stream & 1) << 1);
  data <<= 1;
  data |= jp1_read_JTAG ();
  return data;
}
 
/* Goes into SELECT_IR state. Should be called before every control write.  */
 
static void
jp1_prepare_control ()
{
  if (!select_dr)
    jp1_write_JTAG (1); /* SELECT_DR SCAN */
  jp1_write_JTAG (1);   /* SELECT_IR SCAN */
  select_dr = 0;
}
 
/* Sets register/memory regno to data.  */
 
void
jtag_write_reg (regno, data)
     int regno;
     unsigned long long int data;
{
  int crc_read, crc_write, crc_ok, retry;
 
  if (!select_dr)
    jp1_write_JTAG (1); /* SELECT_DR SCAN */
  select_dr = 1;
 
  /* If we don't have rw bit, we assume chain
     is read only. */
  if (!chain_has_rw[current_chain])
    error ("Internal: Chain not writable.");
 
  for (retry = 0; retry < NUM_RETRIES; retry++)
    {
      jp1_write_JTAG (0); /* CAPTURE_DR */
      jp1_write_JTAG (0); /* SHIFT_DR */
      crc_w = 0;
 
      /* write addr */
      jp1_write_stream (regno, chain_addr_size[current_chain], 0);
 
      /* write (R/W=1) - we tested that previously. */
      jp1_write_JTAG (2);
 
      /* write data */
      jp1_write_stream (data, chain_data_size[current_chain], 0);
      if (chain_has_crc[current_chain])
        {
          crc_write = crc_w;
 
          /* write CRC, EXIT1_DR */
          crc_read = jp1_read_stream (crc_write, CRC_SIZE, 1);
        }
      jp1_write_JTAG (1); /* UPDATE_DR */
 
       /* Did JTAG receive packet correctly? */
      if (chain_has_crc[current_chain])
        crc_ok = jp1_read_JTAG ();
      jp1_write_JTAG (1); /* SELECT_DR */
      if (chain_has_crc[current_chain])
        {
          if ((crc_read == crc_write) && (crc_ok))
            return;
          JTAG_RETRY_WAIT();
        }
      else return;
    }
  err = ERR_CRC;
}
 
/* Reads register/memory from regno.  */
 
unsigned long long int
jtag_read_reg (regno)
     unsigned int regno;
{
  unsigned long long int data;
  int crc_read, crc_write, crc_actual_read,  retry, crc_ok;
 
  if (!select_dr)
    jp1_write_JTAG (1); /* SELECT_DR SCAN */
  select_dr = 1;
 
  for (retry = 0; retry < NUM_RETRIES; retry++)
    {
      jp1_write_JTAG (0); /* CAPTURE_DR */
      jp1_write_JTAG (0); /* SHIFT_DR */
      crc_w = 0;
 
      /* write addr */
      jp1_write_stream (regno, chain_addr_size[current_chain], 0);
 
      /* read (R/W=0) */
      if (chain_has_rw[current_chain])
        jp1_write_JTAG (0);
      if (chain_has_crc[current_chain])
        {
          crc_r = 0;
 
          /* data = 0 */
          data = jp1_read_stream (0, chain_data_size[current_chain], 0);
          crc_write = crc_w;
          crc_actual_read = crc_read;
 
          /* Send my crc, EXIT1_DR */
          crc_read = jp1_read_stream (crc_write, CRC_SIZE, 1);
        }
      jp1_write_JTAG (1); /* UPDATE_DR */
 
       /* Did JTAG receive packet correctly? */
      if (chain_has_crc[current_chain])
        crc_ok = jp1_read_JTAG ();
      jp1_write_JTAG (1); /* SELECT_DR */
      if (chain_has_crc[current_chain])
        {
          if ((crc_read == crc_actual_read) && (crc_ok))
            return;
          JTAG_RETRY_WAIT();
        }
      else
        return;
    }
  err = ERR_CRC;
}
 
/* Sets scan chain.  */
 
void
jtag_set_chain (chain)
     int chain;
{
  if (current_chain != chain)
    {
      if (!chain_is_valid[chain])
        error ("Chain not valid.");
 
      current_chain = chain;
      jp1_prepare_control ();
 
      jp1_write_JTAG (0); /* CAPTURE_IR */
      jp1_write_JTAG (0); /* SHIFT_IR */
 
      /* write data, EXIT1_IR */
      jp1_write_stream (JI_CHAIN_SELECT, JI_SIZE, 4);
 
      jp1_write_JTAG (1); /* UPDATE_IR */
      jp1_write_JTAG (1); /* SELECT_DR */
 
      jp1_write_JTAG (0); /* CAPTURE_DR */
      jp1_write_JTAG (0); /* SHIFT_DR */
 
      /* write data, EXIT1_DR */
      jp1_write_stream (chain, SC_SIZE, 1);
 
      jp1_write_JTAG (1); /* UPDATE_DR */
      jp1_write_JTAG (1); /* SELECT_DR */
 
      /* Now we have to go out of SELECT_CHAIN mode.  */
      jp1_write_JTAG (1); /* SELECT_IR */
      jp1_write_JTAG (0); /* CAPTURE_IR */
      jp1_write_JTAG (0); /* SHIFT_IR */
 
      /* write data, EXIT1_IR */
      jp1_write_stream (JI_DEBUG, JI_SIZE,1 );
 
      jp1_write_JTAG (1); /* UPDATE_IR */
      jp1_write_JTAG (1); /* SELECT_DR */
      select_dr = 1;
    }
}
 
/* Initialize a new connection to the or1k board, and make sure we are
   really connected.  */
 
void
jtag_init (args)
     char * args;
{
  char *ptype;
  char *port_name;
  char **argv;
 
  if (args == 0)
    error ("To open a or1k remote debugging connection, you need to specify what parallel\n"
           "port device is attached to the target board (e.g., /dev/lp0).\n");
 
  /* Parse the port name.  */
  if ((argv = buildargv (args)) == NULL)
    nomem (0);
  port_name = strsave (argv[0]);
  make_cleanup_freeargv (argv);
 
  /* Open and initialize the parallel port.  */
  lp = open (port_name, O_WRONLY);
  if (lp < 0)
    error ("Cannot open device.");
 
  printf_unfiltered ("Remote or1k debugging using %s\n", port_name);
 
  current_chain = -1;
  jp1_reset_JTAG ();
  jtag_set_chain (SC_RISC_DEBUG);
  free (port_name);
}
 
void
jtag_done ()
{
  close (lp);
}

Line No.	Rev	Author	Line
1	104	markom	`/* Remote debugging interface for JTAG debugging protocol.`
2	118	markom	`JTAG connects to or1k target ops. See or1k-tdep.c`
3
4	104	markom	`Copyright 1993-1995, 2000 Free Software Foundation, Inc.`
5			`Contributed by Cygnus Support. Written by Marko Mlinar`
6			`<markom@opencores.org>`
7
8			`This file is part of GDB.`
9
10			`This program is free software; you can redistribute it and/or modify`
11			`it under the terms of the GNU General Public License as published by`
12			`the Free Software Foundation; either version 2 of the License, or`
13			`(at your option) any later version.`
14
15			`This program is distributed in the hope that it will be useful,`
16			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
17			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
18			`GNU General Public License for more details.`
19
20			`You should have received a copy of the GNU General Public License`
21			`along with this program; if not, write to the Free Software`
22			`Foundation, Inc., 59 Temple Place - Suite 330,`
23			`Boston, MA 02111-1307, USA. */`
24
25			`#include "defs.h"`
26			`#include "inferior.h"`
27			`#include "bfd.h"`
28			`#include "symfile.h"`
29			`#include "gdb_wait.h"`
30			`#include "gdbcmd.h"`
31			`#include "gdbcore.h"`
32			`#include "serial.h"`
33			`#include "target.h"`
34			`#include "remote-utils.h"`
35			`#include "gdb_string.h"`
36			`#include "tm.h"`
37
38			`#include <signal.h>`
39			`#include <sys/types.h>`
40			`#include <sys/stat.h>`
41			`#include <sys/ioctl.h>`
42			`#include <fcntl.h>`
43
44	113	markom	`#define TCLK (0x01)`
45			`#define TRST (0x02)`
46	104	markom	`#define JTAG_WAIT()`
47	113	markom	`#define NUM_RETRIES (16)`
48			`#define JTAG_RETRY_WAIT() usleep (100)`
49	104	markom
50	113	markom	`/* Selects crc trailer size in bits. Currently supported: 8 */`
51			`#define CRC_SIZE (8)`
52	104	markom
53	113	markom	`/* Scan chain size in bits. */`
54			`#define SC_SIZE (4)`
55
56			`/* Scan chain info. */`
57			`/* INDENT-OFF */`
58			`static int chain_addr_size[] = { 0, 32, 0, 0, 5 };`
59			`static int chain_data_size[] = { 0, 32, 0, 32, 32 };`
60			`static int chain_is_valid[] = { 0, 1, 0, 1, 1 };`
61			`static int chain_has_crc[] = { 0, 1, 0, 1, 1 };`
62			`static int chain_has_rw[] = { 0, 1, 0, 0, 1 };`
63			`/* INDENT-OFF */`
64
65			`/* Currently selected scan chain - just to prevent unnecessary`
66			`transfers. */`
67			`static int current_chain;`
68
69	104	markom	`/* Designates whether we are in SELECT_DR state, otherwise in`
70			`RUN TEST/IDLE */`
71			`static int select_dr = 0;`
72
73			`/* Printer compatible device we have open. */`
74			`static int lp;`
75
76			`/* Crc of current read or written data. */`
77			`static int crc_r, crc_w = 0;`
78
79			`/* Generates new crc, sending in new bit input_bit */`
80	118	markom
81	104	markom	`static int`
82			`crc_calc (int crc, int input_bit)`
83			`{`
84			`int c;`
85			`int new_crc;`
86			`int d;`
87
88	113	markom	`#if (CRC_SIZE == 8)`
89	104	markom	`d = input_bit&1;`
90			`c = crc;`
91
92			`/* Move queue left. */`
93			`new_crc = crc << 1;`
94	118	markom
95	104	markom	`/* Mask upper five bits. */`
96			`new_crc &= 0xF8;`
97
98			`/* Set lower three bits */`
99			`new_crc \|= (d ^ ((c >> 7)&1));`
100			`new_crc \|= (d ^ ((c >> 0)&1) ^ ((c >> 7)&1)) << 1;`
101			`new_crc \|= (d ^ ((c >> 1)&1) ^ ((c >> 7)&1)) << 2;`
102			`return new_crc;`
103	113	markom	`#else`
104			`return 0;`
105			`#endif`
106	104	markom	`}`
107
108			`/* Resets JTAG.`
109			`Writes TRST=0`
110			`and TRST=1 */`
111
112			`static void`
113			`jp1_reset_JTAG ()`
114			`{`
115			`unsigned char data;`
116			`data = 0;`
117			`write (lp, &data, sizeof (data));`
118			`JTAG_WAIT();`
119			`data = TRST;`
120			`write (lp, &data, sizeof (data));`
121			`JTAG_WAIT();`
122			`}`
123
124			`/* Writes TCLK=0, TRST=1, TMS=bit0, TDI=bit1`
125			`and TCLK=1, TRST=1, TMS=bit0, TDI=bit1 */`
126
127			`static void`
128			`jp1_write_JTAG (packet)`
129			`unsigned char packet;`
130			`{`
131			`unsigned char data;`
132			`data = ((packet & 3) << 2) \| TRST;`
133			`write (lp, &data, sizeof (data));`
134			`JTAG_WAIT();`
135			`crc_w = crc_calc (crc_w, (packet >> 1)&1);`
136
137			`/* rise clock */`
138			`data \|= TCLK;`
139			`write (lp, &data, sizeof (data));`
140			`JTAG_WAIT();`
141			`}`
142
143			`/* Reads TDO, using IOCTL. */`
144
145			`static int`
146			`jp1_read_JTAG ()`
147			`{`
148			`int data;`
149	113	markom	`ioctl (data, 0x60b, &data);`
150	104	markom	`data = ((data & 0x80) != 0);`
151			`crc_r = crc_calc (crc_r, data);`
152			`return data;`
153			`}`
154
155			`/* Writes bitstream. MS bit first. */`
156
157			`static void`
158			`jp1_write_stream (stream, len, set_last_bit)`
159	113	markom	`unsigned long long int stream;`
160	104	markom	`int len;`
161			`int set_last_bit;`
162			`{`
163			`int i;`
164			`if (len <= 0) return;`
165			`for (i = len - 1; i > 0; i--)`
166			`jp1_write_JTAG (((stream >> i) & 1) << 1);`
167
168			`if (set_last_bit)`
169			`jp1_write_JTAG (((stream & 1) << 1) \| 1);`
170			`else`
171			`jp1_write_JTAG ((stream & 1) << 1);`
172			`}`
173
174			`/* Gets bitstream. MS bit first. */`
175
176	113	markom	`static unsigned long long int`
177	104	markom	`jp1_read_stream (len, stream, set_last_bit)`
178			`int len;`
179			`unsigned long stream;`
180			`int set_last_bit;`
181			`{`
182			`int i;`
183	113	markom	`unsigned long long int data;`
184	104	markom
185			`if (len <= 0) return;`
186			`data = 0;`
187			`for (i = 0; i < len-1; i++)`
188			`{`
189			`jp1_write_JTAG (0 + ((stream & 1) << 1));`
190			`stream >>= 1;`
191			`data <<= 1;`
192			`data \|= jp1_read_JTAG ();`
193			`}`
194
195			`if (set_last_bit)`
196			`jp1_write_JTAG (1 + (stream & 1) << 1);`
197			`else`
198			`jp1_write_JTAG (0 + (stream & 1) << 1);`
199			`data <<= 1;`
200			`data \|= jp1_read_JTAG ();`
201			`return data;`
202			`}`
203
204			`/* Goes into SELECT_IR state. Should be called before every control write. */`
205
206			`static void`
207			`jp1_prepare_control ()`
208			`{`
209			`if (!select_dr)`
210			`jp1_write_JTAG (1); /* SELECT_DR SCAN */`
211	118	markom	`jp1_write_JTAG (1); /* SELECT_IR SCAN */`
212	104	markom	`select_dr = 0;`
213			`}`
214
215			`/* Sets register/memory regno to data. */`
216
217			`void`
218			`jtag_write_reg (regno, data)`
219			`int regno;`
220	113	markom	`unsigned long long int data;`
221	104	markom	`{`
222			`int crc_read, crc_write, crc_ok, retry;`
223
224			`if (!select_dr)`
225			`jp1_write_JTAG (1); /* SELECT_DR SCAN */`
226			`select_dr = 1;`
227
228	113	markom	`/* If we don't have rw bit, we assume chain`
229			`is read only. */`
230			`if (!chain_has_rw[current_chain])`
231			`error ("Internal: Chain not writable.");`
232
233	104	markom	`for (retry = 0; retry < NUM_RETRIES; retry++)`
234			`{`
235			`jp1_write_JTAG (0); /* CAPTURE_DR */`
236			`jp1_write_JTAG (0); /* SHIFT_DR */`
237			`crc_w = 0;`
238	118	markom
239	113	markom	`/* write addr */`
240			`jp1_write_stream (regno, chain_addr_size[current_chain], 0);`
241	118	markom
242	113	markom	`/* write (R/W=1) - we tested that previously. */`
243			`jp1_write_JTAG (2);`
244	118	markom
245	113	markom	`/* write data */`
246			`jp1_write_stream (data, chain_data_size[current_chain], 0);`
247			`if (chain_has_crc[current_chain])`
248			`{`
249			`crc_write = crc_w;`
250	118	markom
251	113	markom	`/* write CRC, EXIT1_DR */`
252			`crc_read = jp1_read_stream (crc_write, CRC_SIZE, 1);`
253			`}`
254	104	markom	`jp1_write_JTAG (1); /* UPDATE_DR */`
255	118	markom
256	113	markom	`/* Did JTAG receive packet correctly? */`
257			`if (chain_has_crc[current_chain])`
258			`crc_ok = jp1_read_JTAG ();`
259	104	markom	`jp1_write_JTAG (1); /* SELECT_DR */`
260	113	markom	`if (chain_has_crc[current_chain])`
261			`{`
262			`if ((crc_read == crc_write) && (crc_ok))`
263			`return;`
264			`JTAG_RETRY_WAIT();`
265			`}`
266			`else return;`
267	104	markom	`}`
268			`err = ERR_CRC;`
269			`}`
270
271			`/* Reads register/memory from regno. */`
272
273	113	markom	`unsigned long long int`
274	104	markom	`jtag_read_reg (regno)`
275			`unsigned int regno;`
276			`{`
277	113	markom	`unsigned long long int data;`
278	104	markom	`int crc_read, crc_write, crc_actual_read, retry, crc_ok;`
279
280			`if (!select_dr)`
281			`jp1_write_JTAG (1); /* SELECT_DR SCAN */`
282			`select_dr = 1;`
283
284			`for (retry = 0; retry < NUM_RETRIES; retry++)`
285			`{`
286			`jp1_write_JTAG (0); /* CAPTURE_DR */`
287			`jp1_write_JTAG (0); /* SHIFT_DR */`
288			`crc_w = 0;`
289	118	markom
290	113	markom	`/* write addr */`
291	118	markom	`jp1_write_stream (regno, chain_addr_size[current_chain], 0);`
292
293	113	markom	`/* read (R/W=0) */`
294			`if (chain_has_rw[current_chain])`
295			`jp1_write_JTAG (0);`
296			`if (chain_has_crc[current_chain])`
297			`{`
298			`crc_r = 0;`
299	118	markom
300	113	markom	`/* data = 0 */`
301			`data = jp1_read_stream (0, chain_data_size[current_chain], 0);`
302			`crc_write = crc_w;`
303			`crc_actual_read = crc_read;`
304	118	markom
305	113	markom	`/* Send my crc, EXIT1_DR */`
306			`crc_read = jp1_read_stream (crc_write, CRC_SIZE, 1);`
307			`}`
308	104	markom	`jp1_write_JTAG (1); /* UPDATE_DR */`
309	118	markom
310	113	markom	`/* Did JTAG receive packet correctly? */`
311			`if (chain_has_crc[current_chain])`
312			`crc_ok = jp1_read_JTAG ();`
313	104	markom	`jp1_write_JTAG (1); /* SELECT_DR */`
314	113	markom	`if (chain_has_crc[current_chain])`
315			`{`
316			`if ((crc_read == crc_actual_read) && (crc_ok))`
317			`return;`
318			`JTAG_RETRY_WAIT();`
319			`}`
320			`else`
321	104	markom	`return;`
322			`}`
323			`err = ERR_CRC;`
324			`}`
325
326	113	markom	`/* Sets scan chain. */`
327
328			`void`
329			`jtag_set_chain (chain)`
330			`int chain;`
331			`{`
332			`if (current_chain != chain)`
333			`{`
334			`if (!chain_is_valid[chain])`
335			`error ("Chain not valid.");`
336
337			`current_chain = chain;`
338			`jp1_prepare_control ();`
339	118	markom
340			`jp1_write_JTAG (0); /* CAPTURE_IR */`
341			`jp1_write_JTAG (0); /* SHIFT_IR */`
342
343			`/* write data, EXIT1_IR */`
344			`jp1_write_stream (JI_CHAIN_SELECT, JI_SIZE, 4);`
345
346			`jp1_write_JTAG (1); /* UPDATE_IR */`
347			`jp1_write_JTAG (1); /* SELECT_DR */`
348
349			`jp1_write_JTAG (0); /* CAPTURE_DR */`
350			`jp1_write_JTAG (0); /* SHIFT_DR */`
351
352			`/* write data, EXIT1_DR */`
353	113	markom	`jp1_write_stream (chain, SC_SIZE, 1);`
354	118	markom
355			`jp1_write_JTAG (1); /* UPDATE_DR */`
356			`jp1_write_JTAG (1); /* SELECT_DR */`
357
358			`/* Now we have to go out of SELECT_CHAIN mode. */`
359			`jp1_write_JTAG (1); /* SELECT_IR */`
360			`jp1_write_JTAG (0); /* CAPTURE_IR */`
361			`jp1_write_JTAG (0); /* SHIFT_IR */`
362
363			`/* write data, EXIT1_IR */`
364			`jp1_write_stream (JI_DEBUG, JI_SIZE,1 );`
365
366			`jp1_write_JTAG (1); /* UPDATE_IR */`
367			`jp1_write_JTAG (1); /* SELECT_DR */`
368			`select_dr = 1;`
369	113	markom	`}`
370			`}`
371
372	104	markom	`/* Initialize a new connection to the or1k board, and make sure we are`
373			`really connected. */`
374
375			`void`
376			`jtag_init (args)`
377			`char * args;`
378			`{`
379			`char *ptype;`
380			`char *port_name;`
381			`char **argv;`
382
383			`if (args == 0)`
384	118	markom	`error ("To open a or1k remote debugging connection, you need to specify what parallel\n"`
385			`"port device is attached to the target board (e.g., /dev/lp0).\n");`
386	104	markom
387	118	markom	`/* Parse the port name. */`
388	104	markom	`if ((argv = buildargv (args)) == NULL)`
389			`nomem (0);`
390			`port_name = strsave (argv[0]);`
391			`make_cleanup_freeargv (argv);`
392
393			`/* Open and initialize the parallel port. */`
394			`lp = open (port_name, O_WRONLY);`
395			`if (lp < 0)`
396			`error ("Cannot open device.");`
397
398			`printf_unfiltered ("Remote or1k debugging using %s\n", port_name);`
399
400	113	markom	`current_chain = -1;`
401	104	markom	`jp1_reset_JTAG ();`
402	113	markom	`jtag_set_chain (SC_RISC_DEBUG);`
403	104	markom	`free (port_name);`
404			`}`
405
406			`void`
407			`jtag_done ()`
408			`{`
409			`close (lp);`
410			`}`

Browse

Tools

Subversion Repositories or1k

[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [jtag.c] - Blame information for rev 118