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[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [or1k-tdep.c] - Blame information for rev 113

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1 104 markom
/* Target-dependent code for the or1k architecture, for GDB, the GNU Debugger.
2
   Copyright 1988-1999, Free Software Foundation, Inc.
3
   Contributed by Alessandro Forin(af@cs.cmu.edu at CMU
4
   and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 2 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program; if not, write to the Free Software
20
   Foundation, Inc., 59 Temple Place - Suite 330,
21
   Boston, MA 02111-1307, USA.  */
22
 
23
#include "defs.h"
24
#include "gdb_string.h"
25
#include "frame.h"
26
#include "inferior.h"
27
#include "symtab.h"
28
#include "value.h"
29
#include "gdbcmd.h"
30
#include "language.h"
31
#include "gdbcore.h"
32
#include "symfile.h"
33
#include "objfiles.h"
34
#include "gdbtypes.h"
35
#include "target.h"
36
 
37
#include "opcode/or32.h"
38
 
39
/* *INDENT-OFF* */
40
 
41
/* Group reg name size.  See or1k_reg_names.  */
42
int or1k_group_name_sizes[OR1K_NUM_SPR_GROUPS] = {
43 113 markom
  64,   0,   0, 6, 6, 2, (24+32+32), 16, 1, 3, 2};
44 104 markom
 
45 113 markom
/* Generated reg names.  See or1k_spr_reg_name.  */
46 104 markom
int or1k_spr_valid_aliases[OR1K_NUM_SPR_GROUPS] = {
47 113 markom
  64, 515, 515, 6, 6, 2, (24+32+32), 16, 1, 3, 2};
48 104 markom
 
49
/* Register names.  */
50
char *or1k_reg_names[] = {
51
  /* group 0 - general*/
52 113 markom
  "UPR",    "VR", "PC", "SR", "EPCR0", "SPR0_5", "SPR0_6", "SPR0_7",
53
  "SPR0_8", "SPR0_9", "SPR0_10", "SPR0_11", "SPR0_12", "SPR0_13", "SPR0_14", "SPR0_15",
54 104 markom
  "EPCR0", "EPCR1", "EPCR2", "EPCR3", "EPCR4", "EPCR5", "EPCR6", "EPCR7",
55
  "EPCR8", "EPCR9", "EPCR10", "EPCR11", "EPCR12", "EPCR13", "EPCR14", "EPCR15",
56
  "EEAR0","EEAR1", "EEAR2", "EEAR3", "EEAR4", "EEAR5", "EEAR6", "EEAR7",
57
  "EEAR8", "EEAR9", "EEAR10", "EEAR11", "EEAR12", "EEAR13", "EEAR14", "EEAR15",
58
  "ESR0", "ESR1", "ESR2", "ESR3", "ESR4", "ESR5", "ESR6", "ESR7",
59
  "ESR8", "ESR9", "ESR10", "ESR11", "ESR12", "ESR13", "ESR14", "ESR15",
60 113 markom
  /* gpr+vf registers generated */
61 104 markom
  /* group 1 - Data MMU - not listed, generated */
62 113 markom
  /* group 2 - Instruction MMU - not listed, generated */
63
  /* group 3 - Data cache */
64
  "DCCR", "DCBPR", "DCBFR", "DCBIR", "DCBWR", "DCBLR",
65
  /* group 4 - Instruction cache */
66
  "ICCR", "ICBPR", "ICBFR", "ICBIR", "ICBWR", "ICBLR",
67
  /* group 5 - MAC */
68
  "MACLO", "MACHI",
69 104 markom
  /* group 6 - debug */
70
  "DVR0", "DVR1", "DVR2", "DVR3", "DVR4", "DVR5", "DVR6", "DVR7",
71
  "DCR0", "DCR1", "DCR2", "DCR3", "DCR4", "DCR5", "DCR6", "DCR7",
72 113 markom
  "DMR1", "DMR2", "DCWR0","DCWR1", "DSR", "DRR",  "PC",   "SPR6_23",
73 104 markom
 
74 113 markom
  /* group 7 - performance counters unit */
75
  "PCCR0", "PCCR1", "PCCR2", "PCCR3", "PCCR4", "PCCR5", "PCCR6", "PCCR7",
76
  "PCCM0", "PCMR1", "PCMR2", "PCMR3", "PCMR4", "PCMR5", "PCMR6", "PCMR7",
77
 
78
  /* group 8 - power management */
79
  "PMR",
80
 
81
  /* group 9 - PIC */
82
  "PICMR", "PICPR",
83
 
84
  /* group 10 - tick timer */
85
  "TTCR", "TTIR"
86
};
87
 
88
static char *or1k_gdb_reg_names[] = {
89 104 markom
  /* general purpose registers */
90
  "ZERO", "SP", "FP", "A0", "A1", "A2", "A3", "A4",
91
  "A5", "LR", "R10", "RV", "R12", "R13", "R14", "R15",
92
  "R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23",
93
  "R24", "R25", "R26", "R27", "R28", "R29", "R30", "R31",
94
  /* vector/floating point registers */
95
  "VFA0",  "VFA1",  "VFA2",  "VFA3",  "VFA4",  "VFA5",  "VFRV ", "VFR7",
96 113 markom
  "VFR8",  "VFR9",  "VFR10", "VFR11", "VFR12", "VFR13", "VFR14", "VFR15",
97 104 markom
  "VFR16", "VFR17", "VFR18", "VFR19", "VFR20", "VFR21", "VFR22", "VFR23",
98 113 markom
  "VFR24", "VFR25", "VFR26", "VFR27", "VFR28", "VFR29", "VFR30", "VFR31",
99
  "PC",    "SR",    "EPCR"
100 104 markom
};
101
 
102
static char *or1k_group_names[] = {
103
  "SYS", "DMMU", "IMMU", "DCACHE", "ICACHE", "MAC", "DEBUG", "PERF", "POWER",
104
  "PIC", "TIMER"
105
};
106 113 markom
/* Table of or1k signals.  */
107
static struct {
108
  char *name;
109
  char *string;
110
  } or1k_signals [NUM_OR1K_SIGNALS + 1] =
111
{
112
  {"RSTE", "Reset Exception"},
113
  {"DFPE", "Data Page Fault Exception"},
114
  {"IFPE", "Instruction Page Fault Exception"},
115
  {"LPINTE", "Low Priority Interrupt Exception"},
116
  {"AE", "Alignment Exception"},
117
  {"HPINTE", "High Priority Interrupt Exception"},
118
  {"DME", "DTLB Miss Exception"},
119
  {"IME", "ITLB Miss Exception"},
120
  {"RE", "Range Exception"},
121
  {"SCE", "SCE Exception"}, //!!!
122
  {NULL, NULL}
123
};
124
 
125 104 markom
/* *INDENT-ON* */
126
 
127
/* The list of available "set or1k " and "show or1k " commands */
128
static struct cmd_list_element *setor1kcmdlist = NULL;
129
static struct cmd_list_element *showor1kcmdlist = NULL;
130
 
131
/* List of all saved register addresses, produced by skip_prologue.
132
   Relative address to sp, not used if 0.  */
133
static int or1k_saved_reg_addr[NUM_REGS];
134
 
135
 
136
/* Converts regno to sprno.  or1k debug unit has GPRs mapped to SPRs,
137
   which are not compact, so we are mapping them for GDB.  */
138
int
139
or1k_regnum_to_sprnum (int regno)
140
{
141 113 markom
  if (regno < MAX_GPR_REGS)
142
    return SPR_REG(SPR_SYSTEM_GROUP, regno + CURRENT_CID * MAX_GPR_REGS + SPR_GPR);
143 104 markom
  if (regno < MAX_GPR_REGS + MAX_VF_REGS)
144 113 markom
    return SPR_REG(SPR_SYSTEM_GROUP, regno - MAX_GPR_REGS
145
                   + CURRENT_CID * MAX_GPR_REGS + SPR_VFPR);
146
  if (regno == PS_REGNUM)
147
    return SR_SPRNUM;
148 104 markom
  if (regno == PC_REGNUM)
149
    return PC_SPRNUM;
150
  if (regno == CCR_REGNUM)
151 113 markom
    return CCR_SPRNUM(CURRENT_CID);
152 104 markom
  error ("Invalid register number!");
153
}
154
 
155
/* Builds and returns register name.  */
156
 
157
static char tmp_name[16];
158
static char *
159 113 markom
or1k_spr_register_name (i)
160 104 markom
     int i;
161
{
162
  int group = i >> SPR_GROUP_SIZE_BITS;
163
  int index = i & (SPR_GROUP_SIZE - 1);
164
  switch (group)
165
    {
166
      /* Names covered in or1k_reg_names.  */
167
    case 0:
168 113 markom
    case 3:
169
    case 4:
170
    case 5:
171 104 markom
    case 6:
172 113 markom
    case 7:
173
    case 8:
174
    case 9:
175
    case 10:
176 104 markom
      {
177
        int group_start = 0;
178
        for (i = 0; i < group; i++)
179
          group_start += or1k_group_name_sizes[i];
180
 
181
        if (index >= or1k_group_name_sizes[group])
182
          {
183
            sprintf (tmp_name, "SPR%i_%i", group, index);
184
            return (char *)&tmp_name;
185
          }
186
        else
187
          return or1k_reg_names[group_start + index];
188
      }
189 113 markom
      /* Build names for DMMU group.  */
190 104 markom
    case 1:
191
      if (index < 256) {
192
        sprintf (tmp_name, "DTLBMR%i", index);
193
        return (char *)&tmp_name;
194
      }
195
      index -= 256;
196
      if (index < 256) {
197
        sprintf (tmp_name, "DTLBTR%i", index);
198
        return (char *)&tmp_name;
199
      }
200
      index -= 256;
201
      switch (index)
202
        {
203
        case 0:
204
          return "DMMUCR";
205
        case 1:
206
          return "DMMUPR";
207
        case 2:
208
          return "DTLBEIR";
209
        default:
210
          sprintf (tmp_name, "SPR1_%i", index+512);
211
          return (char *)&tmp_name;
212
      }
213 113 markom
      /* Build names for IMMU group.  */
214
    case 2:
215
      if (index < 256) {
216
        sprintf (tmp_name, "ITLBMR%i", index);
217
        return (char *)&tmp_name;
218
      }
219
      index -= 256;
220
      if (index < 256) {
221
        sprintf (tmp_name, "ITLBTR%i", index);
222
        return (char *)&tmp_name;
223
      }
224
      index -= 256;
225
      switch (index)
226
        {
227
        case 0:
228
          return "IMMUCR";
229
        case 1:
230
          return "IMMUPR";
231
        case 2:
232
          return "ITLBEIR";
233
        default:
234
          sprintf (tmp_name, "SPR1_%i", index+512);
235
          return (char *)&tmp_name;
236
      }
237 104 markom
    default:
238
      sprintf (tmp_name, "SPR%i_%i", group, index);
239
      return (char *)&tmp_name;
240
    }
241
}
242
 
243
/* Get register index in group from name.  Negative if no match.  */
244
 
245
static int
246
or1k_regno_from_name (group, name)
247
     int group;
248
     char *name;
249
{
250
  int i;
251
  if (toupper(name[0]) == 'S' && toupper(name[1]) == 'P' && toupper(name[2]) == 'R')
252
    {
253
      char *ptr_c;
254
      name += 3;
255
      i = (int) strtoul (name, &ptr_c, 10);
256
      if (*ptr_c != '_' || i != group)
257
        return -1;
258
      ptr_c++;
259
      i = (int) strtoul (name, &ptr_c, 10);
260
      if (*ptr_c)
261
        return -1;
262
      else return i;
263
    }
264
  for (i = 0; i < or1k_spr_valid_aliases[group]; i++)
265
    {
266
      char *s;
267 113 markom
      s = or1k_spr_register_name (SPR_REG(group, i));
268 104 markom
      if (strcasecmp (name, s) == 0)
269
        return i;
270
    }
271
  return -1;
272
}
273
 
274
/* Resturs gdb register name.  */
275
char *
276
or1k_register_name (regno)
277
     int regno;
278
{
279 113 markom
  return or1k_gdb_reg_names[regno];
280 104 markom
}
281
 
282 113 markom
static int
283
do_vf_register (regnum)
284
     int regnum;
285
{                               /* do values for FP (float) regs */
286
  char *raw_buffer;
287
  double doub, flt;             /* doubles extracted from raw hex data */
288
  int inv1, inv3, byte;
289
 
290
  raw_buffer = (char *) alloca (OR1K_VF_REGSIZE);
291
 
292
  /* Get the data in raw format.  */
293
  if (read_relative_register_raw_bytes (regnum, raw_buffer))
294
    error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
295
 
296
  flt = unpack_double (builtin_type_float, raw_buffer, &inv1);
297
  doub = unpack_double (builtin_type_double, raw_buffer, &inv3);
298
 
299
  printf_filtered (inv1 ? " %-5s flt: <invalid float>" :
300
                       " %-5s flt:%-17.9g", REGISTER_NAME (regnum), flt);
301
  printf_filtered (inv3 ? " dbl: <invalid double> " :
302
                   " dbl: %-24.17g ", doub);
303
 
304
  /* pad small registers */
305
  for (byte = 0; byte < (OR1K_GPR_REGSIZE - REGISTER_VIRTUAL_SIZE (regnum)); byte++)
306
    printf_filtered ("  ");
307
  /* Now print the register value in hex, endian order. */
308
  if (TARGET_BYTE_ORDER == BIG_ENDIAN)
309
    for (byte = REGISTER_RAW_SIZE (regnum) - REGISTER_VIRTUAL_SIZE (regnum);
310
         byte < REGISTER_RAW_SIZE (regnum);
311
         byte++)
312
      printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
313
  else
314
    for (byte = REGISTER_VIRTUAL_SIZE (regnum) - 1;
315
         byte >= 0;
316
         byte--)
317
      printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
318
  printf_filtered ("\n");
319
 
320
  regnum++;
321
  return regnum;
322
}
323
 
324
/* Print a row's worth of GP (int) registers, with name labels above */
325
 
326
static int
327
do_gp_register_row (regnum)
328
     int regnum;
329
{
330
  /* do values for GP (int) regs */
331
  char raw_buffer[MAX_REGISTER_RAW_SIZE];
332
  int ncols = (OR1K_64BIT_IMPLEMENTATION ? 4 : 8);      /* display cols per row */
333
  int col, byte;
334
  int start_regnum = regnum;
335
  int numregs = NUM_REGS;
336
 
337
 
338
  /* For GP registers, we print a separate row of names above the vals */
339
  printf_filtered ("     ");
340
  for (col = 0; col < ncols && regnum < numregs; regnum++)
341
    {
342
      if (*REGISTER_NAME (regnum) == '\0')
343
        continue;               /* unused register */
344
      if (OR1K_IS_VF(regnum))
345
        break;                  /* end the row: reached VF register */
346
      printf_filtered (OR1K_64BIT_IMPLEMENTATION ? "%17s" : "%9s",
347
                       REGISTER_NAME (regnum));
348
      col++;
349
    }
350
  printf_filtered ("\n      ");
351
 
352
  regnum = start_regnum;        /* go back to start of row */
353
 
354
  /* now print the values in hex, 4 or 8 to the row */
355
  for (col = 0; col < ncols && regnum < numregs; regnum++)
356
    {
357
      if (*REGISTER_NAME (regnum) == '\0')
358
        continue;               /* unused register */
359
      if (OR1K_IS_VF(regnum))
360
        break;                  /* end row: reached VF register */
361
      /* OK: get the data in raw format.  */
362
      if (read_relative_register_raw_bytes (regnum, raw_buffer))
363
        error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
364
      /* pad small registers */
365
      for (byte = 0; byte < (OR1K_GPR_REGSIZE - REGISTER_VIRTUAL_SIZE (regnum)); byte++)
366
        printf_filtered ("  ");
367
      /* Now print the register value in hex, endian order. */
368
      if (TARGET_BYTE_ORDER == BIG_ENDIAN)
369
        for (byte = REGISTER_RAW_SIZE (regnum) - REGISTER_VIRTUAL_SIZE (regnum);
370
             byte < REGISTER_RAW_SIZE (regnum);
371
             byte++)
372
          printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
373
      else
374
        for (byte = REGISTER_VIRTUAL_SIZE (regnum) - 1;
375
             byte >= 0;
376
             byte--)
377
          printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
378
      printf_filtered (" ");
379
      col++;
380
    }
381
  if (col > 0)                   /* ie. if we actually printed anything... */
382
    printf_filtered ("\n");
383
 
384
  return regnum;
385
}
386
 
387
/* Replacement for generic do_registers_info.
388
   Print regs in pretty columns.  */
389
static void
390
print_register (regnum, all)
391
     int regnum, all;
392
{
393
  int offset;
394
  char raw_buffer[MAX_REGISTER_RAW_SIZE];
395
 
396
  /* Get the data in raw format.  */
397
  if (read_relative_register_raw_bytes (regnum, raw_buffer))
398
    {
399
      printf_filtered ("%s: [Invalid]", REGISTER_NAME (regnum));
400
      return;
401
    }
402
 
403
  /* If virtual format is floating, print it that way.  */
404
  if (OR1K_IS_VF (regnum))
405
    do_vf_register (regnum);
406
  else
407
    {
408
      int byte;
409
      printf_filtered ("%-16s\t", REGISTER_NAME (regnum));
410
 
411
      /* pad small registers */
412
      for (byte = 0; byte < (OR1K_GPR_REGSIZE - REGISTER_VIRTUAL_SIZE (regnum)); byte++)
413
        printf_filtered ("  ");
414
      /* Now print the register value in hex, endian order. */
415
      if (TARGET_BYTE_ORDER == BIG_ENDIAN)
416
        for (byte = REGISTER_RAW_SIZE (regnum) - REGISTER_VIRTUAL_SIZE (regnum);
417
             byte < REGISTER_RAW_SIZE (regnum);
418
             byte++)
419
          printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
420
      else
421
        for (byte = REGISTER_VIRTUAL_SIZE (regnum) - 1;
422
             byte >= 0;
423
             byte--)
424
          printf_filtered ("%02x", (unsigned char) raw_buffer[byte]);
425
      printf_filtered (" ");
426
    }
427
}
428
 
429
/* DO_REGISTERS_INFO: called by "info register" command */
430
 
431
void
432
or1k_do_registers_info (regnum, fpregs)
433
     int regnum;
434
     int fpregs;
435
{
436
  if (fpregs && !or1k_implementation.vf_present)
437
    {
438
      warning ("VF register set not present in this implementation.");
439
      fpregs = 0;
440
    }
441
  if (regnum != -1)             /* do one specified register */
442
    {
443
      if (*(REGISTER_NAME (regnum)) == '\0')
444
        error ("Not a valid register for the current processor type");
445
 
446
      print_register (regnum, 0);
447
      printf_filtered ("\n");
448
    }
449
  else
450
    /* do all (or most) registers */
451
    {
452
      regnum = 0;
453
      while (regnum < NUM_REGS)
454
        {
455
          if (OR1K_IS_VF (regnum))
456
            if (fpregs)         /* true for "INFO ALL-REGISTERS" command */
457
              regnum = do_vf_register (regnum); /* FP regs */
458
            else
459
              regnum++;         /* skip floating point regs */
460
          else
461
            regnum = do_gp_register_row (regnum);       /* GP (int) regs */
462
        }
463
    }
464
}
465
 
466 104 markom
/* Given the address at which to insert a breakpoint (BP_ADDR),
467
   what will that breakpoint be?
468
 
469
   For or1k, we have a breakpoint instruction. Since all or1k
470
   instructions are 32 bits, this is all we need, regardless of
471
   address. K is not used.  */
472
 
473
unsigned char *
474
or1k_breakpoint_from_pc (bp_addr, bp_size)
475
     CORE_ADDR * bp_addr;
476
     int *bp_size;
477
{
478 113 markom
  static char breakpoint[] = BRK_INSTR_STRUCT;
479 104 markom
  *bp_size = OR1K_INSTLEN;
480
  return breakpoint;
481
}
482
 
483 113 markom
/* Return the string for a signal.  Replacement for target_signal_to_string (sig).  */
484
char
485
*or1k_signal_to_string (sig)
486
     enum target_signal sig;
487
{
488
  if ((sig >= TARGET_SIGNAL_FIRST) && (sig <= TARGET_SIGNAL_LAST))
489
    return or1k_signals[sig].string;
490
  else
491
    if (sig <= TARGET_SIGNAL_LAST + NUM_OR1K_SIGNALS)
492
      return or1k_signals[sig - TARGET_SIGNAL_LAST].string;
493
    else
494
      return 0/* signals[TARGET_SIGNAL_UNKNOWN].string*/;
495
}
496
 
497
/* Return the name for a signal.  */
498
char *
499
or1k_signal_to_name (sig)
500
     enum target_signal sig;
501
{
502
  if (sig >= TARGET_SIGNAL_LAST)
503
    if (sig <= TARGET_SIGNAL_LAST + NUM_OR1K_SIGNALS)
504
      return or1k_signals[sig - TARGET_SIGNAL_LAST].name;
505
    else
506
    /* I think the code which prints this will always print it along with
507
       the string, so no need to be verbose.  */
508
      return "?";
509
  if (sig == TARGET_SIGNAL_UNKNOWN)
510
    return "?";
511
  return 0/*!!!signals[sig].name*/;
512
}
513
 
514
/* Given a name, return its signal.  */
515
enum target_signal
516
or1k_signal_from_name (name)
517
     char *name;
518
{
519
  enum target_signal sig;
520
 
521
  /* It's possible we also should allow "SIGCLD" as well as "SIGCHLD"
522
     for TARGET_SIGNAL_SIGCHLD.  SIGIOT, on the other hand, is more
523
     questionable; seems like by now people should call it SIGABRT
524
     instead.  */
525
 
526
  /* This ugly cast brought to you by the native VAX compiler.  */
527
  for (sig = TARGET_SIGNAL_FIRST;
528
       or1k_signal_to_name (sig) != NULL;
529
       sig = (enum target_signal) ((int) sig + 1))
530
    if (STREQ (name, or1k_signal_to_name (sig)))
531
      return sig;
532
  return TARGET_SIGNAL_UNKNOWN;
533
}
534
 
535 104 markom
/* Given a return value in `regbuf' with a type `valtype', extract and
536
   copy its value into `valbuf'. */
537
void
538
or1k_extract_return_value (valtype, regbuf, valbuf)
539
     struct type *valtype;
540
     char regbuf[REGISTER_BYTES];
541
     char *valbuf;
542
{
543
  if (TYPE_CODE_FLT == TYPE_CODE (valtype))
544
    memcpy (valbuf, &regbuf[REGISTER_BYTE (VFRV_REGNUM)], TYPE_LENGTH (valtype));
545
  else
546
    memcpy (valbuf, &regbuf[REGISTER_BYTE (RV_REGNUM)], TYPE_LENGTH (valtype));
547
}
548
 
549
/* The or1k cc defines the following
550
   prologue:
551
00000000 <_proc1>:
552
   0:   d7 e1 17 e4     l.sw 0xffffffe4(r1),r2
553
   4:   9c 41 00 00     l.addi r2,r1,0x0
554
   8:   9c 21 ff e8     l.addi r1,r1,0xffffffe8
555
   c:   d7 e2 1f f8     l.sw 0xfffffff8(r2),r3
556
  10:   d7 e2 27 f4     l.sw 0xfffffff4(r2),r4
557
  14:   84 82 ff f8     l.lwz r4,0xfffffff8(r2)
558
  18:   9d 24 00 00     l.addi r9,r4,0x0
559
  1c:   00 00 00 02     l.j 0x2
560
  20:   15 00 00 00     l.nop
561
 
562
00000024 <_L2>:
563
  24:   84 41 ff fc     l.lwz r2,0xfffffffc(r1)
564
  28:   48 00 58 00     l.jalr r11
565
  2c:   9c 21 00 18     l.addi r1,r1,0x18 */
566
 
567
CORE_ADDR
568
or1k_skip_prologue (CORE_ADDR pc)
569
{
570
  unsigned long inst;
571
  CORE_ADDR skip_pc;
572
  CORE_ADDR func_addr, func_end;
573
  struct symtab_and_line sal;
574
  int i;
575
  int offset = 0;
576
 
577
  for (i = 0; i < MAX_GPR_REGS; i++)
578
    or1k_saved_reg_addr[i] = -1;
579
 
580
  /* Is there a prologue?  */
581
  inst = or1k_fetch_instruction (pc);
582
  if (inst & 0xfc1ff800 != 0xd4011000) return pc; /* l.sw I(r1),r2 */
583
  or1k_saved_reg_addr[2] = offset++;
584
  inst = or1k_fetch_instruction (pc + OR1K_INSTLEN);
585
  if (inst & 0xFFFF0000 != 0x9c410000) return pc; /* l.addi r2,r1,I */
586
  pc += 2 * OR1K_INSTLEN;
587
  inst = or1k_fetch_instruction (pc);
588
  if (inst & 0xFFFF0000 != 0x9c210000) return pc; /* l.addi r1,r1,I */
589
  pc += OR1K_INSTLEN;
590
 
591
  /* Skip stored registers.  */
592
  inst = or1k_fetch_instruction (pc);
593
  while (inst & 0xfc1ff800 != 0xd4020000)         /* l.sw 0x0(r2),rx */
594
    {
595
      /* get saved reg. */
596
      or1k_saved_reg_addr[(inst >> 11) & 0x1f] = offset++;
597
      pc += OR1K_INSTLEN;
598
      inst = or1k_fetch_instruction (pc);
599
    }
600
  return pc;
601
}
602
 
603
/* Determines whether this function has frame.  */
604
 
605
int
606
or1k_frameless_function_invocation (struct frame_info *fi)
607
{
608
  CORE_ADDR func_start, after_prologue;
609
  int frameless;
610
  func_start = (get_pc_function_start ((fi)->pc) + FUNCTION_START_OFFSET);
611
  after_prologue = SKIP_PROLOGUE (func_start);
612
 
613
  /* If we don't skip pc, we don't have even shortest possible  prologue.  */
614
  frameless = (after_prologue <= func_start);
615
  return frameless;
616
}
617
 
618
/* Given a GDB frame, determine the address of the calling function's frame.
619
   This will be used to create a new GDB frame struct, and then
620
   INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */
621
 
622
CORE_ADDR
623
or1k_frame_chain (frame)
624
     struct frame_info *frame;
625
{
626
  CORE_ADDR fp;
627
  if (USE_GENERIC_DUMMY_FRAMES)
628
    {
629
      if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
630
        return frame->frame;    /* dummy frame same as caller's frame */
631
    }
632
 
633
  if (inside_entry_file (frame->pc) ||
634
      frame->pc == entry_point_address ())
635
    return 0;
636
 
637
  if (frame->signal_handler_caller)
638
    fp = read_memory_integer (frame->frame, 4);
639
  else if (frame->next != NULL
640
           && frame->next->signal_handler_caller
641
           && FRAMELESS_FUNCTION_INVOCATION (frame))
642
    /* A frameless function interrupted by a signal did not change the
643
       frame pointer.  */
644
    fp = FRAME_FP (frame);
645
  else
646
    fp = read_memory_integer (frame->frame, 4);
647
 
648
  if (USE_GENERIC_DUMMY_FRAMES)
649
    {
650
      CORE_ADDR fpp, lr;
651
 
652
      lr = read_register (LR_REGNUM);
653
      if (lr == entry_point_address ())
654
        if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0)
655
          if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
656
            return fpp;
657
    }
658
 
659
  return fp;
660
}
661
 
662
/* The code to store, into a struct frame_saved_regs,
663
   the addresses of the saved registers of frame described by FRAME_INFO.
664
   This includes special registers such as pc and fp saved in special
665
   ways in the stack frame.  sp is even more special:
666
   the address we return for it IS the sp for the next frame.  */
667
void
668
or1k_init_saved_regs (struct frame_info *fi)
669
{
670
  CORE_ADDR frame_addr;
671
  int i;
672
  frame_saved_regs_zalloc (fi);
673
 
674
  /* Skip prologue sets or1k_saved_reg_addr[], we will use it later.  */
675
  or1k_skip_prologue (get_pc_function_start ((fi)->pc) + FUNCTION_START_OFFSET);
676
 
677
  for (i = 0; i < NUM_GPR_REGS+NUM_VF_REGS; i++)
678
    if (or1k_saved_reg_addr[i] >= 0)
679
      fi->saved_regs[i] = fi->frame + or1k_saved_reg_addr[i];
680
}
681
 
682
 
683
static CORE_ADDR
684
read_next_frame_reg (fi, regno)
685
     struct frame_info *fi;
686
     int regno;
687
{
688
  for (; fi; fi = fi->next)
689
    {
690
      /* We have to get the saved sp from the sigcontext
691
         if it is a signal handler frame.  */
692
      if (regno == SP_REGNUM && !fi->signal_handler_caller)
693
        return fi->frame;
694
      else
695
        {
696
          if (fi->saved_regs == NULL)
697
            or1k_init_saved_regs (fi);
698
          if (fi->saved_regs[regno])
699
            return read_memory_integer (ADDR_BITS_REMOVE (fi->saved_regs[regno]), OR1K_GPR_REGSIZE);
700
        }
701
    }
702
  return read_register (regno);
703
}
704
 
705
/* Find the caller of this frame.  We do this by seeing if LR_REGNUM
706
   is saved in the stack anywhere, otherwise we get it from the
707
   registers.  */
708
 
709
CORE_ADDR
710
or1k_frame_saved_pc (fi)
711
     struct frame_info *fi;
712
{
713
  CORE_ADDR saved_pc;
714
  /* We have to get the saved pc from the sigcontext
715
     if it is a signal handler frame.  */
716
  if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
717
    saved_pc = read_memory_integer (fi->frame, OR1K_GPR_REGSIZE);
718
  else
719
    saved_pc = read_next_frame_reg (fi, PC_REGNUM);
720
 
721
  return ADDR_BITS_REMOVE (saved_pc);
722
}
723
 
724
/* Discard from the stack the innermost frame, restoring all registers.  */
725
 
726
void
727
or1k_pop_frame ()
728
{
729
  register int regnum;
730
  struct frame_info *frame = get_current_frame ();
731
  CORE_ADDR new_sp = FRAME_FP (frame);
732
 
733
  write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
734
  if (frame->saved_regs == NULL)
735
    or1k_init_saved_regs (frame);
736
  for (regnum = 0; regnum < NUM_REGS; regnum++)    {
737
      if (regnum != SP_REGNUM && regnum != PC_REGNUM
738
          && frame->saved_regs[regnum] >= 0)
739
        write_register (regnum,
740
                        read_memory_integer (frame->saved_regs[regnum],
741
                                             OR1K_GPR_REGSIZE));
742
    }
743
  write_register (SP_REGNUM, new_sp);
744
  flush_cached_frames ();
745
}
746
 
747
CORE_ADDR
748
or1k_push_arguments (nargs, args, sp, struct_return, struct_addr)
749
     int nargs;
750
     value_ptr *args;
751
     CORE_ADDR sp;
752
     int struct_return;
753
     CORE_ADDR struct_addr;
754
{
755
  int argreg;
756
  int float_argreg;
757
  int argnum;
758
  int len = 0;
759
  int stack_offset = 0;
760
 
761
  /* Initialize the integer and float register pointers.  */
762
  argreg = A0_REGNUM;
763
  float_argreg = VFA0_REGNUM;
764
 
765
  /* The struct_return pointer occupies the RV value register.  */
766
  if (struct_return)
767
    write_register (RV_REGNUM, struct_addr);
768
 
769
  /* Now load as many as possible of the first arguments into
770
     registers, and push the rest onto the stack.  Loop thru args
771
     from first to last.  */
772
  for (argnum = 0; argnum < nargs; argnum++)
773
    {
774
      char *val;
775
      char valbuf[MAX_REGISTER_RAW_SIZE];
776
      value_ptr arg = args[argnum];
777
      struct type *arg_type = check_typedef (VALUE_TYPE (arg));
778
      int len = TYPE_LENGTH (arg_type);
779
      enum type_code typecode = TYPE_CODE (arg_type);
780
 
781
      /* The EABI passes structures that do not fit in a register by
782
         reference. In all other cases, pass the structure by value.  */
783
      if (len > OR1K_GPR_REGSIZE &&
784
          (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
785
        {
786
          store_address (valbuf, OR1K_GPR_REGSIZE, VALUE_ADDRESS (arg));
787
          typecode = TYPE_CODE_PTR;
788
          len = OR1K_GPR_REGSIZE;
789
          val = valbuf;
790
        }
791
      else
792
        {
793
          val = (char *) VALUE_CONTENTS (arg);
794
 
795
          if (typecode == TYPE_CODE_FLT
796
              /* Doubles are not stored in regs on 32b target.  */
797
              && len <= OR1K_VF_REGSIZE
798
              && OR1K_VF_PRESENT)
799
            {
800
              if (float_argreg <= OR1K_LAST_FP_ARG_REGNUM)
801
                {
802
                  CORE_ADDR regval = extract_address (val, len);
803
                  write_register (float_argreg++, regval);
804
                }
805
              else
806
                {
807
                  write_memory ((CORE_ADDR) sp, val, OR1K_VF_REGSIZE);
808
                  sp -= OR1K_STACK_ALIGN;
809
                }
810
            }
811
          else
812
            {
813
              if (argreg <= OR1K_LAST_ARG_REGNUM)
814
                {
815
                  CORE_ADDR regval = extract_address (val, len);
816
                  write_register (argreg++, regval);
817
                }
818
              else
819
                {
820
                  write_memory ((CORE_ADDR) sp, val, OR1K_GPR_REGSIZE);
821
                  sp -= OR1K_STACK_ALIGN;
822
                }
823
            }
824
        }
825
    }
826
 
827
  /* Return adjusted stack pointer.  */
828
  return sp;
829
}
830
 
831
/* Return nonzero when instruction has delay slot.  */
832
static int
833
is_delayed (insn)
834
     unsigned long insn;
835
{
836
  int i;
837
  for (i = 0; i < num_opcodes; ++i)
838
    if ((or32_opcodes[i].flags & OR32_IF_DELAY)
839
        && (or32_opcode_match (insn, or32_opcodes[i].encoding)))
840
      break;
841
  return (i < num_opcodes);
842
}
843
 
844
int
845
or1k_step_skips_delay (pc)
846
     CORE_ADDR pc;
847
{
848
  char buf[OR1K_INSTLEN];
849
 
850
  if (target_read_memory (pc, buf, OR1K_INSTLEN) != 0)
851
    /* If error reading memory, guess that it is not a delayed branch.  */
852
    return 0;
853
  return is_delayed ((unsigned long) extract_unsigned_integer (buf, OR1K_INSTLEN));
854
}
855
 
856
CORE_ADDR
857
or1k_push_return_address (pc, sp)
858
     CORE_ADDR pc;
859
     CORE_ADDR sp;
860
{
861
  /* Set the return address register to point to the entry
862
     point of the program, where a breakpoint lies in wait.  */
863
  write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ());
864
  return sp;
865
}
866
 
867
/* Root of all "set or1k "/"show or1k " commands. This will eventually be
868
   used for all OR1K-specific commands.  */
869
 
870
static void show_or1k_command PARAMS ((char *, int));
871
static void
872
show_or1k_command (args, from_tty)
873
     char *args;
874
     int from_tty;
875
{
876
  help_list (showor1kcmdlist, "show or1k ", all_commands, gdb_stdout);
877
}
878
 
879
static void set_or1k_command PARAMS ((char *, int));
880
static void
881
set_or1k_command (args, from_tty)
882
     char *args;
883
     int from_tty;
884
{
885
  printf_unfiltered ("\"set or1k\" must be followed by an appropriate subcommand.\n");
886
  help_list (setor1kcmdlist, "set or1k ", all_commands, gdb_stdout);
887
}
888
 
889
static char *
890
parse_spr_params (args, group, index)
891
                  char *args;
892
                  int *group, *index;
893
{
894
  *index = -1;
895
  if (args)
896
    {
897
      int i;
898
      char *ptr_c;
899
      /* Check if group number was supplied.  */
900
      ptr_c = args;
901
      while (*ptr_c != ' ' && *ptr_c != 0)
902
        ptr_c++;
903
      *ptr_c = 0;
904
 
905
      *group = (int) strtoul (args, &ptr_c, 0);
906
      if (*ptr_c != 0)
907
        {
908
          *group = OR1K_NUM_SPR_GROUPS;
909
          /* check for group name */
910
          for (i = 0; i < OR1K_NUM_SPR_GROUPS; i++)
911
            if (strcasecmp (or1k_group_names[i], args) == 0)
912
              {
913
                *group = i;
914
                break;
915
              }
916
          /* Invalid group => check all register names in all groups.  */
917
          if (*group >= OR1K_NUM_SPR_GROUPS)
918
            {
919
              for (i = 0; i < OR1K_NUM_SPR_GROUPS; i++)
920
                {
921
                  int regno;
922
                  regno = or1k_regno_from_name (i, args);
923
                  if (regno >= 0)
924
                    {
925
                      *group = i;
926
                      *index = regno;
927
                    }
928
                }
929
            }
930
        }
931
      if (*group < 0 || *group >= OR1K_NUM_SPR_GROUPS)
932
        error ("Invalid group or register.\n");
933
 
934
      if (*index < 0)
935
        {
936
          args += strlen(args) + 1;
937
          ptr_c = args;
938
          while (*ptr_c != ' ' && *ptr_c != 0)
939
            ptr_c++;
940
          *ptr_c = 0;
941
          *index = (int) strtoul (args, &ptr_c, 0);
942
          if (*ptr_c != 0)
943
            *index = or1k_regno_from_name (*group, args);
944
 
945
          if (*index < 0)
946
            {
947
              for (i = 0; i < or1k_spr_valid_aliases[*group]; i++)
948 113 markom
                printf_unfiltered ("%s\t", or1k_spr_register_name (SPR_REG(*group, i)));
949 104 markom
              printf_unfiltered ("\n");
950
              return args + strlen(args) + 1;
951
            }
952
        }
953
    }
954
  else
955
  /* No parameters - print groups */
956
    {
957
      int i;
958
      printf_unfiltered ("No parameter supplied. Valid groups are:\n");
959
      for (i = 0; i < OR1K_NUM_SPR_GROUPS; i++)
960
        printf_unfiltered ("%s\t", or1k_group_names[i]);
961
      printf_unfiltered ("\nSingle register name or register name or number after the group can be also supplied.\n");
962
    }
963
  return args + strlen(args) + 1;
964
}
965
 
966
/* SPR register info.  */
967
 
968
void
969 113 markom
info_spr_command (char *args, int from_tty)
970 104 markom
{
971
  int group, index;
972
  parse_spr_params (args, &group, &index);
973
  if (index >= 0)
974
    {
975
      printf_unfiltered ("%s.%s (SPR%i_%i) set to %i(%X), was:%i(%X)\n", or1k_group_names[group],
976 113 markom
                         or1k_spr_register_name (SPR_REG(group, index)), group, index,
977
                         or1k_read_spr_reg (SPR_REG(group, index)));
978 104 markom
    }
979
}
980
 
981
/* Set SPR register.  */
982
 
983
void
984 113 markom
spr_command (char *args, int from_tty)
985 104 markom
{
986
  int group, index;
987
  char *nargs = parse_spr_params (args, &group, &index);
988
  /* Any arguments left?  */
989
  if (args + strlen(args) >= nargs)
990
    error ("Invalid register value.");
991
  if (index >= 0)
992
    {
993
      unsigned long prev;
994
      unsigned long value;
995
      char *ptr_c;
996
 
997 113 markom
      prev = or1k_read_spr_reg (SPR_REG(group, index));
998 104 markom
 
999
      ptr_c = nargs;
1000
      while (*ptr_c != ' ' && *ptr_c != 0)
1001
        ptr_c++;
1002
      *ptr_c = 0;
1003
      value = strtoul (nargs, &ptr_c, 0);
1004
      if (*ptr_c != 0)
1005
        error ("Invalid register value.");
1006
      printf_unfiltered ("%s.%s (SPR%i_%i) set to %i(%X), was:%i(%X)\n", or1k_group_names[group],
1007 113 markom
                         or1k_spr_register_name (SPR_REG(group, index)), group, index,
1008 104 markom
                         value, value, prev, prev);
1009
    }
1010
}
1011
 
1012
/* Calls extended command on target.  */
1013
 
1014
void
1015
sim_command (char *args, int from_tty)
1016
{
1017
  or1k_sim_cmd (args, from_tty);
1018
}
1019
 
1020 113 markom
/* ARGSUSED */
1021
/* accessflag:  hw_write:  watch write,
1022
                hw_read:   watch read,
1023
                hw_access: watch access (read or write) */
1024
static void
1025
hwatch_command (arg, from_tty)
1026
     char *arg;
1027
     int from_tty;
1028
{
1029
  struct expression *exp;
1030
  int i;
1031
  int nfree;
1032
  /* Parse arguments.  */
1033
  exp = parse_exp_1 (&arg, 0, 0);
1034
 
1035
  dump_prefix_expression (exp, gdb_stdout, "expr1");
1036
 
1037
  /* Now we have to find out if given prefix expression matches
1038
     our HW based support. It may take up to
1039
     or1k_implementation.num_matchpoints - or1k_implementation.num_used_matchpoints. */
1040
  nfree = or1k_implementation.num_matchpoints - or1k_implementation.num_used_matchpoints;
1041
  //printf_unfiltered ("%s\n", exp->elts[1].internalvar->name);
1042
  free (exp);
1043
}
1044
 
1045 104 markom
void
1046
_initialize_or1k_tdep ()
1047
{
1048
  struct cmd_list_element *c;
1049
  /* Add root prefix command for all "set or1k"/"show or1k" commands */
1050
  add_prefix_cmd ("or1k", no_class, set_or1k_command,
1051
                  "Various OR1K specific commands.",
1052
                  &setor1kcmdlist, "set or1k ", 0, &setlist);
1053
 
1054
  add_prefix_cmd ("or1k", no_class, show_or1k_command,
1055
                  "Various OR1K specific commands.",
1056
                  &showor1kcmdlist, "show or1k ", 0, &showlist);
1057
 
1058
  /* Commands to show information about the sprs.  */
1059 113 markom
  add_info ("spr", info_spr_command, "Show information about the spr registers.");
1060
  add_com ("hwatch", class_breakpoint, hwatch_command, "Set hardware watchpoint.");
1061
  add_com ("spr", class_support, spr_command, "Set specified SPR register.");
1062 104 markom
  add_com ("sim", class_obscure, sim_command,
1063
           "Send a extended command to the simulator.");
1064
}

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