Subversion Repositories or1k

/* Remote debugging interface for various or1k debugging protocols.

   Currently supported or1k targets are: simulator, jtag, dummy.

   Copyright 1993-1995, 2000 Free Software Foundation, Inc.

   Contributed by Cygnus Support.  Written by Marko Mlinar

   <markom@opencores.org>

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 2 of the License, or

   (at your option) any later version.

   This program is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with this program; if not, write to the Free Software

   Foundation, Inc., 59 Temple Place - Suite 330,

   Boston, MA 02111-1307, USA.  */

#include "defs.h"

#include "inferior.h"

#include "bfd.h"

#include "symfile.h"

#include "gdb_wait.h"

#include "gdbcmd.h"

#include "gdbcore.h"

#include "target.h"

#include "remote-utils.h"

#include "gdb_string.h"

#include "tm.h"

#include <signal.h>

#include <sys/types.h>

#include <sys/stat.h>

#include <sys/ioctl.h>

#include <fcntl.h>

#define debug if (remote_debug) printf_unfiltered

/* The following prototype is necessary or the compiler will not

   correctly promote the data argument to ULONGEST */

static void or1k_write_reg (unsigned int, ULONGEST);

/* JTAG or1k target ops.  */

extern void jtag_init PARAMS ((char * args));

extern ULONGEST jtag_read_reg PARAMS ((unsigned int regno));

extern void jtag_write_reg PARAMS ((unsigned int regno, ULONGEST data));

extern void jtag_done PARAMS ((void));

extern int jtag_read_block PARAMS ((unsigned int regno, void* block, int nRegisters));

extern int jtag_write_block PARAMS ((unsigned int regno, void* block, int nRegisters));

extern void jtag_set_chain PARAMS ((int chain));

struct target_ops or1k_jtag_ops;

static struct or1k_target_ops or1k_target_jtag =

  {

    "jtag",

    jtag_init,

    jtag_done,

    jtag_read_reg,

    jtag_write_reg,

    jtag_read_block,

    jtag_write_block,

    jtag_set_chain,

    NULL,

    &or1k_jtag_ops,

    OPS_MAGIC

  };

/* simulator or1k target ops.  */

struct target_ops or1k_sim_ops;

static struct or1k_target_ops or1k_target_sim =

  {

    "simulator",

    NULL,

    NULL,

    NULL,

    NULL,

    NULL,

    NULL,

    NULL,

    NULL,

    &or1k_sim_ops,

    OPS_MAGIC

  };

/* dummy or1k target ops.  */

struct target_ops or1k_dummy_ops;

static struct or1k_target_ops or1k_target_dummy =

  {

    "dummy",

    NULL,

    NULL,

    NULL,

    NULL,

    NULL,

    NULL,

    NULL,

    NULL,

    &or1k_dummy_ops,

    OPS_MAGIC

  };

const char *str_err[] =

  {

    "None", "CRC error"

  };

const char *status_name[] =

  {

    "UNDEFINED", "CONNECTING", "DISCONNECTING", "RUNNING", "STOPPED"

  };

/* Names for matchpoint related stuff.  */

static char *ct_names[] =

  {

    "DIS", "IFEA", "LEA", "SEA", "AEA", "LDATA", "SDATA", "ADATA"

  };

static char *cc_names[] =

  {

    "&", "==", "<", "<=", ">", ">=", "!=", "ERR"

  };

static char *ch_names[] =

  {

    "ERR", "&", "|", "ERR"

  };

/* Implementation specific information.  Set by or1k_initialize.  */

struct struct_or1k_implementation or1k_implementation;

/* Current target status.  */

static enum target_status or1k_status = TARGET_UNDEFINED;

/* The target vector.  */

struct target_ops or1k_dummy_ops, or1k_jtag_ops, or1k_sim_ops;

/* Currently active target description (if or1k_is_open == 1) */

static struct target_ops *current_ops;

/* Currently active or1k target operations.  */

static struct or1k_target_ops *current_or1k_target = NULL;

/* Set to 1 if the target is open.  */

static int or1k_is_open = 0;

/* Error last occured, zero = ok.  */

int err = 0;

/* Nonzero, if we changed something (except DMR1 which is updated on every run anyway).  */

int debug_regs_changed;

/* Number of interrupts while waiting for process.  */

static int interrupt_count = 0;

/* Reason of last stop.  */

static int hit_watchpoint = 0;

/* Current register values.  */

unsigned int dmr1 = 0;

unsigned int dmr2 = 0;

unsigned int dsr = 0;

unsigned int drr = 0;

static void (*old_sigint) ();   /* Old signal-handler for sigint */

static int interrupt_requested = 0; /* Interrupted flag */

static void or1k_request_int ()

{

  /* restore original signalhandler */

  signal (SIGINT, old_sigint);

  interrupt_requested = 1;

}

/* Current matchpoints.  */

unsigned int dvr[MAX_MATCHPOINTS];

struct dcr_struct dcr[MAX_MATCHPOINTS];

/* Number of matchpoint users */

int matchpoint_user_count[MAX_MATCHPOINTS] = {0};

/* Old SIGINT handler.  */

static void (*ofunc) PARAMS ((int));

/* Handle low-level error that we can't recover from.  Note that just

   error()ing out from target_wait or some such low-level place will cause

   all hell to break loose--the rest of GDB will tend to get left in an

   inconsistent state.  */

static NORETURN void

or1k_error (char *string,...)

{

  va_list args;

  va_start (args, string);

  target_terminal_ours ();

  wrap_here ("");               /* Force out any buffered output */

  gdb_flush (gdb_stdout);

  if (error_pre_print)

    fprintf_filtered (gdb_stderr, error_pre_print);

  vfprintf_filtered (gdb_stderr, string, args);

  fprintf_filtered (gdb_stderr, "\n");

  va_end (args);

  gdb_flush (gdb_stderr);

  /* Clean up in such a way that or1k_close won't try to talk to the

     board (it almost surely won't work since we weren't able to talk to

     it).  */

  or1k_is_open = 0;

  printf_unfiltered ("Ending remote or1k debugging.\n");

  target_mourn_inferior ();

  return_to_top_level (RETURN_ERROR);

}

const char *

or1k_err_name (e)

     int e;

{

  return str_err[e];

}

/* putc_readable - print a character, displaying non-printable chars in

   ^x notation or in hex.  */

static void

fputc_readable (ch, file)

     int ch;

     struct ui_file *file;

{

  if (ch == '\n')

    fputc_unfiltered ('\n', file);

  else if (ch == '\r')

    fprintf_unfiltered (file, "\\r");

  else if (ch < 0x20)           /* ASCII control character */

    fprintf_unfiltered (file, "^%c", ch + '@');

  else if (ch >= 0x7f)          /* non-ASCII characters (rubout or greater) */

    fprintf_unfiltered (file, "[%02x]", ch & 0xff);

  else

    fputc_unfiltered (ch, file);

}

/* puts_readable - print a string, displaying non-printable chars in

   ^x notation or in hex.  */

static void

fputs_readable (string, file)

     char *string;

     struct ui_file *file;

{

  int c;

  while ((c = *string++) != '\0')

    fputc_readable (c, file);

}

/* Sets scan chain.  */

static void

or1k_set_chain (chain)

     int chain;

{

  if (current_or1k_target != NULL && current_or1k_target->to_set_chain != NULL)

    current_or1k_target->to_set_chain (chain);

}

/* Sets register/memory regno to data.  */

static void

or1k_write_reg (regno, data)

     unsigned int regno;

     ULONGEST data;

{

  if (current_or1k_target != NULL && current_or1k_target->to_write_reg != NULL)

    current_or1k_target->to_write_reg (regno, data);

}

/* Reads register/memory from regno.  */

static ULONGEST

or1k_read_reg (regno)

     unsigned int regno;

{

  if (current_or1k_target != NULL && current_or1k_target->to_read_reg != NULL)

    return current_or1k_target->to_read_reg (regno);

  else

    return 0x1234;

}

/* Sets SPR register regno to data.  */

void

or1k_write_spr_reg (regno, data)

     unsigned int regno;

     unsigned int data;

{

  or1k_set_chain (SC_RISC_DEBUG);

  or1k_write_reg (regno, (ULONGEST)data);

}

/* Reads register SPR from regno.  */

unsigned int

or1k_read_spr_reg (regno)

     unsigned int regno;

{

  or1k_set_chain (SC_RISC_DEBUG);

  return or1k_read_reg (regno);

}

/* Sets mem to data.  */

void

or1k_write_mem (addr, data)

     unsigned int addr;

     unsigned int data;

{

  or1k_set_chain (SC_WISHBONE);

  or1k_write_reg (addr, (ULONGEST)data);

}

/* Reads register SPR from regno.  */

unsigned int

or1k_read_mem (addr)

     unsigned int addr;

{

  or1k_set_chain (SC_WISHBONE);

  return or1k_read_reg (addr);

}

/* CZ 15/09/01 -- This is hacked in right now. This should

   probably NOT be called directly, but at the moment I don't

   have the time to figure out how to do it right. The problem

   is the following, in order to write the PC, I may need to

   step the processor...(long story, but trust me, I need to

   do this)...I need to do this sometimes even when I have

   not started or even loaded a program, thus I can not

   use the default routines gdb provides for this purpose.

   I do not wish to embed targets directly into or1k-tdep,

   but I need a simple function there that will cause the

   processor to continue 1 instruction and not pay attention

   to gdb's state machine. I know this could conceivably break

   things if we stop connecting via jtag and start doing

   something else, so anyone who wants to figure out how to do

   this right is welcome. Drop me an email if you want to

   correct it. I'll try to help you understand the issue. */

/* The processor should already be in single step mode or

   this will continue indefinitely! */

void or1k_do_1_processor_step()

{

  unsigned long drr = 0;

  unsigned long  val;

  /* Run the processor */

  or1k_set_chain (SC_REGISTER);

  val = or1k_read_reg (JTAG_RISCOP);

  or1k_write_reg (JTAG_RISCOP, val & ~1);

  /* Wait for the DEBUG_REASON_REGISTER to be non zero */

  while(!(drr = or1k_read_spr_reg (DRR_SPRNUM)))

    usleep (10);

  /* OK..we're done */

}

static int saved_stall_state = 0;

void or1k_save_stall_state()

{

  or1k_set_chain (SC_REGISTER);

  saved_stall_state = or1k_read_reg (JTAG_RISCOP) & 0x01;

}

void or1k_restore_stall_state()

{

  int val;

  or1k_set_chain (SC_REGISTER);

  val = or1k_read_reg (JTAG_RISCOP);

  val |= saved_stall_state;

  or1k_write_reg (JTAG_RISCOP, val);

  saved_stall_state = 0;

}

/* Stalls the CPU.  */

static void

or1k_stall ()

{

  int val;

  or1k_set_chain (SC_REGISTER);

  val = or1k_read_reg (JTAG_RISCOP);

  or1k_write_reg (JTAG_RISCOP, val | 1);

  or1k_read_reg (JTAG_RISCOP);

  /* Be cautious - disable trace.  */

  val = or1k_read_reg (JTAG_MODER);

  or1k_write_reg (JTAG_MODER, val & ~2);

}

/* Unstalls the CPU.  */

static void

or1k_unstall ()

{

  unsigned int val;

  or1k_set_chain (SC_REGISTER);

  val = or1k_read_reg (JTAG_RISCOP);

  or1k_write_reg (JTAG_RISCOP, val & ~1);

  or1k_read_reg (JTAG_RISCOP);

}

/* Resets the CPU and stalls it.  */

static void

or1k_reset ()

{

  unsigned int val;

  int i;

  debug ("%08x\n", or1k_read_reg (JTAG_RISCOP));

  or1k_set_chain (SC_REGISTER);

  /* Be cautious - disable trace.  */

  val = or1k_read_reg (JTAG_MODER);

  or1k_write_reg (JTAG_MODER, val & ~2);

  val = or1k_read_reg (JTAG_RISCOP);

  val &= ~3;

  /* Assert reset signal.  */

  or1k_write_reg (JTAG_RISCOP, val | 3);

  /* Just do something */

  for (i = 0; i < 100; i++)

    or1k_read_reg (JTAG_RISCOP);

  /* give it some time */

  usleep (1000);

  or1k_set_chain (SC_REGISTER);

  /* Release reset signal, but keep in stall state.  */

  or1k_write_reg (JTAG_RISCOP, val | 1);

  or1k_read_reg (JTAG_RISCOP);

}

/* Synchronizes debug registers in memory with those on target,

   if there is any change.  */

static void

or1k_commit_debug_registers ()

{

  int i;

  unsigned int u;

  if (!debug_regs_changed)

    return;

  /* Matchpoints (breakpoints, watchpoints).  */

  for (i = 0; i < NUM_MATCHPOINTS; i++)

    {

      unsigned int u;

      or1k_write_spr_reg (DVR0_SPRNUM + i, dvr[i]);

      memcpy (&u, &dcr[i], sizeof(dcr[i]));

      or1k_write_spr_reg (DCR0_SPRNUM + i, u);

    }

  or1k_write_spr_reg (DMR1_SPRNUM, dmr1);

  or1k_write_spr_reg (DMR2_SPRNUM, dmr2);

  /* Trace dependent.  */

  or1k_set_chain (SC_REGISTER);

  memcpy (&u, &or1k_htrace.trig, sizeof(or1k_htrace.trig));

  or1k_write_reg (JTAG_TSEL, u);

  memcpy (&u, &or1k_htrace.qual, sizeof(or1k_htrace.qual));

  or1k_write_reg (JTAG_QSEL, u);

  memcpy (&u, &or1k_htrace.stop, sizeof(or1k_htrace.stop));

  or1k_write_reg (JTAG_SSEL, u);

  debug_regs_changed = 0;

  for (i = 0; i < NUM_RECORDS; i++)

    {

      memcpy (&u, &or1k_htrace.recwp[i], sizeof(or1k_htrace.recwp[i]));

      or1k_write_reg (JTAG_RECWP0 + i, u);

    }

  memcpy (&u, &or1k_htrace.recbp, sizeof(or1k_htrace.recbp));

  or1k_write_reg (JTAG_RECBP0, u);

  memcpy (&u, &or1k_htrace.moder, sizeof(or1k_htrace.moder));

  or1k_write_reg (JTAG_MODER, u);

}

static void

or1k_set_undefined_cleanups (arg)

     PTR arg;

{

  or1k_status = TARGET_UNDEFINED;

}

/* Initialize a new connection to the or1k board, and make sure we are

   really connected.  */

static void

or1k_init (args)

     char *args;

{

  struct cleanup *old_cleanups = make_cleanup (or1k_set_undefined_cleanups, NULL);

  int i;

  unsigned int tmp;

  FILE *f;

  /* What is this code doing here?  I don't see any way it can happen, and

     it might mean or1k_initializing didn't get cleared properly.

     So I'll make it a warning.  */

  if (or1k_status == TARGET_CONNECTING)

    {

      warning ("internal error: or1k_initialize called twice");

      return;

    }

  or1k_status = TARGET_CONNECTING;

  if (current_or1k_target != NULL && current_or1k_target->to_init != NULL)

    current_or1k_target->to_init (args);

  debug("%08x\n", read_pc ());

  or1k_stall ();

  debug("%08x\n", read_pc ());

  usleep (1000);

  /* Determine implementation configuration.  */

  or1k_implementation.VR = or1k_read_spr_reg (VR_SPRNUM);

  or1k_implementation.UPR = or1k_read_spr_reg (UPR_SPRNUM);

  /* Determine number of gpr_regs.  */

  tmp = or1k_read_spr_reg (CPUCFGR_SPRNUM);

  or1k_implementation.num_gpr_regs = ((tmp >> 4) & 1)?(16):(32);

  /* Is any vector or floating point support present? */

  or1k_implementation.vf_present = ((tmp >> 7) & 7) != 0;

  or1k_implementation.num_vfpr_regs = (or1k_implementation.vf_present)?(32):(0);

  /* Determine max number of supported matchpoints.  */

  tmp = or1k_read_spr_reg (DCFGR_SPRNUM);

  or1k_implementation.num_matchpoints = tmp & 7;

  or1k_implementation.num_used_matchpoints = 0;

  or1k_implementation.has_counters = tmp & 4 == 1;

  /* Is implementation supported? */

  /* First we should have system and debug groups implemented. */

  if (or1k_implementation.VR & (1 << SPR_SYSTEM_GROUP) == 0)

    error ("System group should be available in the or1k implementation.");

  if (or1k_implementation.VR & (1 << SPR_DEBUG_GROUP) == 0)

    error ("Debug group should be available in the or1k implementation.");

  if (or1k_implementation.has_counters)

    warning ("Counters not supported.");

  /* Delete break, watch, catch points.  */

  for(i = 0; i < NUM_MATCHPOINTS; i++)

    {

      memset (&dcr[i], 0, sizeof (dcr[i]));

      matchpoint_user_count[i] = 0;

    }

  dmr1 = 0;

  dmr2 = 0;

  memset (&or1k_htrace, 0, sizeof (or1k_htrace));

  /* RECSELDEPEND = 0 does not match our trace scheme. */

  or1k_htrace.moder.rec_sel_dep = 1;

  debug_regs_changed = 1;

  or1k_commit_debug_registers ();

  if (err != 0)

    error ("Cannot connect.");

  /* Enable exceptions */

  or1k_write_spr_reg (SR_SPRNUM, or1k_read_spr_reg(SR_SPRNUM) | 0x2);

  /* Stop when breakpoint occurs.  */

  or1k_write_spr_reg (DSR_SPRNUM, 0x2000);

  do_cleanups (old_cleanups);

  /* This should cause an error if not connected.  */

  or1k_fetch_registers (-1);

  set_current_frame (create_new_frame (read_fp (), read_pc ()));

  select_frame (get_current_frame (), 0);

  /* Just empty it.  */

  if ((f = fopen (TRACE_FILENAME, "wb+")) == NULL)

    error ("Cannot open trace file.");

  fclose (f);

  trace_size = 0;

}

/* Kill the process running on the board.  */

void

or1k_kill ()

{

  if (or1k_status != TARGET_RUNNING)

    return;

  or1k_status = TARGET_UNDEFINED;

  or1k_reset();

  or1k_status = TARGET_STOPPED;

  inferior_pid = 0;

}

/* Open a connection to the remote board.  */

static void

or1k_open (name, from_tty)

     char *name;

     int from_tty;

{

  or1k_init (name);

  /* Switch to using remote target now.  */

  current_ops = current_or1k_target->gdb_ops;

  or1k_is_open = 1;

  push_target (current_ops);

  /* FIXME: Should we call start_remote here?  */

/* This is really the job of start_remote however, that makes an assumption

   that the target is about to print out a status message of some sort.  That

   doesn't happen here (in fact, it may not be possible to get the monitor to

   send the appropriate packet).  */

  flush_cached_frames ();

  registers_changed ();

  stop_pc = read_pc ();

  set_current_frame (create_new_frame (read_fp (), stop_pc));

  select_frame (get_current_frame (), 0);

  print_stack_frame (selected_frame, -1, 1);

}

/* This is the generic stop called via the target vector. When a target

   interrupt is requested, either by the command line or the GUI, we

   will eventually end up here. */

static void

or1k_stop ()

{

  /* Send a break or a ^C, depending on user preference.  */

  debug ("remote_stop called\n");

  /* We should not stop the target immediately, since it can be in an

     unfinished state.  So we do a single step.  This should not affect

     on anything.  */

  or1k_stall ();

  /* HW STEP.  Set DMR1_ST.  */

  dmr1 |= DMR1_ST;

  or1k_write_spr_reg (DMR1_SPRNUM, dmr1);

  dmr1 &= ~DMR1_ST;

  or1k_unstall ();

}

/* Close a connection to the remote board.  */

static void

or1k_close (quitting)

     int quitting;

{

  if (or1k_is_open)

    {

      or1k_kill ();

      if (current_or1k_target != NULL && current_or1k_target->to_done != NULL)

        current_or1k_target->to_done ();

      current_or1k_target = NULL;

    }

  generic_mourn_inferior ();

}

/* Detach from the remote board.  */

static void

or1k_detach (args, from_tty)