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[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [rs6000-tdep.c] - Blame information for rev 1774

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1 104 markom
/* Target-dependent code for GDB, the GNU debugger.
2
   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000
3
   Free Software Foundation, Inc.
4
 
5
   This file is part of GDB.
6
 
7
   This program is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 2 of the License, or
10
   (at your option) any later version.
11
 
12
   This program is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with this program; if not, write to the Free Software
19
   Foundation, Inc., 59 Temple Place - Suite 330,
20
   Boston, MA 02111-1307, USA.  */
21
 
22
#include "defs.h"
23
#include "frame.h"
24
#include "inferior.h"
25
#include "symtab.h"
26
#include "target.h"
27
#include "gdbcore.h"
28
#include "gdbcmd.h"
29
#include "symfile.h"
30
#include "objfiles.h"
31
#include "xcoffsolib.h"
32
 
33
extern int errno;
34
 
35
/* Breakpoint shadows for the single step instructions will be kept here. */
36
 
37
static struct sstep_breaks
38
  {
39
    /* Address, or 0 if this is not in use.  */
40
    CORE_ADDR address;
41
    /* Shadow contents.  */
42
    char data[4];
43
  }
44
stepBreaks[2];
45
 
46
/* Hook for determining the TOC address when calling functions in the
47
   inferior under AIX. The initialization code in rs6000-nat.c sets
48
   this hook to point to find_toc_address.  */
49
 
50
CORE_ADDR (*find_toc_address_hook) PARAMS ((CORE_ADDR)) = NULL;
51
 
52
/* Static function prototypes */
53
 
54
     static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc,
55
                                           CORE_ADDR safety));
56
 
57
     static void frame_get_saved_regs PARAMS ((struct frame_info * fi,
58
                                         struct rs6000_framedata * fdatap));
59
 
60
     static void pop_dummy_frame PARAMS ((void));
61
 
62
     static CORE_ADDR frame_initial_stack_address PARAMS ((struct frame_info *));
63
 
64
CORE_ADDR
65
rs6000_skip_prologue (pc)
66
     CORE_ADDR pc;
67
{
68
  struct rs6000_framedata frame;
69
  pc = skip_prologue (pc, &frame);
70
  return pc;
71
}
72
 
73
 
74
/* Fill in fi->saved_regs */
75
 
76
struct frame_extra_info
77
{
78
  /* Functions calling alloca() change the value of the stack
79
     pointer. We need to use initial stack pointer (which is saved in
80
     r31 by gcc) in such cases. If a compiler emits traceback table,
81
     then we should use the alloca register specified in traceback
82
     table. FIXME. */
83
  CORE_ADDR initial_sp;         /* initial stack pointer. */
84
};
85
 
86
void
87
rs6000_init_extra_frame_info (fromleaf, fi)
88
     int fromleaf;
89
     struct frame_info *fi;
90
{
91
  fi->extra_info = (struct frame_extra_info *)
92
    frame_obstack_alloc (sizeof (struct frame_extra_info));
93
  fi->extra_info->initial_sp = 0;
94
  if (fi->next != (CORE_ADDR) 0
95
      && fi->pc < TEXT_SEGMENT_BASE)
96
    /* We're in get_prev_frame */
97
    /* and this is a special signal frame.  */
98
    /* (fi->pc will be some low address in the kernel, */
99
    /*  to which the signal handler returns).  */
100
    fi->signal_handler_caller = 1;
101
}
102
 
103
 
104
void
105
rs6000_frame_init_saved_regs (fi)
106
     struct frame_info *fi;
107
{
108
  frame_get_saved_regs (fi, NULL);
109
}
110
 
111
CORE_ADDR
112
rs6000_frame_args_address (fi)
113
     struct frame_info *fi;
114
{
115
  if (fi->extra_info->initial_sp != 0)
116
    return fi->extra_info->initial_sp;
117
  else
118
    return frame_initial_stack_address (fi);
119
}
120
 
121
 
122
/* Calculate the destination of a branch/jump.  Return -1 if not a branch.  */
123
 
124
static CORE_ADDR
125
branch_dest (opcode, instr, pc, safety)
126
     int opcode;
127
     int instr;
128
     CORE_ADDR pc;
129
     CORE_ADDR safety;
130
{
131
  CORE_ADDR dest;
132
  int immediate;
133
  int absolute;
134
  int ext_op;
135
 
136
  absolute = (int) ((instr >> 1) & 1);
137
 
138
  switch (opcode)
139
    {
140
    case 18:
141
      immediate = ((instr & ~3) << 6) >> 6;     /* br unconditional */
142
      if (absolute)
143
        dest = immediate;
144
      else
145
        dest = pc + immediate;
146
      break;
147
 
148
    case 16:
149
      immediate = ((instr & ~3) << 16) >> 16;   /* br conditional */
150
      if (absolute)
151
        dest = immediate;
152
      else
153
        dest = pc + immediate;
154
      break;
155
 
156
    case 19:
157
      ext_op = (instr >> 1) & 0x3ff;
158
 
159
      if (ext_op == 16)         /* br conditional register */
160
        {
161
          dest = read_register (LR_REGNUM) & ~3;
162
 
163
          /* If we are about to return from a signal handler, dest is
164
             something like 0x3c90.  The current frame is a signal handler
165
             caller frame, upon completion of the sigreturn system call
166
             execution will return to the saved PC in the frame.  */
167
          if (dest < TEXT_SEGMENT_BASE)
168
            {
169
              struct frame_info *fi;
170
 
171
              fi = get_current_frame ();
172
              if (fi != NULL)
173
                dest = read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET,
174
                                            4);
175
            }
176
        }
177
 
178
      else if (ext_op == 528)   /* br cond to count reg */
179
        {
180
          dest = read_register (CTR_REGNUM) & ~3;
181
 
182
          /* If we are about to execute a system call, dest is something
183
             like 0x22fc or 0x3b00.  Upon completion the system call
184
             will return to the address in the link register.  */
185
          if (dest < TEXT_SEGMENT_BASE)
186
            dest = read_register (LR_REGNUM) & ~3;
187
        }
188
      else
189
        return -1;
190
      break;
191
 
192
    default:
193
      return -1;
194
    }
195
  return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
196
}
197
 
198
 
199
/* Sequence of bytes for breakpoint instruction.  */
200
 
201
#define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
202
#define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
203
 
204
unsigned char *
205
rs6000_breakpoint_from_pc (bp_addr, bp_size)
206
     CORE_ADDR *bp_addr;
207
     int *bp_size;
208
{
209
  static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
210
  static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
211
  *bp_size = 4;
212
  if (TARGET_BYTE_ORDER == BIG_ENDIAN)
213
    return big_breakpoint;
214
  else
215
    return little_breakpoint;
216
}
217
 
218
 
219
/* AIX does not support PT_STEP. Simulate it. */
220
 
221
void
222
rs6000_software_single_step (signal, insert_breakpoints_p)
223
     unsigned int signal;
224
     int insert_breakpoints_p;
225
{
226
#define INSNLEN(OPCODE)  4
227
 
228
  static char le_breakp[] = LITTLE_BREAKPOINT;
229
  static char be_breakp[] = BIG_BREAKPOINT;
230
  char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
231
  int ii, insn;
232
  CORE_ADDR loc;
233
  CORE_ADDR breaks[2];
234
  int opcode;
235
 
236
  if (insert_breakpoints_p)
237
    {
238
 
239
      loc = read_pc ();
240
 
241
      insn = read_memory_integer (loc, 4);
242
 
243
      breaks[0] = loc + INSNLEN (insn);
244
      opcode = insn >> 26;
245
      breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
246
 
247
      /* Don't put two breakpoints on the same address. */
248
      if (breaks[1] == breaks[0])
249
        breaks[1] = -1;
250
 
251
      stepBreaks[1].address = 0;
252
 
253
      for (ii = 0; ii < 2; ++ii)
254
        {
255
 
256
          /* ignore invalid breakpoint. */
257
          if (breaks[ii] == -1)
258
            continue;
259
 
260
          read_memory (breaks[ii], stepBreaks[ii].data, 4);
261
 
262
          write_memory (breaks[ii], breakp, 4);
263
          stepBreaks[ii].address = breaks[ii];
264
        }
265
 
266
    }
267
  else
268
    {
269
 
270
      /* remove step breakpoints. */
271
      for (ii = 0; ii < 2; ++ii)
272
        if (stepBreaks[ii].address != 0)
273
          write_memory
274
            (stepBreaks[ii].address, stepBreaks[ii].data, 4);
275
 
276
    }
277
  errno = 0;                     /* FIXME, don't ignore errors! */
278
  /* What errors?  {read,write}_memory call error().  */
279
}
280
 
281
 
282
/* return pc value after skipping a function prologue and also return
283
   information about a function frame.
284
 
285
   in struct rs6000_framedata fdata:
286
   - frameless is TRUE, if function does not have a frame.
287
   - nosavedpc is TRUE, if function does not save %pc value in its frame.
288
   - offset is the initial size of this stack frame --- the amount by
289
   which we decrement the sp to allocate the frame.
290
   - saved_gpr is the number of the first saved gpr.
291
   - saved_fpr is the number of the first saved fpr.
292
   - alloca_reg is the number of the register used for alloca() handling.
293
   Otherwise -1.
294
   - gpr_offset is the offset of the first saved gpr from the previous frame.
295
   - fpr_offset is the offset of the first saved fpr from the previous frame.
296
   - lr_offset is the offset of the saved lr
297
   - cr_offset is the offset of the saved cr
298
 */
299
 
300
#define SIGNED_SHORT(x)                                                 \
301
  ((sizeof (short) == 2)                                                \
302
   ? ((int)(short)(x))                                                  \
303
   : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
304
 
305
#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
306
 
307
CORE_ADDR
308
skip_prologue (CORE_ADDR pc, struct rs6000_framedata *fdata)
309
{
310
  CORE_ADDR orig_pc = pc;
311
  CORE_ADDR last_prologue_pc;
312
  char buf[4];
313
  unsigned long op;
314
  long offset = 0;
315
  int lr_reg = -1;
316
  int cr_reg = -1;
317
  int reg;
318
  int framep = 0;
319
  int minimal_toc_loaded = 0;
320
  int prev_insn_was_prologue_insn = 1;
321
 
322
  memset (fdata, 0, sizeof (struct rs6000_framedata));
323
  fdata->saved_gpr = -1;
324
  fdata->saved_fpr = -1;
325
  fdata->alloca_reg = -1;
326
  fdata->frameless = 1;
327
  fdata->nosavedpc = 1;
328
 
329
  pc -= 4;
330
  for (;;)
331
    {
332
      pc += 4;
333
 
334
      /* Sometimes it isn't clear if an instruction is a prologue
335
         instruction or not.  When we encounter one of these ambiguous
336
         cases, we'll set prev_insn_was_prologue_insn to 0 (false).
337
         Otherwise, we'll assume that it really is a prologue instruction. */
338
      if (prev_insn_was_prologue_insn)
339
        last_prologue_pc = pc;
340
      prev_insn_was_prologue_insn = 1;
341
 
342
      if (target_read_memory (pc, buf, 4))
343
        break;
344
      op = extract_signed_integer (buf, 4);
345
 
346
      if ((op & 0xfc1fffff) == 0x7c0802a6)
347
        {                       /* mflr Rx */
348
          lr_reg = (op & 0x03e00000) | 0x90010000;
349
          continue;
350
 
351
        }
352
      else if ((op & 0xfc1fffff) == 0x7c000026)
353
        {                       /* mfcr Rx */
354
          cr_reg = (op & 0x03e00000) | 0x90010000;
355
          continue;
356
 
357
        }
358
      else if ((op & 0xfc1f0000) == 0xd8010000)
359
        {                       /* stfd Rx,NUM(r1) */
360
          reg = GET_SRC_REG (op);
361
          if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg)
362
            {
363
              fdata->saved_fpr = reg;
364
              fdata->fpr_offset = SIGNED_SHORT (op) + offset;
365
            }
366
          continue;
367
 
368
        }
369
      else if (((op & 0xfc1f0000) == 0xbc010000) ||     /* stm Rx, NUM(r1) */
370
               ((op & 0xfc1f0000) == 0x90010000 &&      /* st rx,NUM(r1),
371
                                                           rx >= r13 */
372
                (op & 0x03e00000) >= 0x01a00000))
373
        {
374
 
375
          reg = GET_SRC_REG (op);
376
          if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
377
            {
378
              fdata->saved_gpr = reg;
379
              fdata->gpr_offset = SIGNED_SHORT (op) + offset;
380
            }
381
          continue;
382
 
383
        }
384
      else if ((op & 0xffff0000) == 0x60000000)
385
        {
386
                                /* nop */
387
          /* Allow nops in the prologue, but do not consider them to
388
             be part of the prologue unless followed by other prologue
389
             instructions. */
390
          prev_insn_was_prologue_insn = 0;
391
          continue;
392
 
393
        }
394
      else if ((op & 0xffff0000) == 0x3c000000)
395
        {                       /* addis 0,0,NUM, used
396
                                   for >= 32k frames */
397
          fdata->offset = (op & 0x0000ffff) << 16;
398
          fdata->frameless = 0;
399
          continue;
400
 
401
        }
402
      else if ((op & 0xffff0000) == 0x60000000)
403
        {                       /* ori 0,0,NUM, 2nd ha
404
                                   lf of >= 32k frames */
405
          fdata->offset |= (op & 0x0000ffff);
406
          fdata->frameless = 0;
407
          continue;
408
 
409
        }
410
      else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg)
411
        {                       /* st Rx,NUM(r1)
412
                                   where Rx == lr */
413
          fdata->lr_offset = SIGNED_SHORT (op) + offset;
414
          fdata->nosavedpc = 0;
415
          lr_reg = 0;
416
          continue;
417
 
418
        }
419
      else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg)
420
        {                       /* st Rx,NUM(r1)
421
                                   where Rx == cr */
422
          fdata->cr_offset = SIGNED_SHORT (op) + offset;
423
          cr_reg = 0;
424
          continue;
425
 
426
        }
427
      else if (op == 0x48000005)
428
        {                       /* bl .+4 used in
429
                                   -mrelocatable */
430
          continue;
431
 
432
        }
433
      else if (op == 0x48000004)
434
        {                       /* b .+4 (xlc) */
435
          break;
436
 
437
        }
438
      else if (((op & 0xffff0000) == 0x801e0000 ||      /* lwz 0,NUM(r30), used
439
                                                           in V.4 -mrelocatable */
440
                op == 0x7fc0f214) &&    /* add r30,r0,r30, used
441
                                           in V.4 -mrelocatable */
442
               lr_reg == 0x901e0000)
443
        {
444
          continue;
445
 
446
        }
447
      else if ((op & 0xffff0000) == 0x3fc00000 ||       /* addis 30,0,foo@ha, used
448
                                                           in V.4 -mminimal-toc */
449
               (op & 0xffff0000) == 0x3bde0000)
450
        {                       /* addi 30,30,foo@l */
451
          continue;
452
 
453
        }
454
      else if ((op & 0xfc000001) == 0x48000001)
455
        {                       /* bl foo,
456
                                   to save fprs??? */
457
 
458
          fdata->frameless = 0;
459
          /* Don't skip over the subroutine call if it is not within the first
460
             three instructions of the prologue.  */
461
          if ((pc - orig_pc) > 8)
462
            break;
463
 
464
          op = read_memory_integer (pc + 4, 4);
465
 
466
          /* At this point, make sure this is not a trampoline function
467
             (a function that simply calls another functions, and nothing else).
468
             If the next is not a nop, this branch was part of the function
469
             prologue. */
470
 
471
          if (op == 0x4def7b82 || op == 0)       /* crorc 15, 15, 15 */
472
            break;              /* don't skip over
473
                                   this branch */
474
          continue;
475
 
476
          /* update stack pointer */
477
        }
478
      else if ((op & 0xffff0000) == 0x94210000)
479
        {                       /* stu r1,NUM(r1) */
480
          fdata->frameless = 0;
481
          fdata->offset = SIGNED_SHORT (op);
482
          offset = fdata->offset;
483
          continue;
484
 
485
        }
486
      else if (op == 0x7c21016e)
487
        {                       /* stwux 1,1,0 */
488
          fdata->frameless = 0;
489
          offset = fdata->offset;
490
          continue;
491
 
492
          /* Load up minimal toc pointer */
493
        }
494
      else if ((op >> 22) == 0x20f
495
               && !minimal_toc_loaded)
496
        {                       /* l r31,... or l r30,... */
497
          minimal_toc_loaded = 1;
498
          continue;
499
 
500
          /* move parameters from argument registers to local variable
501
             registers */
502
        }
503
      else if ((op & 0xfc0007fe) == 0x7c000378 &&       /* mr(.)  Rx,Ry */
504
               (((op >> 21) & 31) >= 3) &&              /* R3 >= Ry >= R10 */
505
               (((op >> 21) & 31) <= 10) &&
506
               (((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */
507
        {
508
          continue;
509
 
510
          /* store parameters in stack */
511
        }
512
      else if ((op & 0xfc1f0000) == 0x90010000 ||       /* st rx,NUM(r1) */
513
               (op & 0xfc1f0000) == 0xd8010000 ||       /* stfd Rx,NUM(r1) */
514
               (op & 0xfc1f0000) == 0xfc010000)
515
        {                       /* frsp, fp?,NUM(r1) */
516
          continue;
517
 
518
          /* store parameters in stack via frame pointer */
519
        }
520
      else if (framep &&
521
               ((op & 0xfc1f0000) == 0x901f0000 ||      /* st rx,NUM(r1) */
522
                (op & 0xfc1f0000) == 0xd81f0000 ||      /* stfd Rx,NUM(r1) */
523
                (op & 0xfc1f0000) == 0xfc1f0000))
524
        {                       /* frsp, fp?,NUM(r1) */
525
          continue;
526
 
527
          /* Set up frame pointer */
528
        }
529
      else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
530
               || op == 0x7c3f0b78)
531
        {                       /* mr r31, r1 */
532
          fdata->frameless = 0;
533
          framep = 1;
534
          fdata->alloca_reg = 31;
535
          continue;
536
 
537
          /* Another way to set up the frame pointer.  */
538
        }
539
      else if ((op & 0xfc1fffff) == 0x38010000)
540
        {                       /* addi rX, r1, 0x0 */
541
          fdata->frameless = 0;
542
          framep = 1;
543
          fdata->alloca_reg = (op & ~0x38010000) >> 21;
544
          continue;
545
 
546
        }
547
      else
548
        {
549
          break;
550
        }
551
    }
552
 
553
#if 0
554
/* I have problems with skipping over __main() that I need to address
555
 * sometime. Previously, I used to use misc_function_vector which
556
 * didn't work as well as I wanted to be.  -MGO */
557
 
558
  /* If the first thing after skipping a prolog is a branch to a function,
559
     this might be a call to an initializer in main(), introduced by gcc2.
560
     We'd like to skip over it as well. Fortunately, xlc does some extra
561
     work before calling a function right after a prologue, thus we can
562
     single out such gcc2 behaviour. */
563
 
564
 
565
  if ((op & 0xfc000001) == 0x48000001)
566
    {                           /* bl foo, an initializer function? */
567
      op = read_memory_integer (pc + 4, 4);
568
 
569
      if (op == 0x4def7b82)
570
        {                       /* cror 0xf, 0xf, 0xf (nop) */
571
 
572
          /* check and see if we are in main. If so, skip over this initializer
573
             function as well. */
574
 
575
          tmp = find_pc_misc_function (pc);
576
          if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, "main"))
577
            return pc + 8;
578
        }
579
    }
580
#endif /* 0 */
581
 
582
  fdata->offset = -fdata->offset;
583
  return last_prologue_pc;
584
}
585
 
586
 
587
/*************************************************************************
588
  Support for creating pushing a dummy frame into the stack, and popping
589
  frames, etc.
590
*************************************************************************/
591
 
592
/* The total size of dummy frame is 436, which is;
593
 
594
   32 gpr's           - 128 bytes
595
   32 fpr's           - 256 bytes
596
   7  the rest        -  28 bytes
597
   callee's link area -  24 bytes
598
   padding            -  12 bytes
599
 
600
   Note that the last 24 bytes for the link area might not be necessary,
601
   since it will be taken care of by push_arguments(). */
602
 
603
#define DUMMY_FRAME_SIZE 448
604
 
605
#define DUMMY_FRAME_ADDR_SIZE 10
606
 
607
/* Make sure you initialize these in somewhere, in case gdb gives up what it
608
   was debugging and starts debugging something else. FIXMEibm */
609
 
610
static int dummy_frame_count = 0;
611
static int dummy_frame_size = 0;
612
static CORE_ADDR *dummy_frame_addr = 0;
613
 
614
extern int stop_stack_dummy;
615
 
616
/* push a dummy frame into stack, save all register. Currently we are saving
617
   only gpr's and fpr's, which is not good enough! FIXMEmgo */
618
 
619
void
620
push_dummy_frame ()
621
{
622
  /* stack pointer.  */
623
  CORE_ADDR sp;
624
  /* Same thing, target byte order.  */
625
  char sp_targ[4];
626
 
627
  /* link register.  */
628
  CORE_ADDR pc;
629
  /* Same thing, target byte order.  */
630
  char pc_targ[4];
631
 
632
  /* Needed to figure out where to save the dummy link area.
633
     FIXME: There should be an easier way to do this, no?  tiemann 9/9/95.  */
634
  struct rs6000_framedata fdata;
635
 
636
  int ii;
637
 
638
  target_fetch_registers (-1);
639
 
640
  if (dummy_frame_count >= dummy_frame_size)
641
    {
642
      dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
643
      if (dummy_frame_addr)
644
        dummy_frame_addr = (CORE_ADDR *) xrealloc
645
          (dummy_frame_addr, sizeof (CORE_ADDR) * (dummy_frame_size));
646
      else
647
        dummy_frame_addr = (CORE_ADDR *)
648
          xmalloc (sizeof (CORE_ADDR) * (dummy_frame_size));
649
    }
650
 
651
  sp = read_register (SP_REGNUM);
652
  pc = read_register (PC_REGNUM);
653
  store_address (pc_targ, 4, pc);
654
 
655
  skip_prologue (get_pc_function_start (pc), &fdata);
656
 
657
  dummy_frame_addr[dummy_frame_count++] = sp;
658
 
659
  /* Be careful! If the stack pointer is not decremented first, then kernel
660
     thinks he is free to use the space underneath it. And kernel actually
661
     uses that area for IPC purposes when executing ptrace(2) calls. So
662
     before writing register values into the new frame, decrement and update
663
     %sp first in order to secure your frame. */
664
 
665
  /* FIXME: We don't check if the stack really has this much space.
666
     This is a problem on the ppc simulator (which only grants one page
667
     (4096 bytes) by default.  */
668
 
669
  write_register (SP_REGNUM, sp - DUMMY_FRAME_SIZE);
670
 
671
  /* gdb relies on the state of current_frame. We'd better update it,
672
     otherwise things like do_registers_info() wouldn't work properly! */
673
 
674
  flush_cached_frames ();
675
 
676
  /* save program counter in link register's space. */
677
  write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE),
678
                pc_targ, 4);
679
 
680
  /* save all floating point and general purpose registers here. */
681
 
682
  /* fpr's, f0..f31 */
683
  for (ii = 0; ii < 32; ++ii)
684
    write_memory (sp - 8 - (ii * 8), &registers[REGISTER_BYTE (31 - ii + FP0_REGNUM)], 8);
685
 
686
  /* gpr's r0..r31 */
687
  for (ii = 1; ii <= 32; ++ii)
688
    write_memory (sp - 256 - (ii * 4), &registers[REGISTER_BYTE (32 - ii)], 4);
689
 
690
  /* so far, 32*2 + 32 words = 384 bytes have been written.
691
     7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
692
 
693
  for (ii = 1; ii <= (LAST_UISA_SP_REGNUM - FIRST_UISA_SP_REGNUM + 1); ++ii)
694
    {
695
      write_memory (sp - 384 - (ii * 4),
696
                    &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
697
    }
698
 
699
  /* Save sp or so called back chain right here. */
700
  store_address (sp_targ, 4, sp);
701
  write_memory (sp - DUMMY_FRAME_SIZE, sp_targ, 4);
702
  sp -= DUMMY_FRAME_SIZE;
703
 
704
  /* And finally, this is the back chain. */
705
  write_memory (sp + 8, pc_targ, 4);
706
}
707
 
708
 
709
/* Pop a dummy frame.
710
 
711
   In rs6000 when we push a dummy frame, we save all of the registers. This
712
   is usually done before user calls a function explicitly.
713
 
714
   After a dummy frame is pushed, some instructions are copied into stack,
715
   and stack pointer is decremented even more.  Since we don't have a frame
716
   pointer to get back to the parent frame of the dummy, we start having
717
   trouble poping it.  Therefore, we keep a dummy frame stack, keeping
718
   addresses of dummy frames as such.  When poping happens and when we
719
   detect that was a dummy frame, we pop it back to its parent by using
720
   dummy frame stack (`dummy_frame_addr' array).
721
 
722
   FIXME:  This whole concept is broken.  You should be able to detect
723
   a dummy stack frame *on the user's stack itself*.  When you do,
724
   then you know the format of that stack frame -- including its
725
   saved SP register!  There should *not* be a separate stack in the
726
   GDB process that keeps track of these dummy frames!  -- gnu@cygnus.com Aug92
727
 */
728
 
729
static void
730
pop_dummy_frame ()
731
{
732
  CORE_ADDR sp, pc;
733
  int ii;
734
  sp = dummy_frame_addr[--dummy_frame_count];
735
 
736
  /* restore all fpr's. */
737
  for (ii = 1; ii <= 32; ++ii)
738
    read_memory (sp - (ii * 8), &registers[REGISTER_BYTE (32 - ii + FP0_REGNUM)], 8);
739
 
740
  /* restore all gpr's */
741
  for (ii = 1; ii <= 32; ++ii)
742
    {
743
      read_memory (sp - 256 - (ii * 4), &registers[REGISTER_BYTE (32 - ii)], 4);
744
    }
745
 
746
  /* restore the rest of the registers. */
747
  for (ii = 1; ii <= (LAST_UISA_SP_REGNUM - FIRST_UISA_SP_REGNUM + 1); ++ii)
748
    read_memory (sp - 384 - (ii * 4),
749
                 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
750
 
751
  read_memory (sp - (DUMMY_FRAME_SIZE - 8),
752
               &registers[REGISTER_BYTE (PC_REGNUM)], 4);
753
 
754
  /* when a dummy frame was being pushed, we had to decrement %sp first, in
755
     order to secure astack space. Thus, saved %sp (or %r1) value, is not the
756
     one we should restore. Change it with the one we need. */
757
 
758
  memcpy (&registers[REGISTER_BYTE (FP_REGNUM)], (char *) &sp, sizeof (int));
759
 
760
  /* Now we can restore all registers. */
761
 
762
  target_store_registers (-1);
763
  pc = read_pc ();
764
  flush_cached_frames ();
765
}
766
 
767
 
768
/* pop the innermost frame, go back to the caller. */
769
 
770
void
771
pop_frame ()
772
{
773
  CORE_ADDR pc, lr, sp, prev_sp;        /* %pc, %lr, %sp */
774
  struct rs6000_framedata fdata;
775
  struct frame_info *frame = get_current_frame ();
776
  int addr, ii;
777
 
778
  pc = read_pc ();
779
  sp = FRAME_FP (frame);
780
 
781
  if (stop_stack_dummy)
782
    {
783
      if (USE_GENERIC_DUMMY_FRAMES)
784
        {
785
          generic_pop_dummy_frame ();
786
          flush_cached_frames ();
787
          return;
788
        }
789
      else
790
        {
791
          if (dummy_frame_count)
792
            pop_dummy_frame ();
793
          return;
794
        }
795
    }
796
 
797
  /* Make sure that all registers are valid.  */
798
  read_register_bytes (0, NULL, REGISTER_BYTES);
799
 
800
  /* figure out previous %pc value. If the function is frameless, it is
801
     still in the link register, otherwise walk the frames and retrieve the
802
     saved %pc value in the previous frame. */
803
 
804
  addr = get_pc_function_start (frame->pc);
805
  (void) skip_prologue (addr, &fdata);
806
 
807
  if (fdata.frameless)
808
    prev_sp = sp;
809
  else
810
    prev_sp = read_memory_integer (sp, 4);
811
  if (fdata.lr_offset == 0)
812
    lr = read_register (LR_REGNUM);
813
  else
814
    lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
815
 
816
  /* reset %pc value. */
817
  write_register (PC_REGNUM, lr);
818
 
819
  /* reset register values if any was saved earlier. */
820
 
821
  if (fdata.saved_gpr != -1)
822
    {
823
      addr = prev_sp + fdata.gpr_offset;
824
      for (ii = fdata.saved_gpr; ii <= 31; ++ii)
825
        {
826
          read_memory (addr, &registers[REGISTER_BYTE (ii)], 4);
827
          addr += 4;
828
        }
829
    }
830
 
831
  if (fdata.saved_fpr != -1)
832
    {
833
      addr = prev_sp + fdata.fpr_offset;
834
      for (ii = fdata.saved_fpr; ii <= 31; ++ii)
835
        {
836
          read_memory (addr, &registers[REGISTER_BYTE (ii + FP0_REGNUM)], 8);
837
          addr += 8;
838
        }
839
    }
840
 
841
  write_register (SP_REGNUM, prev_sp);
842
  target_store_registers (-1);
843
  flush_cached_frames ();
844
}
845
 
846
/* fixup the call sequence of a dummy function, with the real function address.
847
   its argumets will be passed by gdb. */
848
 
849
void
850
rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
851
     char *dummyname;
852
     CORE_ADDR pc;
853
     CORE_ADDR fun;
854
     int nargs;
855
     value_ptr *args;
856
     struct type *type;
857
     int gcc_p;
858
{
859
#define TOC_ADDR_OFFSET         20
860
#define TARGET_ADDR_OFFSET      28
861
 
862
  int ii;
863
  CORE_ADDR target_addr;
864
 
865
  if (USE_GENERIC_DUMMY_FRAMES)
866
    {
867
      if (find_toc_address_hook != NULL)
868
        {
869
          CORE_ADDR tocvalue = (*find_toc_address_hook) (fun);
870
          write_register (TOC_REGNUM, tocvalue);
871
        }
872
    }
873
  else
874
    {
875
      if (find_toc_address_hook != NULL)
876
        {
877
          CORE_ADDR tocvalue;
878
 
879
          tocvalue = (*find_toc_address_hook) (fun);
880
          ii = *(int *) ((char *) dummyname + TOC_ADDR_OFFSET);
881
          ii = (ii & 0xffff0000) | (tocvalue >> 16);
882
          *(int *) ((char *) dummyname + TOC_ADDR_OFFSET) = ii;
883
 
884
          ii = *(int *) ((char *) dummyname + TOC_ADDR_OFFSET + 4);
885
          ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
886
          *(int *) ((char *) dummyname + TOC_ADDR_OFFSET + 4) = ii;
887
        }
888
 
889
      target_addr = fun;
890
      ii = *(int *) ((char *) dummyname + TARGET_ADDR_OFFSET);
891
      ii = (ii & 0xffff0000) | (target_addr >> 16);
892
      *(int *) ((char *) dummyname + TARGET_ADDR_OFFSET) = ii;
893
 
894
      ii = *(int *) ((char *) dummyname + TARGET_ADDR_OFFSET + 4);
895
      ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
896
      *(int *) ((char *) dummyname + TARGET_ADDR_OFFSET + 4) = ii;
897
    }
898
}
899
 
900
/* Pass the arguments in either registers, or in the stack. In RS6000,
901
   the first eight words of the argument list (that might be less than
902
   eight parameters if some parameters occupy more than one word) are
903
   passed in r3..r11 registers.  float and double parameters are
904
   passed in fpr's, in addition to that. Rest of the parameters if any
905
   are passed in user stack. There might be cases in which half of the
906
   parameter is copied into registers, the other half is pushed into
907
   stack.
908
 
909
   If the function is returning a structure, then the return address is passed
910
   in r3, then the first 7 words of the parameters can be passed in registers,
911
   starting from r4. */
912
 
913
CORE_ADDR
914
rs6000_push_arguments (nargs, args, sp, struct_return, struct_addr)
915
     int nargs;
916
     value_ptr *args;
917
     CORE_ADDR sp;
918
     int struct_return;
919
     CORE_ADDR struct_addr;
920
{
921
  int ii;
922
  int len = 0;
923
  int argno;                    /* current argument number */
924
  int argbytes;                 /* current argument byte */
925
  char tmp_buffer[50];
926
  int f_argno = 0;               /* current floating point argno */
927
 
928
  value_ptr arg = 0;
929
  struct type *type;
930
 
931
  CORE_ADDR saved_sp;
932
 
933
  if (!USE_GENERIC_DUMMY_FRAMES)
934
    {
935
      if (dummy_frame_count <= 0)
936
        printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
937
    }
938
 
939
  /* The first eight words of ther arguments are passed in registers. Copy
940
     them appropriately.
941
 
942
     If the function is returning a `struct', then the first word (which
943
     will be passed in r3) is used for struct return address. In that
944
     case we should advance one word and start from r4 register to copy
945
     parameters. */
946
 
947
  ii = struct_return ? 1 : 0;
948
 
949
/*
950
   effectively indirect call... gcc does...
951
 
952
   return_val example( float, int);
953
 
954
   eabi:
955
   float in fp0, int in r3
956
   offset of stack on overflow 8/16
957
   for varargs, must go by type.
958
   power open:
959
   float in r3&r4, int in r5
960
   offset of stack on overflow different
961
   both:
962
   return in r3 or f0.  If no float, must study how gcc emulates floats;
963
   pay attention to arg promotion.
964
   User may have to cast\args to handle promotion correctly
965
   since gdb won't know if prototype supplied or not.
966
 */
967
 
968
  for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
969
    {
970
      int reg_size = REGISTER_RAW_SIZE (ii + 3);
971
 
972
      arg = args[argno];
973
      type = check_typedef (VALUE_TYPE (arg));
974
      len = TYPE_LENGTH (type);
975
 
976
      if (TYPE_CODE (type) == TYPE_CODE_FLT)
977
        {
978
 
979
          /* floating point arguments are passed in fpr's, as well as gpr's.
980
             There are 13 fpr's reserved for passing parameters. At this point
981
             there is no way we would run out of them. */
982
 
983
          if (len > 8)
984
            printf_unfiltered (
985
                                "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
986
 
987
          memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
988
                  VALUE_CONTENTS (arg),
989
                  len);
990
          ++f_argno;
991
        }
992
 
993
      if (len > reg_size)
994
        {
995
 
996
          /* Argument takes more than one register. */
997
          while (argbytes < len)
998
            {
999
              memset (&registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
1000
              memcpy (&registers[REGISTER_BYTE (ii + 3)],
1001
                      ((char *) VALUE_CONTENTS (arg)) + argbytes,
1002
                      (len - argbytes) > reg_size
1003
                        ? reg_size : len - argbytes);
1004
              ++ii, argbytes += reg_size;
1005
 
1006
              if (ii >= 8)
1007
                goto ran_out_of_registers_for_arguments;
1008
            }
1009
          argbytes = 0;
1010
          --ii;
1011
        }
1012
      else
1013
        {                       /* Argument can fit in one register. No problem. */
1014
          int adj = TARGET_BYTE_ORDER == BIG_ENDIAN ? reg_size - len : 0;
1015
          memset (&registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
1016
          memcpy ((char *)&registers[REGISTER_BYTE (ii + 3)] + adj,
1017
                  VALUE_CONTENTS (arg), len);
1018
        }
1019
      ++argno;
1020
    }
1021
 
1022
ran_out_of_registers_for_arguments:
1023
 
1024
  if (USE_GENERIC_DUMMY_FRAMES)
1025
    {
1026
      saved_sp = read_sp ();
1027
#ifndef ELF_OBJECT_FORMAT
1028
      /* location for 8 parameters are always reserved. */
1029
      sp -= 4 * 8;
1030
 
1031
      /* another six words for back chain, TOC register, link register, etc. */
1032
      sp -= 24;
1033
 
1034
      /* stack pointer must be quadword aligned */
1035
      sp &= -16;
1036
#endif
1037
    }
1038
  else
1039
    {
1040
      /* location for 8 parameters are always reserved. */
1041
      sp -= 4 * 8;
1042
 
1043
      /* another six words for back chain, TOC register, link register, etc. */
1044
      sp -= 24;
1045
 
1046
      /* stack pointer must be quadword aligned */
1047
      sp &= -16;
1048
    }
1049
 
1050
  /* if there are more arguments, allocate space for them in
1051
     the stack, then push them starting from the ninth one. */
1052
 
1053
  if ((argno < nargs) || argbytes)
1054
    {
1055
      int space = 0, jj;
1056
 
1057
      if (argbytes)
1058
        {
1059
          space += ((len - argbytes + 3) & -4);
1060
          jj = argno + 1;
1061
        }
1062
      else
1063
        jj = argno;
1064
 
1065
      for (; jj < nargs; ++jj)
1066
        {
1067
          value_ptr val = args[jj];
1068
          space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
1069
        }
1070
 
1071
      /* add location required for the rest of the parameters */
1072
      space = (space + 15) & -16;
1073
      sp -= space;
1074
 
1075
      /* This is another instance we need to be concerned about securing our
1076
         stack space. If we write anything underneath %sp (r1), we might conflict
1077
         with the kernel who thinks he is free to use this area. So, update %sp
1078
         first before doing anything else. */
1079
 
1080
      write_register (SP_REGNUM, sp);
1081
 
1082
      /* if the last argument copied into the registers didn't fit there
1083
         completely, push the rest of it into stack. */
1084
 
1085
      if (argbytes)
1086
        {
1087
          write_memory (sp + 24 + (ii * 4),
1088
                        ((char *) VALUE_CONTENTS (arg)) + argbytes,
1089
                        len - argbytes);
1090
          ++argno;
1091
          ii += ((len - argbytes + 3) & -4) / 4;
1092
        }
1093
 
1094
      /* push the rest of the arguments into stack. */
1095
      for (; argno < nargs; ++argno)
1096
        {
1097
 
1098
          arg = args[argno];
1099
          type = check_typedef (VALUE_TYPE (arg));
1100
          len = TYPE_LENGTH (type);
1101
 
1102
 
1103
          /* float types should be passed in fpr's, as well as in the stack. */
1104
          if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
1105
            {
1106
 
1107
              if (len > 8)
1108
                printf_unfiltered (
1109
                                    "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
1110
 
1111
              memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
1112
                      VALUE_CONTENTS (arg),
1113
                      len);
1114
              ++f_argno;
1115
            }
1116
 
1117
          write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len);
1118
          ii += ((len + 3) & -4) / 4;
1119
        }
1120
    }
1121
  else
1122
    /* Secure stack areas first, before doing anything else. */
1123
    write_register (SP_REGNUM, sp);
1124
 
1125
  if (!USE_GENERIC_DUMMY_FRAMES)
1126
    {
1127
      /* we want to copy 24 bytes of target's frame to dummy's frame,
1128
         then set back chain to point to new frame. */
1129
 
1130
      saved_sp = dummy_frame_addr[dummy_frame_count - 1];
1131
      read_memory (saved_sp, tmp_buffer, 24);
1132
      write_memory (sp, tmp_buffer, 24);
1133
    }
1134
 
1135
  /* set back chain properly */
1136
  store_address (tmp_buffer, 4, saved_sp);
1137
  write_memory (sp, tmp_buffer, 4);
1138
 
1139
  target_store_registers (-1);
1140
  return sp;
1141
}
1142
/* #ifdef ELF_OBJECT_FORMAT */
1143
 
1144
/* Function: ppc_push_return_address (pc, sp)
1145
   Set up the return address for the inferior function call. */
1146
 
1147
CORE_ADDR
1148
ppc_push_return_address (pc, sp)
1149
     CORE_ADDR pc;
1150
     CORE_ADDR sp;
1151
{
1152
  write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ());
1153
  return sp;
1154
}
1155
 
1156
/* #endif */
1157
 
1158
/* a given return value in `regbuf' with a type `valtype', extract and copy its
1159
   value into `valbuf' */
1160
 
1161
void
1162
extract_return_value (valtype, regbuf, valbuf)
1163
     struct type *valtype;
1164
     char regbuf[REGISTER_BYTES];
1165
     char *valbuf;
1166
{
1167
  int offset = 0;
1168
 
1169
  if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
1170
    {
1171
 
1172
      double dd;
1173
      float ff;
1174
      /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1175
         We need to truncate the return value into float size (4 byte) if
1176
         necessary. */
1177
 
1178
      if (TYPE_LENGTH (valtype) > 4)    /* this is a double */
1179
        memcpy (valbuf,
1180
                &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
1181
                TYPE_LENGTH (valtype));
1182
      else
1183
        {                       /* float */
1184
          memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
1185
          ff = (float) dd;
1186
          memcpy (valbuf, &ff, sizeof (float));
1187
        }
1188
    }
1189
  else
1190
    {
1191
      /* return value is copied starting from r3. */
1192
      if (TARGET_BYTE_ORDER == BIG_ENDIAN
1193
          && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
1194
        offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
1195
 
1196
      memcpy (valbuf,
1197
              regbuf + REGISTER_BYTE (3) + offset,
1198
              TYPE_LENGTH (valtype));
1199
    }
1200
}
1201
 
1202
 
1203
/* keep structure return address in this variable.
1204
   FIXME:  This is a horrid kludge which should not be allowed to continue
1205
   living.  This only allows a single nested call to a structure-returning
1206
   function.  Come on, guys!  -- gnu@cygnus.com, Aug 92  */
1207
 
1208
CORE_ADDR rs6000_struct_return_address;
1209
 
1210
 
1211
/* Indirect function calls use a piece of trampoline code to do context
1212
   switching, i.e. to set the new TOC table. Skip such code if we are on
1213
   its first instruction (as when we have single-stepped to here).
1214
   Also skip shared library trampoline code (which is different from
1215
   indirect function call trampolines).
1216
   Result is desired PC to step until, or NULL if we are not in
1217
   trampoline code.  */
1218
 
1219
CORE_ADDR
1220
skip_trampoline_code (pc)
1221
     CORE_ADDR pc;
1222
{
1223
  register unsigned int ii, op;
1224
  CORE_ADDR solib_target_pc;
1225
 
1226
  static unsigned trampoline_code[] =
1227
  {
1228
    0x800b0000,                 /*     l   r0,0x0(r11)  */
1229
    0x90410014,                 /*    st   r2,0x14(r1)  */
1230
    0x7c0903a6,                 /* mtctr   r0           */
1231
    0x804b0004,                 /*     l   r2,0x4(r11)  */
1232
    0x816b0008,                 /*     l  r11,0x8(r11)  */
1233
    0x4e800420,                 /*  bctr                */
1234
    0x4e800020,                 /*    br                */
1235
 
1236
  };
1237
 
1238
  /* If pc is in a shared library trampoline, return its target.  */
1239
  solib_target_pc = find_solib_trampoline_target (pc);
1240
  if (solib_target_pc)
1241
    return solib_target_pc;
1242
 
1243
  for (ii = 0; trampoline_code[ii]; ++ii)
1244
    {
1245
      op = read_memory_integer (pc + (ii * 4), 4);
1246
      if (op != trampoline_code[ii])
1247
        return 0;
1248
    }
1249
  ii = read_register (11);      /* r11 holds destination addr   */
1250
  pc = read_memory_integer (ii, 4);     /* (r11) value                  */
1251
  return pc;
1252
}
1253
 
1254
/* Determines whether the function FI has a frame on the stack or not.  */
1255
 
1256
int
1257
rs6000_frameless_function_invocation (struct frame_info *fi)
1258
{
1259
  CORE_ADDR func_start;
1260
  struct rs6000_framedata fdata;
1261
 
1262
  /* Don't even think about framelessness except on the innermost frame
1263
     or if the function was interrupted by a signal.  */
1264
  if (fi->next != NULL && !fi->next->signal_handler_caller)
1265
    return 0;
1266
 
1267
  func_start = get_pc_function_start (fi->pc);
1268
 
1269
  /* If we failed to find the start of the function, it is a mistake
1270
     to inspect the instructions. */
1271
 
1272
  if (!func_start)
1273
    {
1274
      /* A frame with a zero PC is usually created by dereferencing a NULL
1275
         function pointer, normally causing an immediate core dump of the
1276
         inferior. Mark function as frameless, as the inferior has no chance
1277
         of setting up a stack frame.  */
1278
      if (fi->pc == 0)
1279
        return 1;
1280
      else
1281
        return 0;
1282
    }
1283
 
1284
  (void) skip_prologue (func_start, &fdata);
1285
  return fdata.frameless;
1286
}
1287
 
1288
/* Return the PC saved in a frame */
1289
 
1290
unsigned long
1291
rs6000_frame_saved_pc (struct frame_info *fi)
1292
{
1293
  CORE_ADDR func_start;
1294
  struct rs6000_framedata fdata;
1295
 
1296
  if (fi->signal_handler_caller)
1297
    return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
1298
 
1299
  if (USE_GENERIC_DUMMY_FRAMES)
1300
    {
1301
      if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1302
        return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
1303
    }
1304
 
1305
  func_start = get_pc_function_start (fi->pc);
1306
 
1307
  /* If we failed to find the start of the function, it is a mistake
1308
     to inspect the instructions. */
1309
  if (!func_start)
1310
    return 0;
1311
 
1312
  (void) skip_prologue (func_start, &fdata);
1313
 
1314
  if (fdata.lr_offset == 0 && fi->next != NULL)
1315
    {
1316
      if (fi->next->signal_handler_caller)
1317
        return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4);
1318
      else
1319
        return read_memory_integer (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE, 4);
1320
    }
1321
 
1322
  if (fdata.lr_offset == 0)
1323
    return read_register (LR_REGNUM);
1324
 
1325
  return read_memory_integer (FRAME_CHAIN (fi) + fdata.lr_offset, 4);
1326
}
1327
 
1328
/* If saved registers of frame FI are not known yet, read and cache them.
1329
   &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1330
   in which case the framedata are read.  */
1331
 
1332
static void
1333
frame_get_saved_regs (fi, fdatap)
1334
     struct frame_info *fi;
1335
     struct rs6000_framedata *fdatap;
1336
{
1337
  CORE_ADDR frame_addr;
1338
  struct rs6000_framedata work_fdata;
1339
 
1340
  if (fi->saved_regs)
1341
    return;
1342
 
1343
  if (fdatap == NULL)
1344
    {
1345
      fdatap = &work_fdata;
1346
      (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
1347
    }
1348
 
1349
  frame_saved_regs_zalloc (fi);
1350
 
1351
  /* If there were any saved registers, figure out parent's stack
1352
     pointer. */
1353
  /* The following is true only if the frame doesn't have a call to
1354
     alloca(), FIXME. */
1355
 
1356
  if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0
1357
      && fdatap->lr_offset == 0 && fdatap->cr_offset == 0)
1358
    frame_addr = 0;
1359
  else if (fi->prev && fi->prev->frame)
1360
    frame_addr = fi->prev->frame;
1361
  else
1362
    frame_addr = read_memory_integer (fi->frame, 4);
1363
 
1364
  /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1365
     All fpr's from saved_fpr to fp31 are saved.  */
1366
 
1367
  if (fdatap->saved_fpr >= 0)
1368
    {
1369
      int i;
1370
      int fpr_offset = frame_addr + fdatap->fpr_offset;
1371
      for (i = fdatap->saved_fpr; i < 32; i++)
1372
        {
1373
          fi->saved_regs[FP0_REGNUM + i] = fpr_offset;
1374
          fpr_offset += 8;
1375
        }
1376
    }
1377
 
1378
  /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1379
     All gpr's from saved_gpr to gpr31 are saved.  */
1380
 
1381
  if (fdatap->saved_gpr >= 0)
1382
    {
1383
      int i;
1384
      int gpr_offset = frame_addr + fdatap->gpr_offset;
1385
      for (i = fdatap->saved_gpr; i < 32; i++)
1386
        {
1387
          fi->saved_regs[i] = gpr_offset;
1388
          gpr_offset += 4;
1389
        }
1390
    }
1391
 
1392
  /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1393
     the CR.  */
1394
  if (fdatap->cr_offset != 0)
1395
    fi->saved_regs[CR_REGNUM] = frame_addr + fdatap->cr_offset;
1396
 
1397
  /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1398
     the LR.  */
1399
  if (fdatap->lr_offset != 0)
1400
    fi->saved_regs[LR_REGNUM] = frame_addr + fdatap->lr_offset;
1401
}
1402
 
1403
/* Return the address of a frame. This is the inital %sp value when the frame
1404
   was first allocated. For functions calling alloca(), it might be saved in
1405
   an alloca register. */
1406
 
1407
static CORE_ADDR
1408
frame_initial_stack_address (fi)
1409
     struct frame_info *fi;
1410
{
1411
  CORE_ADDR tmpaddr;
1412
  struct rs6000_framedata fdata;
1413
  struct frame_info *callee_fi;
1414
 
1415
  /* if the initial stack pointer (frame address) of this frame is known,
1416
     just return it. */
1417
 
1418
  if (fi->extra_info->initial_sp)
1419
    return fi->extra_info->initial_sp;
1420
 
1421
  /* find out if this function is using an alloca register.. */
1422
 
1423
  (void) skip_prologue (get_pc_function_start (fi->pc), &fdata);
1424
 
1425
  /* if saved registers of this frame are not known yet, read and cache them. */
1426
 
1427
  if (!fi->saved_regs)
1428
    frame_get_saved_regs (fi, &fdata);
1429
 
1430
  /* If no alloca register used, then fi->frame is the value of the %sp for
1431
     this frame, and it is good enough. */
1432
 
1433
  if (fdata.alloca_reg < 0)
1434
    {
1435
      fi->extra_info->initial_sp = fi->frame;
1436
      return fi->extra_info->initial_sp;
1437
    }
1438
 
1439
  /* This function has an alloca register. If this is the top-most frame
1440
     (with the lowest address), the value in alloca register is good. */
1441
 
1442
  if (!fi->next)
1443
    return fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1444
 
1445
  /* Otherwise, this is a caller frame. Callee has usually already saved
1446
     registers, but there are exceptions (such as when the callee
1447
     has no parameters). Find the address in which caller's alloca
1448
     register is saved. */
1449
 
1450
  for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next)
1451
    {
1452
 
1453
      if (!callee_fi->saved_regs)
1454
        frame_get_saved_regs (callee_fi, NULL);
1455
 
1456
      /* this is the address in which alloca register is saved. */
1457
 
1458
      tmpaddr = callee_fi->saved_regs[fdata.alloca_reg];
1459
      if (tmpaddr)
1460
        {
1461
          fi->extra_info->initial_sp = read_memory_integer (tmpaddr, 4);
1462
          return fi->extra_info->initial_sp;
1463
        }
1464
 
1465
      /* Go look into deeper levels of the frame chain to see if any one of
1466
         the callees has saved alloca register. */
1467
    }
1468
 
1469
  /* If alloca register was not saved, by the callee (or any of its callees)
1470
     then the value in the register is still good. */
1471
 
1472
  fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1473
  return fi->extra_info->initial_sp;
1474
}
1475
 
1476
CORE_ADDR
1477
rs6000_frame_chain (thisframe)
1478
     struct frame_info *thisframe;
1479
{
1480
  CORE_ADDR fp;
1481
 
1482
  if (USE_GENERIC_DUMMY_FRAMES)
1483
    {
1484
      if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
1485
        return thisframe->frame;        /* dummy frame same as caller's frame */
1486
    }
1487
 
1488
  if (inside_entry_file (thisframe->pc) ||
1489
      thisframe->pc == entry_point_address ())
1490
    return 0;
1491
 
1492
  if (thisframe->signal_handler_caller)
1493
    fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
1494
  else if (thisframe->next != NULL
1495
           && thisframe->next->signal_handler_caller
1496
           && FRAMELESS_FUNCTION_INVOCATION (thisframe))
1497
    /* A frameless function interrupted by a signal did not change the
1498
       frame pointer.  */
1499
    fp = FRAME_FP (thisframe);
1500
  else
1501
    fp = read_memory_integer ((thisframe)->frame, 4);
1502
 
1503
  if (USE_GENERIC_DUMMY_FRAMES)
1504
    {
1505
      CORE_ADDR fpp, lr;
1506
 
1507
      lr = read_register (LR_REGNUM);
1508
      if (lr == entry_point_address ())
1509
        if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0)
1510
          if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
1511
            return fpp;
1512
    }
1513
 
1514
  return fp;
1515
}
1516
 
1517
/* Return nonzero if ADDR (a function pointer) is in the data space and
1518
   is therefore a special function pointer.  */
1519
 
1520
int
1521
is_magic_function_pointer (addr)
1522
     CORE_ADDR addr;
1523
{
1524
  struct obj_section *s;
1525
 
1526
  s = find_pc_section (addr);
1527
  if (s && s->the_bfd_section->flags & SEC_CODE)
1528
    return 0;
1529
  else
1530
    return 1;
1531
}
1532
 
1533
#ifdef GDB_TARGET_POWERPC
1534
int
1535
gdb_print_insn_powerpc (memaddr, info)
1536
     bfd_vma memaddr;
1537
     disassemble_info *info;
1538
{
1539
  if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1540
    return print_insn_big_powerpc (memaddr, info);
1541
  else
1542
    return print_insn_little_powerpc (memaddr, info);
1543
}
1544
#endif
1545
 
1546
 
1547
/* Handling the various PowerPC/RS6000 variants.  */
1548
 
1549
 
1550
/* The arrays here called register_names_MUMBLE hold names that
1551
   the rs6000_register_name function returns.
1552
 
1553
   For each family of PPC variants, I've tried to isolate out the
1554
   common registers and put them up front, so that as long as you get
1555
   the general family right, GDB will correctly identify the registers
1556
   common to that family.  The common register sets are:
1557
 
1558
   For the 60x family: hid0 hid1 iabr dabr pir
1559
 
1560
   For the 505 and 860 family: eie eid nri
1561
 
1562
   For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
1563
   tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1564
   pbu1 pbl2 pbu2
1565
 
1566
   Most of these register groups aren't anything formal.  I arrived at
1567
   them by looking at the registers that occurred in more than one
1568
   processor.  */
1569
 
1570
/* UISA register names common across all architectures, including POWER.  */
1571
 
1572
#define COMMON_UISA_REG_NAMES \
1573
  /*  0 */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",  \
1574
  /*  8 */ "r8", "r9", "r10","r11","r12","r13","r14","r15", \
1575
  /* 16 */ "r16","r17","r18","r19","r20","r21","r22","r23", \
1576
  /* 24 */ "r24","r25","r26","r27","r28","r29","r30","r31", \
1577
  /* 32 */ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",  \
1578
  /* 40 */ "f8", "f9", "f10","f11","f12","f13","f14","f15", \
1579
  /* 48 */ "f16","f17","f18","f19","f20","f21","f22","f23", \
1580
  /* 56 */ "f24","f25","f26","f27","f28","f29","f30","f31", \
1581
  /* 64 */ "pc", "ps"
1582
 
1583
/* UISA-level SPR names for PowerPC.  */
1584
#define PPC_UISA_SPR_NAMES \
1585
  /* 66 */ "cr",  "lr", "ctr", "xer", ""
1586
 
1587
/* Segment register names, for PowerPC.  */
1588
#define PPC_SEGMENT_REG_NAMES \
1589
  /* 71 */ "sr0", "sr1", "sr2",  "sr3",  "sr4",  "sr5",  "sr6",  "sr7", \
1590
  /* 79 */ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15"
1591
 
1592
/* OEA SPR names for 32-bit PowerPC implementations.
1593
   The blank space is for "asr", which is only present on 64-bit
1594
   implementations.  */
1595
#define PPC_32_OEA_SPR_NAMES \
1596
  /*  87 */ "pvr", \
1597
  /*  88 */ "ibat0u", "ibat0l", "ibat1u", "ibat1l", \
1598
  /*  92 */ "ibat2u", "ibat2l", "ibat3u", "ibat3l", \
1599
  /*  96 */ "dbat0u", "dbat0l", "dbat1u", "dbat1l", \
1600
  /* 100 */ "dbat2u", "dbat2l", "dbat3u", "dbat3l", \
1601
  /* 104 */ "sdr1", "", "dar", "dsisr", "sprg0", "sprg1", "sprg2", "sprg3",\
1602
  /* 112 */ "srr0", "srr1", "tbl", "tbu", "dec", "dabr", "ear"
1603
 
1604
/* For the RS6000, we only cover user-level SPR's.  */
1605
char *register_names_rs6000[] =
1606
{
1607
  COMMON_UISA_REG_NAMES,
1608
  /* 66 */ "cnd", "lr", "cnt", "xer", "mq"
1609
};
1610
 
1611
/* a UISA-only view of the PowerPC.  */
1612
char *register_names_uisa[] =
1613
{
1614
  COMMON_UISA_REG_NAMES,
1615
  PPC_UISA_SPR_NAMES
1616
};
1617
 
1618
char *register_names_403[] =
1619
{
1620
  COMMON_UISA_REG_NAMES,
1621
  PPC_UISA_SPR_NAMES,
1622
  PPC_SEGMENT_REG_NAMES,
1623
  PPC_32_OEA_SPR_NAMES,
1624
  /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
1625
  /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
1626
  /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2"
1627
};
1628
 
1629
char *register_names_403GC[] =
1630
{
1631
  COMMON_UISA_REG_NAMES,
1632
  PPC_UISA_SPR_NAMES,
1633
  PPC_SEGMENT_REG_NAMES,
1634
  PPC_32_OEA_SPR_NAMES,
1635
  /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
1636
  /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
1637
  /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2",
1638
  /* 143 */ "zpr", "pid", "sgr", "dcwr", "tbhu", "tblu"
1639
};
1640
 
1641
char *register_names_505[] =
1642
{
1643
  COMMON_UISA_REG_NAMES,
1644
  PPC_UISA_SPR_NAMES,
1645
  PPC_SEGMENT_REG_NAMES,
1646
  PPC_32_OEA_SPR_NAMES,
1647
  /* 119 */ "eie", "eid", "nri"
1648
};
1649
 
1650
char *register_names_860[] =
1651
{
1652
  COMMON_UISA_REG_NAMES,
1653
  PPC_UISA_SPR_NAMES,
1654
  PPC_SEGMENT_REG_NAMES,
1655
  PPC_32_OEA_SPR_NAMES,
1656
  /* 119 */ "eie", "eid", "nri", "cmpa", "cmpb", "cmpc", "cmpd", "icr",
1657
  /* 127 */ "der", "counta", "countb", "cmpe", "cmpf", "cmpg", "cmph",
1658
  /* 134 */ "lctrl1", "lctrl2", "ictrl", "bar", "ic_cst", "ic_adr", "ic_dat",
1659
  /* 141 */ "dc_cst", "dc_adr", "dc_dat", "dpdr", "dpir", "immr", "mi_ctr",
1660
  /* 148 */ "mi_ap", "mi_epn", "mi_twc", "mi_rpn", "md_ctr", "m_casid",
1661
  /* 154 */ "md_ap", "md_epn", "md_twb", "md_twc", "md_rpn", "m_tw",
1662
  /* 160 */ "mi_dbcam", "mi_dbram0", "mi_dbram1", "md_dbcam", "md_dbram0",
1663
  /* 165 */ "md_dbram1"
1664
};
1665
 
1666
/* Note that the 601 has different register numbers for reading and
1667
   writing RTCU and RTCL.  However, how one reads and writes a
1668
   register is the stub's problem.  */
1669
char *register_names_601[] =
1670
{
1671
  COMMON_UISA_REG_NAMES,
1672
  PPC_UISA_SPR_NAMES,
1673
  PPC_SEGMENT_REG_NAMES,
1674
  PPC_32_OEA_SPR_NAMES,
1675
  /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mq", "rtcu",
1676
  /* 126 */ "rtcl"
1677
};
1678
 
1679
char *register_names_602[] =
1680
{
1681
  COMMON_UISA_REG_NAMES,
1682
  PPC_UISA_SPR_NAMES,
1683
  PPC_SEGMENT_REG_NAMES,
1684
  PPC_32_OEA_SPR_NAMES,
1685
  /* 119 */ "hid0", "hid1", "iabr", "", "", "tcr", "ibr", "esassr", "sebr",
1686
  /* 128 */ "ser", "sp", "lt"
1687
};
1688
 
1689
char *register_names_603[] =
1690
{
1691
  COMMON_UISA_REG_NAMES,
1692
  PPC_UISA_SPR_NAMES,
1693
  PPC_SEGMENT_REG_NAMES,
1694
  PPC_32_OEA_SPR_NAMES,
1695
  /* 119 */ "hid0", "hid1", "iabr", "", "", "dmiss", "dcmp", "hash1",
1696
  /* 127 */ "hash2", "imiss", "icmp", "rpa"
1697
};
1698
 
1699
char *register_names_604[] =
1700
{
1701
  COMMON_UISA_REG_NAMES,
1702
  PPC_UISA_SPR_NAMES,
1703
  PPC_SEGMENT_REG_NAMES,
1704
  PPC_32_OEA_SPR_NAMES,
1705
  /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mmcr0", "pmc1", "pmc2",
1706
  /* 127 */ "sia", "sda"
1707
};
1708
 
1709
char *register_names_750[] =
1710
{
1711
  COMMON_UISA_REG_NAMES,
1712
  PPC_UISA_SPR_NAMES,
1713
  PPC_SEGMENT_REG_NAMES,
1714
  PPC_32_OEA_SPR_NAMES,
1715
  /* 119 */ "hid0", "hid1", "iabr", "dabr", "", "ummcr0", "upmc1", "upmc2",
1716
  /* 127 */ "usia", "ummcr1", "upmc3", "upmc4", "mmcr0", "pmc1", "pmc2",
1717
  /* 134 */ "sia", "mmcr1", "pmc3", "pmc4", "l2cr", "ictc", "thrm1", "thrm2",
1718
  /* 142 */ "thrm3"
1719
};
1720
 
1721
 
1722
/* Information about a particular processor variant.  */
1723
struct variant
1724
  {
1725
    /* Name of this variant.  */
1726
    char *name;
1727
 
1728
    /* English description of the variant.  */
1729
    char *description;
1730
 
1731
    /* Table of register names; registers[R] is the name of the register
1732
       number R.  */
1733
    int num_registers;
1734
    char **registers;
1735
  };
1736
 
1737
#define num_registers(list) (sizeof (list) / sizeof((list)[0]))
1738
 
1739
 
1740
/* Information in this table comes from the following web sites:
1741
   IBM:       http://www.chips.ibm.com:80/products/embedded/
1742
   Motorola:  http://www.mot.com/SPS/PowerPC/
1743
 
1744
   I'm sure I've got some of the variant descriptions not quite right.
1745
   Please report any inaccuracies you find to GDB's maintainer.
1746
 
1747
   If you add entries to this table, please be sure to allow the new
1748
   value as an argument to the --with-cpu flag, in configure.in.  */
1749
 
1750
static struct variant
1751
  variants[] =
1752
{
1753
  {"ppc-uisa", "PowerPC UISA - a PPC processor as viewed by user-level code",
1754
   num_registers (register_names_uisa), register_names_uisa},
1755
  {"rs6000", "IBM RS6000 (\"POWER\") architecture, user-level view",
1756
   num_registers (register_names_rs6000), register_names_rs6000},
1757
  {"403", "IBM PowerPC 403",
1758
   num_registers (register_names_403), register_names_403},
1759
  {"403GC", "IBM PowerPC 403GC",
1760
   num_registers (register_names_403GC), register_names_403GC},
1761
  {"505", "Motorola PowerPC 505",
1762
   num_registers (register_names_505), register_names_505},
1763
  {"860", "Motorola PowerPC 860 or 850",
1764
   num_registers (register_names_860), register_names_860},
1765
  {"601", "Motorola PowerPC 601",
1766
   num_registers (register_names_601), register_names_601},
1767
  {"602", "Motorola PowerPC 602",
1768
   num_registers (register_names_602), register_names_602},
1769
  {"603", "Motorola/IBM PowerPC 603 or 603e",
1770
   num_registers (register_names_603), register_names_603},
1771
  {"604", "Motorola PowerPC 604 or 604e",
1772
   num_registers (register_names_604), register_names_604},
1773
  {"750", "Motorola/IBM PowerPC 750 or 740",
1774
   num_registers (register_names_750), register_names_750},
1775
  {0, 0, 0, 0}
1776
};
1777
 
1778
 
1779
static struct variant *current_variant;
1780
 
1781
char *
1782
rs6000_register_name (int i)
1783
{
1784
  if (i < 0 || i >= NUM_REGS)
1785
    error ("GDB bug: rs6000-tdep.c (rs6000_register_name): strange register number");
1786
 
1787
  return ((i < current_variant->num_registers)
1788
          ? current_variant->registers[i]
1789
          : "");
1790
}
1791
 
1792
 
1793
static void
1794
install_variant (struct variant *v)
1795
{
1796
  current_variant = v;
1797
}
1798
 
1799
 
1800
/* Look up the variant named NAME in the `variants' table.  Return a
1801
   pointer to the struct variant, or null if we couldn't find it.  */
1802
static struct variant *
1803
find_variant_by_name (char *name)
1804
{
1805
  int i;
1806
 
1807
  for (i = 0; variants[i].name; i++)
1808
    if (!strcmp (name, variants[i].name))
1809
      return &variants[i];
1810
 
1811
  return 0;
1812
}
1813
 
1814
 
1815
/* Install the PPC/RS6000 variant named NAME in the `variants' table.
1816
   Return zero if we installed it successfully, or a non-zero value if
1817
   we couldn't do it.
1818
 
1819
   This might be useful to code outside this file, which doesn't want
1820
   to depend on the exact indices of the entries in the `variants'
1821
   table.  Just make it non-static if you want that.  */
1822
static int
1823
install_variant_by_name (char *name)
1824
{
1825
  struct variant *v = find_variant_by_name (name);
1826
 
1827
  if (v)
1828
    {
1829
      install_variant (v);
1830
      return 0;
1831
    }
1832
  else
1833
    return 1;
1834
}
1835
 
1836
 
1837
static void
1838
list_variants ()
1839
{
1840
  int i;
1841
 
1842
  printf_filtered ("GDB knows about the following PowerPC and RS6000 variants:\n");
1843
 
1844
  for (i = 0; variants[i].name; i++)
1845
    printf_filtered ("  %-8s  %s\n",
1846
                     variants[i].name, variants[i].description);
1847
}
1848
 
1849
 
1850
static void
1851
show_current_variant ()
1852
{
1853
  printf_filtered ("PowerPC / RS6000 processor variant is set to `%s'.\n",
1854
                   current_variant->name);
1855
}
1856
 
1857
 
1858
static void
1859
set_processor (char *arg, int from_tty)
1860
{
1861
  if (!arg || arg[0] == '\0')
1862
    {
1863
      list_variants ();
1864
      return;
1865
    }
1866
 
1867
  if (install_variant_by_name (arg))
1868
    {
1869
      error_begin ();
1870
      fprintf_filtered (gdb_stderr,
1871
        "`%s' is not a recognized PowerPC / RS6000 variant name.\n\n", arg);
1872
      list_variants ();
1873
      return_to_top_level (RETURN_ERROR);
1874
    }
1875
 
1876
  show_current_variant ();
1877
}
1878
 
1879
static void
1880
show_processor (char *arg, int from_tty)
1881
{
1882
  show_current_variant ();
1883
}
1884
 
1885
 
1886
 
1887
 
1888
/* Initialization code.  */
1889
 
1890
void
1891
_initialize_rs6000_tdep ()
1892
{
1893
  /* FIXME, this should not be decided via ifdef. */
1894
#ifdef GDB_TARGET_POWERPC
1895
  tm_print_insn = gdb_print_insn_powerpc;
1896
#else
1897
  tm_print_insn = print_insn_rs6000;
1898
#endif
1899
 
1900
  /* I don't think we should use the set/show command arrangement
1901
     here, because the way that's implemented makes it hard to do the
1902
     error checking we want in a reasonable way.  So we just add them
1903
     as two separate commands.  */
1904
  add_cmd ("processor", class_support, set_processor,
1905
           "`set processor NAME' sets the PowerPC/RS6000 variant to NAME.\n\
1906
If you set this, GDB will know about the special-purpose registers that are\n\
1907
available on the given variant.\n\
1908
Type `set processor' alone for a list of recognized variant names.",
1909
           &setlist);
1910
  add_cmd ("processor", class_support, show_processor,
1911
           "Show the variant of the PowerPC or RS6000 processor in use.\n\
1912
Use `set processor' to change this.",
1913
           &showlist);
1914
 
1915
  /* Set the current PPC processor variant.  */
1916
  {
1917
    int status = 1;
1918
 
1919
#ifdef TARGET_CPU_DEFAULT
1920
    status = install_variant_by_name (TARGET_CPU_DEFAULT);
1921
#endif
1922
 
1923
    if (status)
1924
      {
1925
#ifdef GDB_TARGET_POWERPC
1926
        install_variant_by_name ("ppc-uisa");
1927
#else
1928
        install_variant_by_name ("rs6000");
1929
#endif
1930
      }
1931
  }
1932
}

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