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[/] [or1k/] [trunk/] [gdb-5.0/] [sim/] [d30v/] [Makefile.in] - Blame information for rev 107

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1 106 markom
#   Mitsubishi Electric Corp. D30V Simulator.
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#   Copyright (C) 1997, Free Software Foundation, Inc.
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#   Contributed by Cygnus Support.
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#
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# This file is part of GDB, the GNU debugger.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 2, or (at your option)
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# any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License along
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# with this program; if not, write to the Free Software Foundation, Inc.,
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# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
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M4= @M4@
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## COMMON_PRE_CONFIG_FRAG
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# These variables are given default values in COMMON_PRE_CONFIG_FRAG.
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# We override the ones we need to here.
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# Not all of these need to be mentioned, only the necessary ones.
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# List of object files, less common parts.
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SIM_OBJS = \
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        $(SIM_NEW_COMMON_OBJS) \
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        engine.o cpu.o \
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        s_support.o l_support.o \
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        s_idecode.o l_idecode.o  \
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        s_semantics.o l_semantics.o \
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        sim-calls.o itable.o \
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        sim-hload.o \
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        sim-hrw.o \
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        sim-engine.o \
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        sim-stop.o \
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        sim-reason.o \
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        sim-resume.o
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# List of extra dependencies.
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# Generally this consists of simulator specific files included by sim-main.h.
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SIM_EXTRA_DEPS = itable.h s_idecode.h l_idecode.h cpu.h alu.h
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# List of generators
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SIM_GEN=tmp-igen
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# List of extra flags to always pass to $(CC).
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SIM_EXTRA_CFLAGS = @sim_trapdump@
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# List of main object files for `run'.
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SIM_RUN_OBJS = nrun.o
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# Dependency of `clean' to clean any extra files.
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SIM_EXTRA_CLEAN = clean-igen
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# This selects the d30v newlib/libgloss syscall definitions.
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NL_TARGET=-DNL_TARGET_d30v
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## COMMON_POST_CONFIG_FRAG
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MAIN_INCLUDE_DEPS = tconfig.h
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INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS)
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# Rules need to build $(SIM_OBJS), plus whatever else the target wants.
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# ... target specific rules ...
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# Filter to eliminate known warnings
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FILTER = 2>&1 | egrep -v "Discarding instruction|instruction field of type \`compute\' changed to \`cache\'|Instruction format is not 64 bits wide"
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BUILT_SRC_FROM_IGEN = \
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        s_icache.h \
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        s_icache.c \
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        s_idecode.h \
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        s_idecode.c \
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        s_semantics.h \
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        s_semantics.c \
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        s_model.h \
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        s_model.c \
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        s_support.h \
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        s_support.c \
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        l_icache.h \
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        l_icache.c \
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        l_idecode.h \
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        l_idecode.c \
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        l_semantics.h \
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        l_semantics.c \
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        l_model.h \
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        l_model.c \
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        l_support.h \
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        l_support.c \
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        itable.h itable.c
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$(BUILT_SRC_FROM_IGEN): tmp-igen
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#
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.PHONY: clean-igen
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clean-igen:
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        rm -f $(BUILT_SRC_FROM_IGEN)
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        rm -f tmp-igen tmp-insns
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../igen/igen:
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        cd ../igen && $(MAKE)
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tmp-igen: $(srcdir)/dc-short $(srcdir)/d30v-insns $(srcdir)/ic-d30v ../igen/igen
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        cd ../igen && $(MAKE)
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        echo "# 1 \"$(srcdir)/d30v-insns\"" > tmp-insns
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        $(M4) < $(srcdir)/d30v-insns >> tmp-insns
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        @echo "Generating short version ..."
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        ../igen/igen \
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                -G gen-zero-r0 \
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                -G direct-access \
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                -G default-nia-minus-one \
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                -G conditional-issue \
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                -G verify-slot \
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                -G field-widths \
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                -F short,emul \
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                -B 32 \
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                -P "s_" \
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                -o $(srcdir)/dc-short \
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                -k $(srcdir)/ic-d30v \
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                -n $(srcdir)/d30v-insns -i tmp-insns \
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                -n s_icache.h    -hc tmp-icache.h \
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                -n s_icache.c    -c  tmp-icache.c \
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                -n s_semantics.h -hs tmp-semantics.h \
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                -n s_semantics.c -s  tmp-semantics.c \
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                -n s_idecode.h   -hd tmp-idecode.h \
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                -n s_idecode.c   -d  tmp-idecode.c \
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                -n s_model.h     -hm tmp-model.h \
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                -n s_model.c     -m  tmp-model.c \
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                -n s_support.h   -hf tmp-support.h \
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                -n s_support.c   -f  tmp-support.c $(FILTER)
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        $(srcdir)/../../move-if-change tmp-icache.h s_icache.h
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        $(srcdir)/../../move-if-change tmp-icache.c s_icache.c
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        $(srcdir)/../../move-if-change tmp-idecode.h s_idecode.h
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        $(srcdir)/../../move-if-change tmp-idecode.c s_idecode.c
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        $(srcdir)/../../move-if-change tmp-semantics.h s_semantics.h
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        $(srcdir)/../../move-if-change tmp-semantics.c s_semantics.c
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        $(srcdir)/../../move-if-change tmp-model.h s_model.h
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        $(srcdir)/../../move-if-change tmp-model.c s_model.c
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        $(srcdir)/../../move-if-change tmp-support.h s_support.h
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        $(srcdir)/../../move-if-change tmp-support.c s_support.c
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        @echo "Generating long version ..."
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        ../igen/igen \
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                -G gen-zero-r0 \
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                -G direct-access \
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                -G default-nia-minus-one \
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                -G conditional-issue \
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                -G field-widths \
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                -F long,emul \
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                -B 64 \
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                -P "l_" \
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                -o $(srcdir)/dc-short \
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                -k $(srcdir)/ic-d30v \
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                -i tmp-insns \
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                -n l_icache.h    -hc tmp-icache.h \
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                -n l_icache.c    -c  tmp-icache.c \
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                -n l_semantics.h -hs tmp-semantics.h \
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                -n l_semantics.c -s  tmp-semantics.c \
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                -n l_idecode.h   -hd tmp-idecode.h \
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                -n l_idecode.c   -d  tmp-idecode.c \
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                -n l_model.h     -hm tmp-model.h \
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                -n l_model.c     -m  tmp-model.c \
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                -n l_support.h   -hf tmp-support.h \
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                -n l_support.c   -f  tmp-support.c $(FILTER)
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        $(srcdir)/../../move-if-change tmp-icache.h l_icache.h
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        $(srcdir)/../../move-if-change tmp-icache.c l_icache.c
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        $(srcdir)/../../move-if-change tmp-idecode.h l_idecode.h
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        $(srcdir)/../../move-if-change tmp-idecode.c l_idecode.c
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        $(srcdir)/../../move-if-change tmp-semantics.h l_semantics.h
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        $(srcdir)/../../move-if-change tmp-semantics.c l_semantics.c
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        $(srcdir)/../../move-if-change tmp-model.h l_model.h
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        $(srcdir)/../../move-if-change tmp-model.c l_model.c
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        $(srcdir)/../../move-if-change tmp-support.h l_support.h
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        $(srcdir)/../../move-if-change tmp-support.c l_support.c
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        @echo "Generating instruction database ..."
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        ../igen/igen \
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                -G field-widths \
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                -F short,long,emul \
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                -B 64 \
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                -o $(srcdir)/dc-short \
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                -k $(srcdir)/ic-d30v \
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                -i tmp-insns \
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                -n itable.h    -ht tmp-itable.h \
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                -n itable.c    -t  tmp-itable.c $(FILTER)
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        $(srcdir)/../../move-if-change tmp-itable.h itable.h
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        $(srcdir)/../../move-if-change tmp-itable.c itable.c
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        touch tmp-igen
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ENGINE_H = \
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        sim-main.h \
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        $(srcdir)/../common/sim-basics.h \
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        config.h \
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        $(srcdir)/../common/sim-config.h \
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        $(srcdir)/../common/sim-inline.h \
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        $(srcdir)/../common/sim-types.h \
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        $(srcdir)/../common/sim-bits.h \
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        $(srcdir)/../common/sim-endian.h \
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        itable.h \
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        l_idecode.h s_idecode.h \
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        cpu.h \
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        alu.h \
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        $(srcdir)/../common/sim-alu.h \
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        $(srcdir)/../common/sim-core.h \
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        $(srcdir)/../common/sim-events.h \
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engine.o: engine.c $(ENGINE_H)
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sim-calls.o: sim-calls.c $(ENGINE_H) $(srcdir)/../common/sim-utils.h $(srcdir)/../common/sim-options.h
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cpu.o: cpu.c $(ENGINE_H)
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s_support.o: s_support.c $(ENGINE_H)
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l_support.o: l_support.c $(ENGINE_H)
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s_semantics.o: s_semantics.c $(ENGINE_H)
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l_semantics.o: l_semantics.c $(ENGINE_H)

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