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[/] [or1k/] [trunk/] [gdb-5.0/] [sim/] [m32r/] [semx-switch.c] - Blame information for rev 106

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1 106 markom 
/* Simulator instruction semantics for m32rxf.
2 
 
3 
THIS FILE IS MACHINE GENERATED WITH CGEN.
4 
 
5 
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
6 
 
7 
This file is part of the GNU Simulators.
8 
 
9 
This program is free software; you can redistribute it and/or modify
10 
it under the terms of the GNU General Public License as published by
11 
the Free Software Foundation; either version 2, or (at your option)
12 
any later version.
13 
 
14 
This program is distributed in the hope that it will be useful,
15 
but WITHOUT ANY WARRANTY; without even the implied warranty of
16 
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 
GNU General Public License for more details.
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19 
You should have received a copy of the GNU General Public License along
20 
with this program; if not, write to the Free Software Foundation, Inc.,
21 
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 
 
23 
*/
24 
 
25 
#ifdef DEFINE_LABELS
26 
 
27 
  /* The labels have the case they have because the enum of insn types
28 
     is all uppercase and in the non-stdc case the insn symbol is built
29 
     into the enum name.  */
30 
 
31 
  static struct {
32 
    int index;
33 
    void *label;
34 
  } labels[] = {
35 
    { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
36 
    { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
37 
    { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
38 
    { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
39 
    { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
40 
    { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
41 
    { M32RXF_INSN_ADD, && case_sem_INSN_ADD },
42 
    { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 },
43 
    { M32RXF_INSN_AND, && case_sem_INSN_AND },
44 
    { M32RXF_INSN_AND3, && case_sem_INSN_AND3 },
45 
    { M32RXF_INSN_OR, && case_sem_INSN_OR },
46 
    { M32RXF_INSN_OR3, && case_sem_INSN_OR3 },
47 
    { M32RXF_INSN_XOR, && case_sem_INSN_XOR },
48 
    { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 },
49 
    { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI },
50 
    { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV },
51 
    { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
52 
    { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX },
53 
    { M32RXF_INSN_BC8, && case_sem_INSN_BC8 },
54 
    { M32RXF_INSN_BC24, && case_sem_INSN_BC24 },
55 
    { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ },
56 
    { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ },
57 
    { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ },
58 
    { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ },
59 
    { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ },
60 
    { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ },
61 
    { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ },
62 
    { M32RXF_INSN_BL8, && case_sem_INSN_BL8 },
63 
    { M32RXF_INSN_BL24, && case_sem_INSN_BL24 },
64 
    { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 },
65 
    { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 },
66 
    { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 },
67 
    { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 },
68 
    { M32RXF_INSN_BNE, && case_sem_INSN_BNE },
69 
    { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 },
70 
    { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 },
71 
    { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 },
72 
    { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 },
73 
    { M32RXF_INSN_CMP, && case_sem_INSN_CMP },
74 
    { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI },
75 
    { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU },
76 
    { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI },
77 
    { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
78 
    { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ },
79 
    { M32RXF_INSN_DIV, && case_sem_INSN_DIV },
80 
    { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU },
81 
    { M32RXF_INSN_REM, && case_sem_INSN_REM },
82 
    { M32RXF_INSN_REMU, && case_sem_INSN_REMU },
83 
    { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH },
84 
    { M32RXF_INSN_JC, && case_sem_INSN_JC },
85 
    { M32RXF_INSN_JNC, && case_sem_INSN_JNC },
86 
    { M32RXF_INSN_JL, && case_sem_INSN_JL },
87 
    { M32RXF_INSN_JMP, && case_sem_INSN_JMP },
88 
    { M32RXF_INSN_LD, && case_sem_INSN_LD },
89 
    { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D },
90 
    { M32RXF_INSN_LDB, && case_sem_INSN_LDB },
91 
    { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D },
92 
    { M32RXF_INSN_LDH, && case_sem_INSN_LDH },
93 
    { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D },
94 
    { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB },
95 
    { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
96 
    { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH },
97 
    { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
98 
    { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
99 
    { M32RXF_INSN_LD24, && case_sem_INSN_LD24 },
100 
    { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 },
101 
    { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 },
102 
    { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK },
103 
    { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
104 
    { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
105 
    { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
106 
    { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
107 
    { M32RXF_INSN_MUL, && case_sem_INSN_MUL },
108 
    { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
109 
    { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
110 
    { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
111 
    { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
112 
    { M32RXF_INSN_MV, && case_sem_INSN_MV },
113 
    { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
114 
    { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
115 
    { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
116 
    { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC },
117 
    { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
118 
    { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
119 
    { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC },
120 
    { M32RXF_INSN_NEG, && case_sem_INSN_NEG },
121 
    { M32RXF_INSN_NOP, && case_sem_INSN_NOP },
122 
    { M32RXF_INSN_NOT, && case_sem_INSN_NOT },
123 
    { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
124 
    { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
125 
    { M32RXF_INSN_RTE, && case_sem_INSN_RTE },
126 
    { M32RXF_INSN_SETH, && case_sem_INSN_SETH },
127 
    { M32RXF_INSN_SLL, && case_sem_INSN_SLL },
128 
    { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 },
129 
    { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI },
130 
    { M32RXF_INSN_SRA, && case_sem_INSN_SRA },
131 
    { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 },
132 
    { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI },
133 
    { M32RXF_INSN_SRL, && case_sem_INSN_SRL },
134 
    { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 },
135 
    { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI },
136 
    { M32RXF_INSN_ST, && case_sem_INSN_ST },
137 
    { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D },
138 
    { M32RXF_INSN_STB, && case_sem_INSN_STB },
139 
    { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D },
140 
    { M32RXF_INSN_STH, && case_sem_INSN_STH },
141 
    { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D },
142 
    { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
143 
    { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
144 
    { M32RXF_INSN_SUB, && case_sem_INSN_SUB },
145 
    { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV },
146 
    { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX },
147 
    { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP },
148 
    { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
149 
    { M32RXF_INSN_SATB, && case_sem_INSN_SATB },
150 
    { M32RXF_INSN_SATH, && case_sem_INSN_SATH },
151 
    { M32RXF_INSN_SAT, && case_sem_INSN_SAT },
152 
    { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
153 
    { M32RXF_INSN_SADD, && case_sem_INSN_SADD },
154 
    { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 },
155 
    { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO },
156 
    { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 },
157 
    { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 },
158 
    { M32RXF_INSN_SC, && case_sem_INSN_SC },
159 
    { M32RXF_INSN_SNC, && case_sem_INSN_SNC },
160 
    { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
161 
    { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
162 
    { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
163 
    { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
164 
    { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
165 
    { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
166 
    { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
167 
    { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
168 
    { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
169 
    { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
170 
    { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
171 
    { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
172 
    { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
173 
    { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
174 
    { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
175 
    { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
176 
    { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
177 
    { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
178 
    { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
179 
    { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
180 
    { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
181 
    { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
182 
    { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
183 
    { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
184 
    { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
185 
    { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
186 
    { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
187 
    { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
188 
    { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
189 
    { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
190 
    { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
191 
    { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
192 
    { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
193 
    { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
194 
    { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
195 
    { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
196 
    { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
197 
    { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
198 
    { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
199 
    { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
200 
    { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
201 
    { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
202 
    { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
203 
    { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
204 
    { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
205 
    { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
206 
    { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
207 
    { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
208 
    { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
209 
    { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
210 
    { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
211 
    { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
212 
    { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
213 
    { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
214 
    { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
215 
    { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
216 
    { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
217 
    { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
218 
    { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
219 
    { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
220 
    { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
221 
    { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
222 
    { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
223 
    { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
224 
    { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
225 
    { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
226 
    { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
227 
    { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
228 
    { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
229 
    { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
230 
    { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
231 
    { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
232 
    { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
233 
    { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
234 
    { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
235 
    { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
236 
    { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
237 
    { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
238 
    { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
239 
    { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
240 
    { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
241 
    { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
242 
    { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
243 
    { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
244 
    { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
245 
    { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
246 
    { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
247 
    { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
248 
    { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
249 
    { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
250 
    { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
251 
    { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
252 
    { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
253 
    { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
254 
    { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
255 
    { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
256 
    { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
257 
    { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
258 
    { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
259 
    { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
260 
    { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
261 
    { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
262 
    { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
263 
    { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
264 
    { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
265 
    { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
266 
    { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
267 
    { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
268 
    { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
269 
    { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
270 
    { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
271 
    { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
272 
    { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
273 
    { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
274 
    { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
275 
    { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
276 
    { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
277 
    { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
278 
    { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
279 
    { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
280 
    { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
281 
    { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
282 
    { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
283 
    { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
284 
    { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
285 
    { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
286 
    { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
287 
    { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
288 
    { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
289 
    { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
290 
    { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
291 
    { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
292 
    { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
293 
    { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
294 
    { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
295 
    { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
296 
    { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
297 
    { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
298 
    { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
299 
    { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
300 
    { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
301 
    { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
302 
    { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
303 
    { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
304 
    { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
305 
    { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
306 
    { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
307 
    { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
308 
    { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
309 
    { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
310 
    { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
311 
    { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
312 
    { 0, 0 }
313 
  };
314 
  int i;
315 
 
316 
  for (i = 0; labels[i].label != 0; ++i)
317 
    {
318 
#if FAST_P
319 
      CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
320 
#else
321 
      CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
322 
#endif
323 
    }
324 
 
325 
#undef DEFINE_LABELS
326 
#endif /* DEFINE_LABELS */
327 
 
328 
#ifdef DEFINE_SWITCH
329 
 
330 
/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
331 
   off frills like tracing and profiling.  */
332 
/* FIXME: A better way would be to have TRACE_RESULT check for something
333 
   that can cause it to be optimized out.  Another way would be to emit
334 
   special handlers into the instruction "stream".  */
335 
 
336 
#if FAST_P
337 
#undef TRACE_RESULT
338 
#define TRACE_RESULT(cpu, abuf, name, type, val)
339 
#endif
340 
 
341 
#undef GET_ATTR
342 
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
343 
 
344 
{
345 
 
346 
#if WITH_SCACHE_PBB
347 
 
348 
/* Branch to next handler without going around main loop.  */
349 
#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
350 
SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
351 
 
352 
#else /* ! WITH_SCACHE_PBB */
353 
 
354 
#define NEXT(vpc) BREAK (sem)
355 
#ifdef __GNUC__
356 
#if FAST_P
357 
  SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
358 
#else
359 
  SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
360 
#endif
361 
#else
362 
  SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
363 
#endif
364 
 
365 
#endif /* ! WITH_SCACHE_PBB */
366 
 
367 
    {
368 
 
369 
  CASE (sem, INSN_X_INVALID) : /* --invalid-- */
370 
{
371 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
372 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
373 
#define FLD(f) abuf->fields.fmt_empty.f
374 
  int UNUSED written = 0;
375 
  IADDR UNUSED pc = abuf->addr;
376 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
377 
 
378 
  {
379 
    /* Update the recorded pc in the cpu state struct.
380 
       Only necessary for WITH_SCACHE case, but to avoid the
381 
       conditional compilation ....  */
382 
    SET_H_PC (pc);
383 
    /* Virtual insns have zero size.  Overwrite vpc with address of next insn
384 
       using the default-insn-bitsize spec.  When executing insns in parallel
385 
       we may want to queue the fault and continue execution.  */
386 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
387 
    vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
388 
  }
389 
 
390 
#undef FLD
391 
}
392 
  NEXT (vpc);
393 
 
394 
  CASE (sem, INSN_X_AFTER) : /* --after-- */
395 
{
396 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
397 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
398 
#define FLD(f) abuf->fields.fmt_empty.f
399 
  int UNUSED written = 0;
400 
  IADDR UNUSED pc = abuf->addr;
401 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
402 
 
403 
  {
404 
#if WITH_SCACHE_PBB_M32RXF
405 
    m32rxf_pbb_after (current_cpu, sem_arg);
406 
#endif
407 
  }
408 
 
409 
#undef FLD
410 
}
411 
  NEXT (vpc);
412 
 
413 
  CASE (sem, INSN_X_BEFORE) : /* --before-- */
414 
{
415 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
416 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
417 
#define FLD(f) abuf->fields.fmt_empty.f
418 
  int UNUSED written = 0;
419 
  IADDR UNUSED pc = abuf->addr;
420 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
421 
 
422 
  {
423 
#if WITH_SCACHE_PBB_M32RXF
424 
    m32rxf_pbb_before (current_cpu, sem_arg);
425 
#endif
426 
  }
427 
 
428 
#undef FLD
429 
}
430 
  NEXT (vpc);
431 
 
432 
  CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
433 
{
434 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
435 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
436 
#define FLD(f) abuf->fields.fmt_empty.f
437 
  int UNUSED written = 0;
438 
  IADDR UNUSED pc = abuf->addr;
439 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
440 
 
441 
  {
442 
#if WITH_SCACHE_PBB_M32RXF
443 
#ifdef DEFINE_SWITCH
444 
    vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
445 
                               pbb_br_type, pbb_br_npc);
446 
    BREAK (sem);
447 
#else
448 
    /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
449 
    vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
450 
                               CPU_PBB_BR_TYPE (current_cpu),
451 
                               CPU_PBB_BR_NPC (current_cpu));
452 
#endif
453 
#endif
454 
  }
455 
 
456 
#undef FLD
457 
}
458 
  NEXT (vpc);
459 
 
460 
  CASE (sem, INSN_X_CHAIN) : /* --chain-- */
461 
{
462 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
463 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
464 
#define FLD(f) abuf->fields.fmt_empty.f
465 
  int UNUSED written = 0;
466 
  IADDR UNUSED pc = abuf->addr;
467 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
468 
 
469 
  {
470 
#if WITH_SCACHE_PBB_M32RXF
471 
    vpc = m32rxf_pbb_chain (current_cpu, sem_arg);
472 
#ifdef DEFINE_SWITCH
473 
    BREAK (sem);
474 
#endif
475 
#endif
476 
  }
477 
 
478 
#undef FLD
479 
}
480 
  NEXT (vpc);
481 
 
482 
  CASE (sem, INSN_X_BEGIN) : /* --begin-- */
483 
{
484 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
485 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
486 
#define FLD(f) abuf->fields.fmt_empty.f
487 
  int UNUSED written = 0;
488 
  IADDR UNUSED pc = abuf->addr;
489 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
490 
 
491 
  {
492 
#if WITH_SCACHE_PBB_M32RXF
493 
#ifdef DEFINE_SWITCH
494 
    /* In the switch case FAST_P is a constant, allowing several optimizations
495 
       in any called inline functions.  */
496 
    vpc = m32rxf_pbb_begin (current_cpu, FAST_P);
497 
#else
498 
    vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
499 
#endif
500 
#endif
501 
  }
502 
 
503 
#undef FLD
504 
}
505 
  NEXT (vpc);
506 
 
507 
  CASE (sem, INSN_ADD) : /* add $dr,$sr */
508 
{
509 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
510 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
511 
#define FLD(f) abuf->fields.sfmt_add.f
512 
  int UNUSED written = 0;
513 
  IADDR UNUSED pc = abuf->addr;
514 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
515 
 
516 
  {
517 
    SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
518 
    * FLD (i_dr) = opval;
519 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
520 
  }
521 
 
522 
#undef FLD
523 
}
524 
  NEXT (vpc);
525 
 
526 
  CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
527 
{
528 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
529 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
530 
#define FLD(f) abuf->fields.sfmt_add3.f
531 
  int UNUSED written = 0;
532 
  IADDR UNUSED pc = abuf->addr;
533 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
534 
 
535 
  {
536 
    SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
537 
    * FLD (i_dr) = opval;
538 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
539 
  }
540 
 
541 
#undef FLD
542 
}
543 
  NEXT (vpc);
544 
 
545 
  CASE (sem, INSN_AND) : /* and $dr,$sr */
546 
{
547 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
548 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
549 
#define FLD(f) abuf->fields.sfmt_add.f
550 
  int UNUSED written = 0;
551 
  IADDR UNUSED pc = abuf->addr;
552 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
553 
 
554 
  {
555 
    SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
556 
    * FLD (i_dr) = opval;
557 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
558 
  }
559 
 
560 
#undef FLD
561 
}
562 
  NEXT (vpc);
563 
 
564 
  CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
565 
{
566 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
567 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
568 
#define FLD(f) abuf->fields.sfmt_and3.f
569 
  int UNUSED written = 0;
570 
  IADDR UNUSED pc = abuf->addr;
571 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
572 
 
573 
  {
574 
    SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
575 
    * FLD (i_dr) = opval;
576 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
577 
  }
578 
 
579 
#undef FLD
580 
}
581 
  NEXT (vpc);
582 
 
583 
  CASE (sem, INSN_OR) : /* or $dr,$sr */
584 
{
585 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
586 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
587 
#define FLD(f) abuf->fields.sfmt_add.f
588 
  int UNUSED written = 0;
589 
  IADDR UNUSED pc = abuf->addr;
590 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
591 
 
592 
  {
593 
    SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
594 
    * FLD (i_dr) = opval;
595 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
596 
  }
597 
 
598 
#undef FLD
599 
}
600 
  NEXT (vpc);
601 
 
602 
  CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
603 
{
604 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
605 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
606 
#define FLD(f) abuf->fields.sfmt_and3.f
607 
  int UNUSED written = 0;
608 
  IADDR UNUSED pc = abuf->addr;
609 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
610 
 
611 
  {
612 
    SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
613 
    * FLD (i_dr) = opval;
614 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
615 
  }
616 
 
617 
#undef FLD
618 
}
619 
  NEXT (vpc);
620 
 
621 
  CASE (sem, INSN_XOR) : /* xor $dr,$sr */
622 
{
623 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
624 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
625 
#define FLD(f) abuf->fields.sfmt_add.f
626 
  int UNUSED written = 0;
627 
  IADDR UNUSED pc = abuf->addr;
628 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
629 
 
630 
  {
631 
    SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
632 
    * FLD (i_dr) = opval;
633 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
634 
  }
635 
 
636 
#undef FLD
637 
}
638 
  NEXT (vpc);
639 
 
640 
  CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
641 
{
642 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
643 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
644 
#define FLD(f) abuf->fields.sfmt_and3.f
645 
  int UNUSED written = 0;
646 
  IADDR UNUSED pc = abuf->addr;
647 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
648 
 
649 
  {
650 
    SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
651 
    * FLD (i_dr) = opval;
652 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
653 
  }
654 
 
655 
#undef FLD
656 
}
657 
  NEXT (vpc);
658 
 
659 
  CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
660 
{
661 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
662 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
663 
#define FLD(f) abuf->fields.sfmt_addi.f
664 
  int UNUSED written = 0;
665 
  IADDR UNUSED pc = abuf->addr;
666 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
667 
 
668 
  {
669 
    SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
670 
    * FLD (i_dr) = opval;
671 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
672 
  }
673 
 
674 
#undef FLD
675 
}
676 
  NEXT (vpc);
677 
 
678 
  CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
679 
{
680 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
681 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
682 
#define FLD(f) abuf->fields.sfmt_add.f
683 
  int UNUSED written = 0;
684 
  IADDR UNUSED pc = abuf->addr;
685 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
686 
 
687 
{
688 
  SI temp0;BI temp1;
689 
  temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
690 
  temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
691 
  {
692 
    SI opval = temp0;
693 
    * FLD (i_dr) = opval;
694 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
695 
  }
696 
  {
697 
    BI opval = temp1;
698 
    CPU (h_cond) = opval;
699 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
700 
  }
701 
}
702 
 
703 
#undef FLD
704 
}
705 
  NEXT (vpc);
706 
 
707 
  CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
708 
{
709 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
710 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
711 
#define FLD(f) abuf->fields.sfmt_add3.f
712 
  int UNUSED written = 0;
713 
  IADDR UNUSED pc = abuf->addr;
714 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
715 
 
716 
{
717 
  SI temp0;BI temp1;
718 
  temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
719 
  temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
720 
  {
721 
    SI opval = temp0;
722 
    * FLD (i_dr) = opval;
723 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
724 
  }
725 
  {
726 
    BI opval = temp1;
727 
    CPU (h_cond) = opval;
728 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
729 
  }
730 
}
731 
 
732 
#undef FLD
733 
}
734 
  NEXT (vpc);
735 
 
736 
  CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
737 
{
738 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
739 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
740 
#define FLD(f) abuf->fields.sfmt_add.f
741 
  int UNUSED written = 0;
742 
  IADDR UNUSED pc = abuf->addr;
743 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
744 
 
745 
{
746 
  SI temp0;BI temp1;
747 
  temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
748 
  temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
749 
  {
750 
    SI opval = temp0;
751 
    * FLD (i_dr) = opval;
752 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
753 
  }
754 
  {
755 
    BI opval = temp1;
756 
    CPU (h_cond) = opval;
757 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
758 
  }
759 
}
760 
 
761 
#undef FLD
762 
}
763 
  NEXT (vpc);
764 
 
765 
  CASE (sem, INSN_BC8) : /* bc.s $disp8 */
766 
{
767 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
768 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
769 
#define FLD(f) abuf->fields.sfmt_bl8.f
770 
  int UNUSED written = 0;
771 
  IADDR UNUSED pc = abuf->addr;
772 
  SEM_BRANCH_INIT
773 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
774 
 
775 
if (CPU (h_cond)) {
776 
  {
777 
    USI opval = FLD (i_disp8);
778 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
779 
    written |= (1 << 2);
780 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
781 
  }
782 
}
783 
 
784 
  abuf->written = written;
785 
  SEM_BRANCH_FINI (vpc);
786 
#undef FLD
787 
}
788 
  NEXT (vpc);
789 
 
790 
  CASE (sem, INSN_BC24) : /* bc.l $disp24 */
791 
{
792 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
793 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
794 
#define FLD(f) abuf->fields.sfmt_bl24.f
795 
  int UNUSED written = 0;
796 
  IADDR UNUSED pc = abuf->addr;
797 
  SEM_BRANCH_INIT
798 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
799 
 
800 
if (CPU (h_cond)) {
801 
  {
802 
    USI opval = FLD (i_disp24);
803 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
804 
    written |= (1 << 2);
805 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
806 
  }
807 
}
808 
 
809 
  abuf->written = written;
810 
  SEM_BRANCH_FINI (vpc);
811 
#undef FLD
812 
}
813 
  NEXT (vpc);
814 
 
815 
  CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
816 
{
817 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
818 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
819 
#define FLD(f) abuf->fields.sfmt_beq.f
820 
  int UNUSED written = 0;
821 
  IADDR UNUSED pc = abuf->addr;
822 
  SEM_BRANCH_INIT
823 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
824 
 
825 
if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
826 
  {
827 
    USI opval = FLD (i_disp16);
828 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
829 
    written |= (1 << 3);
830 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
831 
  }
832 
}
833 
 
834 
  abuf->written = written;
835 
  SEM_BRANCH_FINI (vpc);
836 
#undef FLD
837 
}
838 
  NEXT (vpc);
839 
 
840 
  CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
841 
{
842 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
843 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
844 
#define FLD(f) abuf->fields.sfmt_beq.f
845 
  int UNUSED written = 0;
846 
  IADDR UNUSED pc = abuf->addr;
847 
  SEM_BRANCH_INIT
848 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
849 
 
850 
if (EQSI (* FLD (i_src2), 0)) {
851 
  {
852 
    USI opval = FLD (i_disp16);
853 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
854 
    written |= (1 << 2);
855 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
856 
  }
857 
}
858 
 
859 
  abuf->written = written;
860 
  SEM_BRANCH_FINI (vpc);
861 
#undef FLD
862 
}
863 
  NEXT (vpc);
864 
 
865 
  CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
866 
{
867 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
868 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
869 
#define FLD(f) abuf->fields.sfmt_beq.f
870 
  int UNUSED written = 0;
871 
  IADDR UNUSED pc = abuf->addr;
872 
  SEM_BRANCH_INIT
873 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
874 
 
875 
if (GESI (* FLD (i_src2), 0)) {
876 
  {
877 
    USI opval = FLD (i_disp16);
878 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
879 
    written |= (1 << 2);
880 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
881 
  }
882 
}
883 
 
884 
  abuf->written = written;
885 
  SEM_BRANCH_FINI (vpc);
886 
#undef FLD
887 
}
888 
  NEXT (vpc);
889 
 
890 
  CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
891 
{
892 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
893 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
894 
#define FLD(f) abuf->fields.sfmt_beq.f
895 
  int UNUSED written = 0;
896 
  IADDR UNUSED pc = abuf->addr;
897 
  SEM_BRANCH_INIT
898 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
899 
 
900 
if (GTSI (* FLD (i_src2), 0)) {
901 
  {
902 
    USI opval = FLD (i_disp16);
903 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
904 
    written |= (1 << 2);
905 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
906 
  }
907 
}
908 
 
909 
  abuf->written = written;
910 
  SEM_BRANCH_FINI (vpc);
911 
#undef FLD
912 
}
913 
  NEXT (vpc);
914 
 
915 
  CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
916 
{
917 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
918 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
919 
#define FLD(f) abuf->fields.sfmt_beq.f
920 
  int UNUSED written = 0;
921 
  IADDR UNUSED pc = abuf->addr;
922 
  SEM_BRANCH_INIT
923 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
924 
 
925 
if (LESI (* FLD (i_src2), 0)) {
926 
  {
927 
    USI opval = FLD (i_disp16);
928 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
929 
    written |= (1 << 2);
930 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
931 
  }
932 
}
933 
 
934 
  abuf->written = written;
935 
  SEM_BRANCH_FINI (vpc);
936 
#undef FLD
937 
}
938 
  NEXT (vpc);
939 
 
940 
  CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
941 
{
942 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
943 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
944 
#define FLD(f) abuf->fields.sfmt_beq.f
945 
  int UNUSED written = 0;
946 
  IADDR UNUSED pc = abuf->addr;
947 
  SEM_BRANCH_INIT
948 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
949 
 
950 
if (LTSI (* FLD (i_src2), 0)) {
951 
  {
952 
    USI opval = FLD (i_disp16);
953 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
954 
    written |= (1 << 2);
955 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
956 
  }
957 
}
958 
 
959 
  abuf->written = written;
960 
  SEM_BRANCH_FINI (vpc);
961 
#undef FLD
962 
}
963 
  NEXT (vpc);
964 
 
965 
  CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
966 
{
967 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
968 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
969 
#define FLD(f) abuf->fields.sfmt_beq.f
970 
  int UNUSED written = 0;
971 
  IADDR UNUSED pc = abuf->addr;
972 
  SEM_BRANCH_INIT
973 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
974 
 
975 
if (NESI (* FLD (i_src2), 0)) {
976 
  {
977 
    USI opval = FLD (i_disp16);
978 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
979 
    written |= (1 << 2);
980 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
981 
  }
982 
}
983 
 
984 
  abuf->written = written;
985 
  SEM_BRANCH_FINI (vpc);
986 
#undef FLD
987 
}
988 
  NEXT (vpc);
989 
 
990 
  CASE (sem, INSN_BL8) : /* bl.s $disp8 */
991 
{
992 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
993 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
994 
#define FLD(f) abuf->fields.sfmt_bl8.f
995 
  int UNUSED written = 0;
996 
  IADDR UNUSED pc = abuf->addr;
997 
  SEM_BRANCH_INIT
998 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
999 
 
1000 
{
1001 
  {
1002 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
1003 
    CPU (h_gr[((UINT) 14)]) = opval;
1004 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1005 
  }
1006 
  {
1007 
    USI opval = FLD (i_disp8);
1008 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1009 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1010 
  }
1011 
}
1012 
 
1013 
  SEM_BRANCH_FINI (vpc);
1014 
#undef FLD
1015 
}
1016 
  NEXT (vpc);
1017 
 
1018 
  CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1019 
{
1020 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1021 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1022 
#define FLD(f) abuf->fields.sfmt_bl24.f
1023 
  int UNUSED written = 0;
1024 
  IADDR UNUSED pc = abuf->addr;
1025 
  SEM_BRANCH_INIT
1026 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1027 
 
1028 
{
1029 
  {
1030 
    SI opval = ADDSI (pc, 4);
1031 
    CPU (h_gr[((UINT) 14)]) = opval;
1032 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1033 
  }
1034 
  {
1035 
    USI opval = FLD (i_disp24);
1036 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1037 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1038 
  }
1039 
}
1040 
 
1041 
  SEM_BRANCH_FINI (vpc);
1042 
#undef FLD
1043 
}
1044 
  NEXT (vpc);
1045 
 
1046 
  CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1047 
{
1048 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1049 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1050 
#define FLD(f) abuf->fields.sfmt_bl8.f
1051 
  int UNUSED written = 0;
1052 
  IADDR UNUSED pc = abuf->addr;
1053 
  SEM_BRANCH_INIT
1054 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1055 
 
1056 
if (CPU (h_cond)) {
1057 
{
1058 
  {
1059 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
1060 
    CPU (h_gr[((UINT) 14)]) = opval;
1061 
    written |= (1 << 3);
1062 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1063 
  }
1064 
  {
1065 
    USI opval = FLD (i_disp8);
1066 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1067 
    written |= (1 << 4);
1068 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1069 
  }
1070 
}
1071 
}
1072 
 
1073 
  abuf->written = written;
1074 
  SEM_BRANCH_FINI (vpc);
1075 
#undef FLD
1076 
}
1077 
  NEXT (vpc);
1078 
 
1079 
  CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1080 
{
1081 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1082 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1083 
#define FLD(f) abuf->fields.sfmt_bl24.f
1084 
  int UNUSED written = 0;
1085 
  IADDR UNUSED pc = abuf->addr;
1086 
  SEM_BRANCH_INIT
1087 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1088 
 
1089 
if (CPU (h_cond)) {
1090 
{
1091 
  {
1092 
    SI opval = ADDSI (pc, 4);
1093 
    CPU (h_gr[((UINT) 14)]) = opval;
1094 
    written |= (1 << 3);
1095 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1096 
  }
1097 
  {
1098 
    USI opval = FLD (i_disp24);
1099 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1100 
    written |= (1 << 4);
1101 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1102 
  }
1103 
}
1104 
}
1105 
 
1106 
  abuf->written = written;
1107 
  SEM_BRANCH_FINI (vpc);
1108 
#undef FLD
1109 
}
1110 
  NEXT (vpc);
1111 
 
1112 
  CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1113 
{
1114 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1115 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1116 
#define FLD(f) abuf->fields.sfmt_bl8.f
1117 
  int UNUSED written = 0;
1118 
  IADDR UNUSED pc = abuf->addr;
1119 
  SEM_BRANCH_INIT
1120 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1121 
 
1122 
if (NOTBI (CPU (h_cond))) {
1123 
  {
1124 
    USI opval = FLD (i_disp8);
1125 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1126 
    written |= (1 << 2);
1127 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1128 
  }
1129 
}
1130 
 
1131 
  abuf->written = written;
1132 
  SEM_BRANCH_FINI (vpc);
1133 
#undef FLD
1134 
}
1135 
  NEXT (vpc);
1136 
 
1137 
  CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1138 
{
1139 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1140 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1141 
#define FLD(f) abuf->fields.sfmt_bl24.f
1142 
  int UNUSED written = 0;
1143 
  IADDR UNUSED pc = abuf->addr;
1144 
  SEM_BRANCH_INIT
1145 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1146 
 
1147 
if (NOTBI (CPU (h_cond))) {
1148 
  {
1149 
    USI opval = FLD (i_disp24);
1150 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1151 
    written |= (1 << 2);
1152 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1153 
  }
1154 
}
1155 
 
1156 
  abuf->written = written;
1157 
  SEM_BRANCH_FINI (vpc);
1158 
#undef FLD
1159 
}
1160 
  NEXT (vpc);
1161 
 
1162 
  CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1163 
{
1164 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1165 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1166 
#define FLD(f) abuf->fields.sfmt_beq.f
1167 
  int UNUSED written = 0;
1168 
  IADDR UNUSED pc = abuf->addr;
1169 
  SEM_BRANCH_INIT
1170 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1171 
 
1172 
if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1173 
  {
1174 
    USI opval = FLD (i_disp16);
1175 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1176 
    written |= (1 << 3);
1177 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1178 
  }
1179 
}
1180 
 
1181 
  abuf->written = written;
1182 
  SEM_BRANCH_FINI (vpc);
1183 
#undef FLD
1184 
}
1185 
  NEXT (vpc);
1186 
 
1187 
  CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1188 
{
1189 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1190 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1191 
#define FLD(f) abuf->fields.sfmt_bl8.f
1192 
  int UNUSED written = 0;
1193 
  IADDR UNUSED pc = abuf->addr;
1194 
  SEM_BRANCH_INIT
1195 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1196 
 
1197 
  {
1198 
    USI opval = FLD (i_disp8);
1199 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1200 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1201 
  }
1202 
 
1203 
  SEM_BRANCH_FINI (vpc);
1204 
#undef FLD
1205 
}
1206 
  NEXT (vpc);
1207 
 
1208 
  CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1209 
{
1210 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1211 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1212 
#define FLD(f) abuf->fields.sfmt_bl24.f
1213 
  int UNUSED written = 0;
1214 
  IADDR UNUSED pc = abuf->addr;
1215 
  SEM_BRANCH_INIT
1216 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1217 
 
1218 
  {
1219 
    USI opval = FLD (i_disp24);
1220 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1221 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1222 
  }
1223 
 
1224 
  SEM_BRANCH_FINI (vpc);
1225 
#undef FLD
1226 
}
1227 
  NEXT (vpc);
1228 
 
1229 
  CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1230 
{
1231 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1232 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1233 
#define FLD(f) abuf->fields.sfmt_bl8.f
1234 
  int UNUSED written = 0;
1235 
  IADDR UNUSED pc = abuf->addr;
1236 
  SEM_BRANCH_INIT
1237 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1238 
 
1239 
if (NOTBI (CPU (h_cond))) {
1240 
{
1241 
  {
1242 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
1243 
    CPU (h_gr[((UINT) 14)]) = opval;
1244 
    written |= (1 << 3);
1245 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1246 
  }
1247 
  {
1248 
    USI opval = FLD (i_disp8);
1249 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1250 
    written |= (1 << 4);
1251 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1252 
  }
1253 
}
1254 
}
1255 
 
1256 
  abuf->written = written;
1257 
  SEM_BRANCH_FINI (vpc);
1258 
#undef FLD
1259 
}
1260 
  NEXT (vpc);
1261 
 
1262 
  CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1263 
{
1264 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1265 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1266 
#define FLD(f) abuf->fields.sfmt_bl24.f
1267 
  int UNUSED written = 0;
1268 
  IADDR UNUSED pc = abuf->addr;
1269 
  SEM_BRANCH_INIT
1270 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1271 
 
1272 
if (NOTBI (CPU (h_cond))) {
1273 
{
1274 
  {
1275 
    SI opval = ADDSI (pc, 4);
1276 
    CPU (h_gr[((UINT) 14)]) = opval;
1277 
    written |= (1 << 3);
1278 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1279 
  }
1280 
  {
1281 
    USI opval = FLD (i_disp24);
1282 
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1283 
    written |= (1 << 4);
1284 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1285 
  }
1286 
}
1287 
}
1288 
 
1289 
  abuf->written = written;
1290 
  SEM_BRANCH_FINI (vpc);
1291 
#undef FLD
1292 
}
1293 
  NEXT (vpc);
1294 
 
1295 
  CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1296 
{
1297 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1298 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1299 
#define FLD(f) abuf->fields.sfmt_st_plus.f
1300 
  int UNUSED written = 0;
1301 
  IADDR UNUSED pc = abuf->addr;
1302 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1303 
 
1304 
  {
1305 
    BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1306 
    CPU (h_cond) = opval;
1307 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1308 
  }
1309 
 
1310 
#undef FLD
1311 
}
1312 
  NEXT (vpc);
1313 
 
1314 
  CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1315 
{
1316 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1317 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1318 
#define FLD(f) abuf->fields.sfmt_st_d.f
1319 
  int UNUSED written = 0;
1320 
  IADDR UNUSED pc = abuf->addr;
1321 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1322 
 
1323 
  {
1324 
    BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1325 
    CPU (h_cond) = opval;
1326 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1327 
  }
1328 
 
1329 
#undef FLD
1330 
}
1331 
  NEXT (vpc);
1332 
 
1333 
  CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1334 
{
1335 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1336 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1337 
#define FLD(f) abuf->fields.sfmt_st_plus.f
1338 
  int UNUSED written = 0;
1339 
  IADDR UNUSED pc = abuf->addr;
1340 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1341 
 
1342 
  {
1343 
    BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1344 
    CPU (h_cond) = opval;
1345 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1346 
  }
1347 
 
1348 
#undef FLD
1349 
}
1350 
  NEXT (vpc);
1351 
 
1352 
  CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1353 
{
1354 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1355 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1356 
#define FLD(f) abuf->fields.sfmt_st_d.f
1357 
  int UNUSED written = 0;
1358 
  IADDR UNUSED pc = abuf->addr;
1359 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1360 
 
1361 
  {
1362 
    BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1363 
    CPU (h_cond) = opval;
1364 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1365 
  }
1366 
 
1367 
#undef FLD
1368 
}
1369 
  NEXT (vpc);
1370 
 
1371 
  CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1372 
{
1373 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1374 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1375 
#define FLD(f) abuf->fields.sfmt_st_plus.f
1376 
  int UNUSED written = 0;
1377 
  IADDR UNUSED pc = abuf->addr;
1378 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1379 
 
1380 
  {
1381 
    BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1382 
    CPU (h_cond) = opval;
1383 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1384 
  }
1385 
 
1386 
#undef FLD
1387 
}
1388 
  NEXT (vpc);
1389 
 
1390 
  CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1391 
{
1392 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1393 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1394 
#define FLD(f) abuf->fields.sfmt_st_plus.f
1395 
  int UNUSED written = 0;
1396 
  IADDR UNUSED pc = abuf->addr;
1397 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1398 
 
1399 
  {
1400 
    BI opval = EQSI (* FLD (i_src2), 0);
1401 
    CPU (h_cond) = opval;
1402 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1403 
  }
1404 
 
1405 
#undef FLD
1406 
}
1407 
  NEXT (vpc);
1408 
 
1409 
  CASE (sem, INSN_DIV) : /* div $dr,$sr */
1410 
{
1411 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1412 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1413 
#define FLD(f) abuf->fields.sfmt_add.f
1414 
  int UNUSED written = 0;
1415 
  IADDR UNUSED pc = abuf->addr;
1416 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1417 
 
1418 
if (NESI (* FLD (i_sr), 0)) {
1419 
  {
1420 
    SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1421 
    * FLD (i_dr) = opval;
1422 
    written |= (1 << 2);
1423 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1424 
  }
1425 
}
1426 
 
1427 
  abuf->written = written;
1428 
#undef FLD
1429 
}
1430 
  NEXT (vpc);
1431 
 
1432 
  CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1433 
{
1434 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1435 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1436 
#define FLD(f) abuf->fields.sfmt_add.f
1437 
  int UNUSED written = 0;
1438 
  IADDR UNUSED pc = abuf->addr;
1439 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1440 
 
1441 
if (NESI (* FLD (i_sr), 0)) {
1442 
  {
1443 
    SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1444 
    * FLD (i_dr) = opval;
1445 
    written |= (1 << 2);
1446 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1447 
  }
1448 
}
1449 
 
1450 
  abuf->written = written;
1451 
#undef FLD
1452 
}
1453 
  NEXT (vpc);
1454 
 
1455 
  CASE (sem, INSN_REM) : /* rem $dr,$sr */
1456 
{
1457 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1458 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1459 
#define FLD(f) abuf->fields.sfmt_add.f
1460 
  int UNUSED written = 0;
1461 
  IADDR UNUSED pc = abuf->addr;
1462 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1463 
 
1464 
if (NESI (* FLD (i_sr), 0)) {
1465 
  {
1466 
    SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1467 
    * FLD (i_dr) = opval;
1468 
    written |= (1 << 2);
1469 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1470 
  }
1471 
}
1472 
 
1473 
  abuf->written = written;
1474 
#undef FLD
1475 
}
1476 
  NEXT (vpc);
1477 
 
1478 
  CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1479 
{
1480 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1481 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1482 
#define FLD(f) abuf->fields.sfmt_add.f
1483 
  int UNUSED written = 0;
1484 
  IADDR UNUSED pc = abuf->addr;
1485 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1486 
 
1487 
if (NESI (* FLD (i_sr), 0)) {
1488 
  {
1489 
    SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1490 
    * FLD (i_dr) = opval;
1491 
    written |= (1 << 2);
1492 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1493 
  }
1494 
}
1495 
 
1496 
  abuf->written = written;
1497 
#undef FLD
1498 
}
1499 
  NEXT (vpc);
1500 
 
1501 
  CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1502 
{
1503 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1504 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1505 
#define FLD(f) abuf->fields.sfmt_add.f
1506 
  int UNUSED written = 0;
1507 
  IADDR UNUSED pc = abuf->addr;
1508 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1509 
 
1510 
if (NESI (* FLD (i_sr), 0)) {
1511 
  {
1512 
    SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1513 
    * FLD (i_dr) = opval;
1514 
    written |= (1 << 2);
1515 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1516 
  }
1517 
}
1518 
 
1519 
  abuf->written = written;
1520 
#undef FLD
1521 
}
1522 
  NEXT (vpc);
1523 
 
1524 
  CASE (sem, INSN_JC) : /* jc $sr */
1525 
{
1526 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1527 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1528 
#define FLD(f) abuf->fields.sfmt_mvtc.f
1529 
  int UNUSED written = 0;
1530 
  IADDR UNUSED pc = abuf->addr;
1531 
  SEM_BRANCH_INIT
1532 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1533 
 
1534 
if (CPU (h_cond)) {
1535 
  {
1536 
    USI opval = ANDSI (* FLD (i_sr), -4);
1537 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1538 
    written |= (1 << 2);
1539 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1540 
  }
1541 
}
1542 
 
1543 
  abuf->written = written;
1544 
  SEM_BRANCH_FINI (vpc);
1545 
#undef FLD
1546 
}
1547 
  NEXT (vpc);
1548 
 
1549 
  CASE (sem, INSN_JNC) : /* jnc $sr */
1550 
{
1551 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1552 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1553 
#define FLD(f) abuf->fields.sfmt_mvtc.f
1554 
  int UNUSED written = 0;
1555 
  IADDR UNUSED pc = abuf->addr;
1556 
  SEM_BRANCH_INIT
1557 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1558 
 
1559 
if (NOTBI (CPU (h_cond))) {
1560 
  {
1561 
    USI opval = ANDSI (* FLD (i_sr), -4);
1562 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1563 
    written |= (1 << 2);
1564 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1565 
  }
1566 
}
1567 
 
1568 
  abuf->written = written;
1569 
  SEM_BRANCH_FINI (vpc);
1570 
#undef FLD
1571 
}
1572 
  NEXT (vpc);
1573 
 
1574 
  CASE (sem, INSN_JL) : /* jl $sr */
1575 
{
1576 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1577 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1578 
#define FLD(f) abuf->fields.sfmt_jl.f
1579 
  int UNUSED written = 0;
1580 
  IADDR UNUSED pc = abuf->addr;
1581 
  SEM_BRANCH_INIT
1582 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1583 
 
1584 
{
1585 
  SI temp0;USI temp1;
1586 
  temp0 = ADDSI (ANDSI (pc, -4), 4);
1587 
  temp1 = ANDSI (* FLD (i_sr), -4);
1588 
  {
1589 
    SI opval = temp0;
1590 
    CPU (h_gr[((UINT) 14)]) = opval;
1591 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1592 
  }
1593 
  {
1594 
    USI opval = temp1;
1595 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1596 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1597 
  }
1598 
}
1599 
 
1600 
  SEM_BRANCH_FINI (vpc);
1601 
#undef FLD
1602 
}
1603 
  NEXT (vpc);
1604 
 
1605 
  CASE (sem, INSN_JMP) : /* jmp $sr */
1606 
{
1607 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1608 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1609 
#define FLD(f) abuf->fields.sfmt_mvtc.f
1610 
  int UNUSED written = 0;
1611 
  IADDR UNUSED pc = abuf->addr;
1612 
  SEM_BRANCH_INIT
1613 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1614 
 
1615 
  {
1616 
    USI opval = ANDSI (* FLD (i_sr), -4);
1617 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1618 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1619 
  }
1620 
 
1621 
  SEM_BRANCH_FINI (vpc);
1622 
#undef FLD
1623 
}
1624 
  NEXT (vpc);
1625 
 
1626 
  CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1627 
{
1628 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1629 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1630 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1631 
  int UNUSED written = 0;
1632 
  IADDR UNUSED pc = abuf->addr;
1633 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1634 
 
1635 
  {
1636 
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1637 
    * FLD (i_dr) = opval;
1638 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1639 
  }
1640 
 
1641 
#undef FLD
1642 
}
1643 
  NEXT (vpc);
1644 
 
1645 
  CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1646 
{
1647 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1648 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1649 
#define FLD(f) abuf->fields.sfmt_add3.f
1650 
  int UNUSED written = 0;
1651 
  IADDR UNUSED pc = abuf->addr;
1652 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1653 
 
1654 
  {
1655 
    SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1656 
    * FLD (i_dr) = opval;
1657 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1658 
  }
1659 
 
1660 
#undef FLD
1661 
}
1662 
  NEXT (vpc);
1663 
 
1664 
  CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1665 
{
1666 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1667 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1668 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1669 
  int UNUSED written = 0;
1670 
  IADDR UNUSED pc = abuf->addr;
1671 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1672 
 
1673 
  {
1674 
    SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1675 
    * FLD (i_dr) = opval;
1676 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1677 
  }
1678 
 
1679 
#undef FLD
1680 
}
1681 
  NEXT (vpc);
1682 
 
1683 
  CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1684 
{
1685 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1686 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1687 
#define FLD(f) abuf->fields.sfmt_add3.f
1688 
  int UNUSED written = 0;
1689 
  IADDR UNUSED pc = abuf->addr;
1690 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1691 
 
1692 
  {
1693 
    SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1694 
    * FLD (i_dr) = opval;
1695 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1696 
  }
1697 
 
1698 
#undef FLD
1699 
}
1700 
  NEXT (vpc);
1701 
 
1702 
  CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1703 
{
1704 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1705 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1706 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1707 
  int UNUSED written = 0;
1708 
  IADDR UNUSED pc = abuf->addr;
1709 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1710 
 
1711 
  {
1712 
    SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1713 
    * FLD (i_dr) = opval;
1714 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1715 
  }
1716 
 
1717 
#undef FLD
1718 
}
1719 
  NEXT (vpc);
1720 
 
1721 
  CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1722 
{
1723 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1724 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1725 
#define FLD(f) abuf->fields.sfmt_add3.f
1726 
  int UNUSED written = 0;
1727 
  IADDR UNUSED pc = abuf->addr;
1728 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1729 
 
1730 
  {
1731 
    SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1732 
    * FLD (i_dr) = opval;
1733 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1734 
  }
1735 
 
1736 
#undef FLD
1737 
}
1738 
  NEXT (vpc);
1739 
 
1740 
  CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1741 
{
1742 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1743 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1744 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1745 
  int UNUSED written = 0;
1746 
  IADDR UNUSED pc = abuf->addr;
1747 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1748 
 
1749 
  {
1750 
    SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1751 
    * FLD (i_dr) = opval;
1752 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1753 
  }
1754 
 
1755 
#undef FLD
1756 
}
1757 
  NEXT (vpc);
1758 
 
1759 
  CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1760 
{
1761 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1762 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1763 
#define FLD(f) abuf->fields.sfmt_add3.f
1764 
  int UNUSED written = 0;
1765 
  IADDR UNUSED pc = abuf->addr;
1766 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1767 
 
1768 
  {
1769 
    SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1770 
    * FLD (i_dr) = opval;
1771 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1772 
  }
1773 
 
1774 
#undef FLD
1775 
}
1776 
  NEXT (vpc);
1777 
 
1778 
  CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1779 
{
1780 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1781 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1782 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1783 
  int UNUSED written = 0;
1784 
  IADDR UNUSED pc = abuf->addr;
1785 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1786 
 
1787 
  {
1788 
    SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1789 
    * FLD (i_dr) = opval;
1790 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1791 
  }
1792 
 
1793 
#undef FLD
1794 
}
1795 
  NEXT (vpc);
1796 
 
1797 
  CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1798 
{
1799 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1800 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1801 
#define FLD(f) abuf->fields.sfmt_add3.f
1802 
  int UNUSED written = 0;
1803 
  IADDR UNUSED pc = abuf->addr;
1804 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1805 
 
1806 
  {
1807 
    SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1808 
    * FLD (i_dr) = opval;
1809 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1810 
  }
1811 
 
1812 
#undef FLD
1813 
}
1814 
  NEXT (vpc);
1815 
 
1816 
  CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
1817 
{
1818 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1819 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1820 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1821 
  int UNUSED written = 0;
1822 
  IADDR UNUSED pc = abuf->addr;
1823 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1824 
 
1825 
{
1826 
  SI temp0;SI temp1;
1827 
  temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1828 
  temp1 = ADDSI (* FLD (i_sr), 4);
1829 
  {
1830 
    SI opval = temp0;
1831 
    * FLD (i_dr) = opval;
1832 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1833 
  }
1834 
  {
1835 
    SI opval = temp1;
1836 
    * FLD (i_sr) = opval;
1837 
    TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
1838 
  }
1839 
}
1840 
 
1841 
#undef FLD
1842 
}
1843 
  NEXT (vpc);
1844 
 
1845 
  CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
1846 
{
1847 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1848 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1849 
#define FLD(f) abuf->fields.sfmt_ld24.f
1850 
  int UNUSED written = 0;
1851 
  IADDR UNUSED pc = abuf->addr;
1852 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1853 
 
1854 
  {
1855 
    SI opval = FLD (i_uimm24);
1856 
    * FLD (i_dr) = opval;
1857 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1858 
  }
1859 
 
1860 
#undef FLD
1861 
}
1862 
  NEXT (vpc);
1863 
 
1864 
  CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
1865 
{
1866 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1867 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1868 
#define FLD(f) abuf->fields.sfmt_addi.f
1869 
  int UNUSED written = 0;
1870 
  IADDR UNUSED pc = abuf->addr;
1871 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1872 
 
1873 
  {
1874 
    SI opval = FLD (f_simm8);
1875 
    * FLD (i_dr) = opval;
1876 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1877 
  }
1878 
 
1879 
#undef FLD
1880 
}
1881 
  NEXT (vpc);
1882 
 
1883 
  CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
1884 
{
1885 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1886 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1887 
#define FLD(f) abuf->fields.sfmt_add3.f
1888 
  int UNUSED written = 0;
1889 
  IADDR UNUSED pc = abuf->addr;
1890 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1891 
 
1892 
  {
1893 
    SI opval = FLD (f_simm16);
1894 
    * FLD (i_dr) = opval;
1895 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1896 
  }
1897 
 
1898 
#undef FLD
1899 
}
1900 
  NEXT (vpc);
1901 
 
1902 
  CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
1903 
{
1904 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1905 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1906 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1907 
  int UNUSED written = 0;
1908 
  IADDR UNUSED pc = abuf->addr;
1909 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1910 
 
1911 
{
1912 
  {
1913 
    BI opval = 1;
1914 
    CPU (h_lock) = opval;
1915 
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1916 
  }
1917 
  {
1918 
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1919 
    * FLD (i_dr) = opval;
1920 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1921 
  }
1922 
}
1923 
 
1924 
#undef FLD
1925 
}
1926 
  NEXT (vpc);
1927 
 
1928 
  CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
1929 
{
1930 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1931 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1932 
#define FLD(f) abuf->fields.sfmt_machi_a.f
1933 
  int UNUSED written = 0;
1934 
  IADDR UNUSED pc = abuf->addr;
1935 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1936 
 
1937 
  {
1938 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1939 
    SET_H_ACCUMS (FLD (f_acc), opval);
1940 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1941 
  }
1942 
 
1943 
#undef FLD
1944 
}
1945 
  NEXT (vpc);
1946 
 
1947 
  CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
1948 
{
1949 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1950 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1951 
#define FLD(f) abuf->fields.sfmt_machi_a.f
1952 
  int UNUSED written = 0;
1953 
  IADDR UNUSED pc = abuf->addr;
1954 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1955 
 
1956 
  {
1957 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1958 
    SET_H_ACCUMS (FLD (f_acc), opval);
1959 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1960 
  }
1961 
 
1962 
#undef FLD
1963 
}
1964 
  NEXT (vpc);
1965 
 
1966 
  CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
1967 
{
1968 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1969 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1970 
#define FLD(f) abuf->fields.sfmt_machi_a.f
1971 
  int UNUSED written = 0;
1972 
  IADDR UNUSED pc = abuf->addr;
1973 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1974 
 
1975 
  {
1976 
    DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
1977 
    SET_H_ACCUMS (FLD (f_acc), opval);
1978 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1979 
  }
1980 
 
1981 
#undef FLD
1982 
}
1983 
  NEXT (vpc);
1984 
 
1985 
  CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
1986 
{
1987 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1988 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1989 
#define FLD(f) abuf->fields.sfmt_machi_a.f
1990 
  int UNUSED written = 0;
1991 
  IADDR UNUSED pc = abuf->addr;
1992 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1993 
 
1994 
  {
1995 
    DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
1996 
    SET_H_ACCUMS (FLD (f_acc), opval);
1997 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1998 
  }
1999 
 
2000 
#undef FLD
2001 
}
2002 
  NEXT (vpc);
2003 
 
2004 
  CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2005 
{
2006 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2007 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2008 
#define FLD(f) abuf->fields.sfmt_add.f
2009 
  int UNUSED written = 0;
2010 
  IADDR UNUSED pc = abuf->addr;
2011 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2012 
 
2013 
  {
2014 
    SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2015 
    * FLD (i_dr) = opval;
2016 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2017 
  }
2018 
 
2019 
#undef FLD
2020 
}
2021 
  NEXT (vpc);
2022 
 
2023 
  CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2024 
{
2025 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2026 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2027 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2028 
  int UNUSED written = 0;
2029 
  IADDR UNUSED pc = abuf->addr;
2030 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2031 
 
2032 
  {
2033 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2034 
    SET_H_ACCUMS (FLD (f_acc), opval);
2035 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2036 
  }
2037 
 
2038 
#undef FLD
2039 
}
2040 
  NEXT (vpc);
2041 
 
2042 
  CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2043 
{
2044 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2045 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2046 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2047 
  int UNUSED written = 0;
2048 
  IADDR UNUSED pc = abuf->addr;
2049 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2050 
 
2051 
  {
2052 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2053 
    SET_H_ACCUMS (FLD (f_acc), opval);
2054 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2055 
  }
2056 
 
2057 
#undef FLD
2058 
}
2059 
  NEXT (vpc);
2060 
 
2061 
  CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2062 
{
2063 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2064 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2065 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2066 
  int UNUSED written = 0;
2067 
  IADDR UNUSED pc = abuf->addr;
2068 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2069 
 
2070 
  {
2071 
    DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2072 
    SET_H_ACCUMS (FLD (f_acc), opval);
2073 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2074 
  }
2075 
 
2076 
#undef FLD
2077 
}
2078 
  NEXT (vpc);
2079 
 
2080 
  CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2081 
{
2082 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2083 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2084 
#define FLD(f) abuf->fields.sfmt_machi_a.f
2085 
  int UNUSED written = 0;
2086 
  IADDR UNUSED pc = abuf->addr;
2087 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2088 
 
2089 
  {
2090 
    DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2091 
    SET_H_ACCUMS (FLD (f_acc), opval);
2092 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2093 
  }
2094 
 
2095 
#undef FLD
2096 
}
2097 
  NEXT (vpc);
2098 
 
2099 
  CASE (sem, INSN_MV) : /* mv $dr,$sr */
2100 
{
2101 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2102 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2103 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2104 
  int UNUSED written = 0;
2105 
  IADDR UNUSED pc = abuf->addr;
2106 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2107 
 
2108 
  {
2109 
    SI opval = * FLD (i_sr);
2110 
    * FLD (i_dr) = opval;
2111 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2112 
  }
2113 
 
2114 
#undef FLD
2115 
}
2116 
  NEXT (vpc);
2117 
 
2118 
  CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2119 
{
2120 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2121 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2122 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2123 
  int UNUSED written = 0;
2124 
  IADDR UNUSED pc = abuf->addr;
2125 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2126 
 
2127 
  {
2128 
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
2129 
    * FLD (i_dr) = opval;
2130 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2131 
  }
2132 
 
2133 
#undef FLD
2134 
}
2135 
  NEXT (vpc);
2136 
 
2137 
  CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2138 
{
2139 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2140 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2141 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2142 
  int UNUSED written = 0;
2143 
  IADDR UNUSED pc = abuf->addr;
2144 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2145 
 
2146 
  {
2147 
    SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
2148 
    * FLD (i_dr) = opval;
2149 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2150 
  }
2151 
 
2152 
#undef FLD
2153 
}
2154 
  NEXT (vpc);
2155 
 
2156 
  CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2157 
{
2158 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2159 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2160 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2161 
  int UNUSED written = 0;
2162 
  IADDR UNUSED pc = abuf->addr;
2163 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2164 
 
2165 
  {
2166 
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
2167 
    * FLD (i_dr) = opval;
2168 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2169 
  }
2170 
 
2171 
#undef FLD
2172 
}
2173 
  NEXT (vpc);
2174 
 
2175 
  CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2176 
{
2177 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2178 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2179 
#define FLD(f) abuf->fields.sfmt_mvfc.f
2180 
  int UNUSED written = 0;
2181 
  IADDR UNUSED pc = abuf->addr;
2182 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2183 
 
2184 
  {
2185 
    SI opval = GET_H_CR (FLD (f_r2));
2186 
    * FLD (i_dr) = opval;
2187 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2188 
  }
2189 
 
2190 
#undef FLD
2191 
}
2192 
  NEXT (vpc);
2193 
 
2194 
  CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2195 
{
2196 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2197 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2198 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2199 
  int UNUSED written = 0;
2200 
  IADDR UNUSED pc = abuf->addr;
2201 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2202 
 
2203 
  {
2204 
    DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2205 
    SET_H_ACCUMS (FLD (f_accs), opval);
2206 
    TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
2207 
  }
2208 
 
2209 
#undef FLD
2210 
}
2211 
  NEXT (vpc);
2212 
 
2213 
  CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2214 
{
2215 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2216 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2217 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2218 
  int UNUSED written = 0;
2219 
  IADDR UNUSED pc = abuf->addr;
2220 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2221 
 
2222 
  {
2223 
    DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2224 
    SET_H_ACCUMS (FLD (f_accs), opval);
2225 
    TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
2226 
  }
2227 
 
2228 
#undef FLD
2229 
}
2230 
  NEXT (vpc);
2231 
 
2232 
  CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2233 
{
2234 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2235 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2236 
#define FLD(f) abuf->fields.sfmt_mvtc.f
2237 
  int UNUSED written = 0;
2238 
  IADDR UNUSED pc = abuf->addr;
2239 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2240 
 
2241 
  {
2242 
    USI opval = * FLD (i_sr);
2243 
    SET_H_CR (FLD (f_r1), opval);
2244 
    TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
2245 
  }
2246 
 
2247 
#undef FLD
2248 
}
2249 
  NEXT (vpc);
2250 
 
2251 
  CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2252 
{
2253 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2254 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2255 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2256 
  int UNUSED written = 0;
2257 
  IADDR UNUSED pc = abuf->addr;
2258 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2259 
 
2260 
  {
2261 
    SI opval = NEGSI (* FLD (i_sr));
2262 
    * FLD (i_dr) = opval;
2263 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2264 
  }
2265 
 
2266 
#undef FLD
2267 
}
2268 
  NEXT (vpc);
2269 
 
2270 
  CASE (sem, INSN_NOP) : /* nop */
2271 
{
2272 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2273 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2274 
#define FLD(f) abuf->fields.fmt_empty.f
2275 
  int UNUSED written = 0;
2276 
  IADDR UNUSED pc = abuf->addr;
2277 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2278 
 
2279 
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2280 
 
2281 
#undef FLD
2282 
}
2283 
  NEXT (vpc);
2284 
 
2285 
  CASE (sem, INSN_NOT) : /* not $dr,$sr */
2286 
{
2287 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2288 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2289 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2290 
  int UNUSED written = 0;
2291 
  IADDR UNUSED pc = abuf->addr;
2292 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2293 
 
2294 
  {
2295 
    SI opval = INVSI (* FLD (i_sr));
2296 
    * FLD (i_dr) = opval;
2297 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2298 
  }
2299 
 
2300 
#undef FLD
2301 
}
2302 
  NEXT (vpc);
2303 
 
2304 
  CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2305 
{
2306 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2307 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2308 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
2309 
  int UNUSED written = 0;
2310 
  IADDR UNUSED pc = abuf->addr;
2311 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2312 
 
2313 
{
2314 
  DI tmp_tmp1;
2315 
  tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2316 
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2317 
  {
2318 
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2319 
    SET_H_ACCUMS (FLD (f_accd), opval);
2320 
    TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
2321 
  }
2322 
}
2323 
 
2324 
#undef FLD
2325 
}
2326 
  NEXT (vpc);
2327 
 
2328 
  CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2329 
{
2330 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2331 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2332 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
2333 
  int UNUSED written = 0;
2334 
  IADDR UNUSED pc = abuf->addr;
2335 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2336 
 
2337 
{
2338 
  DI tmp_tmp1;
2339 
  tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2340 
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2341 
  {
2342 
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2343 
    SET_H_ACCUMS (FLD (f_accd), opval);
2344 
    TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
2345 
  }
2346 
}
2347 
 
2348 
#undef FLD
2349 
}
2350 
  NEXT (vpc);
2351 
 
2352 
  CASE (sem, INSN_RTE) : /* rte */
2353 
{
2354 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2355 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2356 
#define FLD(f) abuf->fields.fmt_empty.f
2357 
  int UNUSED written = 0;
2358 
  IADDR UNUSED pc = abuf->addr;
2359 
  SEM_BRANCH_INIT
2360 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2361 
 
2362 
{
2363 
  {
2364 
    USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
2365 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2366 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2367 
  }
2368 
  {
2369 
    USI opval = GET_H_CR (((UINT) 14));
2370 
    SET_H_CR (((UINT) 6), opval);
2371 
    TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2372 
  }
2373 
  {
2374 
    UQI opval = CPU (h_bpsw);
2375 
    SET_H_PSW (opval);
2376 
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2377 
  }
2378 
  {
2379 
    UQI opval = CPU (h_bbpsw);
2380 
    CPU (h_bpsw) = opval;
2381 
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2382 
  }
2383 
}
2384 
 
2385 
  SEM_BRANCH_FINI (vpc);
2386 
#undef FLD
2387 
}
2388 
  NEXT (vpc);
2389 
 
2390 
  CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2391 
{
2392 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2393 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2394 
#define FLD(f) abuf->fields.sfmt_seth.f
2395 
  int UNUSED written = 0;
2396 
  IADDR UNUSED pc = abuf->addr;
2397 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2398 
 
2399 
  {
2400 
    SI opval = SLLSI (FLD (f_hi16), 16);
2401 
    * FLD (i_dr) = opval;
2402 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2403 
  }
2404 
 
2405 
#undef FLD
2406 
}
2407 
  NEXT (vpc);
2408 
 
2409 
  CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2410 
{
2411 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2412 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2413 
#define FLD(f) abuf->fields.sfmt_add.f
2414 
  int UNUSED written = 0;
2415 
  IADDR UNUSED pc = abuf->addr;
2416 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2417 
 
2418 
  {
2419 
    SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2420 
    * FLD (i_dr) = opval;
2421 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2422 
  }
2423 
 
2424 
#undef FLD
2425 
}
2426 
  NEXT (vpc);
2427 
 
2428 
  CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2429 
{
2430 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2431 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2432 
#define FLD(f) abuf->fields.sfmt_add3.f
2433 
  int UNUSED written = 0;
2434 
  IADDR UNUSED pc = abuf->addr;
2435 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2436 
 
2437 
  {
2438 
    SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2439 
    * FLD (i_dr) = opval;
2440 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2441 
  }
2442 
 
2443 
#undef FLD
2444 
}
2445 
  NEXT (vpc);
2446 
 
2447 
  CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2448 
{
2449 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2450 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2451 
#define FLD(f) abuf->fields.sfmt_slli.f
2452 
  int UNUSED written = 0;
2453 
  IADDR UNUSED pc = abuf->addr;
2454 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2455 
 
2456 
  {
2457 
    SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2458 
    * FLD (i_dr) = opval;
2459 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2460 
  }
2461 
 
2462 
#undef FLD
2463 
}
2464 
  NEXT (vpc);
2465 
 
2466 
  CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2467 
{
2468 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2469 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2470 
#define FLD(f) abuf->fields.sfmt_add.f
2471 
  int UNUSED written = 0;
2472 
  IADDR UNUSED pc = abuf->addr;
2473 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2474 
 
2475 
  {
2476 
    SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2477 
    * FLD (i_dr) = opval;
2478 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2479 
  }
2480 
 
2481 
#undef FLD
2482 
}
2483 
  NEXT (vpc);
2484 
 
2485 
  CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2486 
{
2487 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2488 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2489 
#define FLD(f) abuf->fields.sfmt_add3.f
2490 
  int UNUSED written = 0;
2491 
  IADDR UNUSED pc = abuf->addr;
2492 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2493 
 
2494 
  {
2495 
    SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2496 
    * FLD (i_dr) = opval;
2497 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2498 
  }
2499 
 
2500 
#undef FLD
2501 
}
2502 
  NEXT (vpc);
2503 
 
2504 
  CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2505 
{
2506 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2507 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2508 
#define FLD(f) abuf->fields.sfmt_slli.f
2509 
  int UNUSED written = 0;
2510 
  IADDR UNUSED pc = abuf->addr;
2511 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2512 
 
2513 
  {
2514 
    SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2515 
    * FLD (i_dr) = opval;
2516 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2517 
  }
2518 
 
2519 
#undef FLD
2520 
}
2521 
  NEXT (vpc);
2522 
 
2523 
  CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2524 
{
2525 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2526 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2527 
#define FLD(f) abuf->fields.sfmt_add.f
2528 
  int UNUSED written = 0;
2529 
  IADDR UNUSED pc = abuf->addr;
2530 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2531 
 
2532 
  {
2533 
    SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2534 
    * FLD (i_dr) = opval;
2535 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2536 
  }
2537 
 
2538 
#undef FLD
2539 
}
2540 
  NEXT (vpc);
2541 
 
2542 
  CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2543 
{
2544 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2545 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2546 
#define FLD(f) abuf->fields.sfmt_add3.f
2547 
  int UNUSED written = 0;
2548 
  IADDR UNUSED pc = abuf->addr;
2549 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2550 
 
2551 
  {
2552 
    SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2553 
    * FLD (i_dr) = opval;
2554 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2555 
  }
2556 
 
2557 
#undef FLD
2558 
}
2559 
  NEXT (vpc);
2560 
 
2561 
  CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2562 
{
2563 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2564 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2565 
#define FLD(f) abuf->fields.sfmt_slli.f
2566 
  int UNUSED written = 0;
2567 
  IADDR UNUSED pc = abuf->addr;
2568 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2569 
 
2570 
  {
2571 
    SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2572 
    * FLD (i_dr) = opval;
2573 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2574 
  }
2575 
 
2576 
#undef FLD
2577 
}
2578 
  NEXT (vpc);
2579 
 
2580 
  CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2581 
{
2582 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2583 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2584 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2585 
  int UNUSED written = 0;
2586 
  IADDR UNUSED pc = abuf->addr;
2587 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2588 
 
2589 
  {
2590 
    SI opval = * FLD (i_src1);
2591 
    SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2592 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2593 
  }
2594 
 
2595 
#undef FLD
2596 
}
2597 
  NEXT (vpc);
2598 
 
2599 
  CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2600 
{
2601 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2602 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2603 
#define FLD(f) abuf->fields.sfmt_st_d.f
2604 
  int UNUSED written = 0;
2605 
  IADDR UNUSED pc = abuf->addr;
2606 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2607 
 
2608 
  {
2609 
    SI opval = * FLD (i_src1);
2610 
    SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2611 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2612 
  }
2613 
 
2614 
#undef FLD
2615 
}
2616 
  NEXT (vpc);
2617 
 
2618 
  CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2619 
{
2620 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2621 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2622 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2623 
  int UNUSED written = 0;
2624 
  IADDR UNUSED pc = abuf->addr;
2625 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2626 
 
2627 
  {
2628 
    QI opval = * FLD (i_src1);
2629 
    SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2630 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2631 
  }
2632 
 
2633 
#undef FLD
2634 
}
2635 
  NEXT (vpc);
2636 
 
2637 
  CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2638 
{
2639 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2640 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2641 
#define FLD(f) abuf->fields.sfmt_st_d.f
2642 
  int UNUSED written = 0;
2643 
  IADDR UNUSED pc = abuf->addr;
2644 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2645 
 
2646 
  {
2647 
    QI opval = * FLD (i_src1);
2648 
    SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2649 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2650 
  }
2651 
 
2652 
#undef FLD
2653 
}
2654 
  NEXT (vpc);
2655 
 
2656 
  CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2657 
{
2658 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2659 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2660 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2661 
  int UNUSED written = 0;
2662 
  IADDR UNUSED pc = abuf->addr;
2663 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2664 
 
2665 
  {
2666 
    HI opval = * FLD (i_src1);
2667 
    SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2668 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2669 
  }
2670 
 
2671 
#undef FLD
2672 
}
2673 
  NEXT (vpc);
2674 
 
2675 
  CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2676 
{
2677 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2678 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2679 
#define FLD(f) abuf->fields.sfmt_st_d.f
2680 
  int UNUSED written = 0;
2681 
  IADDR UNUSED pc = abuf->addr;
2682 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2683 
 
2684 
  {
2685 
    HI opval = * FLD (i_src1);
2686 
    SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2687 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2688 
  }
2689 
 
2690 
#undef FLD
2691 
}
2692 
  NEXT (vpc);
2693 
 
2694 
  CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2695 
{
2696 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2697 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2698 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2699 
  int UNUSED written = 0;
2700 
  IADDR UNUSED pc = abuf->addr;
2701 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2702 
 
2703 
{
2704 
  SI tmp_new_src2;
2705 
  tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2706 
  {
2707 
    SI opval = * FLD (i_src1);
2708 
    SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2709 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2710 
  }
2711 
  {
2712 
    SI opval = tmp_new_src2;
2713 
    * FLD (i_src2) = opval;
2714 
    TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2715 
  }
2716 
}
2717 
 
2718 
#undef FLD
2719 
}
2720 
  NEXT (vpc);
2721 
 
2722 
  CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2723 
{
2724 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2725 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2726 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2727 
  int UNUSED written = 0;
2728 
  IADDR UNUSED pc = abuf->addr;
2729 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2730 
 
2731 
{
2732 
  SI tmp_new_src2;
2733 
  tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2734 
  {
2735 
    SI opval = * FLD (i_src1);
2736 
    SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2737 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2738 
  }
2739 
  {
2740 
    SI opval = tmp_new_src2;
2741 
    * FLD (i_src2) = opval;
2742 
    TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2743 
  }
2744 
}
2745 
 
2746 
#undef FLD
2747 
}
2748 
  NEXT (vpc);
2749 
 
2750 
  CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2751 
{
2752 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2753 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2754 
#define FLD(f) abuf->fields.sfmt_add.f
2755 
  int UNUSED written = 0;
2756 
  IADDR UNUSED pc = abuf->addr;
2757 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2758 
 
2759 
  {
2760 
    SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2761 
    * FLD (i_dr) = opval;
2762 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2763 
  }
2764 
 
2765 
#undef FLD
2766 
}
2767 
  NEXT (vpc);
2768 
 
2769 
  CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
2770 
{
2771 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2772 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2773 
#define FLD(f) abuf->fields.sfmt_add.f
2774 
  int UNUSED written = 0;
2775 
  IADDR UNUSED pc = abuf->addr;
2776 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2777 
 
2778 
{
2779 
  SI temp0;BI temp1;
2780 
  temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2781 
  temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2782 
  {
2783 
    SI opval = temp0;
2784 
    * FLD (i_dr) = opval;
2785 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2786 
  }
2787 
  {
2788 
    BI opval = temp1;
2789 
    CPU (h_cond) = opval;
2790 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2791 
  }
2792 
}
2793 
 
2794 
#undef FLD
2795 
}
2796 
  NEXT (vpc);
2797 
 
2798 
  CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
2799 
{
2800 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2801 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2802 
#define FLD(f) abuf->fields.sfmt_add.f
2803 
  int UNUSED written = 0;
2804 
  IADDR UNUSED pc = abuf->addr;
2805 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2806 
 
2807 
{
2808 
  SI temp0;BI temp1;
2809 
  temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2810 
  temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2811 
  {
2812 
    SI opval = temp0;
2813 
    * FLD (i_dr) = opval;
2814 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2815 
  }
2816 
  {
2817 
    BI opval = temp1;
2818 
    CPU (h_cond) = opval;
2819 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2820 
  }
2821 
}
2822 
 
2823 
#undef FLD
2824 
}
2825 
  NEXT (vpc);
2826 
 
2827 
  CASE (sem, INSN_TRAP) : /* trap $uimm4 */
2828 
{
2829 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2830 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2831 
#define FLD(f) abuf->fields.sfmt_trap.f
2832 
  int UNUSED written = 0;
2833 
  IADDR UNUSED pc = abuf->addr;
2834 
  SEM_BRANCH_INIT
2835 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2836 
 
2837 
{
2838 
  {
2839 
    USI opval = GET_H_CR (((UINT) 6));
2840 
    SET_H_CR (((UINT) 14), opval);
2841 
    TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
2842 
  }
2843 
  {
2844 
    USI opval = ADDSI (pc, 4);
2845 
    SET_H_CR (((UINT) 6), opval);
2846 
    TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2847 
  }
2848 
  {
2849 
    UQI opval = CPU (h_bpsw);
2850 
    CPU (h_bbpsw) = opval;
2851 
    TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2852 
  }
2853 
  {
2854 
    UQI opval = GET_H_PSW ();
2855 
    CPU (h_bpsw) = opval;
2856 
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2857 
  }
2858 
  {
2859 
    UQI opval = ANDQI (GET_H_PSW (), 128);
2860 
    SET_H_PSW (opval);
2861 
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2862 
  }
2863 
  {
2864 
    SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2865 
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2866 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2867 
  }
2868 
}
2869 
 
2870 
  SEM_BRANCH_FINI (vpc);
2871 
#undef FLD
2872 
}
2873 
  NEXT (vpc);
2874 
 
2875 
  CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
2876 
{
2877 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2878 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2879 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2880 
  int UNUSED written = 0;
2881 
  IADDR UNUSED pc = abuf->addr;
2882 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2883 
 
2884 
{
2885 
if (CPU (h_lock)) {
2886 
  {
2887 
    SI opval = * FLD (i_src1);
2888 
    SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2889 
    written |= (1 << 4);
2890 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2891 
  }
2892 
}
2893 
  {
2894 
    BI opval = 0;
2895 
    CPU (h_lock) = opval;
2896 
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2897 
  }
2898 
}
2899 
 
2900 
  abuf->written = written;
2901 
#undef FLD
2902 
}
2903 
  NEXT (vpc);
2904 
 
2905 
  CASE (sem, INSN_SATB) : /* satb $dr,$sr */
2906 
{
2907 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2908 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2909 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2910 
  int UNUSED written = 0;
2911 
  IADDR UNUSED pc = abuf->addr;
2912 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2913 
 
2914 
  {
2915 
    SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
2916 
    * FLD (i_dr) = opval;
2917 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2918 
  }
2919 
 
2920 
#undef FLD
2921 
}
2922 
  NEXT (vpc);
2923 
 
2924 
  CASE (sem, INSN_SATH) : /* sath $dr,$sr */
2925 
{
2926 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2927 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2928 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2929 
  int UNUSED written = 0;
2930 
  IADDR UNUSED pc = abuf->addr;
2931 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2932 
 
2933 
  {
2934 
    SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
2935 
    * FLD (i_dr) = opval;
2936 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2937 
  }
2938 
 
2939 
#undef FLD
2940 
}
2941 
  NEXT (vpc);
2942 
 
2943 
  CASE (sem, INSN_SAT) : /* sat $dr,$sr */
2944 
{
2945 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2946 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2947 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
2948 
  int UNUSED written = 0;
2949 
  IADDR UNUSED pc = abuf->addr;
2950 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2951 
 
2952 
  {
2953 
    SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
2954 
    * FLD (i_dr) = opval;
2955 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2956 
  }
2957 
 
2958 
#undef FLD
2959 
}
2960 
  NEXT (vpc);
2961 
 
2962 
  CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
2963 
{
2964 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2965 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2966 
#define FLD(f) abuf->fields.sfmt_st_plus.f
2967 
  int UNUSED written = 0;
2968 
  IADDR UNUSED pc = abuf->addr;
2969 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2970 
 
2971 
  {
2972 
    BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
2973 
    CPU (h_cond) = opval;
2974 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2975 
  }
2976 
 
2977 
#undef FLD
2978 
}
2979 
  NEXT (vpc);
2980 
 
2981 
  CASE (sem, INSN_SADD) : /* sadd */
2982 
{
2983 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2984 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2985 
#define FLD(f) abuf->fields.fmt_empty.f
2986 
  int UNUSED written = 0;
2987 
  IADDR UNUSED pc = abuf->addr;
2988 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2989 
 
2990 
  {
2991 
    DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
2992 
    SET_H_ACCUMS (((UINT) 0), opval);
2993 
    TRACE_RESULT (current_cpu, abuf, "accums-0", 'D', opval);
2994 
  }
2995 
 
2996 
#undef FLD
2997 
}
2998 
  NEXT (vpc);
2999 
 
3000 
  CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
3001 
{
3002 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3003 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3004 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3005 
  int UNUSED written = 0;
3006 
  IADDR UNUSED pc = abuf->addr;
3007 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3008 
 
3009 
  {
3010 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3011 
    SET_H_ACCUMS (((UINT) 1), opval);
3012 
    TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3013 
  }
3014 
 
3015 
#undef FLD
3016 
}
3017 
  NEXT (vpc);
3018 
 
3019 
  CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3020 
{
3021 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3022 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3023 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3024 
  int UNUSED written = 0;
3025 
  IADDR UNUSED pc = abuf->addr;
3026 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3027 
 
3028 
  {
3029 
    DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3030 
    SET_H_ACCUM (opval);
3031 
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3032 
  }
3033 
 
3034 
#undef FLD
3035 
}
3036 
  NEXT (vpc);
3037 
 
3038 
  CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3039 
{
3040 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3041 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3042 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3043 
  int UNUSED written = 0;
3044 
  IADDR UNUSED pc = abuf->addr;
3045 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3046 
 
3047 
  {
3048 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3049 
    SET_H_ACCUMS (((UINT) 1), opval);
3050 
    TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3051 
  }
3052 
 
3053 
#undef FLD
3054 
}
3055 
  NEXT (vpc);
3056 
 
3057 
  CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3058 
{
3059 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3060 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3061 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3062 
  int UNUSED written = 0;
3063 
  IADDR UNUSED pc = abuf->addr;
3064 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3065 
 
3066 
  {
3067 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3068 
    SET_H_ACCUMS (((UINT) 1), opval);
3069 
    TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3070 
  }
3071 
 
3072 
#undef FLD
3073 
}
3074 
  NEXT (vpc);
3075 
 
3076 
  CASE (sem, INSN_SC) : /* sc */
3077 
{
3078 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3079 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3080 
#define FLD(f) abuf->fields.fmt_empty.f
3081 
  int UNUSED written = 0;
3082 
  IADDR UNUSED pc = abuf->addr;
3083 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3084 
 
3085 
if (ZEXTBISI (CPU (h_cond)))
3086 
  SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3087 
 
3088 
#undef FLD
3089 
}
3090 
  NEXT (vpc);
3091 
 
3092 
  CASE (sem, INSN_SNC) : /* snc */
3093 
{
3094 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3095 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3096 
#define FLD(f) abuf->fields.fmt_empty.f
3097 
  int UNUSED written = 0;
3098 
  IADDR UNUSED pc = abuf->addr;
3099 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3100 
 
3101 
if (ZEXTBISI (NOTBI (CPU (h_cond))))
3102 
  SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3103 
 
3104 
#undef FLD
3105 
}
3106 
  NEXT (vpc);
3107 
 
3108 
  CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3109 
{
3110 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3111 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3112 
#define FLD(f) abuf->fields.sfmt_add.f
3113 
#define OPRND(f) par_exec->operands.sfmt_add.f
3114 
  int UNUSED written = 0;
3115 
  IADDR UNUSED pc = abuf->addr;
3116 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3117 
 
3118 
  {
3119 
    SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3120 
    OPRND (dr) = opval;
3121 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3122 
  }
3123 
 
3124 
#undef OPRND
3125 
#undef FLD
3126 
}
3127 
  NEXT (vpc);
3128 
 
3129 
CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3130 
  {
3131 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3132 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3133 
#define FLD(f) abuf->fields.sfmt_add.f
3134 
#define OPRND(f) par_exec->operands.sfmt_add.f
3135 
    int UNUSED written = abuf->written;
3136 
    IADDR UNUSED pc = abuf->addr;
3137 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3138 
 
3139 
  * FLD (i_dr) = OPRND (dr);
3140 
 
3141 
#undef OPRND
3142 
#undef FLD
3143 
  }
3144 
  NEXT (vpc);
3145 
 
3146 
  CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3147 
{
3148 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3149 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3150 
#define FLD(f) abuf->fields.sfmt_add.f
3151 
#define OPRND(f) par_exec->operands.sfmt_add.f
3152 
  int UNUSED written = 0;
3153 
  IADDR UNUSED pc = abuf->addr;
3154 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3155 
 
3156 
  {
3157 
    SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3158 
    OPRND (dr) = opval;
3159 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3160 
  }
3161 
 
3162 
#undef OPRND
3163 
#undef FLD
3164 
}
3165 
  NEXT (vpc);
3166 
 
3167 
CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3168 
  {
3169 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3170 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3171 
#define FLD(f) abuf->fields.sfmt_add.f
3172 
#define OPRND(f) par_exec->operands.sfmt_add.f
3173 
    int UNUSED written = abuf->written;
3174 
    IADDR UNUSED pc = abuf->addr;
3175 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3176 
 
3177 
  * FLD (i_dr) = OPRND (dr);
3178 
 
3179 
#undef OPRND
3180 
#undef FLD
3181 
  }
3182 
  NEXT (vpc);
3183 
 
3184 
  CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3185 
{
3186 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3187 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3188 
#define FLD(f) abuf->fields.sfmt_add.f
3189 
#define OPRND(f) par_exec->operands.sfmt_add.f
3190 
  int UNUSED written = 0;
3191 
  IADDR UNUSED pc = abuf->addr;
3192 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3193 
 
3194 
  {
3195 
    SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3196 
    OPRND (dr) = opval;
3197 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3198 
  }
3199 
 
3200 
#undef OPRND
3201 
#undef FLD
3202 
}
3203 
  NEXT (vpc);
3204 
 
3205 
CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3206 
  {
3207 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3208 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3209 
#define FLD(f) abuf->fields.sfmt_add.f
3210 
#define OPRND(f) par_exec->operands.sfmt_add.f
3211 
    int UNUSED written = abuf->written;
3212 
    IADDR UNUSED pc = abuf->addr;
3213 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3214 
 
3215 
  * FLD (i_dr) = OPRND (dr);
3216 
 
3217 
#undef OPRND
3218 
#undef FLD
3219 
  }
3220 
  NEXT (vpc);
3221 
 
3222 
  CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3223 
{
3224 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3225 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3226 
#define FLD(f) abuf->fields.sfmt_add.f
3227 
#define OPRND(f) par_exec->operands.sfmt_add.f
3228 
  int UNUSED written = 0;
3229 
  IADDR UNUSED pc = abuf->addr;
3230 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3231 
 
3232 
  {
3233 
    SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3234 
    OPRND (dr) = opval;
3235 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3236 
  }
3237 
 
3238 
#undef OPRND
3239 
#undef FLD
3240 
}
3241 
  NEXT (vpc);
3242 
 
3243 
CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3244 
  {
3245 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3246 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3247 
#define FLD(f) abuf->fields.sfmt_add.f
3248 
#define OPRND(f) par_exec->operands.sfmt_add.f
3249 
    int UNUSED written = abuf->written;
3250 
    IADDR UNUSED pc = abuf->addr;
3251 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3252 
 
3253 
  * FLD (i_dr) = OPRND (dr);
3254 
 
3255 
#undef OPRND
3256 
#undef FLD
3257 
  }
3258 
  NEXT (vpc);
3259 
 
3260 
  CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3261 
{
3262 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3263 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3264 
#define FLD(f) abuf->fields.sfmt_addi.f
3265 
#define OPRND(f) par_exec->operands.sfmt_addi.f
3266 
  int UNUSED written = 0;
3267 
  IADDR UNUSED pc = abuf->addr;
3268 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3269 
 
3270 
  {
3271 
    SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3272 
    OPRND (dr) = opval;
3273 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3274 
  }
3275 
 
3276 
#undef OPRND
3277 
#undef FLD
3278 
}
3279 
  NEXT (vpc);
3280 
 
3281 
CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3282 
  {
3283 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3284 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3285 
#define FLD(f) abuf->fields.sfmt_addi.f
3286 
#define OPRND(f) par_exec->operands.sfmt_addi.f
3287 
    int UNUSED written = abuf->written;
3288 
    IADDR UNUSED pc = abuf->addr;
3289 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3290 
 
3291 
  * FLD (i_dr) = OPRND (dr);
3292 
 
3293 
#undef OPRND
3294 
#undef FLD
3295 
  }
3296 
  NEXT (vpc);
3297 
 
3298 
  CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3299 
{
3300 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3301 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3302 
#define FLD(f) abuf->fields.sfmt_add.f
3303 
#define OPRND(f) par_exec->operands.sfmt_addv.f
3304 
  int UNUSED written = 0;
3305 
  IADDR UNUSED pc = abuf->addr;
3306 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3307 
 
3308 
{
3309 
  SI temp0;BI temp1;
3310 
  temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3311 
  temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3312 
  {
3313 
    SI opval = temp0;
3314 
    OPRND (dr) = opval;
3315 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3316 
  }
3317 
  {
3318 
    BI opval = temp1;
3319 
    OPRND (condbit) = opval;
3320 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3321 
  }
3322 
}
3323 
 
3324 
#undef OPRND
3325 
#undef FLD
3326 
}
3327 
  NEXT (vpc);
3328 
 
3329 
CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3330 
  {
3331 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3332 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3333 
#define FLD(f) abuf->fields.sfmt_add.f
3334 
#define OPRND(f) par_exec->operands.sfmt_addv.f
3335 
    int UNUSED written = abuf->written;
3336 
    IADDR UNUSED pc = abuf->addr;
3337 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3338 
 
3339 
  CPU (h_cond) = OPRND (condbit);
3340 
  * FLD (i_dr) = OPRND (dr);
3341 
 
3342 
#undef OPRND
3343 
#undef FLD
3344 
  }
3345 
  NEXT (vpc);
3346 
 
3347 
  CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3348 
{
3349 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3350 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3351 
#define FLD(f) abuf->fields.sfmt_add.f
3352 
#define OPRND(f) par_exec->operands.sfmt_addx.f
3353 
  int UNUSED written = 0;
3354 
  IADDR UNUSED pc = abuf->addr;
3355 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3356 
 
3357 
{
3358 
  SI temp0;BI temp1;
3359 
  temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3360 
  temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3361 
  {
3362 
    SI opval = temp0;
3363 
    OPRND (dr) = opval;
3364 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3365 
  }
3366 
  {
3367 
    BI opval = temp1;
3368 
    OPRND (condbit) = opval;
3369 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3370 
  }
3371 
}
3372 
 
3373 
#undef OPRND
3374 
#undef FLD
3375 
}
3376 
  NEXT (vpc);
3377 
 
3378 
CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3379 
  {
3380 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3381 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3382 
#define FLD(f) abuf->fields.sfmt_add.f
3383 
#define OPRND(f) par_exec->operands.sfmt_addx.f
3384 
    int UNUSED written = abuf->written;
3385 
    IADDR UNUSED pc = abuf->addr;
3386 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3387 
 
3388 
  CPU (h_cond) = OPRND (condbit);
3389 
  * FLD (i_dr) = OPRND (dr);
3390 
 
3391 
#undef OPRND
3392 
#undef FLD
3393 
  }
3394 
  NEXT (vpc);
3395 
 
3396 
  CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3397 
{
3398 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3399 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3400 
#define FLD(f) abuf->fields.sfmt_bl8.f
3401 
#define OPRND(f) par_exec->operands.sfmt_bc8.f
3402 
  int UNUSED written = 0;
3403 
  IADDR UNUSED pc = abuf->addr;
3404 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3405 
 
3406 
if (CPU (h_cond)) {
3407 
  {
3408 
    USI opval = FLD (i_disp8);
3409 
    OPRND (pc) = opval;
3410 
    written |= (1 << 2);
3411 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3412 
  }
3413 
}
3414 
 
3415 
  abuf->written = written;
3416 
#undef OPRND
3417 
#undef FLD
3418 
}
3419 
  NEXT (vpc);
3420 
 
3421 
CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3422 
  {
3423 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3424 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3425 
#define FLD(f) abuf->fields.sfmt_bl8.f
3426 
#define OPRND(f) par_exec->operands.sfmt_bc8.f
3427 
    int UNUSED written = abuf->written;
3428 
    IADDR UNUSED pc = abuf->addr;
3429 
    SEM_BRANCH_INIT
3430 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3431 
 
3432 
  if (written & (1 << 2))
3433 
    {
3434 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3435 
    }
3436 
 
3437 
  SEM_BRANCH_FINI (vpc);
3438 
#undef OPRND
3439 
#undef FLD
3440 
  }
3441 
  NEXT (vpc);
3442 
 
3443 
  CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3444 
{
3445 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3446 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3447 
#define FLD(f) abuf->fields.sfmt_bl8.f
3448 
#define OPRND(f) par_exec->operands.sfmt_bl8.f
3449 
  int UNUSED written = 0;
3450 
  IADDR UNUSED pc = abuf->addr;
3451 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3452 
 
3453 
{
3454 
  {
3455 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
3456 
    OPRND (h_gr_14) = opval;
3457 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3458 
  }
3459 
  {
3460 
    USI opval = FLD (i_disp8);
3461 
    OPRND (pc) = opval;
3462 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3463 
  }
3464 
}
3465 
 
3466 
#undef OPRND
3467 
#undef FLD
3468 
}
3469 
  NEXT (vpc);
3470 
 
3471 
CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3472 
  {
3473 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3474 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3475 
#define FLD(f) abuf->fields.sfmt_bl8.f
3476 
#define OPRND(f) par_exec->operands.sfmt_bl8.f
3477 
    int UNUSED written = abuf->written;
3478 
    IADDR UNUSED pc = abuf->addr;
3479 
    SEM_BRANCH_INIT
3480 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3481 
 
3482 
  CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3483 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3484 
 
3485 
  SEM_BRANCH_FINI (vpc);
3486 
#undef OPRND
3487 
#undef FLD
3488 
  }
3489 
  NEXT (vpc);
3490 
 
3491 
  CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3492 
{
3493 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3494 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3495 
#define FLD(f) abuf->fields.sfmt_bl8.f
3496 
#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3497 
  int UNUSED written = 0;
3498 
  IADDR UNUSED pc = abuf->addr;
3499 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3500 
 
3501 
if (CPU (h_cond)) {
3502 
{
3503 
  {
3504 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
3505 
    OPRND (h_gr_14) = opval;
3506 
    written |= (1 << 3);
3507 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3508 
  }
3509 
  {
3510 
    USI opval = FLD (i_disp8);
3511 
    OPRND (pc) = opval;
3512 
    written |= (1 << 4);
3513 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3514 
  }
3515 
}
3516 
}
3517 
 
3518 
  abuf->written = written;
3519 
#undef OPRND
3520 
#undef FLD
3521 
}
3522 
  NEXT (vpc);
3523 
 
3524 
CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3525 
  {
3526 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3527 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3528 
#define FLD(f) abuf->fields.sfmt_bl8.f
3529 
#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3530 
    int UNUSED written = abuf->written;
3531 
    IADDR UNUSED pc = abuf->addr;
3532 
    SEM_BRANCH_INIT
3533 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3534 
 
3535 
  if (written & (1 << 3))
3536 
    {
3537 
      CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3538 
    }
3539 
  if (written & (1 << 4))
3540 
    {
3541 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3542 
    }
3543 
 
3544 
  SEM_BRANCH_FINI (vpc);
3545 
#undef OPRND
3546 
#undef FLD
3547 
  }
3548 
  NEXT (vpc);
3549 
 
3550 
  CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3551 
{
3552 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3553 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3554 
#define FLD(f) abuf->fields.sfmt_bl8.f
3555 
#define OPRND(f) par_exec->operands.sfmt_bc8.f
3556 
  int UNUSED written = 0;
3557 
  IADDR UNUSED pc = abuf->addr;
3558 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3559 
 
3560 
if (NOTBI (CPU (h_cond))) {
3561 
  {
3562 
    USI opval = FLD (i_disp8);
3563 
    OPRND (pc) = opval;
3564 
    written |= (1 << 2);
3565 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3566 
  }
3567 
}
3568 
 
3569 
  abuf->written = written;
3570 
#undef OPRND
3571 
#undef FLD
3572 
}
3573 
  NEXT (vpc);
3574 
 
3575 
CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3576 
  {
3577 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3578 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3579 
#define FLD(f) abuf->fields.sfmt_bl8.f
3580 
#define OPRND(f) par_exec->operands.sfmt_bc8.f
3581 
    int UNUSED written = abuf->written;
3582 
    IADDR UNUSED pc = abuf->addr;
3583 
    SEM_BRANCH_INIT
3584 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3585 
 
3586 
  if (written & (1 << 2))
3587 
    {
3588 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3589 
    }
3590 
 
3591 
  SEM_BRANCH_FINI (vpc);
3592 
#undef OPRND
3593 
#undef FLD
3594 
  }
3595 
  NEXT (vpc);
3596 
 
3597 
  CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3598 
{
3599 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3600 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3601 
#define FLD(f) abuf->fields.sfmt_bl8.f
3602 
#define OPRND(f) par_exec->operands.sfmt_bra8.f
3603 
  int UNUSED written = 0;
3604 
  IADDR UNUSED pc = abuf->addr;
3605 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3606 
 
3607 
  {
3608 
    USI opval = FLD (i_disp8);
3609 
    OPRND (pc) = opval;
3610 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3611 
  }
3612 
 
3613 
#undef OPRND
3614 
#undef FLD
3615 
}
3616 
  NEXT (vpc);
3617 
 
3618 
CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3619 
  {
3620 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3621 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3622 
#define FLD(f) abuf->fields.sfmt_bl8.f
3623 
#define OPRND(f) par_exec->operands.sfmt_bra8.f
3624 
    int UNUSED written = abuf->written;
3625 
    IADDR UNUSED pc = abuf->addr;
3626 
    SEM_BRANCH_INIT
3627 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3628 
 
3629 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3630 
 
3631 
  SEM_BRANCH_FINI (vpc);
3632 
#undef OPRND
3633 
#undef FLD
3634 
  }
3635 
  NEXT (vpc);
3636 
 
3637 
  CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3638 
{
3639 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3640 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3641 
#define FLD(f) abuf->fields.sfmt_bl8.f
3642 
#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3643 
  int UNUSED written = 0;
3644 
  IADDR UNUSED pc = abuf->addr;
3645 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3646 
 
3647 
if (NOTBI (CPU (h_cond))) {
3648 
{
3649 
  {
3650 
    SI opval = ADDSI (ANDSI (pc, -4), 4);
3651 
    OPRND (h_gr_14) = opval;
3652 
    written |= (1 << 3);
3653 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3654 
  }
3655 
  {
3656 
    USI opval = FLD (i_disp8);
3657 
    OPRND (pc) = opval;
3658 
    written |= (1 << 4);
3659 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3660 
  }
3661 
}
3662 
}
3663 
 
3664 
  abuf->written = written;
3665 
#undef OPRND
3666 
#undef FLD
3667 
}
3668 
  NEXT (vpc);
3669 
 
3670 
CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
3671 
  {
3672 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3673 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3674 
#define FLD(f) abuf->fields.sfmt_bl8.f
3675 
#define OPRND(f) par_exec->operands.sfmt_bcl8.f
3676 
    int UNUSED written = abuf->written;
3677 
    IADDR UNUSED pc = abuf->addr;
3678 
    SEM_BRANCH_INIT
3679 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3680 
 
3681 
  if (written & (1 << 3))
3682 
    {
3683 
      CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3684 
    }
3685 
  if (written & (1 << 4))
3686 
    {
3687 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3688 
    }
3689 
 
3690 
  SEM_BRANCH_FINI (vpc);
3691 
#undef OPRND
3692 
#undef FLD
3693 
  }
3694 
  NEXT (vpc);
3695 
 
3696 
  CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
3697 
{
3698 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3699 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3700 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3701 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3702 
  int UNUSED written = 0;
3703 
  IADDR UNUSED pc = abuf->addr;
3704 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3705 
 
3706 
  {
3707 
    BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
3708 
    OPRND (condbit) = opval;
3709 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3710 
  }
3711 
 
3712 
#undef OPRND
3713 
#undef FLD
3714 
}
3715 
  NEXT (vpc);
3716 
 
3717 
CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
3718 
  {
3719 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3720 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3721 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3722 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3723 
    int UNUSED written = abuf->written;
3724 
    IADDR UNUSED pc = abuf->addr;
3725 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3726 
 
3727 
  CPU (h_cond) = OPRND (condbit);
3728 
 
3729 
#undef OPRND
3730 
#undef FLD
3731 
  }
3732 
  NEXT (vpc);
3733 
 
3734 
  CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
3735 
{
3736 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3737 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3738 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3739 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3740 
  int UNUSED written = 0;
3741 
  IADDR UNUSED pc = abuf->addr;
3742 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3743 
 
3744 
  {
3745 
    BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
3746 
    OPRND (condbit) = opval;
3747 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3748 
  }
3749 
 
3750 
#undef OPRND
3751 
#undef FLD
3752 
}
3753 
  NEXT (vpc);
3754 
 
3755 
CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
3756 
  {
3757 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3758 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3759 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3760 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3761 
    int UNUSED written = abuf->written;
3762 
    IADDR UNUSED pc = abuf->addr;
3763 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3764 
 
3765 
  CPU (h_cond) = OPRND (condbit);
3766 
 
3767 
#undef OPRND
3768 
#undef FLD
3769 
  }
3770 
  NEXT (vpc);
3771 
 
3772 
  CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
3773 
{
3774 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3775 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3776 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3777 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3778 
  int UNUSED written = 0;
3779 
  IADDR UNUSED pc = abuf->addr;
3780 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3781 
 
3782 
  {
3783 
    BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
3784 
    OPRND (condbit) = opval;
3785 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3786 
  }
3787 
 
3788 
#undef OPRND
3789 
#undef FLD
3790 
}
3791 
  NEXT (vpc);
3792 
 
3793 
CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
3794 
  {
3795 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3796 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3797 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3798 
#define OPRND(f) par_exec->operands.sfmt_cmp.f
3799 
    int UNUSED written = abuf->written;
3800 
    IADDR UNUSED pc = abuf->addr;
3801 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3802 
 
3803 
  CPU (h_cond) = OPRND (condbit);
3804 
 
3805 
#undef OPRND
3806 
#undef FLD
3807 
  }
3808 
  NEXT (vpc);
3809 
 
3810 
  CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
3811 
{
3812 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3813 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3814 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3815 
#define OPRND(f) par_exec->operands.sfmt_cmpz.f
3816 
  int UNUSED written = 0;
3817 
  IADDR UNUSED pc = abuf->addr;
3818 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3819 
 
3820 
  {
3821 
    BI opval = EQSI (* FLD (i_src2), 0);
3822 
    OPRND (condbit) = opval;
3823 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3824 
  }
3825 
 
3826 
#undef OPRND
3827 
#undef FLD
3828 
}
3829 
  NEXT (vpc);
3830 
 
3831 
CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
3832 
  {
3833 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3834 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3835 
#define FLD(f) abuf->fields.sfmt_st_plus.f
3836 
#define OPRND(f) par_exec->operands.sfmt_cmpz.f
3837 
    int UNUSED written = abuf->written;
3838 
    IADDR UNUSED pc = abuf->addr;
3839 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3840 
 
3841 
  CPU (h_cond) = OPRND (condbit);
3842 
 
3843 
#undef OPRND
3844 
#undef FLD
3845 
  }
3846 
  NEXT (vpc);
3847 
 
3848 
  CASE (sem, INSN_PAR_JC) : /* jc $sr */
3849 
{
3850 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3851 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3852 
#define FLD(f) abuf->fields.sfmt_mvtc.f
3853 
#define OPRND(f) par_exec->operands.sfmt_jc.f
3854 
  int UNUSED written = 0;
3855 
  IADDR UNUSED pc = abuf->addr;
3856 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3857 
 
3858 
if (CPU (h_cond)) {
3859 
  {
3860 
    USI opval = ANDSI (* FLD (i_sr), -4);
3861 
    OPRND (pc) = opval;
3862 
    written |= (1 << 2);
3863 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3864 
  }
3865 
}
3866 
 
3867 
  abuf->written = written;
3868 
#undef OPRND
3869 
#undef FLD
3870 
}
3871 
  NEXT (vpc);
3872 
 
3873 
CASE (sem, INSN_WRITE_JC) : /* jc $sr */
3874 
  {
3875 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3876 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3877 
#define FLD(f) abuf->fields.sfmt_mvtc.f
3878 
#define OPRND(f) par_exec->operands.sfmt_jc.f
3879 
    int UNUSED written = abuf->written;
3880 
    IADDR UNUSED pc = abuf->addr;
3881 
    SEM_BRANCH_INIT
3882 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3883 
 
3884 
  if (written & (1 << 2))
3885 
    {
3886 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3887 
    }
3888 
 
3889 
  SEM_BRANCH_FINI (vpc);
3890 
#undef OPRND
3891 
#undef FLD
3892 
  }
3893 
  NEXT (vpc);
3894 
 
3895 
  CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
3896 
{
3897 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3898 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3899 
#define FLD(f) abuf->fields.sfmt_mvtc.f
3900 
#define OPRND(f) par_exec->operands.sfmt_jc.f
3901 
  int UNUSED written = 0;
3902 
  IADDR UNUSED pc = abuf->addr;
3903 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3904 
 
3905 
if (NOTBI (CPU (h_cond))) {
3906 
  {
3907 
    USI opval = ANDSI (* FLD (i_sr), -4);
3908 
    OPRND (pc) = opval;
3909 
    written |= (1 << 2);
3910 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3911 
  }
3912 
}
3913 
 
3914 
  abuf->written = written;
3915 
#undef OPRND
3916 
#undef FLD
3917 
}
3918 
  NEXT (vpc);
3919 
 
3920 
CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
3921 
  {
3922 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3923 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3924 
#define FLD(f) abuf->fields.sfmt_mvtc.f
3925 
#define OPRND(f) par_exec->operands.sfmt_jc.f
3926 
    int UNUSED written = abuf->written;
3927 
    IADDR UNUSED pc = abuf->addr;
3928 
    SEM_BRANCH_INIT
3929 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3930 
 
3931 
  if (written & (1 << 2))
3932 
    {
3933 
      SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3934 
    }
3935 
 
3936 
  SEM_BRANCH_FINI (vpc);
3937 
#undef OPRND
3938 
#undef FLD
3939 
  }
3940 
  NEXT (vpc);
3941 
 
3942 
  CASE (sem, INSN_PAR_JL) : /* jl $sr */
3943 
{
3944 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3945 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3946 
#define FLD(f) abuf->fields.sfmt_jl.f
3947 
#define OPRND(f) par_exec->operands.sfmt_jl.f
3948 
  int UNUSED written = 0;
3949 
  IADDR UNUSED pc = abuf->addr;
3950 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3951 
 
3952 
{
3953 
  SI temp0;USI temp1;
3954 
  temp0 = ADDSI (ANDSI (pc, -4), 4);
3955 
  temp1 = ANDSI (* FLD (i_sr), -4);
3956 
  {
3957 
    SI opval = temp0;
3958 
    OPRND (h_gr_14) = opval;
3959 
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3960 
  }
3961 
  {
3962 
    USI opval = temp1;
3963 
    OPRND (pc) = opval;
3964 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3965 
  }
3966 
}
3967 
 
3968 
#undef OPRND
3969 
#undef FLD
3970 
}
3971 
  NEXT (vpc);
3972 
 
3973 
CASE (sem, INSN_WRITE_JL) : /* jl $sr */
3974 
  {
3975 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3976 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3977 
#define FLD(f) abuf->fields.sfmt_jl.f
3978 
#define OPRND(f) par_exec->operands.sfmt_jl.f
3979 
    int UNUSED written = abuf->written;
3980 
    IADDR UNUSED pc = abuf->addr;
3981 
    SEM_BRANCH_INIT
3982 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3983 
 
3984 
  CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3985 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3986 
 
3987 
  SEM_BRANCH_FINI (vpc);
3988 
#undef OPRND
3989 
#undef FLD
3990 
  }
3991 
  NEXT (vpc);
3992 
 
3993 
  CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
3994 
{
3995 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3996 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3997 
#define FLD(f) abuf->fields.sfmt_mvtc.f
3998 
#define OPRND(f) par_exec->operands.sfmt_jmp.f
3999 
  int UNUSED written = 0;
4000 
  IADDR UNUSED pc = abuf->addr;
4001 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4002 
 
4003 
  {
4004 
    USI opval = ANDSI (* FLD (i_sr), -4);
4005 
    OPRND (pc) = opval;
4006 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4007 
  }
4008 
 
4009 
#undef OPRND
4010 
#undef FLD
4011 
}
4012 
  NEXT (vpc);
4013 
 
4014 
CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4015 
  {
4016 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4017 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4018 
#define FLD(f) abuf->fields.sfmt_mvtc.f
4019 
#define OPRND(f) par_exec->operands.sfmt_jmp.f
4020 
    int UNUSED written = abuf->written;
4021 
    IADDR UNUSED pc = abuf->addr;
4022 
    SEM_BRANCH_INIT
4023 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4024 
 
4025 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4026 
 
4027 
  SEM_BRANCH_FINI (vpc);
4028 
#undef OPRND
4029 
#undef FLD
4030 
  }
4031 
  NEXT (vpc);
4032 
 
4033 
  CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4034 
{
4035 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4036 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4037 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4038 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4039 
  int UNUSED written = 0;
4040 
  IADDR UNUSED pc = abuf->addr;
4041 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4042 
 
4043 
  {
4044 
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4045 
    OPRND (dr) = opval;
4046 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4047 
  }
4048 
 
4049 
#undef OPRND
4050 
#undef FLD
4051 
}
4052 
  NEXT (vpc);
4053 
 
4054 
CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4055 
  {
4056 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4057 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4058 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4059 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4060 
    int UNUSED written = abuf->written;
4061 
    IADDR UNUSED pc = abuf->addr;
4062 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4063 
 
4064 
  * FLD (i_dr) = OPRND (dr);
4065 
 
4066 
#undef OPRND
4067 
#undef FLD
4068 
  }
4069 
  NEXT (vpc);
4070 
 
4071 
  CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4072 
{
4073 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4074 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4075 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4076 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4077 
  int UNUSED written = 0;
4078 
  IADDR UNUSED pc = abuf->addr;
4079 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4080 
 
4081 
  {
4082 
    SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4083 
    OPRND (dr) = opval;
4084 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4085 
  }
4086 
 
4087 
#undef OPRND
4088 
#undef FLD
4089 
}
4090 
  NEXT (vpc);
4091 
 
4092 
CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4093 
  {
4094 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4095 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4096 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4097 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4098 
    int UNUSED written = abuf->written;
4099 
    IADDR UNUSED pc = abuf->addr;
4100 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4101 
 
4102 
  * FLD (i_dr) = OPRND (dr);
4103 
 
4104 
#undef OPRND
4105 
#undef FLD
4106 
  }
4107 
  NEXT (vpc);
4108 
 
4109 
  CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4110 
{
4111 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4112 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4113 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4114 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4115 
  int UNUSED written = 0;
4116 
  IADDR UNUSED pc = abuf->addr;
4117 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4118 
 
4119 
  {
4120 
    SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4121 
    OPRND (dr) = opval;
4122 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4123 
  }
4124 
 
4125 
#undef OPRND
4126 
#undef FLD
4127 
}
4128 
  NEXT (vpc);
4129 
 
4130 
CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4131 
  {
4132 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4133 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4134 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4135 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4136 
    int UNUSED written = abuf->written;
4137 
    IADDR UNUSED pc = abuf->addr;
4138 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4139 
 
4140 
  * FLD (i_dr) = OPRND (dr);
4141 
 
4142 
#undef OPRND
4143 
#undef FLD
4144 
  }
4145 
  NEXT (vpc);
4146 
 
4147 
  CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4148 
{
4149 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4150 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4151 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4152 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4153 
  int UNUSED written = 0;
4154 
  IADDR UNUSED pc = abuf->addr;
4155 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4156 
 
4157 
  {
4158 
    SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4159 
    OPRND (dr) = opval;
4160 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4161 
  }
4162 
 
4163 
#undef OPRND
4164 
#undef FLD
4165 
}
4166 
  NEXT (vpc);
4167 
 
4168 
CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4169 
  {
4170 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4171 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4172 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4173 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4174 
    int UNUSED written = abuf->written;
4175 
    IADDR UNUSED pc = abuf->addr;
4176 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4177 
 
4178 
  * FLD (i_dr) = OPRND (dr);
4179 
 
4180 
#undef OPRND
4181 
#undef FLD
4182 
  }
4183 
  NEXT (vpc);
4184 
 
4185 
  CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4186 
{
4187 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4188 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4189 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4190 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4191 
  int UNUSED written = 0;
4192 
  IADDR UNUSED pc = abuf->addr;
4193 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4194 
 
4195 
  {
4196 
    SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4197 
    OPRND (dr) = opval;
4198 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4199 
  }
4200 
 
4201 
#undef OPRND
4202 
#undef FLD
4203 
}
4204 
  NEXT (vpc);
4205 
 
4206 
CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4207 
  {
4208 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4209 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4210 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4211 
#define OPRND(f) par_exec->operands.sfmt_ld.f
4212 
    int UNUSED written = abuf->written;
4213 
    IADDR UNUSED pc = abuf->addr;
4214 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4215 
 
4216 
  * FLD (i_dr) = OPRND (dr);
4217 
 
4218 
#undef OPRND
4219 
#undef FLD
4220 
  }
4221 
  NEXT (vpc);
4222 
 
4223 
  CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4224 
{
4225 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4226 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4227 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4228 
#define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4229 
  int UNUSED written = 0;
4230 
  IADDR UNUSED pc = abuf->addr;
4231 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4232 
 
4233 
{
4234 
  SI temp0;SI temp1;
4235 
  temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4236 
  temp1 = ADDSI (* FLD (i_sr), 4);
4237 
  {
4238 
    SI opval = temp0;
4239 
    OPRND (dr) = opval;
4240 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4241 
  }
4242 
  {
4243 
    SI opval = temp1;
4244 
    OPRND (sr) = opval;
4245 
    TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
4246 
  }
4247 
}
4248 
 
4249 
#undef OPRND
4250 
#undef FLD
4251 
}
4252 
  NEXT (vpc);
4253 
 
4254 
CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4255 
  {
4256 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4257 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4258 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4259 
#define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4260 
    int UNUSED written = abuf->written;
4261 
    IADDR UNUSED pc = abuf->addr;
4262 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4263 
 
4264 
  * FLD (i_dr) = OPRND (dr);
4265 
  * FLD (i_sr) = OPRND (sr);
4266 
 
4267 
#undef OPRND
4268 
#undef FLD
4269 
  }
4270 
  NEXT (vpc);
4271 
 
4272 
  CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4273 
{
4274 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4275 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4276 
#define FLD(f) abuf->fields.sfmt_addi.f
4277 
#define OPRND(f) par_exec->operands.sfmt_ldi8.f
4278 
  int UNUSED written = 0;
4279 
  IADDR UNUSED pc = abuf->addr;
4280 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4281 
 
4282 
  {
4283 
    SI opval = FLD (f_simm8);
4284 
    OPRND (dr) = opval;
4285 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4286 
  }
4287 
 
4288 
#undef OPRND
4289 
#undef FLD
4290 
}
4291 
  NEXT (vpc);
4292 
 
4293 
CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4294 
  {
4295 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4296 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4297 
#define FLD(f) abuf->fields.sfmt_addi.f
4298 
#define OPRND(f) par_exec->operands.sfmt_ldi8.f
4299 
    int UNUSED written = abuf->written;
4300 
    IADDR UNUSED pc = abuf->addr;
4301 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4302 
 
4303 
  * FLD (i_dr) = OPRND (dr);
4304 
 
4305 
#undef OPRND
4306 
#undef FLD
4307 
  }
4308 
  NEXT (vpc);
4309 
 
4310 
  CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4311 
{
4312 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4313 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4314 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4315 
#define OPRND(f) par_exec->operands.sfmt_lock.f
4316 
  int UNUSED written = 0;
4317 
  IADDR UNUSED pc = abuf->addr;
4318 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4319 
 
4320 
{
4321 
  {
4322 
    BI opval = 1;
4323 
    OPRND (h_lock) = opval;
4324 
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
4325 
  }
4326 
  {
4327 
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4328 
    OPRND (dr) = opval;
4329 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4330 
  }
4331 
}
4332 
 
4333 
#undef OPRND
4334 
#undef FLD
4335 
}
4336 
  NEXT (vpc);
4337 
 
4338 
CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4339 
  {
4340 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4341 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4342 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4343 
#define OPRND(f) par_exec->operands.sfmt_lock.f
4344 
    int UNUSED written = abuf->written;
4345 
    IADDR UNUSED pc = abuf->addr;
4346 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4347 
 
4348 
  * FLD (i_dr) = OPRND (dr);
4349 
  CPU (h_lock) = OPRND (h_lock);
4350 
 
4351 
#undef OPRND
4352 
#undef FLD
4353 
  }
4354 
  NEXT (vpc);
4355 
 
4356 
  CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4357 
{
4358 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4359 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4360 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4361 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4362 
  int UNUSED written = 0;
4363 
  IADDR UNUSED pc = abuf->addr;
4364 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4365 
 
4366 
  {
4367 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4368 
    OPRND (acc) = opval;
4369 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4370 
  }
4371 
 
4372 
#undef OPRND
4373 
#undef FLD
4374 
}
4375 
  NEXT (vpc);
4376 
 
4377 
CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4378 
  {
4379 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4380 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4381 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4382 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4383 
    int UNUSED written = abuf->written;
4384 
    IADDR UNUSED pc = abuf->addr;
4385 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4386 
 
4387 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4388 
 
4389 
#undef OPRND
4390 
#undef FLD
4391 
  }
4392 
  NEXT (vpc);
4393 
 
4394 
  CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4395 
{
4396 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4397 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4398 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4399 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4400 
  int UNUSED written = 0;
4401 
  IADDR UNUSED pc = abuf->addr;
4402 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4403 
 
4404 
  {
4405 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4406 
    OPRND (acc) = opval;
4407 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4408 
  }
4409 
 
4410 
#undef OPRND
4411 
#undef FLD
4412 
}
4413 
  NEXT (vpc);
4414 
 
4415 
CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4416 
  {
4417 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4418 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4419 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4420 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4421 
    int UNUSED written = abuf->written;
4422 
    IADDR UNUSED pc = abuf->addr;
4423 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4424 
 
4425 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4426 
 
4427 
#undef OPRND
4428 
#undef FLD
4429 
  }
4430 
  NEXT (vpc);
4431 
 
4432 
  CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4433 
{
4434 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4435 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4436 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4437 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4438 
  int UNUSED written = 0;
4439 
  IADDR UNUSED pc = abuf->addr;
4440 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4441 
 
4442 
  {
4443 
    DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4444 
    OPRND (acc) = opval;
4445 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4446 
  }
4447 
 
4448 
#undef OPRND
4449 
#undef FLD
4450 
}
4451 
  NEXT (vpc);
4452 
 
4453 
CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4454 
  {
4455 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4456 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4457 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4458 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4459 
    int UNUSED written = abuf->written;
4460 
    IADDR UNUSED pc = abuf->addr;
4461 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4462 
 
4463 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4464 
 
4465 
#undef OPRND
4466 
#undef FLD
4467 
  }
4468 
  NEXT (vpc);
4469 
 
4470 
  CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4471 
{
4472 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4473 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4474 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4475 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4476 
  int UNUSED written = 0;
4477 
  IADDR UNUSED pc = abuf->addr;
4478 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4479 
 
4480 
  {
4481 
    DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4482 
    OPRND (acc) = opval;
4483 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4484 
  }
4485 
 
4486 
#undef OPRND
4487 
#undef FLD
4488 
}
4489 
  NEXT (vpc);
4490 
 
4491 
CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4492 
  {
4493 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4494 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4495 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4496 
#define OPRND(f) par_exec->operands.sfmt_machi_a.f
4497 
    int UNUSED written = abuf->written;
4498 
    IADDR UNUSED pc = abuf->addr;
4499 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4500 
 
4501 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4502 
 
4503 
#undef OPRND
4504 
#undef FLD
4505 
  }
4506 
  NEXT (vpc);
4507 
 
4508 
  CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4509 
{
4510 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4511 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4512 
#define FLD(f) abuf->fields.sfmt_add.f
4513 
#define OPRND(f) par_exec->operands.sfmt_add.f
4514 
  int UNUSED written = 0;
4515 
  IADDR UNUSED pc = abuf->addr;
4516 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4517 
 
4518 
  {
4519 
    SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4520 
    OPRND (dr) = opval;
4521 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4522 
  }
4523 
 
4524 
#undef OPRND
4525 
#undef FLD
4526 
}
4527 
  NEXT (vpc);
4528 
 
4529 
CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4530 
  {
4531 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4532 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4533 
#define FLD(f) abuf->fields.sfmt_add.f
4534 
#define OPRND(f) par_exec->operands.sfmt_add.f
4535 
    int UNUSED written = abuf->written;
4536 
    IADDR UNUSED pc = abuf->addr;
4537 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4538 
 
4539 
  * FLD (i_dr) = OPRND (dr);
4540 
 
4541 
#undef OPRND
4542 
#undef FLD
4543 
  }
4544 
  NEXT (vpc);
4545 
 
4546 
  CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4547 
{
4548 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4549 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4550 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4551 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4552 
  int UNUSED written = 0;
4553 
  IADDR UNUSED pc = abuf->addr;
4554 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4555 
 
4556 
  {
4557 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4558 
    OPRND (acc) = opval;
4559 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4560 
  }
4561 
 
4562 
#undef OPRND
4563 
#undef FLD
4564 
}
4565 
  NEXT (vpc);
4566 
 
4567 
CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4568 
  {
4569 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4570 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4571 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4572 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4573 
    int UNUSED written = abuf->written;
4574 
    IADDR UNUSED pc = abuf->addr;
4575 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4576 
 
4577 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4578 
 
4579 
#undef OPRND
4580 
#undef FLD
4581 
  }
4582 
  NEXT (vpc);
4583 
 
4584 
  CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4585 
{
4586 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4587 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4588 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4589 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4590 
  int UNUSED written = 0;
4591 
  IADDR UNUSED pc = abuf->addr;
4592 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4593 
 
4594 
  {
4595 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4596 
    OPRND (acc) = opval;
4597 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4598 
  }
4599 
 
4600 
#undef OPRND
4601 
#undef FLD
4602 
}
4603 
  NEXT (vpc);
4604 
 
4605 
CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4606 
  {
4607 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4608 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4609 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4610 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4611 
    int UNUSED written = abuf->written;
4612 
    IADDR UNUSED pc = abuf->addr;
4613 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4614 
 
4615 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4616 
 
4617 
#undef OPRND
4618 
#undef FLD
4619 
  }
4620 
  NEXT (vpc);
4621 
 
4622 
  CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4623 
{
4624 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4625 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4626 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4627 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4628 
  int UNUSED written = 0;
4629 
  IADDR UNUSED pc = abuf->addr;
4630 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4631 
 
4632 
  {
4633 
    DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4634 
    OPRND (acc) = opval;
4635 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4636 
  }
4637 
 
4638 
#undef OPRND
4639 
#undef FLD
4640 
}
4641 
  NEXT (vpc);
4642 
 
4643 
CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4644 
  {
4645 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4646 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4647 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4648 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4649 
    int UNUSED written = abuf->written;
4650 
    IADDR UNUSED pc = abuf->addr;
4651 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4652 
 
4653 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4654 
 
4655 
#undef OPRND
4656 
#undef FLD
4657 
  }
4658 
  NEXT (vpc);
4659 
 
4660 
  CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4661 
{
4662 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4663 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4664 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4665 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4666 
  int UNUSED written = 0;
4667 
  IADDR UNUSED pc = abuf->addr;
4668 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4669 
 
4670 
  {
4671 
    DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
4672 
    OPRND (acc) = opval;
4673 
    TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4674 
  }
4675 
 
4676 
#undef OPRND
4677 
#undef FLD
4678 
}
4679 
  NEXT (vpc);
4680 
 
4681 
CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4682 
  {
4683 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4684 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4685 
#define FLD(f) abuf->fields.sfmt_machi_a.f
4686 
#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4687 
    int UNUSED written = abuf->written;
4688 
    IADDR UNUSED pc = abuf->addr;
4689 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4690 
 
4691 
  SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4692 
 
4693 
#undef OPRND
4694 
#undef FLD
4695 
  }
4696 
  NEXT (vpc);
4697 
 
4698 
  CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
4699 
{
4700 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4701 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4702 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4703 
#define OPRND(f) par_exec->operands.sfmt_mv.f
4704 
  int UNUSED written = 0;
4705 
  IADDR UNUSED pc = abuf->addr;
4706 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4707 
 
4708 
  {
4709 
    SI opval = * FLD (i_sr);
4710 
    OPRND (dr) = opval;
4711 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4712 
  }
4713 
 
4714 
#undef OPRND
4715 
#undef FLD
4716 
}
4717 
  NEXT (vpc);
4718 
 
4719 
CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
4720 
  {
4721 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4722 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4723 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
4724 
#define OPRND(f) par_exec->operands.sfmt_mv.f
4725 
    int UNUSED written = abuf->written;
4726 
    IADDR UNUSED pc = abuf->addr;
4727 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4728 
 
4729 
  * FLD (i_dr) = OPRND (dr);
4730 
 
4731 
#undef OPRND
4732 
#undef FLD
4733 
  }
4734 
  NEXT (vpc);
4735 
 
4736 
  CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
4737 
{
4738 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4739 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4740 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4741 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4742 
  int UNUSED written = 0;
4743 
  IADDR UNUSED pc = abuf->addr;
4744 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4745 
 
4746 
  {
4747 
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
4748 
    OPRND (dr) = opval;
4749 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4750 
  }
4751 
 
4752 
#undef OPRND
4753 
#undef FLD
4754 
}
4755 
  NEXT (vpc);
4756 
 
4757 
CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
4758 
  {
4759 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4760 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4761 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4762 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4763 
    int UNUSED written = abuf->written;
4764 
    IADDR UNUSED pc = abuf->addr;
4765 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4766 
 
4767 
  * FLD (i_dr) = OPRND (dr);
4768 
 
4769 
#undef OPRND
4770 
#undef FLD
4771 
  }
4772 
  NEXT (vpc);
4773 
 
4774 
  CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
4775 
{
4776 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4777 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4778 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4779 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4780 
  int UNUSED written = 0;
4781 
  IADDR UNUSED pc = abuf->addr;
4782 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4783 
 
4784 
  {
4785 
    SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
4786 
    OPRND (dr) = opval;
4787 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4788 
  }
4789 
 
4790 
#undef OPRND
4791 
#undef FLD
4792 
}
4793 
  NEXT (vpc);
4794 
 
4795 
CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
4796 
  {
4797 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4798 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4799 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4800 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4801 
    int UNUSED written = abuf->written;
4802 
    IADDR UNUSED pc = abuf->addr;
4803 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4804 
 
4805 
  * FLD (i_dr) = OPRND (dr);
4806 
 
4807 
#undef OPRND
4808 
#undef FLD
4809 
  }
4810 
  NEXT (vpc);
4811 
 
4812 
  CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
4813 
{
4814 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4815 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4816 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4817 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4818 
  int UNUSED written = 0;
4819 
  IADDR UNUSED pc = abuf->addr;
4820 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4821 
 
4822 
  {
4823 
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
4824 
    OPRND (dr) = opval;
4825 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4826 
  }
4827 
 
4828 
#undef OPRND
4829 
#undef FLD
4830 
}
4831 
  NEXT (vpc);
4832 
 
4833 
CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
4834 
  {
4835 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4836 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4837 
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4838 
#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4839 
    int UNUSED written = abuf->written;
4840 
    IADDR UNUSED pc = abuf->addr;
4841 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4842 
 
4843 
  * FLD (i_dr) = OPRND (dr);
4844 
 
4845 
#undef OPRND
4846 
#undef FLD
4847 
  }
4848 
  NEXT (vpc);
4849 
 
4850 
  CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
4851 
{
4852 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4853 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4854 
#define FLD(f) abuf->fields.sfmt_mvfc.f
4855 
#define OPRND(f) par_exec->operands.sfmt_mvfc.f
4856 
  int UNUSED written = 0;
4857 
  IADDR UNUSED pc = abuf->addr;
4858 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4859 
 
4860 
  {
4861 
    SI opval = GET_H_CR (FLD (f_r2));
4862 
    OPRND (dr) = opval;
4863 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4864 
  }
4865 
 
4866 
#undef OPRND
4867 
#undef FLD
4868 
}
4869 
  NEXT (vpc);
4870 
 
4871 
CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
4872 
  {
4873 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4874 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4875 
#define FLD(f) abuf->fields.sfmt_mvfc.f
4876 
#define OPRND(f) par_exec->operands.sfmt_mvfc.f
4877 
    int UNUSED written = abuf->written;
4878 
    IADDR UNUSED pc = abuf->addr;
4879 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4880 
 
4881 
  * FLD (i_dr) = OPRND (dr);
4882 
 
4883 
#undef OPRND
4884 
#undef FLD
4885 
  }
4886 
  NEXT (vpc);
4887 
 
4888 
  CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
4889 
{
4890 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4891 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4892 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4893 
#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4894 
  int UNUSED written = 0;
4895 
  IADDR UNUSED pc = abuf->addr;
4896 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4897 
 
4898 
  {
4899 
    DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
4900 
    OPRND (accs) = opval;
4901 
    TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
4902 
  }
4903 
 
4904 
#undef OPRND
4905 
#undef FLD
4906 
}
4907 
  NEXT (vpc);
4908 
 
4909 
CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
4910 
  {
4911 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4912 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4913 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4914 
#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4915 
    int UNUSED written = abuf->written;
4916 
    IADDR UNUSED pc = abuf->addr;
4917 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4918 
 
4919 
  SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
4920 
 
4921 
#undef OPRND
4922 
#undef FLD
4923 
  }
4924 
  NEXT (vpc);
4925 
 
4926 
  CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
4927 
{
4928 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4929 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4930 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4931 
#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4932 
  int UNUSED written = 0;
4933 
  IADDR UNUSED pc = abuf->addr;
4934 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4935 
 
4936 
  {
4937 
    DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
4938 
    OPRND (accs) = opval;
4939 
    TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
4940 
  }
4941 
 
4942 
#undef OPRND
4943 
#undef FLD
4944 
}
4945 
  NEXT (vpc);
4946 
 
4947 
CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
4948 
  {
4949 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4950 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4951 
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4952 
#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4953 
    int UNUSED written = abuf->written;
4954 
    IADDR UNUSED pc = abuf->addr;
4955 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4956 
 
4957 
  SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
4958 
 
4959 
#undef OPRND
4960 
#undef FLD
4961 
  }
4962 
  NEXT (vpc);
4963 
 
4964 
  CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
4965 
{
4966 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4967 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4968 
#define FLD(f) abuf->fields.sfmt_mvtc.f
4969 
#define OPRND(f) par_exec->operands.sfmt_mvtc.f
4970 
  int UNUSED written = 0;
4971 
  IADDR UNUSED pc = abuf->addr;
4972 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4973 
 
4974 
  {
4975 
    USI opval = * FLD (i_sr);
4976 
    OPRND (dcr) = opval;
4977 
    TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
4978 
  }
4979 
 
4980 
#undef OPRND
4981 
#undef FLD
4982 
}
4983 
  NEXT (vpc);
4984 
 
4985 
CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
4986 
  {
4987 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4988 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4989 
#define FLD(f) abuf->fields.sfmt_mvtc.f
4990 
#define OPRND(f) par_exec->operands.sfmt_mvtc.f
4991 
    int UNUSED written = abuf->written;
4992 
    IADDR UNUSED pc = abuf->addr;
4993 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4994 
 
4995 
  SET_H_CR (FLD (f_r1), OPRND (dcr));
4996 
 
4997 
#undef OPRND
4998 
#undef FLD
4999 
  }
5000 
  NEXT (vpc);
5001 
 
5002 
  CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5003 
{
5004 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5005 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5006 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5007 
#define OPRND(f) par_exec->operands.sfmt_mv.f
5008 
  int UNUSED written = 0;
5009 
  IADDR UNUSED pc = abuf->addr;
5010 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5011 
 
5012 
  {
5013 
    SI opval = NEGSI (* FLD (i_sr));
5014 
    OPRND (dr) = opval;
5015 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5016 
  }
5017 
 
5018 
#undef OPRND
5019 
#undef FLD
5020 
}
5021 
  NEXT (vpc);
5022 
 
5023 
CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5024 
  {
5025 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5026 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5027 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5028 
#define OPRND(f) par_exec->operands.sfmt_mv.f
5029 
    int UNUSED written = abuf->written;
5030 
    IADDR UNUSED pc = abuf->addr;
5031 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5032 
 
5033 
  * FLD (i_dr) = OPRND (dr);
5034 
 
5035 
#undef OPRND
5036 
#undef FLD
5037 
  }
5038 
  NEXT (vpc);
5039 
 
5040 
  CASE (sem, INSN_PAR_NOP) : /* nop */
5041 
{
5042 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5043 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5044 
#define FLD(f) abuf->fields.fmt_empty.f
5045 
#define OPRND(f) par_exec->operands.sfmt_nop.f
5046 
  int UNUSED written = 0;
5047 
  IADDR UNUSED pc = abuf->addr;
5048 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5049 
 
5050 
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5051 
 
5052 
#undef OPRND
5053 
#undef FLD
5054 
}
5055 
  NEXT (vpc);
5056 
 
5057 
CASE (sem, INSN_WRITE_NOP) : /* nop */
5058 
  {
5059 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5060 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5061 
#define FLD(f) abuf->fields.fmt_empty.f
5062 
#define OPRND(f) par_exec->operands.sfmt_nop.f
5063 
    int UNUSED written = abuf->written;
5064 
    IADDR UNUSED pc = abuf->addr;
5065 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5066 
 
5067 
 
5068 
#undef OPRND
5069 
#undef FLD
5070 
  }
5071 
  NEXT (vpc);
5072 
 
5073 
  CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5074 
{
5075 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5076 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5077 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5078 
#define OPRND(f) par_exec->operands.sfmt_mv.f
5079 
  int UNUSED written = 0;
5080 
  IADDR UNUSED pc = abuf->addr;
5081 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5082 
 
5083 
  {
5084 
    SI opval = INVSI (* FLD (i_sr));
5085 
    OPRND (dr) = opval;
5086 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5087 
  }
5088 
 
5089 
#undef OPRND
5090 
#undef FLD
5091 
}
5092 
  NEXT (vpc);
5093 
 
5094 
CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5095 
  {
5096 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5097 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5098 
#define FLD(f) abuf->fields.sfmt_ld_plus.f
5099 
#define OPRND(f) par_exec->operands.sfmt_mv.f
5100 
    int UNUSED written = abuf->written;
5101 
    IADDR UNUSED pc = abuf->addr;
5102 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5103 
 
5104 
  * FLD (i_dr) = OPRND (dr);
5105 
 
5106 
#undef OPRND
5107 
#undef FLD
5108 
  }
5109 
  NEXT (vpc);
5110 
 
5111 
  CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5112 
{
5113 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5114 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5115 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5116 
#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5117 
  int UNUSED written = 0;
5118 
  IADDR UNUSED pc = abuf->addr;
5119 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5120 
 
5121 
{
5122 
  DI tmp_tmp1;
5123 
  tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5124 
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5125 
  {
5126 
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5127 
    OPRND (accd) = opval;
5128 
    TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
5129 
  }
5130 
}
5131 
 
5132 
#undef OPRND
5133 
#undef FLD
5134 
}
5135 
  NEXT (vpc);
5136 
 
5137 
CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5138 
  {
5139 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5140 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5141 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5142 
#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5143 
    int UNUSED written = abuf->written;
5144 
    IADDR UNUSED pc = abuf->addr;
5145 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5146 
 
5147 
  SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5148 
 
5149 
#undef OPRND
5150 
#undef FLD
5151 
  }
5152 
  NEXT (vpc);
5153 
 
5154 
  CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5155 
{
5156 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5157 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5158 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5159 
#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5160 
  int UNUSED written = 0;
5161 
  IADDR UNUSED pc = abuf->addr;
5162 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5163 
 
5164 
{
5165 
  DI tmp_tmp1;
5166 
  tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5167 
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5168 
  {
5169 
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5170 
    OPRND (accd) = opval;
5171 
    TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
5172 
  }
5173 
}
5174 
 
5175 
#undef OPRND
5176 
#undef FLD
5177 
}
5178 
  NEXT (vpc);
5179 
 
5180 
CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5181 
  {
5182 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5183 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5184 
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
5185 
#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5186 
    int UNUSED written = abuf->written;
5187 
    IADDR UNUSED pc = abuf->addr;
5188 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5189 
 
5190 
  SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5191 
 
5192 
#undef OPRND
5193 
#undef FLD
5194 
  }
5195 
  NEXT (vpc);
5196 
 
5197 
  CASE (sem, INSN_PAR_RTE) : /* rte */
5198 
{
5199 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5200 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5201 
#define FLD(f) abuf->fields.fmt_empty.f
5202 
#define OPRND(f) par_exec->operands.sfmt_rte.f
5203 
  int UNUSED written = 0;
5204 
  IADDR UNUSED pc = abuf->addr;
5205 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5206 
 
5207 
{
5208 
  {
5209 
    USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
5210 
    OPRND (pc) = opval;
5211 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5212 
  }
5213 
  {
5214 
    USI opval = GET_H_CR (((UINT) 14));
5215 
    OPRND (h_cr_6) = opval;
5216 
    TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
5217 
  }
5218 
  {
5219 
    UQI opval = CPU (h_bpsw);
5220 
    OPRND (h_psw) = opval;
5221 
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5222 
  }
5223 
  {
5224 
    UQI opval = CPU (h_bbpsw);
5225 
    OPRND (h_bpsw) = opval;
5226 
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5227 
  }
5228 
}
5229 
 
5230 
#undef OPRND
5231 
#undef FLD
5232 
}
5233 
  NEXT (vpc);
5234 
 
5235 
CASE (sem, INSN_WRITE_RTE) : /* rte */
5236 
  {
5237 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5238 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5239 
#define FLD(f) abuf->fields.fmt_empty.f
5240 
#define OPRND(f) par_exec->operands.sfmt_rte.f
5241 
    int UNUSED written = abuf->written;
5242 
    IADDR UNUSED pc = abuf->addr;
5243 
    SEM_BRANCH_INIT
5244 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5245 
 
5246 
  CPU (h_bpsw) = OPRND (h_bpsw);
5247 
  SET_H_CR (((UINT) 6), OPRND (h_cr_6));
5248 
  SET_H_PSW (OPRND (h_psw));
5249 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5250 
 
5251 
  SEM_BRANCH_FINI (vpc);
5252 
#undef OPRND
5253 
#undef FLD
5254 
  }
5255 
  NEXT (vpc);
5256 
 
5257 
  CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5258 
{
5259 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5260 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5261 
#define FLD(f) abuf->fields.sfmt_add.f
5262 
#define OPRND(f) par_exec->operands.sfmt_add.f
5263 
  int UNUSED written = 0;
5264 
  IADDR UNUSED pc = abuf->addr;
5265 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5266 
 
5267 
  {
5268 
    SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5269 
    OPRND (dr) = opval;
5270 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5271 
  }
5272 
 
5273 
#undef OPRND
5274 
#undef FLD
5275 
}
5276 
  NEXT (vpc);
5277 
 
5278 
CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5279 
  {
5280 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5281 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5282 
#define FLD(f) abuf->fields.sfmt_add.f
5283 
#define OPRND(f) par_exec->operands.sfmt_add.f
5284 
    int UNUSED written = abuf->written;
5285 
    IADDR UNUSED pc = abuf->addr;
5286 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5287 
 
5288 
  * FLD (i_dr) = OPRND (dr);
5289 
 
5290 
#undef OPRND
5291 
#undef FLD
5292 
  }
5293 
  NEXT (vpc);
5294 
 
5295 
  CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5296 
{
5297 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5298 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5299 
#define FLD(f) abuf->fields.sfmt_slli.f
5300 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5301 
  int UNUSED written = 0;
5302 
  IADDR UNUSED pc = abuf->addr;
5303 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5304 
 
5305 
  {
5306 
    SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5307 
    OPRND (dr) = opval;
5308 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5309 
  }
5310 
 
5311 
#undef OPRND
5312 
#undef FLD
5313 
}
5314 
  NEXT (vpc);
5315 
 
5316 
CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5317 
  {
5318 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5319 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5320 
#define FLD(f) abuf->fields.sfmt_slli.f
5321 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5322 
    int UNUSED written = abuf->written;
5323 
    IADDR UNUSED pc = abuf->addr;
5324 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5325 
 
5326 
  * FLD (i_dr) = OPRND (dr);
5327 
 
5328 
#undef OPRND
5329 
#undef FLD
5330 
  }
5331 
  NEXT (vpc);
5332 
 
5333 
  CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5334 
{
5335 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5336 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5337 
#define FLD(f) abuf->fields.sfmt_add.f
5338 
#define OPRND(f) par_exec->operands.sfmt_add.f
5339 
  int UNUSED written = 0;
5340 
  IADDR UNUSED pc = abuf->addr;
5341 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5342 
 
5343 
  {
5344 
    SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5345 
    OPRND (dr) = opval;
5346 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5347 
  }
5348 
 
5349 
#undef OPRND
5350 
#undef FLD
5351 
}
5352 
  NEXT (vpc);
5353 
 
5354 
CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5355 
  {
5356 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5357 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5358 
#define FLD(f) abuf->fields.sfmt_add.f
5359 
#define OPRND(f) par_exec->operands.sfmt_add.f
5360 
    int UNUSED written = abuf->written;
5361 
    IADDR UNUSED pc = abuf->addr;
5362 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5363 
 
5364 
  * FLD (i_dr) = OPRND (dr);
5365 
 
5366 
#undef OPRND
5367 
#undef FLD
5368 
  }
5369 
  NEXT (vpc);
5370 
 
5371 
  CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5372 
{
5373 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5374 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5375 
#define FLD(f) abuf->fields.sfmt_slli.f
5376 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5377 
  int UNUSED written = 0;
5378 
  IADDR UNUSED pc = abuf->addr;
5379 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5380 
 
5381 
  {
5382 
    SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5383 
    OPRND (dr) = opval;
5384 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5385 
  }
5386 
 
5387 
#undef OPRND
5388 
#undef FLD
5389 
}
5390 
  NEXT (vpc);
5391 
 
5392 
CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5393 
  {
5394 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5395 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5396 
#define FLD(f) abuf->fields.sfmt_slli.f
5397 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5398 
    int UNUSED written = abuf->written;
5399 
    IADDR UNUSED pc = abuf->addr;
5400 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5401 
 
5402 
  * FLD (i_dr) = OPRND (dr);
5403 
 
5404 
#undef OPRND
5405 
#undef FLD
5406 
  }
5407 
  NEXT (vpc);
5408 
 
5409 
  CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5410 
{
5411 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5412 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5413 
#define FLD(f) abuf->fields.sfmt_add.f
5414 
#define OPRND(f) par_exec->operands.sfmt_add.f
5415 
  int UNUSED written = 0;
5416 
  IADDR UNUSED pc = abuf->addr;
5417 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5418 
 
5419 
  {
5420 
    SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5421 
    OPRND (dr) = opval;
5422 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5423 
  }
5424 
 
5425 
#undef OPRND
5426 
#undef FLD
5427 
}
5428 
  NEXT (vpc);
5429 
 
5430 
CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5431 
  {
5432 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5433 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5434 
#define FLD(f) abuf->fields.sfmt_add.f
5435 
#define OPRND(f) par_exec->operands.sfmt_add.f
5436 
    int UNUSED written = abuf->written;
5437 
    IADDR UNUSED pc = abuf->addr;
5438 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5439 
 
5440 
  * FLD (i_dr) = OPRND (dr);
5441 
 
5442 
#undef OPRND
5443 
#undef FLD
5444 
  }
5445 
  NEXT (vpc);
5446 
 
5447 
  CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5448 
{
5449 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5450 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5451 
#define FLD(f) abuf->fields.sfmt_slli.f
5452 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5453 
  int UNUSED written = 0;
5454 
  IADDR UNUSED pc = abuf->addr;
5455 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5456 
 
5457 
  {
5458 
    SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5459 
    OPRND (dr) = opval;
5460 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5461 
  }
5462 
 
5463 
#undef OPRND
5464 
#undef FLD
5465 
}
5466 
  NEXT (vpc);
5467 
 
5468 
CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5469 
  {
5470 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5471 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5472 
#define FLD(f) abuf->fields.sfmt_slli.f
5473 
#define OPRND(f) par_exec->operands.sfmt_slli.f
5474 
    int UNUSED written = abuf->written;
5475 
    IADDR UNUSED pc = abuf->addr;
5476 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5477 
 
5478 
  * FLD (i_dr) = OPRND (dr);
5479 
 
5480 
#undef OPRND
5481 
#undef FLD
5482 
  }
5483 
  NEXT (vpc);
5484 
 
5485 
  CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5486 
{
5487 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5488 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5489 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5490 
#define OPRND(f) par_exec->operands.sfmt_st.f
5491 
  int UNUSED written = 0;
5492 
  IADDR UNUSED pc = abuf->addr;
5493 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5494 
 
5495 
  {
5496 
    SI opval = * FLD (i_src1);
5497 
    OPRND (h_memory_src2_idx) = * FLD (i_src2);
5498 
    OPRND (h_memory_src2) = opval;
5499 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5500 
  }
5501 
 
5502 
#undef OPRND
5503 
#undef FLD
5504 
}
5505 
  NEXT (vpc);
5506 
 
5507 
CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5508 
  {
5509 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5510 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5511 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5512 
#define OPRND(f) par_exec->operands.sfmt_st.f
5513 
    int UNUSED written = abuf->written;
5514 
    IADDR UNUSED pc = abuf->addr;
5515 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5516 
 
5517 
  SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5518 
 
5519 
#undef OPRND
5520 
#undef FLD
5521 
  }
5522 
  NEXT (vpc);
5523 
 
5524 
  CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5525 
{
5526 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5527 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5528 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5529 
#define OPRND(f) par_exec->operands.sfmt_stb.f
5530 
  int UNUSED written = 0;
5531 
  IADDR UNUSED pc = abuf->addr;
5532 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5533 
 
5534 
  {
5535 
    QI opval = * FLD (i_src1);
5536 
    OPRND (h_memory_src2_idx) = * FLD (i_src2);
5537 
    OPRND (h_memory_src2) = opval;
5538 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5539 
  }
5540 
 
5541 
#undef OPRND
5542 
#undef FLD
5543 
}
5544 
  NEXT (vpc);
5545 
 
5546 
CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5547 
  {
5548 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5549 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5550 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5551 
#define OPRND(f) par_exec->operands.sfmt_stb.f
5552 
    int UNUSED written = abuf->written;
5553 
    IADDR UNUSED pc = abuf->addr;
5554 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5555 
 
5556 
  SETMEMQI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5557 
 
5558 
#undef OPRND
5559 
#undef FLD
5560 
  }
5561 
  NEXT (vpc);
5562 
 
5563 
  CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5564 
{
5565 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5566 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5567 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5568 
#define OPRND(f) par_exec->operands.sfmt_sth.f
5569 
  int UNUSED written = 0;
5570 
  IADDR UNUSED pc = abuf->addr;
5571 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5572 
 
5573 
  {
5574 
    HI opval = * FLD (i_src1);
5575 
    OPRND (h_memory_src2_idx) = * FLD (i_src2);
5576 
    OPRND (h_memory_src2) = opval;
5577 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5578 
  }
5579 
 
5580 
#undef OPRND
5581 
#undef FLD
5582 
}
5583 
  NEXT (vpc);
5584 
 
5585 
CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5586 
  {
5587 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5588 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5589 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5590 
#define OPRND(f) par_exec->operands.sfmt_sth.f
5591 
    int UNUSED written = abuf->written;
5592 
    IADDR UNUSED pc = abuf->addr;
5593 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5594 
 
5595 
  SETMEMHI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5596 
 
5597 
#undef OPRND
5598 
#undef FLD
5599 
  }
5600 
  NEXT (vpc);
5601 
 
5602 
  CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5603 
{
5604 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5605 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5606 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5607 
#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5608 
  int UNUSED written = 0;
5609 
  IADDR UNUSED pc = abuf->addr;
5610 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5611 
 
5612 
{
5613 
  SI tmp_new_src2;
5614 
  tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5615 
  {
5616 
    SI opval = * FLD (i_src1);
5617 
    OPRND (h_memory_new_src2_idx) = tmp_new_src2;
5618 
    OPRND (h_memory_new_src2) = opval;
5619 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5620 
  }
5621 
  {
5622 
    SI opval = tmp_new_src2;
5623 
    OPRND (src2) = opval;
5624 
    TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
5625 
  }
5626 
}
5627 
 
5628 
#undef OPRND
5629 
#undef FLD
5630 
}
5631 
  NEXT (vpc);
5632 
 
5633 
CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5634 
  {
5635 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5636 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5637 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5638 
#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5639 
    int UNUSED written = abuf->written;
5640 
    IADDR UNUSED pc = abuf->addr;
5641 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5642 
 
5643 
  SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
5644 
  * FLD (i_src2) = OPRND (src2);
5645 
 
5646 
#undef OPRND
5647 
#undef FLD
5648 
  }
5649 
  NEXT (vpc);
5650 
 
5651 
  CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
5652 
{
5653 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5654 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5655 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5656 
#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5657 
  int UNUSED written = 0;
5658 
  IADDR UNUSED pc = abuf->addr;
5659 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5660 
 
5661 
{
5662 
  SI tmp_new_src2;
5663 
  tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
5664 
  {
5665 
    SI opval = * FLD (i_src1);
5666 
    OPRND (h_memory_new_src2_idx) = tmp_new_src2;
5667 
    OPRND (h_memory_new_src2) = opval;
5668 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5669 
  }
5670 
  {
5671 
    SI opval = tmp_new_src2;
5672 
    OPRND (src2) = opval;
5673 
    TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
5674 
  }
5675 
}
5676 
 
5677 
#undef OPRND
5678 
#undef FLD
5679 
}
5680 
  NEXT (vpc);
5681 
 
5682 
CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
5683 
  {
5684 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5685 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5686 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5687 
#define OPRND(f) par_exec->operands.sfmt_st_plus.f
5688 
    int UNUSED written = abuf->written;
5689 
    IADDR UNUSED pc = abuf->addr;
5690 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5691 
 
5692 
  SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
5693 
  * FLD (i_src2) = OPRND (src2);
5694 
 
5695 
#undef OPRND
5696 
#undef FLD
5697 
  }
5698 
  NEXT (vpc);
5699 
 
5700 
  CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
5701 
{
5702 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5703 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5704 
#define FLD(f) abuf->fields.sfmt_add.f
5705 
#define OPRND(f) par_exec->operands.sfmt_add.f
5706 
  int UNUSED written = 0;
5707 
  IADDR UNUSED pc = abuf->addr;
5708 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5709 
 
5710 
  {
5711 
    SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
5712 
    OPRND (dr) = opval;
5713 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5714 
  }
5715 
 
5716 
#undef OPRND
5717 
#undef FLD
5718 
}
5719 
  NEXT (vpc);
5720 
 
5721 
CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
5722 
  {
5723 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5724 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5725 
#define FLD(f) abuf->fields.sfmt_add.f
5726 
#define OPRND(f) par_exec->operands.sfmt_add.f
5727 
    int UNUSED written = abuf->written;
5728 
    IADDR UNUSED pc = abuf->addr;
5729 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5730 
 
5731 
  * FLD (i_dr) = OPRND (dr);
5732 
 
5733 
#undef OPRND
5734 
#undef FLD
5735 
  }
5736 
  NEXT (vpc);
5737 
 
5738 
  CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
5739 
{
5740 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5741 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5742 
#define FLD(f) abuf->fields.sfmt_add.f
5743 
#define OPRND(f) par_exec->operands.sfmt_addv.f
5744 
  int UNUSED written = 0;
5745 
  IADDR UNUSED pc = abuf->addr;
5746 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5747 
 
5748 
{
5749 
  SI temp0;BI temp1;
5750 
  temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
5751 
  temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
5752 
  {
5753 
    SI opval = temp0;
5754 
    OPRND (dr) = opval;
5755 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5756 
  }
5757 
  {
5758 
    BI opval = temp1;
5759 
    OPRND (condbit) = opval;
5760 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5761 
  }
5762 
}
5763 
 
5764 
#undef OPRND
5765 
#undef FLD
5766 
}
5767 
  NEXT (vpc);
5768 
 
5769 
CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
5770 
  {
5771 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5772 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5773 
#define FLD(f) abuf->fields.sfmt_add.f
5774 
#define OPRND(f) par_exec->operands.sfmt_addv.f
5775 
    int UNUSED written = abuf->written;
5776 
    IADDR UNUSED pc = abuf->addr;
5777 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5778 
 
5779 
  CPU (h_cond) = OPRND (condbit);
5780 
  * FLD (i_dr) = OPRND (dr);
5781 
 
5782 
#undef OPRND
5783 
#undef FLD
5784 
  }
5785 
  NEXT (vpc);
5786 
 
5787 
  CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
5788 
{
5789 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5790 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5791 
#define FLD(f) abuf->fields.sfmt_add.f
5792 
#define OPRND(f) par_exec->operands.sfmt_addx.f
5793 
  int UNUSED written = 0;
5794 
  IADDR UNUSED pc = abuf->addr;
5795 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5796 
 
5797 
{
5798 
  SI temp0;BI temp1;
5799 
  temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
5800 
  temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
5801 
  {
5802 
    SI opval = temp0;
5803 
    OPRND (dr) = opval;
5804 
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5805 
  }
5806 
  {
5807 
    BI opval = temp1;
5808 
    OPRND (condbit) = opval;
5809 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5810 
  }
5811 
}
5812 
 
5813 
#undef OPRND
5814 
#undef FLD
5815 
}
5816 
  NEXT (vpc);
5817 
 
5818 
CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
5819 
  {
5820 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5821 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5822 
#define FLD(f) abuf->fields.sfmt_add.f
5823 
#define OPRND(f) par_exec->operands.sfmt_addx.f
5824 
    int UNUSED written = abuf->written;
5825 
    IADDR UNUSED pc = abuf->addr;
5826 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5827 
 
5828 
  CPU (h_cond) = OPRND (condbit);
5829 
  * FLD (i_dr) = OPRND (dr);
5830 
 
5831 
#undef OPRND
5832 
#undef FLD
5833 
  }
5834 
  NEXT (vpc);
5835 
 
5836 
  CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
5837 
{
5838 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5839 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5840 
#define FLD(f) abuf->fields.sfmt_trap.f
5841 
#define OPRND(f) par_exec->operands.sfmt_trap.f
5842 
  int UNUSED written = 0;
5843 
  IADDR UNUSED pc = abuf->addr;
5844 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5845 
 
5846 
{
5847 
  {
5848 
    USI opval = GET_H_CR (((UINT) 6));
5849 
    OPRND (h_cr_14) = opval;
5850 
    TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
5851 
  }
5852 
  {
5853 
    USI opval = ADDSI (pc, 4);
5854 
    OPRND (h_cr_6) = opval;
5855 
    TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
5856 
  }
5857 
  {
5858 
    UQI opval = CPU (h_bpsw);
5859 
    OPRND (h_bbpsw) = opval;
5860 
    TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
5861 
  }
5862 
  {
5863 
    UQI opval = GET_H_PSW ();
5864 
    OPRND (h_bpsw) = opval;
5865 
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5866 
  }
5867 
  {
5868 
    UQI opval = ANDQI (GET_H_PSW (), 128);
5869 
    OPRND (h_psw) = opval;
5870 
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5871 
  }
5872 
  {
5873 
    SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
5874 
    OPRND (pc) = opval;
5875 
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5876 
  }
5877 
}
5878 
 
5879 
#undef OPRND
5880 
#undef FLD
5881 
}
5882 
  NEXT (vpc);
5883 
 
5884 
CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
5885 
  {
5886 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5887 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5888 
#define FLD(f) abuf->fields.sfmt_trap.f
5889 
#define OPRND(f) par_exec->operands.sfmt_trap.f
5890 
    int UNUSED written = abuf->written;
5891 
    IADDR UNUSED pc = abuf->addr;
5892 
    SEM_BRANCH_INIT
5893 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5894 
 
5895 
  CPU (h_bbpsw) = OPRND (h_bbpsw);
5896 
  CPU (h_bpsw) = OPRND (h_bpsw);
5897 
  SET_H_CR (((UINT) 14), OPRND (h_cr_14));
5898 
  SET_H_CR (((UINT) 6), OPRND (h_cr_6));
5899 
  SET_H_PSW (OPRND (h_psw));
5900 
  SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5901 
 
5902 
  SEM_BRANCH_FINI (vpc);
5903 
#undef OPRND
5904 
#undef FLD
5905 
  }
5906 
  NEXT (vpc);
5907 
 
5908 
  CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
5909 
{
5910 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5911 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5912 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5913 
#define OPRND(f) par_exec->operands.sfmt_unlock.f
5914 
  int UNUSED written = 0;
5915 
  IADDR UNUSED pc = abuf->addr;
5916 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5917 
 
5918 
{
5919 
if (CPU (h_lock)) {
5920 
  {
5921 
    SI opval = * FLD (i_src1);
5922 
    OPRND (h_memory_src2_idx) = * FLD (i_src2);
5923 
    OPRND (h_memory_src2) = opval;
5924 
    written |= (1 << 4);
5925 
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5926 
  }
5927 
}
5928 
  {
5929 
    BI opval = 0;
5930 
    OPRND (h_lock) = opval;
5931 
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
5932 
  }
5933 
}
5934 
 
5935 
  abuf->written = written;
5936 
#undef OPRND
5937 
#undef FLD
5938 
}
5939 
  NEXT (vpc);
5940 
 
5941 
CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
5942 
  {
5943 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5944 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5945 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5946 
#define OPRND(f) par_exec->operands.sfmt_unlock.f
5947 
    int UNUSED written = abuf->written;
5948 
    IADDR UNUSED pc = abuf->addr;
5949 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5950 
 
5951 
  CPU (h_lock) = OPRND (h_lock);
5952 
  if (written & (1 << 4))
5953 
    {
5954 
      SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5955 
    }
5956 
 
5957 
#undef OPRND
5958 
#undef FLD
5959 
  }
5960 
  NEXT (vpc);
5961 
 
5962 
  CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
5963 
{
5964 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5965 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5966 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5967 
#define OPRND(f) par_exec->operands.sfmt_cmpz.f
5968 
  int UNUSED written = 0;
5969 
  IADDR UNUSED pc = abuf->addr;
5970 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5971 
 
5972 
  {
5973 
    BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
5974 
    OPRND (condbit) = opval;
5975 
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5976 
  }
5977 
 
5978 
#undef OPRND
5979 
#undef FLD
5980 
}
5981 
  NEXT (vpc);
5982 
 
5983 
CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
5984 
  {
5985 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5986 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5987 
#define FLD(f) abuf->fields.sfmt_st_plus.f
5988 
#define OPRND(f) par_exec->operands.sfmt_cmpz.f
5989 
    int UNUSED written = abuf->written;
5990 
    IADDR UNUSED pc = abuf->addr;
5991 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5992 
 
5993 
  CPU (h_cond) = OPRND (condbit);
5994 
 
5995 
#undef OPRND
5996 
#undef FLD
5997 
  }
5998 
  NEXT (vpc);
5999 
 
6000 
  CASE (sem, INSN_PAR_SADD) : /* sadd */
6001 
{
6002 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6003 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6004 
#define FLD(f) abuf->fields.fmt_empty.f
6005 
#define OPRND(f) par_exec->operands.sfmt_sadd.f
6006 
  int UNUSED written = 0;
6007 
  IADDR UNUSED pc = abuf->addr;
6008 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6009 
 
6010 
  {
6011 
    DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
6012 
    OPRND (h_accums_0) = opval;
6013 
    TRACE_RESULT (current_cpu, abuf, "accums-0", 'D', opval);
6014 
  }
6015 
 
6016 
#undef OPRND
6017 
#undef FLD
6018 
}
6019 
  NEXT (vpc);
6020 
 
6021 
CASE (sem, INSN_WRITE_SADD) : /* sadd */
6022 
  {
6023 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6024 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6025 
#define FLD(f) abuf->fields.fmt_empty.f
6026 
#define OPRND(f) par_exec->operands.sfmt_sadd.f
6027 
    int UNUSED written = abuf->written;
6028 
    IADDR UNUSED pc = abuf->addr;
6029 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6030 
 
6031 
  SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_0));
6032 
 
6033 
#undef OPRND
6034 
#undef FLD
6035 
  }
6036 
  NEXT (vpc);
6037 
 
6038 
  CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6039 
{
6040 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6041 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6042 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6043 
#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6044 
  int UNUSED written = 0;
6045 
  IADDR UNUSED pc = abuf->addr;
6046 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6047 
 
6048 
  {
6049 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6050 
    OPRND (h_accums_1) = opval;
6051 
    TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6052 
  }
6053 
 
6054 
#undef OPRND
6055 
#undef FLD
6056 
}
6057 
  NEXT (vpc);
6058 
 
6059 
CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6060 
  {
6061 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6062 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6063 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6064 
#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6065 
    int UNUSED written = abuf->written;
6066 
    IADDR UNUSED pc = abuf->addr;
6067 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6068 
 
6069 
  SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
6070 
 
6071 
#undef OPRND
6072 
#undef FLD
6073 
  }
6074 
  NEXT (vpc);
6075 
 
6076 
  CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6077 
{
6078 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6079 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6080 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6081 
#define OPRND(f) par_exec->operands.sfmt_msblo.f
6082 
  int UNUSED written = 0;
6083 
  IADDR UNUSED pc = abuf->addr;
6084 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6085 
 
6086 
  {
6087 
    DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6088 
    OPRND (accum) = opval;
6089 
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6090 
  }
6091 
 
6092 
#undef OPRND
6093 
#undef FLD
6094 
}
6095 
  NEXT (vpc);
6096 
 
6097 
CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6098 
  {
6099 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6100 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6101 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6102 
#define OPRND(f) par_exec->operands.sfmt_msblo.f
6103 
    int UNUSED written = abuf->written;
6104 
    IADDR UNUSED pc = abuf->addr;
6105 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6106 
 
6107 
  SET_H_ACCUM (OPRND (accum));
6108 
 
6109 
#undef OPRND
6110 
#undef FLD
6111 
  }
6112 
  NEXT (vpc);
6113 
 
6114 
  CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6115 
{
6116 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6117 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6118 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6119 
#define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6120 
  int UNUSED written = 0;
6121 
  IADDR UNUSED pc = abuf->addr;
6122 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6123 
 
6124 
  {
6125 
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6126 
    OPRND (h_accums_1) = opval;
6127 
    TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6128 
  }
6129 
 
6130 
#undef OPRND
6131 
#undef FLD
6132 
}
6133 
  NEXT (vpc);
6134 
 
6135 
CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6136 
  {
6137 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6138 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6139 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6140 
#define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6141 
    int UNUSED written = abuf->written;
6142 
    IADDR UNUSED pc = abuf->addr;
6143 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6144 
 
6145 
  SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
6146 
 
6147 
#undef OPRND
6148 
#undef FLD
6149 
  }
6150 
  NEXT (vpc);
6151 
 
6152 
  CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6153 
{
6154 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6155 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6156 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6157 
#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6158 
  int UNUSED written = 0;
6159 
  IADDR UNUSED pc = abuf->addr;
6160 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6161 
 
6162 
  {
6163 
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6164 
    OPRND (h_accums_1) = opval;
6165 
    TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6166 
  }
6167 
 
6168 
#undef OPRND
6169 
#undef FLD
6170 
}
6171 
  NEXT (vpc);
6172 
 
6173 
CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6174 
  {
6175 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6176 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6177 
#define FLD(f) abuf->fields.sfmt_st_plus.f
6178 
#define OPRND(f) par_exec->operands.sfmt_macwu1.f
6179 
    int UNUSED written = abuf->written;
6180 
    IADDR UNUSED pc = abuf->addr;
6181 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6182 
 
6183 
  SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
6184 
 
6185 
#undef OPRND
6186 
#undef FLD
6187 
  }
6188 
  NEXT (vpc);
6189 
 
6190 
  CASE (sem, INSN_PAR_SC) : /* sc */
6191 
{
6192 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6193 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6194 
#define FLD(f) abuf->fields.fmt_empty.f
6195 
#define OPRND(f) par_exec->operands.sfmt_sc.f
6196 
  int UNUSED written = 0;
6197 
  IADDR UNUSED pc = abuf->addr;
6198 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6199 
 
6200 
if (ZEXTBISI (CPU (h_cond)))
6201 
  SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6202 
 
6203 
#undef OPRND
6204 
#undef FLD
6205 
}
6206 
  NEXT (vpc);
6207 
 
6208 
CASE (sem, INSN_WRITE_SC) : /* sc */
6209 
  {
6210 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6211 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6212 
#define FLD(f) abuf->fields.fmt_empty.f
6213 
#define OPRND(f) par_exec->operands.sfmt_sc.f
6214 
    int UNUSED written = abuf->written;
6215 
    IADDR UNUSED pc = abuf->addr;
6216 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6217 
 
6218 
 
6219 
#undef OPRND
6220 
#undef FLD
6221 
  }
6222 
  NEXT (vpc);
6223 
 
6224 
  CASE (sem, INSN_PAR_SNC) : /* snc */
6225 
{
6226 
  SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6227 
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6228 
#define FLD(f) abuf->fields.fmt_empty.f
6229 
#define OPRND(f) par_exec->operands.sfmt_sc.f
6230 
  int UNUSED written = 0;
6231 
  IADDR UNUSED pc = abuf->addr;
6232 
  vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6233 
 
6234 
if (ZEXTBISI (NOTBI (CPU (h_cond))))
6235 
  SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6236 
 
6237 
#undef OPRND
6238 
#undef FLD
6239 
}
6240 
  NEXT (vpc);
6241 
 
6242 
CASE (sem, INSN_WRITE_SNC) : /* snc */
6243 
  {
6244 
    SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6245 
    const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6246 
#define FLD(f) abuf->fields.fmt_empty.f
6247 
#define OPRND(f) par_exec->operands.sfmt_sc.f
6248 
    int UNUSED written = abuf->written;
6249 
    IADDR UNUSED pc = abuf->addr;
6250 
    vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6251 
 
6252 
 
6253 
#undef OPRND
6254 
#undef FLD
6255 
  }
6256 
  NEXT (vpc);
6257 
 
6258 
 
6259 
    }
6260 
  ENDSWITCH (sem) /* End of semantic switch.  */
6261 
 
6262 
  /* At this point `vpc' contains the next insn to execute.  */
6263 
}
6264 
 
6265 
#undef DEFINE_SWITCH
6266 
#endif /* DEFINE_SWITCH */

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