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1 1181 sfurman 
This is bfd.info, produced by makeinfo version 4.1 from bfd.texinfo.
2 
 
3 
START-INFO-DIR-ENTRY
4 
* Bfd: (bfd).                   The Binary File Descriptor library.
5 
END-INFO-DIR-ENTRY
6 
 
7 
   This file documents the BFD library.
8 
 
9 
   Copyright (C) 1991, 2000, 2001 Free Software Foundation, Inc.
10 
 
11 
   Permission is granted to copy, distribute and/or modify this document
12 
     under the terms of the GNU Free Documentation License, Version 1.1
13 
     or any later version published by the Free Software Foundation;
14 
   with no Invariant Sections, with no Front-Cover Texts, and with no
15 
    Back-Cover Texts.  A copy of the license is included in the
16 
section entitled "GNU Free Documentation License".
17 
 
18 

19 
File: bfd.info,  Node: howto manager,  Prev: typedef arelent,  Up: Relocations
20 
 
21 
The howto manager
22 
=================
23 
 
24 
   When an application wants to create a relocation, but doesn't know
25 
what the target machine might call it, it can find out by using this
26 
bit of code.
27 
 
28 
`bfd_reloc_code_type'
29 
.....................
30 
 
31 
   *Description*
32 
The insides of a reloc code.  The idea is that, eventually, there will
33 
be one enumerator for every type of relocation we ever do.  Pass one of
34 
these values to `bfd_reloc_type_lookup', and it'll return a howto
35 
pointer.
36 
 
37 
   This does mean that the application must determine the correct
38 
enumerator value; you can't get a howto pointer from a random set of
39 
attributes.
40 
 
41 
   Here are the possible values for `enum bfd_reloc_code_real':
42 
 
43 
 - : BFD_RELOC_64
44 
 - : BFD_RELOC_32
45 
 - : BFD_RELOC_26
46 
 - : BFD_RELOC_24
47 
 - : BFD_RELOC_16
48 
 - : BFD_RELOC_14
49 
 - : BFD_RELOC_8
50 
     Basic absolute relocations of N bits.
51 
 
52 
 - : BFD_RELOC_64_PCREL
53 
 - : BFD_RELOC_32_PCREL
54 
 - : BFD_RELOC_24_PCREL
55 
 - : BFD_RELOC_16_PCREL
56 
 - : BFD_RELOC_12_PCREL
57 
 - : BFD_RELOC_8_PCREL
58 
     PC-relative relocations.  Sometimes these are relative to the
59 
     address of the relocation itself; sometimes they are relative to
60 
     the start of the section containing the relocation.  It depends on
61 
     the specific target.
62 
 
63 
     The 24-bit relocation is used in some Intel 960 configurations.
64 
 
65 
 - : BFD_RELOC_32_GOT_PCREL
66 
 - : BFD_RELOC_16_GOT_PCREL
67 
 - : BFD_RELOC_8_GOT_PCREL
68 
 - : BFD_RELOC_32_GOTOFF
69 
 - : BFD_RELOC_16_GOTOFF
70 
 - : BFD_RELOC_LO16_GOTOFF
71 
 - : BFD_RELOC_HI16_GOTOFF
72 
 - : BFD_RELOC_HI16_S_GOTOFF
73 
 - : BFD_RELOC_8_GOTOFF
74 
 - : BFD_RELOC_64_PLT_PCREL
75 
 - : BFD_RELOC_32_PLT_PCREL
76 
 - : BFD_RELOC_24_PLT_PCREL
77 
 - : BFD_RELOC_16_PLT_PCREL
78 
 - : BFD_RELOC_8_PLT_PCREL
79 
 - : BFD_RELOC_64_PLTOFF
80 
 - : BFD_RELOC_32_PLTOFF
81 
 - : BFD_RELOC_16_PLTOFF
82 
 - : BFD_RELOC_LO16_PLTOFF
83 
 - : BFD_RELOC_HI16_PLTOFF
84 
 - : BFD_RELOC_HI16_S_PLTOFF
85 
 - : BFD_RELOC_8_PLTOFF
86 
     For ELF.
87 
 
88 
 - : BFD_RELOC_68K_GLOB_DAT
89 
 - : BFD_RELOC_68K_JMP_SLOT
90 
 - : BFD_RELOC_68K_RELATIVE
91 
     Relocations used by 68K ELF.
92 
 
93 
 - : BFD_RELOC_32_BASEREL
94 
 - : BFD_RELOC_16_BASEREL
95 
 - : BFD_RELOC_LO16_BASEREL
96 
 - : BFD_RELOC_HI16_BASEREL
97 
 - : BFD_RELOC_HI16_S_BASEREL
98 
 - : BFD_RELOC_8_BASEREL
99 
 - : BFD_RELOC_RVA
100 
     Linkage-table relative.
101 
 
102 
 - : BFD_RELOC_8_FFnn
103 
     Absolute 8-bit relocation, but used to form an address like 0xFFnn.
104 
 
105 
 - : BFD_RELOC_32_PCREL_S2
106 
 - : BFD_RELOC_16_PCREL_S2
107 
 - : BFD_RELOC_23_PCREL_S2
108 
     These PC-relative relocations are stored as word displacements -
109 
     i.e., byte displacements shifted right two bits.  The 30-bit word
110 
     displacement (<<32_PCREL_S2>> - 32 bits, shifted 2) is used on the
111 
     SPARC.  (SPARC tools generally refer to this as <>.)  The
112 
     signed 16-bit displacement is used on the MIPS, and the 23-bit
113 
     displacement is used on the Alpha.
114 
 
115 
 - : BFD_RELOC_HI22
116 
 - : BFD_RELOC_LO10
117 
     High 22 bits and low 10 bits of 32-bit value, placed into lower
118 
     bits of the target word.  These are used on the SPARC.
119 
 
120 
 - : BFD_RELOC_GPREL16
121 
 - : BFD_RELOC_GPREL32
122 
     For systems that allocate a Global Pointer register, these are
123 
     displacements off that register.  These relocation types are
124 
     handled specially, because the value the register will have is
125 
     decided relatively late.
126 
 
127 
 - : BFD_RELOC_I960_CALLJ
128 
     Reloc types used for i960/b.out.
129 
 
130 
 - : BFD_RELOC_NONE
131 
 - : BFD_RELOC_SPARC_WDISP22
132 
 - : BFD_RELOC_SPARC22
133 
 - : BFD_RELOC_SPARC13
134 
 - : BFD_RELOC_SPARC_GOT10
135 
 - : BFD_RELOC_SPARC_GOT13
136 
 - : BFD_RELOC_SPARC_GOT22
137 
 - : BFD_RELOC_SPARC_PC10
138 
 - : BFD_RELOC_SPARC_PC22
139 
 - : BFD_RELOC_SPARC_WPLT30
140 
 - : BFD_RELOC_SPARC_COPY
141 
 - : BFD_RELOC_SPARC_GLOB_DAT
142 
 - : BFD_RELOC_SPARC_JMP_SLOT
143 
 - : BFD_RELOC_SPARC_RELATIVE
144 
 - : BFD_RELOC_SPARC_UA16
145 
 - : BFD_RELOC_SPARC_UA32
146 
 - : BFD_RELOC_SPARC_UA64
147 
     SPARC ELF relocations.  There is probably some overlap with other
148 
     relocation types already defined.
149 
 
150 
 - : BFD_RELOC_SPARC_BASE13
151 
 - : BFD_RELOC_SPARC_BASE22
152 
     I think these are specific to SPARC a.out (e.g., Sun 4).
153 
 
154 
 - : BFD_RELOC_SPARC_64
155 
 - : BFD_RELOC_SPARC_10
156 
 - : BFD_RELOC_SPARC_11
157 
 - : BFD_RELOC_SPARC_OLO10
158 
 - : BFD_RELOC_SPARC_HH22
159 
 - : BFD_RELOC_SPARC_HM10
160 
 - : BFD_RELOC_SPARC_LM22
161 
 - : BFD_RELOC_SPARC_PC_HH22
162 
 - : BFD_RELOC_SPARC_PC_HM10
163 
 - : BFD_RELOC_SPARC_PC_LM22
164 
 - : BFD_RELOC_SPARC_WDISP16
165 
 - : BFD_RELOC_SPARC_WDISP19
166 
 - : BFD_RELOC_SPARC_7
167 
 - : BFD_RELOC_SPARC_6
168 
 - : BFD_RELOC_SPARC_5
169 
 - : BFD_RELOC_SPARC_DISP64
170 
 - : BFD_RELOC_SPARC_PLT32
171 
 - : BFD_RELOC_SPARC_PLT64
172 
 - : BFD_RELOC_SPARC_HIX22
173 
 - : BFD_RELOC_SPARC_LOX10
174 
 - : BFD_RELOC_SPARC_H44
175 
 - : BFD_RELOC_SPARC_M44
176 
 - : BFD_RELOC_SPARC_L44
177 
 - : BFD_RELOC_SPARC_REGISTER
178 
     SPARC64 relocations
179 
 
180 
 - : BFD_RELOC_SPARC_REV32
181 
     SPARC little endian relocation
182 
 
183 
 - : BFD_RELOC_ALPHA_GPDISP_HI16
184 
     Alpha ECOFF and ELF relocations.  Some of these treat the symbol or
185 
     "addend" in some special way.  For GPDISP_HI16 ("gpdisp")
186 
     relocations, the symbol is ignored when writing; when reading, it
187 
     will be the absolute section symbol.  The addend is the
188 
     displacement in bytes of the "lda" instruction from the "ldah"
189 
     instruction (which is at the address of this reloc).
190 
 
191 
 - : BFD_RELOC_ALPHA_GPDISP_LO16
192 
     For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
193 
     with GPDISP_HI16 relocs.  The addend is ignored when writing the
194 
     relocations out, and is filled in with the file's GP value on
195 
     reading, for convenience.
196 
 
197 
 - : BFD_RELOC_ALPHA_GPDISP
198 
     The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
199 
     relocation except that there is no accompanying GPDISP_LO16
200 
     relocation.
201 
 
202 
 - : BFD_RELOC_ALPHA_LITERAL
203 
 - : BFD_RELOC_ALPHA_ELF_LITERAL
204 
 - : BFD_RELOC_ALPHA_LITUSE
205 
     The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
206 
     the assembler turns it into a LDQ instruction to load the address
207 
     of the symbol, and then fills in a register in the real
208 
     instruction.
209 
 
210 
     The LITERAL reloc, at the LDQ instruction, refers to the .lita
211 
     section symbol.  The addend is ignored when writing, but is filled
212 
     in with the file's GP value on reading, for convenience, as with
213 
     the GPDISP_LO16 reloc.
214 
 
215 
     The ELF_LITERAL reloc is somewhere between 16_GOTOFF and
216 
     GPDISP_LO16.  It should refer to the symbol to be referenced, as
217 
     with 16_GOTOFF, but it generates output not based on the position
218 
     within the .got section, but relative to the GP value chosen for
219 
     the file during the final link stage.
220 
 
221 
     The LITUSE reloc, on the instruction using the loaded address,
222 
     gives information to the linker that it might be able to use to
223 
     optimize away some literal section references.  The symbol is
224 
     ignored (read as the absolute section symbol), and the "addend"
225 
     indicates the type of instruction using the register: 1 - "memory"
226 
     fmt insn 2 - byte-manipulation (byte offset reg) 3 - jsr (target
227 
     of branch)
228 
 
229 
 - : BFD_RELOC_ALPHA_HINT
230 
     The HINT relocation indicates a value that should be filled into
231 
     the "hint" field of a jmp/jsr/ret instruction, for possible branch-
232 
     prediction logic which may be provided on some processors.
233 
 
234 
 - : BFD_RELOC_ALPHA_LINKAGE
235 
     The LINKAGE relocation outputs a linkage pair in the object file,
236 
     which is filled by the linker.
237 
 
238 
 - : BFD_RELOC_ALPHA_CODEADDR
239 
     The CODEADDR relocation outputs a STO_CA in the object file, which
240 
     is filled by the linker.
241 
 
242 
 - : BFD_RELOC_ALPHA_GPREL_HI16
243 
 - : BFD_RELOC_ALPHA_GPREL_LO16
244 
     The GPREL_HI/LO relocations together form a 32-bit offset from the
245 
     GP register.
246 
 
247 
 - : BFD_RELOC_ALPHA_BRSGP
248 
     Like BFD_RELOC_23_PCREL_S2, except that the source and target must
249 
     share a common GP, and the target address is adjusted for
250 
     STO_ALPHA_STD_GPLOAD.
251 
 
252 
 - : BFD_RELOC_ALPHA_TLSGD
253 
 - : BFD_RELOC_ALPHA_TLSLDM
254 
 - : BFD_RELOC_ALPHA_DTPMOD64
255 
 - : BFD_RELOC_ALPHA_GOTDTPREL16
256 
 - : BFD_RELOC_ALPHA_DTPREL64
257 
 - : BFD_RELOC_ALPHA_DTPREL_HI16
258 
 - : BFD_RELOC_ALPHA_DTPREL_LO16
259 
 - : BFD_RELOC_ALPHA_DTPREL16
260 
 - : BFD_RELOC_ALPHA_GOTTPREL16
261 
 - : BFD_RELOC_ALPHA_TPREL64
262 
 - : BFD_RELOC_ALPHA_TPREL_HI16
263 
 - : BFD_RELOC_ALPHA_TPREL_LO16
264 
 - : BFD_RELOC_ALPHA_TPREL16
265 
     Alpha thread-local storage relocations.
266 
 
267 
 - : BFD_RELOC_MIPS_JMP
268 
     Bits 27..2 of the relocation address shifted right 2 bits; simple
269 
     reloc otherwise.
270 
 
271 
 - : BFD_RELOC_MIPS16_JMP
272 
     The MIPS16 jump instruction.
273 
 
274 
 - : BFD_RELOC_MIPS16_GPREL
275 
     MIPS16 GP relative reloc.
276 
 
277 
 - : BFD_RELOC_HI16
278 
     High 16 bits of 32-bit value; simple reloc.
279 
 
280 
 - : BFD_RELOC_HI16_S
281 
     High 16 bits of 32-bit value but the low 16 bits will be sign
282 
     extended and added to form the final result.  If the low 16 bits
283 
     form a negative number, we need to add one to the high value to
284 
     compensate for the borrow when the low bits are added.
285 
 
286 
 - : BFD_RELOC_LO16
287 
     Low 16 bits.
288 
 
289 
 - : BFD_RELOC_PCREL_HI16_S
290 
     Like BFD_RELOC_HI16_S, but PC relative.
291 
 
292 
 - : BFD_RELOC_PCREL_LO16
293 
     Like BFD_RELOC_LO16, but PC relative.
294 
 
295 
 - : BFD_RELOC_MIPS_LITERAL
296 
     Relocation against a MIPS literal section.
297 
 
298 
 - : BFD_RELOC_MIPS_GOT16
299 
 - : BFD_RELOC_MIPS_CALL16
300 
 - : BFD_RELOC_MIPS_GOT_HI16
301 
 - : BFD_RELOC_MIPS_GOT_LO16
302 
 - : BFD_RELOC_MIPS_CALL_HI16
303 
 - : BFD_RELOC_MIPS_CALL_LO16
304 
 - : BFD_RELOC_MIPS_SUB
305 
 - : BFD_RELOC_MIPS_GOT_PAGE
306 
 - : BFD_RELOC_MIPS_GOT_OFST
307 
 - : BFD_RELOC_MIPS_GOT_DISP
308 
 - : BFD_RELOC_MIPS_SHIFT5
309 
 - : BFD_RELOC_MIPS_SHIFT6
310 
 - : BFD_RELOC_MIPS_INSERT_A
311 
 - : BFD_RELOC_MIPS_INSERT_B
312 
 - : BFD_RELOC_MIPS_DELETE
313 
 - : BFD_RELOC_MIPS_HIGHEST
314 
 - : BFD_RELOC_MIPS_HIGHER
315 
 - : BFD_RELOC_MIPS_SCN_DISP
316 
 - : BFD_RELOC_MIPS_REL16
317 
 - : BFD_RELOC_MIPS_RELGOT
318 
 - : BFD_RELOC_MIPS_JALR
319 
      - : BFD_RELOC_FRV_LABEL16
320 
      - : BFD_RELOC_FRV_LABEL24
321 
      - : BFD_RELOC_FRV_LO16
322 
      - : BFD_RELOC_FRV_HI16
323 
      - : BFD_RELOC_FRV_GPREL12
324 
      - : BFD_RELOC_FRV_GPRELU12
325 
      - : BFD_RELOC_FRV_GPREL32
326 
      - : BFD_RELOC_FRV_GPRELHI
327 
      - : BFD_RELOC_FRV_GPRELLO
328 
          Fujitsu Frv Relocations.
329 
     MIPS ELF relocations.
330 
 
331 
 - : BFD_RELOC_386_GOT32
332 
 - : BFD_RELOC_386_PLT32
333 
 - : BFD_RELOC_386_COPY
334 
 - : BFD_RELOC_386_GLOB_DAT
335 
 - : BFD_RELOC_386_JUMP_SLOT
336 
 - : BFD_RELOC_386_RELATIVE
337 
 - : BFD_RELOC_386_GOTOFF
338 
 - : BFD_RELOC_386_GOTPC
339 
 - : BFD_RELOC_386_TLS_LE
340 
 - : BFD_RELOC_386_TLS_GD
341 
 - : BFD_RELOC_386_TLS_LDM
342 
 - : BFD_RELOC_386_TLS_LDO_32
343 
 - : BFD_RELOC_386_TLS_IE_32
344 
 - : BFD_RELOC_386_TLS_LE_32
345 
 - : BFD_RELOC_386_TLS_DTPMOD32
346 
 - : BFD_RELOC_386_TLS_DTPOFF32
347 
 - : BFD_RELOC_386_TLS_TPOFF32
348 
     i386/elf relocations
349 
 
350 
 - : BFD_RELOC_X86_64_GOT32
351 
 - : BFD_RELOC_X86_64_PLT32
352 
 - : BFD_RELOC_X86_64_COPY
353 
 - : BFD_RELOC_X86_64_GLOB_DAT
354 
 - : BFD_RELOC_X86_64_JUMP_SLOT
355 
 - : BFD_RELOC_X86_64_RELATIVE
356 
 - : BFD_RELOC_X86_64_GOTPCREL
357 
 - : BFD_RELOC_X86_64_32S
358 
     x86-64/elf relocations
359 
 
360 
 - : BFD_RELOC_NS32K_IMM_8
361 
 - : BFD_RELOC_NS32K_IMM_16
362 
 - : BFD_RELOC_NS32K_IMM_32
363 
 - : BFD_RELOC_NS32K_IMM_8_PCREL
364 
 - : BFD_RELOC_NS32K_IMM_16_PCREL
365 
 - : BFD_RELOC_NS32K_IMM_32_PCREL
366 
 - : BFD_RELOC_NS32K_DISP_8
367 
 - : BFD_RELOC_NS32K_DISP_16
368 
 - : BFD_RELOC_NS32K_DISP_32
369 
 - : BFD_RELOC_NS32K_DISP_8_PCREL
370 
 - : BFD_RELOC_NS32K_DISP_16_PCREL
371 
 - : BFD_RELOC_NS32K_DISP_32_PCREL
372 
     ns32k relocations
373 
 
374 
 - : BFD_RELOC_PDP11_DISP_8_PCREL
375 
 - : BFD_RELOC_PDP11_DISP_6_PCREL
376 
     PDP11 relocations
377 
 
378 
 - : BFD_RELOC_PJ_CODE_HI16
379 
 - : BFD_RELOC_PJ_CODE_LO16
380 
 - : BFD_RELOC_PJ_CODE_DIR16
381 
 - : BFD_RELOC_PJ_CODE_DIR32
382 
 - : BFD_RELOC_PJ_CODE_REL16
383 
 - : BFD_RELOC_PJ_CODE_REL32
384 
     Picojava relocs.  Not all of these appear in object files.
385 
 
386 
 - : BFD_RELOC_PPC_B26
387 
 - : BFD_RELOC_PPC_BA26
388 
 - : BFD_RELOC_PPC_TOC16
389 
 - : BFD_RELOC_PPC_B16
390 
 - : BFD_RELOC_PPC_B16_BRTAKEN
391 
 - : BFD_RELOC_PPC_B16_BRNTAKEN
392 
 - : BFD_RELOC_PPC_BA16
393 
 - : BFD_RELOC_PPC_BA16_BRTAKEN
394 
 - : BFD_RELOC_PPC_BA16_BRNTAKEN
395 
 - : BFD_RELOC_PPC_COPY
396 
 - : BFD_RELOC_PPC_GLOB_DAT
397 
 - : BFD_RELOC_PPC_JMP_SLOT
398 
 - : BFD_RELOC_PPC_RELATIVE
399 
 - : BFD_RELOC_PPC_LOCAL24PC
400 
 - : BFD_RELOC_PPC_EMB_NADDR32
401 
 - : BFD_RELOC_PPC_EMB_NADDR16
402 
 - : BFD_RELOC_PPC_EMB_NADDR16_LO
403 
 - : BFD_RELOC_PPC_EMB_NADDR16_HI
404 
 - : BFD_RELOC_PPC_EMB_NADDR16_HA
405 
 - : BFD_RELOC_PPC_EMB_SDAI16
406 
 - : BFD_RELOC_PPC_EMB_SDA2I16
407 
 - : BFD_RELOC_PPC_EMB_SDA2REL
408 
 - : BFD_RELOC_PPC_EMB_SDA21
409 
 - : BFD_RELOC_PPC_EMB_MRKREF
410 
 - : BFD_RELOC_PPC_EMB_RELSEC16
411 
 - : BFD_RELOC_PPC_EMB_RELST_LO
412 
 - : BFD_RELOC_PPC_EMB_RELST_HI
413 
 - : BFD_RELOC_PPC_EMB_RELST_HA
414 
 - : BFD_RELOC_PPC_EMB_BIT_FLD
415 
 - : BFD_RELOC_PPC_EMB_RELSDA
416 
 - : BFD_RELOC_PPC64_HIGHER
417 
 - : BFD_RELOC_PPC64_HIGHER_S
418 
 - : BFD_RELOC_PPC64_HIGHEST
419 
 - : BFD_RELOC_PPC64_HIGHEST_S
420 
 - : BFD_RELOC_PPC64_TOC16_LO
421 
 - : BFD_RELOC_PPC64_TOC16_HI
422 
 - : BFD_RELOC_PPC64_TOC16_HA
423 
 - : BFD_RELOC_PPC64_TOC
424 
 - : BFD_RELOC_PPC64_PLTGOT16
425 
 - : BFD_RELOC_PPC64_PLTGOT16_LO
426 
 - : BFD_RELOC_PPC64_PLTGOT16_HI
427 
 - : BFD_RELOC_PPC64_PLTGOT16_HA
428 
 - : BFD_RELOC_PPC64_ADDR16_DS
429 
 - : BFD_RELOC_PPC64_ADDR16_LO_DS
430 
 - : BFD_RELOC_PPC64_GOT16_DS
431 
 - : BFD_RELOC_PPC64_GOT16_LO_DS
432 
 - : BFD_RELOC_PPC64_PLT16_LO_DS
433 
 - : BFD_RELOC_PPC64_SECTOFF_DS
434 
 - : BFD_RELOC_PPC64_SECTOFF_LO_DS
435 
 - : BFD_RELOC_PPC64_TOC16_DS
436 
 - : BFD_RELOC_PPC64_TOC16_LO_DS
437 
 - : BFD_RELOC_PPC64_PLTGOT16_DS
438 
 - : BFD_RELOC_PPC64_PLTGOT16_LO_DS
439 
     Power(rs6000) and PowerPC relocations.
440 
 
441 
 - : BFD_RELOC_I370_D12
442 
     IBM 370/390 relocations
443 
 
444 
 - : BFD_RELOC_CTOR
445 
     The type of reloc used to build a contructor table - at the moment
446 
     probably a 32 bit wide absolute relocation, but the target can
447 
     choose.  It generally does map to one of the other relocation
448 
     types.
449 
 
450 
 - : BFD_RELOC_ARM_PCREL_BRANCH
451 
     ARM 26 bit pc-relative branch.  The lowest two bits must be zero
452 
     and are not stored in the instruction.
453 
 
454 
 - : BFD_RELOC_ARM_PCREL_BLX
455 
     ARM 26 bit pc-relative branch.  The lowest bit must be zero and is
456 
     not stored in the instruction.  The 2nd lowest bit comes from a 1
457 
     bit field in the instruction.
458 
 
459 
 - : BFD_RELOC_THUMB_PCREL_BLX
460 
     Thumb 22 bit pc-relative branch.  The lowest bit must be zero and
461 
     is not stored in the instruction.  The 2nd lowest bit comes from a
462 
     1 bit field in the instruction.
463 
 
464 
 - : BFD_RELOC_ARM_IMMEDIATE
465 
 - : BFD_RELOC_ARM_ADRL_IMMEDIATE
466 
 - : BFD_RELOC_ARM_OFFSET_IMM
467 
 - : BFD_RELOC_ARM_SHIFT_IMM
468 
 - : BFD_RELOC_ARM_SWI
469 
 - : BFD_RELOC_ARM_MULTI
470 
 - : BFD_RELOC_ARM_CP_OFF_IMM
471 
 - : BFD_RELOC_ARM_ADR_IMM
472 
 - : BFD_RELOC_ARM_LDR_IMM
473 
 - : BFD_RELOC_ARM_LITERAL
474 
 - : BFD_RELOC_ARM_IN_POOL
475 
 - : BFD_RELOC_ARM_OFFSET_IMM8
476 
 - : BFD_RELOC_ARM_HWLITERAL
477 
 - : BFD_RELOC_ARM_THUMB_ADD
478 
 - : BFD_RELOC_ARM_THUMB_IMM
479 
 - : BFD_RELOC_ARM_THUMB_SHIFT
480 
 - : BFD_RELOC_ARM_THUMB_OFFSET
481 
 - : BFD_RELOC_ARM_GOT12
482 
 - : BFD_RELOC_ARM_GOT32
483 
 - : BFD_RELOC_ARM_JUMP_SLOT
484 
 - : BFD_RELOC_ARM_COPY
485 
 - : BFD_RELOC_ARM_GLOB_DAT
486 
 - : BFD_RELOC_ARM_PLT32
487 
 - : BFD_RELOC_ARM_RELATIVE
488 
 - : BFD_RELOC_ARM_GOTOFF
489 
 - : BFD_RELOC_ARM_GOTPC
490 
     These relocs are only used within the ARM assembler.  They are not
491 
     (at present) written to any object files.
492 
 
493 
 - : BFD_RELOC_SH_PCDISP8BY2
494 
 - : BFD_RELOC_SH_PCDISP12BY2
495 
 - : BFD_RELOC_SH_IMM4
496 
 - : BFD_RELOC_SH_IMM4BY2
497 
 - : BFD_RELOC_SH_IMM4BY4
498 
 - : BFD_RELOC_SH_IMM8
499 
 - : BFD_RELOC_SH_IMM8BY2
500 
 - : BFD_RELOC_SH_IMM8BY4
501 
 - : BFD_RELOC_SH_PCRELIMM8BY2
502 
 - : BFD_RELOC_SH_PCRELIMM8BY4
503 
 - : BFD_RELOC_SH_SWITCH16
504 
 - : BFD_RELOC_SH_SWITCH32
505 
 - : BFD_RELOC_SH_USES
506 
 - : BFD_RELOC_SH_COUNT
507 
 - : BFD_RELOC_SH_ALIGN
508 
 - : BFD_RELOC_SH_CODE
509 
 - : BFD_RELOC_SH_DATA
510 
 - : BFD_RELOC_SH_LABEL
511 
 - : BFD_RELOC_SH_LOOP_START
512 
 - : BFD_RELOC_SH_LOOP_END
513 
 - : BFD_RELOC_SH_COPY
514 
 - : BFD_RELOC_SH_GLOB_DAT
515 
 - : BFD_RELOC_SH_JMP_SLOT
516 
 - : BFD_RELOC_SH_RELATIVE
517 
 - : BFD_RELOC_SH_GOTPC
518 
 - : BFD_RELOC_SH_GOT_LOW16
519 
 - : BFD_RELOC_SH_GOT_MEDLOW16
520 
 - : BFD_RELOC_SH_GOT_MEDHI16
521 
 - : BFD_RELOC_SH_GOT_HI16
522 
 - : BFD_RELOC_SH_GOTPLT_LOW16
523 
 - : BFD_RELOC_SH_GOTPLT_MEDLOW16
524 
 - : BFD_RELOC_SH_GOTPLT_MEDHI16
525 
 - : BFD_RELOC_SH_GOTPLT_HI16
526 
 - : BFD_RELOC_SH_PLT_LOW16
527 
 - : BFD_RELOC_SH_PLT_MEDLOW16
528 
 - : BFD_RELOC_SH_PLT_MEDHI16
529 
 - : BFD_RELOC_SH_PLT_HI16
530 
 - : BFD_RELOC_SH_GOTOFF_LOW16
531 
 - : BFD_RELOC_SH_GOTOFF_MEDLOW16
532 
 - : BFD_RELOC_SH_GOTOFF_MEDHI16
533 
 - : BFD_RELOC_SH_GOTOFF_HI16
534 
 - : BFD_RELOC_SH_GOTPC_LOW16
535 
 - : BFD_RELOC_SH_GOTPC_MEDLOW16
536 
 - : BFD_RELOC_SH_GOTPC_MEDHI16
537 
 - : BFD_RELOC_SH_GOTPC_HI16
538 
 - : BFD_RELOC_SH_COPY64
539 
 - : BFD_RELOC_SH_GLOB_DAT64
540 
 - : BFD_RELOC_SH_JMP_SLOT64
541 
 - : BFD_RELOC_SH_RELATIVE64
542 
 - : BFD_RELOC_SH_GOT10BY4
543 
 - : BFD_RELOC_SH_GOT10BY8
544 
 - : BFD_RELOC_SH_GOTPLT10BY4
545 
 - : BFD_RELOC_SH_GOTPLT10BY8
546 
 - : BFD_RELOC_SH_GOTPLT32
547 
 - : BFD_RELOC_SH_SHMEDIA_CODE
548 
 - : BFD_RELOC_SH_IMMU5
549 
 - : BFD_RELOC_SH_IMMS6
550 
 - : BFD_RELOC_SH_IMMS6BY32
551 
 - : BFD_RELOC_SH_IMMU6
552 
 - : BFD_RELOC_SH_IMMS10
553 
 - : BFD_RELOC_SH_IMMS10BY2
554 
 - : BFD_RELOC_SH_IMMS10BY4
555 
 - : BFD_RELOC_SH_IMMS10BY8
556 
 - : BFD_RELOC_SH_IMMS16
557 
 - : BFD_RELOC_SH_IMMU16
558 
 - : BFD_RELOC_SH_IMM_LOW16
559 
 - : BFD_RELOC_SH_IMM_LOW16_PCREL
560 
 - : BFD_RELOC_SH_IMM_MEDLOW16
561 
 - : BFD_RELOC_SH_IMM_MEDLOW16_PCREL
562 
 - : BFD_RELOC_SH_IMM_MEDHI16
563 
 - : BFD_RELOC_SH_IMM_MEDHI16_PCREL
564 
 - : BFD_RELOC_SH_IMM_HI16
565 
 - : BFD_RELOC_SH_IMM_HI16_PCREL
566 
 - : BFD_RELOC_SH_PT_16
567 
     Hitachi SH relocs.  Not all of these appear in object files.
568 
 
569 
 - : BFD_RELOC_THUMB_PCREL_BRANCH9
570 
 - : BFD_RELOC_THUMB_PCREL_BRANCH12
571 
 - : BFD_RELOC_THUMB_PCREL_BRANCH23
572 
     Thumb 23-, 12- and 9-bit pc-relative branches.  The lowest bit must
573 
     be zero and is not stored in the instruction.
574 
 
575 
 - : BFD_RELOC_ARC_B22_PCREL
576 
     ARC Cores relocs.  ARC 22 bit pc-relative branch.  The lowest two
577 
     bits must be zero and are not stored in the instruction.  The high
578 
     20 bits are installed in bits 26 through 7 of the instruction.
579 
 
580 
 - : BFD_RELOC_ARC_B26
581 
     ARC 26 bit absolute branch.  The lowest two bits must be zero and
582 
     are not stored in the instruction.  The high 24 bits are installed
583 
     in bits 23 through 0.
584 
 
585 
 - : BFD_RELOC_D10V_10_PCREL_R
586 
     Mitsubishi D10V relocs.  This is a 10-bit reloc with the right 2
587 
     bits assumed to be 0.
588 
 
589 
 - : BFD_RELOC_D10V_10_PCREL_L
590 
     Mitsubishi D10V relocs.  This is a 10-bit reloc with the right 2
591 
     bits assumed to be 0.  This is the same as the previous reloc
592 
     except it is in the left container, i.e., shifted left 15 bits.
593 
 
594 
 - : BFD_RELOC_D10V_18
595 
     This is an 18-bit reloc with the right 2 bits assumed to be 0.
596 
 
597 
 - : BFD_RELOC_D10V_18_PCREL
598 
     This is an 18-bit reloc with the right 2 bits assumed to be 0.
599 
 
600 
 - : BFD_RELOC_D30V_6
601 
     Mitsubishi D30V relocs.  This is a 6-bit absolute reloc.
602 
 
603 
 - : BFD_RELOC_D30V_9_PCREL
604 
     This is a 6-bit pc-relative reloc with the right 3 bits assumed to
605 
     be 0.
606 
 
607 
 - : BFD_RELOC_D30V_9_PCREL_R
608 
     This is a 6-bit pc-relative reloc with the right 3 bits assumed to
609 
     be 0. Same as the previous reloc but on the right side of the
610 
     container.
611 
 
612 
 - : BFD_RELOC_D30V_15
613 
     This is a 12-bit absolute reloc with the right 3 bitsassumed to be
614 
     0.
615 
 
616 
 - : BFD_RELOC_D30V_15_PCREL
617 
     This is a 12-bit pc-relative reloc with the right 3 bits assumed
618 
     to be 0.
619 
 
620 
 - : BFD_RELOC_D30V_15_PCREL_R
621 
     This is a 12-bit pc-relative reloc with the right 3 bits assumed
622 
     to be 0. Same as the previous reloc but on the right side of the
623 
     container.
624 
 
625 
 - : BFD_RELOC_D30V_21
626 
     This is an 18-bit absolute reloc with the right 3 bits assumed to
627 
     be 0.
628 
 
629 
 - : BFD_RELOC_D30V_21_PCREL
630 
     This is an 18-bit pc-relative reloc with the right 3 bits assumed
631 
     to be 0.
632 
 
633 
 - : BFD_RELOC_D30V_21_PCREL_R
634 
     This is an 18-bit pc-relative reloc with the right 3 bits assumed
635 
     to be 0. Same as the previous reloc but on the right side of the
636 
     container.
637 
 
638 
 - : BFD_RELOC_D30V_32
639 
     This is a 32-bit absolute reloc.
640 
 
641 
 - : BFD_RELOC_D30V_32_PCREL
642 
     This is a 32-bit pc-relative reloc.
643 
 
644 
 - : BFD_RELOC_DLX_HI16_S
645 
     DLX relocs
646 
 
647 
 - : BFD_RELOC_DLX_LO16
648 
     DLX relocs
649 
 
650 
 - : BFD_RELOC_DLX_JMP26
651 
     DLX relocs
652 
 
653 
 - : BFD_RELOC_M32R_24
654 
     Mitsubishi M32R relocs.  This is a 24 bit absolute address.
655 
 
656 
 - : BFD_RELOC_M32R_10_PCREL
657 
     This is a 10-bit pc-relative reloc with the right 2 bits assumed
658 
     to be 0.
659 
 
660 
 - : BFD_RELOC_M32R_18_PCREL
661 
     This is an 18-bit reloc with the right 2 bits assumed to be 0.
662 
 
663 
 - : BFD_RELOC_M32R_26_PCREL
664 
     This is a 26-bit reloc with the right 2 bits assumed to be 0.
665 
 
666 
 - : BFD_RELOC_M32R_HI16_ULO
667 
     This is a 16-bit reloc containing the high 16 bits of an address
668 
     used when the lower 16 bits are treated as unsigned.
669 
 
670 
 - : BFD_RELOC_M32R_HI16_SLO
671 
     This is a 16-bit reloc containing the high 16 bits of an address
672 
     used when the lower 16 bits are treated as signed.
673 
 
674 
 - : BFD_RELOC_M32R_LO16
675 
     This is a 16-bit reloc containing the lower 16 bits of an address.
676 
 
677 
 - : BFD_RELOC_M32R_SDA16
678 
     This is a 16-bit reloc containing the small data area offset for
679 
     use in add3, load, and store instructions.
680 
 
681 
 - : BFD_RELOC_V850_9_PCREL
682 
     This is a 9-bit reloc
683 
 
684 
 - : BFD_RELOC_V850_22_PCREL
685 
     This is a 22-bit reloc
686 
 
687 
 - : BFD_RELOC_V850_SDA_16_16_OFFSET
688 
     This is a 16 bit offset from the short data area pointer.
689 
 
690 
 - : BFD_RELOC_V850_SDA_15_16_OFFSET
691 
     This is a 16 bit offset (of which only 15 bits are used) from the
692 
     short data area pointer.
693 
 
694 
 - : BFD_RELOC_V850_ZDA_16_16_OFFSET
695 
     This is a 16 bit offset from the zero data area pointer.
696 
 
697 
 - : BFD_RELOC_V850_ZDA_15_16_OFFSET
698 
     This is a 16 bit offset (of which only 15 bits are used) from the
699 
     zero data area pointer.
700 
 
701 
 - : BFD_RELOC_V850_TDA_6_8_OFFSET
702 
     This is an 8 bit offset (of which only 6 bits are used) from the
703 
     tiny data area pointer.
704 
 
705 
 - : BFD_RELOC_V850_TDA_7_8_OFFSET
706 
     This is an 8bit offset (of which only 7 bits are used) from the
707 
     tiny data area pointer.
708 
 
709 
 - : BFD_RELOC_V850_TDA_7_7_OFFSET
710 
     This is a 7 bit offset from the tiny data area pointer.
711 
 
712 
 - : BFD_RELOC_V850_TDA_16_16_OFFSET
713 
     This is a 16 bit offset from the tiny data area pointer.
714 
 
715 
 - : BFD_RELOC_V850_TDA_4_5_OFFSET
716 
     This is a 5 bit offset (of which only 4 bits are used) from the
717 
     tiny data area pointer.
718 
 
719 
 - : BFD_RELOC_V850_TDA_4_4_OFFSET
720 
     This is a 4 bit offset from the tiny data area pointer.
721 
 
722 
 - : BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
723 
     This is a 16 bit offset from the short data area pointer, with the
724 
     bits placed non-contigously in the instruction.
725 
 
726 
 - : BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
727 
     This is a 16 bit offset from the zero data area pointer, with the
728 
     bits placed non-contigously in the instruction.
729 
 
730 
 - : BFD_RELOC_V850_CALLT_6_7_OFFSET
731 
     This is a 6 bit offset from the call table base pointer.
732 
 
733 
 - : BFD_RELOC_V850_CALLT_16_16_OFFSET
734 
     This is a 16 bit offset from the call table base pointer.
735 
 
736 
 - : BFD_RELOC_V850_LONGCALL
737 
     Used for relaxing indirect function calls.
738 
 
739 
 - : BFD_RELOC_V850_LONGJUMP
740 
     Used for relaxing indirect jumps.
741 
 
742 
 - : BFD_RELOC_V850_ALIGN
743 
     Used to maintain alignment whilst relaxing.
744 
 
745 
 - : BFD_RELOC_MN10300_32_PCREL
746 
     This is a 32bit pcrel reloc for the mn10300, offset by two bytes
747 
     in the instruction.
748 
 
749 
 - : BFD_RELOC_MN10300_16_PCREL
750 
     This is a 16bit pcrel reloc for the mn10300, offset by two bytes
751 
     in the instruction.
752 
 
753 
 - : BFD_RELOC_TIC30_LDP
754 
     This is a 8bit DP reloc for the tms320c30, where the most
755 
     significant 8 bits of a 24 bit word are placed into the least
756 
     significant 8 bits of the opcode.
757 
 
758 
 - : BFD_RELOC_TIC54X_PARTLS7
759 
     This is a 7bit reloc for the tms320c54x, where the least
760 
     significant 7 bits of a 16 bit word are placed into the least
761 
     significant 7 bits of the opcode.
762 
 
763 
 - : BFD_RELOC_TIC54X_PARTMS9
764 
     This is a 9bit DP reloc for the tms320c54x, where the most
765 
     significant 9 bits of a 16 bit word are placed into the least
766 
     significant 9 bits of the opcode.
767 
 
768 
 - : BFD_RELOC_TIC54X_23
769 
     This is an extended address 23-bit reloc for the tms320c54x.
770 
 
771 
 - : BFD_RELOC_TIC54X_16_OF_23
772 
     This is a 16-bit reloc for the tms320c54x, where the least
773 
     significant 16 bits of a 23-bit extended address are placed into
774 
     the opcode.
775 
 
776 
 - : BFD_RELOC_TIC54X_MS7_OF_23
777 
     This is a reloc for the tms320c54x, where the most significant 7
778 
     bits of a 23-bit extended address are placed into the opcode.
779 
 
780 
 - : BFD_RELOC_FR30_48
781 
     This is a 48 bit reloc for the FR30 that stores 32 bits.
782 
 
783 
 - : BFD_RELOC_FR30_20
784 
     This is a 32 bit reloc for the FR30 that stores 20 bits split up
785 
     into two sections.
786 
 
787 
 - : BFD_RELOC_FR30_6_IN_4
788 
     This is a 16 bit reloc for the FR30 that stores a 6 bit word
789 
     offset in 4 bits.
790 
 
791 
 - : BFD_RELOC_FR30_8_IN_8
792 
     This is a 16 bit reloc for the FR30 that stores an 8 bit byte
793 
     offset into 8 bits.
794 
 
795 
 - : BFD_RELOC_FR30_9_IN_8
796 
     This is a 16 bit reloc for the FR30 that stores a 9 bit short
797 
     offset into 8 bits.
798 
 
799 
 - : BFD_RELOC_FR30_10_IN_8
800 
     This is a 16 bit reloc for the FR30 that stores a 10 bit word
801 
     offset into 8 bits.
802 
 
803 
 - : BFD_RELOC_FR30_9_PCREL
804 
     This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
805 
     short offset into 8 bits.
806 
 
807 
 - : BFD_RELOC_FR30_12_PCREL
808 
     This is a 16 bit reloc for the FR30 that stores a 12 bit pc
809 
     relative short offset into 11 bits.
810 
 
811 
 - : BFD_RELOC_MCORE_PCREL_IMM8BY4
812 
 - : BFD_RELOC_MCORE_PCREL_IMM11BY2
813 
 - : BFD_RELOC_MCORE_PCREL_IMM4BY2
814 
 - : BFD_RELOC_MCORE_PCREL_32
815 
 - : BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
816 
 - : BFD_RELOC_MCORE_RVA
817 
     Motorola Mcore relocations.
818 
 
819 
 - : BFD_RELOC_MMIX_GETA
820 
 - : BFD_RELOC_MMIX_GETA_1
821 
 - : BFD_RELOC_MMIX_GETA_2
822 
 - : BFD_RELOC_MMIX_GETA_3
823 
     These are relocations for the GETA instruction.
824 
 
825 
 - : BFD_RELOC_MMIX_CBRANCH
826 
 - : BFD_RELOC_MMIX_CBRANCH_J
827 
 - : BFD_RELOC_MMIX_CBRANCH_1
828 
 - : BFD_RELOC_MMIX_CBRANCH_2
829 
 - : BFD_RELOC_MMIX_CBRANCH_3
830 
     These are relocations for a conditional branch instruction.
831 
 
832 
 - : BFD_RELOC_MMIX_PUSHJ
833 
 - : BFD_RELOC_MMIX_PUSHJ_1
834 
 - : BFD_RELOC_MMIX_PUSHJ_2
835 
 - : BFD_RELOC_MMIX_PUSHJ_3
836 
     These are relocations for the PUSHJ instruction.
837 
 
838 
 - : BFD_RELOC_MMIX_JMP
839 
 - : BFD_RELOC_MMIX_JMP_1
840 
 - : BFD_RELOC_MMIX_JMP_2
841 
 - : BFD_RELOC_MMIX_JMP_3
842 
     These are relocations for the JMP instruction.
843 
 
844 
 - : BFD_RELOC_MMIX_ADDR19
845 
     This is a relocation for a relative address as in a GETA
846 
     instruction or a branch.
847 
 
848 
 - : BFD_RELOC_MMIX_ADDR27
849 
     This is a relocation for a relative address as in a JMP
850 
     instruction.
851 
 
852 
 - : BFD_RELOC_MMIX_REG_OR_BYTE
853 
     This is a relocation for an instruction field that may be a general
854 
     register or a value 0..255.
855 
 
856 
 - : BFD_RELOC_MMIX_REG
857 
     This is a relocation for an instruction field that may be a general
858 
     register.
859 
 
860 
 - : BFD_RELOC_MMIX_BASE_PLUS_OFFSET
861 
     This is a relocation for two instruction fields holding a register
862 
     and an offset, the equivalent of the relocation.
863 
 
864 
 - : BFD_RELOC_MMIX_LOCAL
865 
     This relocation is an assertion that the expression is not
866 
     allocated as a global register.  It does not modify contents.
867 
 
868 
 - : BFD_RELOC_AVR_7_PCREL
869 
     This is a 16 bit reloc for the AVR that stores 8 bit pc relative
870 
     short offset into 7 bits.
871 
 
872 
 - : BFD_RELOC_AVR_13_PCREL
873 
     This is a 16 bit reloc for the AVR that stores 13 bit pc relative
874 
     short offset into 12 bits.
875 
 
876 
 - : BFD_RELOC_AVR_16_PM
877 
     This is a 16 bit reloc for the AVR that stores 17 bit value
878 
     (usually program memory address) into 16 bits.
879 
 
880 
 - : BFD_RELOC_AVR_LO8_LDI
881 
     This is a 16 bit reloc for the AVR that stores 8 bit value (usually
882 
     data memory address) into 8 bit immediate value of LDI insn.
883 
 
884 
 - : BFD_RELOC_AVR_HI8_LDI
885 
     This is a 16 bit reloc for the AVR that stores 8 bit value (high 8
886 
     bit of data memory address) into 8 bit immediate value of LDI insn.
887 
 
888 
 - : BFD_RELOC_AVR_HH8_LDI
889 
     This is a 16 bit reloc for the AVR that stores 8 bit value (most
890 
     high 8 bit of program memory address) into 8 bit immediate value
891 
     of LDI insn.
892 
 
893 
 - : BFD_RELOC_AVR_LO8_LDI_NEG
894 
     This is a 16 bit reloc for the AVR that stores negated 8 bit value
895 
     (usually data memory address) into 8 bit immediate value of SUBI
896 
     insn.
897 
 
898 
 - : BFD_RELOC_AVR_HI8_LDI_NEG
899 
     This is a 16 bit reloc for the AVR that stores negated 8 bit value
900 
     (high 8 bit of data memory address) into 8 bit immediate value of
901 
     SUBI insn.
902 
 
903 
 - : BFD_RELOC_AVR_HH8_LDI_NEG
904 
     This is a 16 bit reloc for the AVR that stores negated 8 bit value
905 
     (most high 8 bit of program memory address) into 8 bit immediate
906 
     value of LDI or SUBI insn.
907 
 
908 
 - : BFD_RELOC_AVR_LO8_LDI_PM
909 
     This is a 16 bit reloc for the AVR that stores 8 bit value (usually
910 
     command address) into 8 bit immediate value of LDI insn.
911 
 
912 
 - : BFD_RELOC_AVR_HI8_LDI_PM
913 
     This is a 16 bit reloc for the AVR that stores 8 bit value (high 8
914 
     bit of command address) into 8 bit immediate value of LDI insn.
915 
 
916 
 - : BFD_RELOC_AVR_HH8_LDI_PM
917 
     This is a 16 bit reloc for the AVR that stores 8 bit value (most
918 
     high 8 bit of command address) into 8 bit immediate value of LDI
919 
     insn.
920 
 
921 
 - : BFD_RELOC_AVR_LO8_LDI_PM_NEG
922 
     This is a 16 bit reloc for the AVR that stores negated 8 bit value
923 
     (usually command address) into 8 bit immediate value of SUBI insn.
924 
 
925 
 - : BFD_RELOC_AVR_HI8_LDI_PM_NEG
926 
     This is a 16 bit reloc for the AVR that stores negated 8 bit value
927 
     (high 8 bit of 16 bit command address) into 8 bit immediate value
928 
     of SUBI insn.
929 
 
930 
 - : BFD_RELOC_AVR_HH8_LDI_PM_NEG
931 
     This is a 16 bit reloc for the AVR that stores negated 8 bit value
932 
     (high 6 bit of 22 bit command address) into 8 bit immediate value
933 
     of SUBI insn.
934 
 
935 
 - : BFD_RELOC_AVR_CALL
936 
     This is a 32 bit reloc for the AVR that stores 23 bit value into
937 
     22 bits.
938 
 
939 
 - : BFD_RELOC_390_12
940 
     Direct 12 bit.
941 
 
942 
 - : BFD_RELOC_390_GOT12
943 
     12 bit GOT offset.
944 
 
945 
 - : BFD_RELOC_390_PLT32
946 
     32 bit PC relative PLT address.
947 
 
948 
 - : BFD_RELOC_390_COPY
949 
     Copy symbol at runtime.
950 
 
951 
 - : BFD_RELOC_390_GLOB_DAT
952 
     Create GOT entry.
953 
 
954 
 - : BFD_RELOC_390_JMP_SLOT
955 
     Create PLT entry.
956 
 
957 
 - : BFD_RELOC_390_RELATIVE
958 
     Adjust by program base.
959 
 
960 
 - : BFD_RELOC_390_GOTPC
961 
     32 bit PC relative offset to GOT.
962 
 
963 
 - : BFD_RELOC_390_GOT16
964 
     16 bit GOT offset.
965 
 
966 
 - : BFD_RELOC_390_PC16DBL
967 
     PC relative 16 bit shifted by 1.
968 
 
969 
 - : BFD_RELOC_390_PLT16DBL
970 
     16 bit PC rel. PLT shifted by 1.
971 
 
972 
 - : BFD_RELOC_390_PC32DBL
973 
     PC relative 32 bit shifted by 1.
974 
 
975 
 - : BFD_RELOC_390_PLT32DBL
976 
     32 bit PC rel. PLT shifted by 1.
977 
 
978 
 - : BFD_RELOC_390_GOTPCDBL
979 
     32 bit PC rel. GOT shifted by 1.
980 
 
981 
 - : BFD_RELOC_390_GOT64
982 
     64 bit GOT offset.
983 
 
984 
 - : BFD_RELOC_390_PLT64
985 
     64 bit PC relative PLT address.
986 
 
987 
 - : BFD_RELOC_390_GOTENT
988 
     32 bit rel. offset to GOT entry.
989 
 
990 
 - : BFD_RELOC_IP2K_FR9
991 
     Scenix IP2K - 9-bit register number / data address
992 
 
993 
 - : BFD_RELOC_IP2K_BANK
994 
     Scenix IP2K - 4-bit register/data bank number
995 
 
996 
 - : BFD_RELOC_IP2K_ADDR16CJP
997 
     Scenix IP2K - low 13 bits of instruction word address
998 
 
999 
 - : BFD_RELOC_IP2K_PAGE3
1000 
     Scenix IP2K - high 3 bits of instruction word address
1001 
 
1002 
 - : BFD_RELOC_IP2K_LO8DATA
1003 
 - : BFD_RELOC_IP2K_HI8DATA
1004 
 - : BFD_RELOC_IP2K_EX8DATA
1005 
     Scenix IP2K - ext/low/high 8 bits of data address
1006 
 
1007 
 - : BFD_RELOC_IP2K_LO8INSN
1008 
 - : BFD_RELOC_IP2K_HI8INSN
1009 
     Scenix IP2K - low/high 8 bits of instruction word address
1010 
 
1011 
 - : BFD_RELOC_IP2K_PC_SKIP
1012 
     Scenix IP2K - even/odd PC modifier to modify snb pcl.0
1013 
 
1014 
 - : BFD_RELOC_IP2K_TEXT
1015 
     Scenix IP2K - 16 bit word address in text section.
1016 
 
1017 
 - : BFD_RELOC_IP2K_FR_OFFSET
1018 
     Scenix IP2K - 7-bit sp or dp offset
1019 
 
1020 
 - : BFD_RELOC_VPE4KMATH_DATA
1021 
 - : BFD_RELOC_VPE4KMATH_INSN
1022 
     Scenix VPE4K coprocessor - data/insn-space addressing
1023 
 
1024 
 - : BFD_RELOC_VTABLE_INHERIT
1025 
 - : BFD_RELOC_VTABLE_ENTRY
1026 
     These two relocations are used by the linker to determine which of
1027 
     the entries in a C++ virtual function table are actually used.
1028 
     When the -gc-sections option is given, the linker will zero out
1029 
     the entries that are not used, so that the code for those
1030 
     functions need not be included in the output.
1031 
 
1032 
     VTABLE_INHERIT is a zero-space relocation used to describe to the
1033 
     linker the inheritence tree of a C++ virtual function table.  The
1034 
     relocation's symbol should be the parent class' vtable, and the
1035 
     relocation should be located at the child vtable.
1036 
 
1037 
     VTABLE_ENTRY is a zero-space relocation that describes the use of a
1038 
     virtual function table entry.  The reloc's symbol should refer to
1039 
     the table of the class mentioned in the code.  Off of that base,
1040 
     an offset describes the entry that is being used.  For Rela hosts,
1041 
     this offset is stored in the reloc's addend.  For Rel hosts, we
1042 
     are forced to put this offset in the reloc's section offset.
1043 
 
1044 
 - : BFD_RELOC_IA64_IMM14
1045 
 - : BFD_RELOC_IA64_IMM22
1046 
 - : BFD_RELOC_IA64_IMM64
1047 
 - : BFD_RELOC_IA64_DIR32MSB
1048 
 - : BFD_RELOC_IA64_DIR32LSB
1049 
 - : BFD_RELOC_IA64_DIR64MSB
1050 
 - : BFD_RELOC_IA64_DIR64LSB
1051 
 - : BFD_RELOC_IA64_GPREL22
1052 
 - : BFD_RELOC_IA64_GPREL64I
1053 
 - : BFD_RELOC_IA64_GPREL32MSB
1054 
 - : BFD_RELOC_IA64_GPREL32LSB
1055 
 - : BFD_RELOC_IA64_GPREL64MSB
1056 
 - : BFD_RELOC_IA64_GPREL64LSB
1057 
 - : BFD_RELOC_IA64_LTOFF22
1058 
 - : BFD_RELOC_IA64_LTOFF64I
1059 
 - : BFD_RELOC_IA64_PLTOFF22
1060 
 - : BFD_RELOC_IA64_PLTOFF64I
1061 
 - : BFD_RELOC_IA64_PLTOFF64MSB
1062 
 - : BFD_RELOC_IA64_PLTOFF64LSB
1063 
 - : BFD_RELOC_IA64_FPTR64I
1064 
 - : BFD_RELOC_IA64_FPTR32MSB
1065 
 - : BFD_RELOC_IA64_FPTR32LSB
1066 
 - : BFD_RELOC_IA64_FPTR64MSB
1067 
 - : BFD_RELOC_IA64_FPTR64LSB
1068 
 - : BFD_RELOC_IA64_PCREL21B
1069 
 - : BFD_RELOC_IA64_PCREL21BI
1070 
 - : BFD_RELOC_IA64_PCREL21M
1071 
 - : BFD_RELOC_IA64_PCREL21F
1072 
 - : BFD_RELOC_IA64_PCREL22
1073 
 - : BFD_RELOC_IA64_PCREL60B
1074 
 - : BFD_RELOC_IA64_PCREL64I
1075 
 - : BFD_RELOC_IA64_PCREL32MSB
1076 
 - : BFD_RELOC_IA64_PCREL32LSB
1077 
 - : BFD_RELOC_IA64_PCREL64MSB
1078 
 - : BFD_RELOC_IA64_PCREL64LSB
1079 
 - : BFD_RELOC_IA64_LTOFF_FPTR22
1080 
 - : BFD_RELOC_IA64_LTOFF_FPTR64I
1081 
 - : BFD_RELOC_IA64_LTOFF_FPTR32MSB
1082 
 - : BFD_RELOC_IA64_LTOFF_FPTR32LSB
1083 
 - : BFD_RELOC_IA64_LTOFF_FPTR64MSB
1084 
 - : BFD_RELOC_IA64_LTOFF_FPTR64LSB
1085 
 - : BFD_RELOC_IA64_SEGREL32MSB
1086 
 - : BFD_RELOC_IA64_SEGREL32LSB
1087 
 - : BFD_RELOC_IA64_SEGREL64MSB
1088 
 - : BFD_RELOC_IA64_SEGREL64LSB
1089 
 - : BFD_RELOC_IA64_SECREL32MSB
1090 
 - : BFD_RELOC_IA64_SECREL32LSB
1091 
 - : BFD_RELOC_IA64_SECREL64MSB
1092 
 - : BFD_RELOC_IA64_SECREL64LSB
1093 
 - : BFD_RELOC_IA64_REL32MSB
1094 
 - : BFD_RELOC_IA64_REL32LSB
1095 
 - : BFD_RELOC_IA64_REL64MSB
1096 
 - : BFD_RELOC_IA64_REL64LSB
1097 
 - : BFD_RELOC_IA64_LTV32MSB
1098 
 - : BFD_RELOC_IA64_LTV32LSB
1099 
 - : BFD_RELOC_IA64_LTV64MSB
1100 
 - : BFD_RELOC_IA64_LTV64LSB
1101 
 - : BFD_RELOC_IA64_IPLTMSB
1102 
 - : BFD_RELOC_IA64_IPLTLSB
1103 
 - : BFD_RELOC_IA64_COPY
1104 
 - : BFD_RELOC_IA64_LTOFF22X
1105 
 - : BFD_RELOC_IA64_LDXMOV
1106 
 - : BFD_RELOC_IA64_TPREL14
1107 
 - : BFD_RELOC_IA64_TPREL22
1108 
 - : BFD_RELOC_IA64_TPREL64I
1109 
 - : BFD_RELOC_IA64_TPREL64MSB
1110 
 - : BFD_RELOC_IA64_TPREL64LSB
1111 
 - : BFD_RELOC_IA64_LTOFF_TPREL22
1112 
 - : BFD_RELOC_IA64_DTPMOD64MSB
1113 
 - : BFD_RELOC_IA64_DTPMOD64LSB
1114 
 - : BFD_RELOC_IA64_LTOFF_DTPMOD22
1115 
 - : BFD_RELOC_IA64_DTPREL14
1116 
 - : BFD_RELOC_IA64_DTPREL22
1117 
 - : BFD_RELOC_IA64_DTPREL64I
1118 
 - : BFD_RELOC_IA64_DTPREL32MSB
1119 
 - : BFD_RELOC_IA64_DTPREL32LSB
1120 
 - : BFD_RELOC_IA64_DTPREL64MSB
1121 
 - : BFD_RELOC_IA64_DTPREL64LSB
1122 
 - : BFD_RELOC_IA64_LTOFF_DTPREL22
1123 
     Intel IA64 Relocations.
1124 
 
1125 
 - : BFD_RELOC_M68HC11_HI8
1126 
     Motorola 68HC11 reloc.  This is the 8 bit high part of an absolute
1127 
     address.
1128 
 
1129 
 - : BFD_RELOC_M68HC11_LO8
1130 
     Motorola 68HC11 reloc.  This is the 8 bit low part of an absolute
1131 
     address.
1132 
 
1133 
 - : BFD_RELOC_M68HC11_3B
1134 
     Motorola 68HC11 reloc.  This is the 3 bit of a value.
1135 
 
1136 
 - : BFD_RELOC_M68HC11_RL_JUMP
1137 
     Motorola 68HC11 reloc.  This reloc marks the beginning of a
1138 
     jump/call instruction.  It is used for linker relaxation to
1139 
     correctly identify beginning of instruction and change some
1140 
     branchs to use PC-relative addressing mode.
1141 
 
1142 
 - : BFD_RELOC_M68HC11_RL_GROUP
1143 
     Motorola 68HC11 reloc.  This reloc marks a group of several
1144 
     instructions that gcc generates and for which the linker
1145 
     relaxation pass can modify and/or remove some of them.
1146 
 
1147 
 - : BFD_RELOC_M68HC11_LO16
1148 
     Motorola 68HC11 reloc.  This is the 16-bit lower part of an
1149 
     address.  It is used for 'call' instruction to specify the symbol
1150 
     address without any special transformation (due to memory bank
1151 
     window).
1152 
 
1153 
 - : BFD_RELOC_M68HC11_PAGE
1154 
     Motorola 68HC11 reloc.  This is a 8-bit reloc that specifies the
1155 
     page number of an address.  It is used by 'call' instruction to
1156 
     specify the page number of the symbol.
1157 
 
1158 
 - : BFD_RELOC_M68HC11_24
1159 
     Motorola 68HC11 reloc.  This is a 24-bit reloc that represents the
1160 
     address with a 16-bit value and a 8-bit page number.  The symbol
1161 
     address is transformed to follow the 16K memory bank of 68HC12
1162 
     (seen as mapped in the window).
1163 
 
1164 
 - : BFD_RELOC_CRIS_BDISP8
1165 
 - : BFD_RELOC_CRIS_UNSIGNED_5
1166 
 - : BFD_RELOC_CRIS_SIGNED_6
1167 
 - : BFD_RELOC_CRIS_UNSIGNED_6
1168 
 - : BFD_RELOC_CRIS_UNSIGNED_4
1169 
     These relocs are only used within the CRIS assembler.  They are not
1170 
     (at present) written to any object files.
1171 
 
1172 
 - : BFD_RELOC_CRIS_COPY
1173 
 - : BFD_RELOC_CRIS_GLOB_DAT
1174 
 - : BFD_RELOC_CRIS_JUMP_SLOT
1175 
 - : BFD_RELOC_CRIS_RELATIVE
1176 
     Relocs used in ELF shared libraries for CRIS.
1177 
 
1178 
 - : BFD_RELOC_CRIS_32_GOT
1179 
     32-bit offset to symbol-entry within GOT.
1180 
 
1181 
 - : BFD_RELOC_CRIS_16_GOT
1182 
     16-bit offset to symbol-entry within GOT.
1183 
 
1184 
 - : BFD_RELOC_CRIS_32_GOTPLT
1185 
     32-bit offset to symbol-entry within GOT, with PLT handling.
1186 
 
1187 
 - : BFD_RELOC_CRIS_16_GOTPLT
1188 
     16-bit offset to symbol-entry within GOT, with PLT handling.
1189 
 
1190 
 - : BFD_RELOC_CRIS_32_GOTREL
1191 
     32-bit offset to symbol, relative to GOT.
1192 
 
1193 
 - : BFD_RELOC_CRIS_32_PLT_GOTREL
1194 
     32-bit offset to symbol with PLT entry, relative to GOT.
1195 
 
1196 
 - : BFD_RELOC_CRIS_32_PLT_PCREL
1197 
     32-bit offset to symbol with PLT entry, relative to this
1198 
     relocation.
1199 
 
1200 
 - : BFD_RELOC_860_COPY
1201 
 - : BFD_RELOC_860_GLOB_DAT
1202 
 - : BFD_RELOC_860_JUMP_SLOT
1203 
 - : BFD_RELOC_860_RELATIVE
1204 
 - : BFD_RELOC_860_PC26
1205 
 - : BFD_RELOC_860_PLT26
1206 
 - : BFD_RELOC_860_PC16
1207 
 - : BFD_RELOC_860_LOW0
1208 
 - : BFD_RELOC_860_SPLIT0
1209 
 - : BFD_RELOC_860_LOW1
1210 
 - : BFD_RELOC_860_SPLIT1
1211 
 - : BFD_RELOC_860_LOW2
1212 
 - : BFD_RELOC_860_SPLIT2
1213 
 - : BFD_RELOC_860_LOW3
1214 
 - : BFD_RELOC_860_LOGOT0
1215 
 - : BFD_RELOC_860_SPGOT0
1216 
 - : BFD_RELOC_860_LOGOT1
1217 
 - : BFD_RELOC_860_SPGOT1
1218 
 - : BFD_RELOC_860_LOGOTOFF0
1219 
 - : BFD_RELOC_860_SPGOTOFF0
1220 
 - : BFD_RELOC_860_LOGOTOFF1
1221 
 - : BFD_RELOC_860_SPGOTOFF1
1222 
 - : BFD_RELOC_860_LOGOTOFF2
1223 
 - : BFD_RELOC_860_LOGOTOFF3
1224 
 - : BFD_RELOC_860_LOPC
1225 
 - : BFD_RELOC_860_HIGHADJ
1226 
 - : BFD_RELOC_860_HAGOT
1227 
 - : BFD_RELOC_860_HAGOTOFF
1228 
 - : BFD_RELOC_860_HAPC
1229 
 - : BFD_RELOC_860_HIGH
1230 
 - : BFD_RELOC_860_HIGOT
1231 
 - : BFD_RELOC_860_HIGOTOFF
1232 
     Intel i860 Relocations.
1233 
 
1234 
 - : BFD_RELOC_OPENRISC_ABS_26
1235 
 - : BFD_RELOC_OPENRISC_REL_26
1236 
     OpenRISC Relocations.
1237 
 
1238 
 - : BFD_RELOC_H8_DIR16A8
1239 
 - : BFD_RELOC_H8_DIR16R8
1240 
 - : BFD_RELOC_H8_DIR24A8
1241 
 - : BFD_RELOC_H8_DIR24R8
1242 
 - : BFD_RELOC_H8_DIR32A16
1243 
     H8 elf Relocations.
1244 
 
1245 
 - : BFD_RELOC_XSTORMY16_REL_12
1246 
 - : BFD_RELOC_XSTORMY16_24
1247 
 - : BFD_RELOC_XSTORMY16_FPTR16
1248 
     Sony Xstormy16 Relocations.
1249 
 
1250 
 - : BFD_RELOC_VAX_GLOB_DAT
1251 
 - : BFD_RELOC_VAX_JMP_SLOT
1252 
 - : BFD_RELOC_VAX_RELATIVE
1253 
     Relocations used by VAX ELF.
1254 
 
1255 
 
1256 
     typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
1257 
 
1258 
`bfd_reloc_type_lookup'
1259 
.......................
1260 
 
1261 
   *Synopsis*
1262 
     reloc_howto_type *
1263 
     bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code);
1264 
   *Description*
1265 
Return a pointer to a howto structure which, when invoked, will perform
1266 
the relocation CODE on data from the architecture noted.
1267 
 
1268 
`bfd_default_reloc_type_lookup'
1269 
...............................
1270 
 
1271 
   *Synopsis*
1272 
     reloc_howto_type *bfd_default_reloc_type_lookup
1273 
        (bfd *abfd, bfd_reloc_code_real_type  code);
1274 
   *Description*
1275 
Provides a default relocation lookup routine for any architecture.
1276 
 
1277 
`bfd_get_reloc_code_name'
1278 
.........................
1279 
 
1280 
   *Synopsis*
1281 
     const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
1282 
   *Description*
1283 
Provides a printable name for the supplied relocation code.  Useful
1284 
mainly for printing error messages.
1285 
 
1286 
`bfd_generic_relax_section'
1287 
...........................
1288 
 
1289 
   *Synopsis*
1290 
     boolean bfd_generic_relax_section
1291 
        (bfd *abfd,
1292 
         asection *section,
1293 
         struct bfd_link_info *,
1294 
         boolean *);
1295 
   *Description*
1296 
Provides default handling for relaxing for back ends which don't do
1297 
relaxing - i.e., does nothing.
1298 
 
1299 
`bfd_generic_gc_sections'
1300 
.........................
1301 
 
1302 
   *Synopsis*
1303 
     boolean bfd_generic_gc_sections
1304 
        (bfd *, struct bfd_link_info *);
1305 
   *Description*
1306 
Provides default handling for relaxing for back ends which don't do
1307 
section gc - i.e., does nothing.
1308 
 
1309 
`bfd_generic_merge_sections'
1310 
............................
1311 
 
1312 
   *Synopsis*
1313 
     boolean bfd_generic_merge_sections
1314 
        (bfd *, struct bfd_link_info *);
1315 
   *Description*
1316 
Provides default handling for SEC_MERGE section merging for back ends
1317 
which don't have SEC_MERGE support - i.e., does nothing.
1318 
 
1319 
`bfd_generic_get_relocated_section_contents'
1320 
............................................
1321 
 
1322 
   *Synopsis*
1323 
     bfd_byte *
1324 
     bfd_generic_get_relocated_section_contents (bfd *abfd,
1325 
         struct bfd_link_info *link_info,
1326 
         struct bfd_link_order *link_order,
1327 
         bfd_byte *data,
1328 
         boolean relocateable,
1329 
         asymbol **symbols);
1330 
   *Description*
1331 
Provides default handling of relocation effort for back ends which
1332 
can't be bothered to do it efficiently.
1333 
 
1334 

1335 
File: bfd.info,  Node: Core Files,  Next: Targets,  Prev: Relocations,  Up: BFD front end
1336 
 
1337 
Core files
1338 
==========
1339 
 
1340 
   *Description*
1341 
These are functions pertaining to core files.
1342 
 
1343 
`bfd_core_file_failing_command'
1344 
...............................
1345 
 
1346 
   *Synopsis*
1347 
     const char *bfd_core_file_failing_command(bfd *abfd);
1348 
   *Description*
1349 
Return a read-only string explaining which program was running when it
1350 
failed and produced the core file ABFD.
1351 
 
1352 
`bfd_core_file_failing_signal'
1353 
..............................
1354 
 
1355 
   *Synopsis*
1356 
     int bfd_core_file_failing_signal(bfd *abfd);
1357 
   *Description*
1358 
Returns the signal number which caused the core dump which generated
1359 
the file the BFD ABFD is attached to.
1360 
 
1361 
`core_file_matches_executable_p'
1362 
................................
1363 
 
1364 
   *Synopsis*
1365 
     boolean core_file_matches_executable_p
1366 
        (bfd *core_bfd, bfd *exec_bfd);
1367 
   *Description*
1368 
Return `true' if the core file attached to CORE_BFD was generated by a
1369 
run of the executable file attached to EXEC_BFD, `false' otherwise.
1370 
 
1371 

1372 
File: bfd.info,  Node: Targets,  Next: Architectures,  Prev: Core Files,  Up: BFD front end
1373 
 
1374 
Targets
1375 
=======
1376 
 
1377 
   *Description*
1378 
Each port of BFD to a different machine requries the creation of a
1379 
target back end. All the back end provides to the root part of BFD is a
1380 
structure containing pointers to functions which perform certain low
1381 
level operations on files. BFD translates the applications's requests
1382 
through a pointer into calls to the back end routines.
1383 
 
1384 
   When a file is opened with `bfd_openr', its format and target are
1385 
unknown. BFD uses various mechanisms to determine how to interpret the
1386 
file. The operations performed are:
1387 
 
1388 
   * Create a BFD by calling the internal routine `_bfd_new_bfd', then
1389 
     call `bfd_find_target' with the target string supplied to
1390 
     `bfd_openr' and the new BFD pointer.
1391 
 
1392 
   * If a null target string was provided to `bfd_find_target', look up
1393 
     the environment variable `GNUTARGET' and use that as the target
1394 
     string.
1395 
 
1396 
   * If the target string is still `NULL', or the target string is
1397 
     `default', then use the first item in the target vector as the
1398 
     target type, and set `target_defaulted' in the BFD to cause
1399 
     `bfd_check_format' to loop through all the targets.  *Note
1400 
     bfd_target::.  *Note Formats::.
1401 
 
1402 
   * Otherwise, inspect the elements in the target vector one by one,
1403 
     until a match on target name is found. When found, use it.
1404 
 
1405 
   * Otherwise return the error `bfd_error_invalid_target' to
1406 
     `bfd_openr'.
1407 
 
1408 
   * `bfd_openr' attempts to open the file using `bfd_open_file', and
1409 
     returns the BFD.
1410 
   Once the BFD has been opened and the target selected, the file
1411 
format may be determined. This is done by calling `bfd_check_format' on
1412 
the BFD with a suggested format.  If `target_defaulted' has been set,
1413 
each possible target type is tried to see if it recognizes the
1414 
specified format.  `bfd_check_format' returns `true' when the caller
1415 
guesses right.
1416 
 
1417 
* Menu:
1418 
 
1419 
* bfd_target::
1420 
 

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