1 |
1183 |
sfurman |
/* Definitions to target GDB to or1k targets.
|
2 |
|
|
Copyright 2001 Free Software Foundation, Inc.
|
3 |
|
|
|
4 |
|
|
This file is part of GDB.
|
5 |
|
|
|
6 |
|
|
This program is free software; you can redistribute it and/or modify
|
7 |
|
|
it under the terms of the GNU General Public License as published by
|
8 |
|
|
the Free Software Foundation; either version 2 of the License, or
|
9 |
|
|
(at your option) any later version.
|
10 |
|
|
|
11 |
|
|
This program is distributed in the hope that it will be useful,
|
12 |
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 |
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
14 |
|
|
GNU General Public License for more details.
|
15 |
|
|
|
16 |
|
|
You should have received a copy of the GNU General Public License
|
17 |
|
|
along with this program; if not, write to the Free Software
|
18 |
|
|
Foundation, Inc., 59 Temple Place - Suite 330,
|
19 |
|
|
Boston, MA 02111-1307, USA. */
|
20 |
|
|
|
21 |
|
|
#ifndef TM_OR1K_H
|
22 |
|
|
#define TM_OR1K_H
|
23 |
|
|
|
24 |
|
|
#ifndef TARGET_OR1K
|
25 |
|
|
#define TARGET_OR1K
|
26 |
|
|
#endif
|
27 |
|
|
|
28 |
|
|
#include "defs.h"
|
29 |
|
|
|
30 |
|
|
#ifndef __CYGWIN__
|
31 |
|
|
#include <inttypes.h> /* CZ */
|
32 |
|
|
#endif /* __CYGWIN__ */
|
33 |
|
|
|
34 |
|
|
struct value;
|
35 |
|
|
|
36 |
|
|
struct struct_or1k_implementation
|
37 |
|
|
{
|
38 |
|
|
/* Implementation version. */
|
39 |
|
|
unsigned int VR;
|
40 |
|
|
/* Units present. */
|
41 |
|
|
unsigned int UPR;
|
42 |
|
|
/* Number of total available matchpoints in this implementation. */
|
43 |
|
|
unsigned int num_matchpoints;
|
44 |
|
|
/* Number of currently used matchpoints. */
|
45 |
|
|
unsigned int num_used_matchpoints;
|
46 |
|
|
/* Has watchpoint driven counters. */
|
47 |
|
|
int has_counters;
|
48 |
|
|
/* Number of registers. */
|
49 |
|
|
unsigned int num_gpr_regs;
|
50 |
|
|
unsigned int num_vfpr_regs;
|
51 |
|
|
/* Is there any vf support? */
|
52 |
|
|
int vf_present;
|
53 |
|
|
};
|
54 |
|
|
|
55 |
|
|
struct or1k_target_ops
|
56 |
|
|
{
|
57 |
|
|
/* Name this target type. */
|
58 |
|
|
char *to_shortname;
|
59 |
|
|
|
60 |
|
|
/* Init target. */
|
61 |
|
|
void (*to_init) PARAMS ((char *args));
|
62 |
|
|
/* Destruct target. */
|
63 |
|
|
void (*to_done) PARAMS ((void));
|
64 |
|
|
|
65 |
|
|
/* Read register.
|
66 |
|
|
Does not fail, places error no. in err instead or call error(), if fatal. */
|
67 |
|
|
ULONGEST (*to_read_reg) PARAMS ((unsigned int regno));
|
68 |
|
|
/* Write register.
|
69 |
|
|
Does not fail, places error no. in err instead or call error(), if fatal. */
|
70 |
|
|
void (*to_write_reg) PARAMS ((unsigned int regno, ULONGEST value));
|
71 |
|
|
|
72 |
|
|
/* Read a block...possibly more efficient than several isolated
|
73 |
|
|
call to read_reg...worst case the same efficiency. Returns 0
|
74 |
|
|
on success or errno if a failure occurred. */
|
75 |
|
|
int (*to_read_block) PARAMS ((unsigned int regno, void* block, int nRegisters));
|
76 |
|
|
|
77 |
|
|
/* Write a block...possibly more efficient than several isolated
|
78 |
|
|
call to write_reg...worst case the same efficiency. Returns 0
|
79 |
|
|
on success or errno if a failure occurred. */
|
80 |
|
|
int (*to_write_block) PARAMS ((unsigned int regno, void* block, int nRegisters));
|
81 |
|
|
|
82 |
|
|
/* Selects scan chain. All register accesses are related to current scan chain.
|
83 |
|
|
Does not fail, places error no. in err instead or call error(), if fatal.
|
84 |
|
|
See jtag_chains enum. */
|
85 |
|
|
void (*to_set_chain) PARAMS ((int chain));
|
86 |
|
|
|
87 |
|
|
/* Executes extended command on the target. */
|
88 |
|
|
void (*to_exec_command) PARAMS ((char *args, int from_tty));
|
89 |
|
|
|
90 |
|
|
/* Associated target_ops. */
|
91 |
|
|
struct target_ops *gdb_ops;
|
92 |
|
|
/* Should be OPS_MAGIC. */
|
93 |
|
|
int to_magic;
|
94 |
|
|
};
|
95 |
|
|
|
96 |
|
|
|
97 |
|
|
#define DEFAULT_PROMPT "(gdb) "
|
98 |
|
|
|
99 |
|
|
/* Context stuff. */
|
100 |
|
|
#define CURRENT_CID (0)
|
101 |
|
|
#define MAX_CID (15)
|
102 |
|
|
|
103 |
|
|
|
104 |
|
|
/* Instruction definitions. */
|
105 |
|
|
#define BRK_INSTR_STRUCT {0x21, 0x00, 0x00, 0x01}
|
106 |
|
|
#define NOP_INSTR (0x15000000)
|
107 |
|
|
|
108 |
|
|
/* Special purpose regisers. */
|
109 |
|
|
#define SPR_GROUP_SIZE_BITS (11)
|
110 |
|
|
#define SPR_GROUP_SIZE (1 << SPR_GROUP_SIZE_BITS)
|
111 |
|
|
#define SPR_SYSTEM_GROUP (0)
|
112 |
|
|
#define SPR_DEBUG_GROUP (6)
|
113 |
|
|
#define SPR_GPR_START (1024)
|
114 |
|
|
#define SPR_VFPR_START ((MAX_CID + 1) * MAX_GPR_REGS + SPR_GPR_START)
|
115 |
|
|
#define OR1K_NUM_SPR_GROUPS (12)
|
116 |
|
|
|
117 |
|
|
/* Define register values. */
|
118 |
|
|
#define SPR_REG(group, index) (((group) << SPR_GROUP_SIZE_BITS) + (index))
|
119 |
|
|
|
120 |
|
|
#define VR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 0)
|
121 |
|
|
#define UPR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 1)
|
122 |
|
|
#define CPUCFGR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 2)
|
123 |
|
|
#define DCFGR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 7)
|
124 |
|
|
#define PC_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 16)
|
125 |
|
|
#define SR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 17)
|
126 |
|
|
#define PPC_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 18)
|
127 |
|
|
#define CCR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP, 4 + (cid))
|
128 |
|
|
#define EPCR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP, 32 + (cid))
|
129 |
|
|
#define EPCR0_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 32)
|
130 |
|
|
|
131 |
|
|
#define DVR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0xee)
|
132 |
|
|
#define DCR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0xee)
|
133 |
|
|
#define DMR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 16)
|
134 |
|
|
#define DMR2_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 17)
|
135 |
|
|
#define DCWR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0xee)
|
136 |
|
|
#define DCWR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 0xee)
|
137 |
|
|
#define DSR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 20)
|
138 |
|
|
#define DRR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 21)
|
139 |
|
|
|
140 |
|
|
#define ZERO_REGNUM (0)
|
141 |
|
|
#define SP_REGNUM (1)
|
142 |
|
|
#define FP_REGNUM (2)
|
143 |
|
|
#define A0_REGNUM (3)
|
144 |
|
|
#define A5_REGNUM (8)
|
145 |
|
|
#define LR_REGNUM (9)
|
146 |
|
|
#define RV_REGNUM (11)
|
147 |
|
|
#define VFA0_REGNUM (MAX_GPR_REGS + 0)
|
148 |
|
|
#define VFA5_REGNUM (MAX_GPR_REGS + 5)
|
149 |
|
|
#define VFRV_REGNUM (MAX_GPR_REGS + 6)
|
150 |
|
|
#define PC_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 0)
|
151 |
|
|
#define PS_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 1)
|
152 |
|
|
#define EPCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2)
|
153 |
|
|
#define CCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2)
|
154 |
|
|
|
155 |
|
|
/******** END OF ADDITIONS BY CZ ************/
|
156 |
|
|
|
157 |
|
|
extern int or1k_regnum_to_sprnum PARAMS ((int regno));
|
158 |
|
|
#define REGNUM_TO_SPRNUM(regno) (or1k_regnum_to_sprnum(regno))
|
159 |
|
|
|
160 |
|
|
/* Defines for SPR bits. */
|
161 |
|
|
#define DMR1_ST (0x00400000)
|
162 |
|
|
|
163 |
|
|
/* Changed by CZ 21/06/01 */
|
164 |
|
|
#define DRR_TE (0x00002000)
|
165 |
|
|
#define DRR_SSE (0x00001000)
|
166 |
|
|
#define DRR_SCE (0x00000800)
|
167 |
|
|
#define DRR_RE (0x00000400)
|
168 |
|
|
#define DRR_IME (0x00000200)
|
169 |
|
|
#define DRR_DME (0x00000100)
|
170 |
|
|
#define DRR_HPINTE (0x00000080)
|
171 |
|
|
#define DRR_IIE (0x00000040)
|
172 |
|
|
#define DRR_AE (0x00000020)
|
173 |
|
|
#define DRR_LPINTE (0x00000010)
|
174 |
|
|
#define DRR_IPFE (0x00000008)
|
175 |
|
|
#define DRR_DPFE (0x00000004)
|
176 |
|
|
#define DRR_BUSEE (0x00000002)
|
177 |
|
|
#define DRR_RSTE (0x00000001)
|
178 |
|
|
|
179 |
|
|
/*
|
180 |
|
|
* Bit definitions for the Unit Present Register
|
181 |
|
|
*
|
182 |
|
|
*/
|
183 |
|
|
#define SPR_UPR_UP 0x00000001 /* UPR present */
|
184 |
|
|
#define SPR_UPR_DCP 0x00000002 /* Data cache present */
|
185 |
|
|
#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */
|
186 |
|
|
#define SPR_UPR_DMP 0x00000008 /* Data MMU present */
|
187 |
|
|
#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */
|
188 |
|
|
#define SPR_UPR_OB32P 0x00000020 /* ORBIS32 present */
|
189 |
|
|
#define SPR_UPR_OB64P 0x00000040 /* ORBIS64 present */
|
190 |
|
|
#define SPR_UPR_OF32P 0x00000080 /* ORFPX32 present */
|
191 |
|
|
#define SPR_UPR_OF64P 0x00000100 /* ORFPX64 present */
|
192 |
|
|
#define SPR_UPR_OV32P 0x00000200 /* ORVDX32 present */
|
193 |
|
|
#define SPR_UPR_OV64P 0x00000400 /* ORVDX64 present */
|
194 |
|
|
#define SPR_UPR_DUP 0x00000800 /* Debug unit present */
|
195 |
|
|
#define SPR_UPR_PCUP 0x00001000 /* Performance counters unit present */
|
196 |
|
|
#define SPR_UPR_PMP 0x00002000 /* Power management present */
|
197 |
|
|
#define SPR_UPR_PICP 0x00004000 /* PIC present */
|
198 |
|
|
#define SPR_UPR_TTP 0x00008000 /* Tick timer present */
|
199 |
|
|
#define SPR_UPR_SRP 0x00010000 /* Shadow registers present */
|
200 |
|
|
#define SPR_UPR_RES 0x00fe0000 /* ORVDX32 present */
|
201 |
|
|
#define SPR_UPR_CUST 0xff000000 /* Custom units */
|
202 |
|
|
|
203 |
|
|
/* Number of matchpoints */
|
204 |
|
|
#define NUM_MATCHPOINTS (or1k_implementation.num_matchpoints)
|
205 |
|
|
#define MAX_MATCHPOINTS (8)
|
206 |
|
|
|
207 |
|
|
/* Number of machine GPR registers */
|
208 |
|
|
#define NUM_GPR_REGS (or1k_implementation.num_gpr_regs)
|
209 |
|
|
#define MAX_GPR_REGS (32)
|
210 |
|
|
|
211 |
|
|
/* Number of machine VF registers */
|
212 |
|
|
#define NUM_VF_REGS (or1k_implementation.num_vfpr_regs)
|
213 |
|
|
#define MAX_VF_REGS (32)
|
214 |
|
|
|
215 |
|
|
/* gdb mapping of registers */
|
216 |
|
|
#ifndef NUM_REGS
|
217 |
|
|
#define NUM_REGS (MAX_GPR_REGS+MAX_VF_REGS+3)
|
218 |
|
|
#endif
|
219 |
|
|
|
220 |
|
|
/* Can act like a little or big endian. */
|
221 |
|
|
#if !defined (TARGET_BYTE_ORDER_DEFAULT)
|
222 |
|
|
#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN
|
223 |
|
|
#define TARGET_BYTE_ORDER_SELECTABLE_P (1)
|
224 |
|
|
#endif
|
225 |
|
|
|
226 |
|
|
/* Size (in bytes) of registers. */
|
227 |
|
|
#define OR1K_SPR_REGSIZE (4)
|
228 |
|
|
#define OR1K_VF_REGSIZE (8)
|
229 |
|
|
#define OR1K_GPR_REGSIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
|
230 |
|
|
#define OR1K_VF_DOUBLE (0)
|
231 |
|
|
|
232 |
|
|
#define OR1K_IS_GPR(N) ((N) >= 0 && (N) < MAX_GPR_REGS)
|
233 |
|
|
#define OR1K_IS_VF(N) ((N) >= MAX_GPR_REGS && (N) < MAX_GPR_REGS + MAX_VF_REGS)
|
234 |
|
|
|
235 |
|
|
/* Register representation is the same as in memory. */
|
236 |
|
|
#define REGISTER_CONVERTIBLE(N) (0)
|
237 |
|
|
|
238 |
|
|
/* Given the register index, return the name of the corresponding
|
239 |
|
|
register. */
|
240 |
|
|
extern char *or1k_register_name PARAMS ((int regno));
|
241 |
|
|
#define REGISTER_NAME(regno) or1k_register_name (regno)
|
242 |
|
|
|
243 |
|
|
/* Is this implementation 64 or 32 bit.
|
244 |
|
|
WARNING: gdb or1k port is not yet prepared for 64b implementations! */
|
245 |
|
|
#define OR1K_64BIT_IMPLEMENTATION 0
|
246 |
|
|
|
247 |
|
|
/* Number of bytes of storage in the actual machine representation for
|
248 |
|
|
register N. NOTE: This indirectly defines the register size
|
249 |
|
|
transfered by the GDB protocol. If we have 64bit processor
|
250 |
|
|
implementation, GPR register raw size is 8B, otherwise 4B. */
|
251 |
|
|
#define REGISTER_RAW_SIZE(N) or1k_register_raw_size(N)
|
252 |
|
|
extern int or1k_register_raw_size PARAMS ((int regnum));
|
253 |
|
|
|
254 |
|
|
/* Number of bytes of storage in the program's representation
|
255 |
|
|
for register N. Same as RAW_SIZE. */
|
256 |
|
|
#define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
|
257 |
|
|
|
258 |
|
|
/* Return the GDB type object for the "standard" data type of data in
|
259 |
|
|
register N. */
|
260 |
|
|
#define REGISTER_VIRTUAL_TYPE(N) ((OR1K_IS_GPR(N))?(\
|
261 |
|
|
(OR1K_64BIT_IMPLEMENTATION)?builtin_type_int64:builtin_type_int\
|
262 |
|
|
):(OR1K_IS_VF(N) ? builtin_type_float : builtin_type_uint32))
|
263 |
|
|
|
264 |
|
|
/* Largest value REGISTER_RAW_SIZE can have. */
|
265 |
|
|
#define MAX_REGISTER_RAW_SIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
|
266 |
|
|
|
267 |
|
|
/* Largest value REGISTER_VIRTUAL_SIZE can have. */
|
268 |
|
|
#define MAX_REGISTER_VIRTUAL_SIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))
|
269 |
|
|
|
270 |
|
|
#define REGISTER_SIZE (MAX_REGISTER_VIRTUAL_SIZE)
|
271 |
|
|
|
272 |
|
|
/* ABI uses R3 through R8 for args. */
|
273 |
|
|
#define OR1K_LAST_ARG_REGNUM (A5_REGNUM)
|
274 |
|
|
#define OR1K_NUM_ARG_REGS (6)
|
275 |
|
|
|
276 |
|
|
/* ABI uses VFR0 through VFR5 for float args. */
|
277 |
|
|
#define OR1K_LAST_FP_ARG_REGNUM (VFA5_REGNUM)
|
278 |
|
|
#define OR1K_NUM_FP_ARG_REGS (6)
|
279 |
|
|
|
280 |
|
|
/* Should not store into R0. */
|
281 |
|
|
#define CANNOT_STORE_REGISTER(N) ((N) == 0)
|
282 |
|
|
|
283 |
|
|
/* Index within `registers' of the first byte of the space for
|
284 |
|
|
register N. */
|
285 |
|
|
#define REGISTER_BYTE(N) or1k_register_byte(N)
|
286 |
|
|
extern int or1k_register_byte PARAMS ((int regnum));
|
287 |
|
|
|
288 |
|
|
/* Total amount of space needed to store our copies of the machine's
|
289 |
|
|
register state, the array `registers'. */
|
290 |
|
|
#define REGISTER_BYTES ((NUM_GPR_REGS * OR1K_GPR_REGSIZE) + \
|
291 |
|
|
(NUM_VF_REGS * OR1K_VF_REGSIZE) + \
|
292 |
|
|
(3 * OR1K_SPR_REGSIZE ))
|
293 |
|
|
|
294 |
|
|
extern void or1k_do_registers_info PARAMS ((int, int));
|
295 |
|
|
#define DO_REGISTERS_INFO(regnum, fp) or1k_do_registers_info(regnum, fp)
|
296 |
|
|
|
297 |
|
|
|
298 |
|
|
|
299 |
|
|
/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a
|
300 |
|
|
16- or 32-bit breakpoint should be used. It returns a pointer
|
301 |
|
|
to a string of bytes that encode a breakpoint instruction, stores
|
302 |
|
|
the length of the string to *lenptr, and adjusts the pc (if necessary) to
|
303 |
|
|
point to the actual memory location where the breakpoint should be
|
304 |
|
|
inserted. */
|
305 |
|
|
extern unsigned char *or1k_breakpoint_from_pc PARAMS ((CORE_ADDR *bp_addr, int *bp_size));
|
306 |
|
|
#define BREAKPOINT_FROM_PC(pcptr, lenptr) or1k_breakpoint_from_pc (pcptr, lenptr)
|
307 |
|
|
|
308 |
|
|
/* Amount PC must be decremented by after a breakpoint.
|
309 |
|
|
This is often the number of bytes in BREAKPOINT
|
310 |
|
|
but not always. */
|
311 |
|
|
|
312 |
|
|
#define DECR_PC_AFTER_BREAK 0
|
313 |
|
|
|
314 |
|
|
/* Don't step over l.trap */
|
315 |
|
|
#define CANNOT_STEP_BREAKPOINT
|
316 |
|
|
|
317 |
|
|
extern int or1k_insert_breakpoint (CORE_ADDR addr, char *contents_cache);
|
318 |
|
|
#define target_insert_hw_breakpoint(addr, cache) or1k_insert_breakpoint (addr, cache)
|
319 |
|
|
|
320 |
|
|
extern int or1k_remove_breakpoint (CORE_ADDR addr, char *contents_cache);
|
321 |
|
|
#define target_remove_hw_breakpoint(addr, cache) or1k_remove_breakpoint (addr, cache)
|
322 |
|
|
|
323 |
|
|
/* Watchpoint support. */
|
324 |
|
|
#define TARGET_HAS_HARDWARE_WATCHPOINTS
|
325 |
|
|
|
326 |
|
|
/* Use these macros for watchpoint insertion/deletion. */
|
327 |
|
|
/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
|
328 |
|
|
extern int or1k_insert_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));
|
329 |
|
|
#define target_insert_watchpoint(addr, len, type) \
|
330 |
|
|
or1k_insert_watchpoint (addr, len, type)
|
331 |
|
|
|
332 |
|
|
extern int or1k_insert_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));
|
333 |
|
|
#define target_remove_watchpoint(addr, len, type) \
|
334 |
|
|
or1k_remove_watchpoint (addr, len, type)
|
335 |
|
|
|
336 |
|
|
/* We need to remove watchpoints when stepping, else we hit them again! */
|
337 |
|
|
#define HAVE_NONSTEPPABLE_WATCHPOINT
|
338 |
|
|
|
339 |
|
|
extern int or1k_stopped_by_watchpoint PARAMS ((void));
|
340 |
|
|
#define STOPPED_BY_WATCHPOINT(w) or1k_stopped_by_watchpoint ()
|
341 |
|
|
|
342 |
|
|
typedef enum bptype bptype;
|
343 |
|
|
extern int or1k_can_use_hardware_watchpoint PARAMS ((enum bptype, int));
|
344 |
|
|
#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(bp_type, cnt, ot) \
|
345 |
|
|
or1k_can_use_hardware_watchpoint(bp_type, cnt)
|
346 |
|
|
|
347 |
|
|
|
348 |
|
|
/* Catchpoint support. */
|
349 |
|
|
/* HACK: how do we hook to signal namings otherwise? */
|
350 |
|
|
#include "target.h"
|
351 |
|
|
extern char *target_signal_to_string PARAMS ((enum target_signal));
|
352 |
|
|
|
353 |
|
|
/* Return the name (SIGHUP, etc.) for a signal. */
|
354 |
|
|
extern char *or1k_signal_to_name PARAMS ((enum target_signal));
|
355 |
|
|
|
356 |
|
|
/* Given a name (SIGHUP, etc.), return its signal. */
|
357 |
|
|
extern enum target_signal or1k_signal_from_name PARAMS ((char *));
|
358 |
|
|
|
359 |
|
|
#define NUM_OR1K_SIGNALS (14)
|
360 |
|
|
|
361 |
|
|
/* Extract from an array REGBUF containing the (raw) register state
|
362 |
|
|
a function return value of type TYPE, and copy that, in virtual format,
|
363 |
|
|
into VALBUF. */
|
364 |
|
|
extern void or1k_extract_return_value PARAMS ((struct type *, char[], char *));
|
365 |
|
|
#define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
|
366 |
|
|
or1k_extract_return_value (TYPE, REGBUF, VALBUF)
|
367 |
|
|
|
368 |
|
|
/* Write into appropriate registers a function return value
|
369 |
|
|
of type TYPE, given in virtual format. */
|
370 |
|
|
#define DEPRECATED_STORE_RETURN_VALUE(TYPE,VALBUF) \
|
371 |
|
|
{\
|
372 |
|
|
if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)\
|
373 |
|
|
write_register_bytes (REGISTER_BYTE (VFRV_REGNUM), VALBUF, TYPE_LENGTH (TYPE));\
|
374 |
|
|
else\
|
375 |
|
|
write_register_bytes (REGISTER_BYTE (RV_REGNUM), VALBUF, TYPE_LENGTH (TYPE));\
|
376 |
|
|
}
|
377 |
|
|
|
378 |
|
|
/* Extract from an array REGBUF containing the (raw) register state
|
379 |
|
|
the address in which a function should return its structure value,
|
380 |
|
|
as a CORE_ADDR (or an expression that can be used as one). */
|
381 |
|
|
/* The address is passed in a0 upon entry to the function, but when
|
382 |
|
|
the function exits, the compiler has copied the value to v0. This
|
383 |
|
|
convention is specified by the System V ABI, so I think we can rely
|
384 |
|
|
on it. */
|
385 |
|
|
#define DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
|
386 |
|
|
(extract_address (REGBUF + REGISTER_BYTE (RV_REGNUM), \
|
387 |
|
|
REGISTER_RAW_SIZE (RV_REGNUM)))
|
388 |
|
|
|
389 |
|
|
/* Advance PC across any function entry prologue instructions
|
390 |
|
|
to reach some "real" code. */
|
391 |
|
|
extern CORE_ADDR or1k_skip_prologue PARAMS ((CORE_ADDR addr, struct frame_info *fi));
|
392 |
|
|
#define SKIP_PROLOGUE(pc) (or1k_skip_prologue (pc, NULL))
|
393 |
|
|
|
394 |
|
|
/* FRAMES */
|
395 |
|
|
|
396 |
|
|
#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
|
397 |
|
|
|
398 |
|
|
#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
|
399 |
|
|
|
400 |
|
|
/* FRAME_CHAIN takes a frame's nominal address
|
401 |
|
|
and produces the frame's chain-pointer. */
|
402 |
|
|
#define FRAME_CHAIN(thisframe) (CORE_ADDR) or1k_frame_chain (thisframe)
|
403 |
|
|
extern CORE_ADDR or1k_frame_chain PARAMS ((struct frame_info *));
|
404 |
|
|
|
405 |
|
|
extern void or1k_init_extra_frame_info (int fromleaf, struct frame_info *);
|
406 |
|
|
#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) or1k_init_extra_frame_info (fromleaf, fi)
|
407 |
|
|
|
408 |
|
|
/* Discard from the stack the innermost frame, restoring all registers. */
|
409 |
|
|
extern void or1k_pop_frame PARAMS ((void));
|
410 |
|
|
#define POP_FRAME or1k_pop_frame()
|
411 |
|
|
|
412 |
|
|
|
413 |
|
|
/* Return number of args passed to a frame.
|
414 |
|
|
Can return -1, meaning no way to tell. */
|
415 |
|
|
#define FRAME_NUM_ARGS(fi) (-1)
|
416 |
|
|
|
417 |
|
|
/* Return number of bytes at start of arglist that are not really args. */
|
418 |
|
|
#define FRAME_ARGS_SKIP 0
|
419 |
|
|
|
420 |
|
|
/* Put here the code to store, into a struct frame_saved_regs,
|
421 |
|
|
the addresses of the saved registers of frame described by FRAME_INFO.
|
422 |
|
|
This includes special registers such as pc and fp saved in special
|
423 |
|
|
ways in the stack frame. sp is even more special:
|
424 |
|
|
the address we return for it IS the sp for the next frame. */
|
425 |
|
|
extern void or1k_init_saved_regs PARAMS ((struct frame_info *));
|
426 |
|
|
#define FRAME_INIT_SAVED_REGS(frame_info) or1k_init_saved_regs (frame_info);
|
427 |
|
|
|
428 |
|
|
/* Saved Pc. */
|
429 |
|
|
extern CORE_ADDR or1k_frame_saved_pc PARAMS ((struct frame_info *));
|
430 |
|
|
#define FRAME_SAVED_PC(FRAME) (or1k_frame_saved_pc(FRAME))
|
431 |
|
|
|
432 |
|
|
/* Set the return address register to point to the entry
|
433 |
|
|
point of the program, where a breakpoint lies in wait. */
|
434 |
|
|
extern CORE_ADDR or1k_push_return_address PARAMS ((CORE_ADDR pc, CORE_ADDR sp));
|
435 |
|
|
#define PUSH_RETURN_ADDRESS(PC, SP) (or1k_push_return_address ((PC), (SP)))
|
436 |
|
|
|
437 |
|
|
/* Immediately after a function call, return the saved pc.
|
438 |
|
|
Can't always go through the frames for this because on some machines
|
439 |
|
|
the new frame is not set up until the new function executes
|
440 |
|
|
some instructions. */
|
441 |
|
|
#define SAVED_PC_AFTER_CALL(frame) read_register(LR_REGNUM)
|
442 |
|
|
|
443 |
|
|
/* Offset from address of function to start of its code.
|
444 |
|
|
Zero on most machines. */
|
445 |
|
|
#define FUNCTION_START_OFFSET (0)
|
446 |
|
|
|
447 |
|
|
/* Floating point is IEEE compliant */
|
448 |
|
|
#define IEEE_FLOAT 1
|
449 |
|
|
|
450 |
|
|
/* Is floating/vector unit present. */
|
451 |
|
|
#define OR1K_VF_PRESENT (or1k_implementation.vf_present)
|
452 |
|
|
|
453 |
|
|
/* #define INIT_FRAME_PC */ /* Not necessary */
|
454 |
|
|
|
455 |
|
|
/* Stack grows downward. */
|
456 |
|
|
#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
|
457 |
|
|
|
458 |
|
|
/* Size of stack entry - in bytes. */
|
459 |
|
|
#define OR1K_STACK_ALIGN (8)
|
460 |
|
|
|
461 |
|
|
/* Maximum struct size, that is still stored onto stack. */
|
462 |
|
|
#define OR1K_STRUCT_CONV_SIZE (8)
|
463 |
|
|
#define STACK_ALIGN(addr) OR1K_STACK_ALIGN
|
464 |
|
|
|
465 |
|
|
#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > OR1K_STRUCT_CONV_SIZE)
|
466 |
|
|
|
467 |
|
|
/* Stack must be aligned on 32-bit boundaries when synthesizing
|
468 |
|
|
function calls. PUSH_ARGUMENTS will handle it. */
|
469 |
|
|
extern CORE_ADDR or1k_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
|
470 |
|
|
#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
|
471 |
|
|
(or1k_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
|
472 |
|
|
|
473 |
|
|
/* Return nonzero if instruction has delay slot */
|
474 |
|
|
extern int is_delayed PARAMS ((unsigned long));
|
475 |
|
|
|
476 |
|
|
/* Return non-zero if PC points to an instruction which will cause a step
|
477 |
|
|
to execute both the instruction at PC and an instruction at PC+4. */
|
478 |
|
|
extern int or1k_step_skips_delay PARAMS ((CORE_ADDR));
|
479 |
|
|
#define STEP_SKIPS_DELAY_P (1)
|
480 |
|
|
#define STEP_SKIPS_DELAY(pc) (or1k_step_skips_delay (pc))
|
481 |
|
|
|
482 |
|
|
/* DUMMY CALLS */
|
483 |
|
|
#define USE_GENERIC_DUMMY_FRAMES 1
|
484 |
|
|
#define CALL_DUMMY {0}
|
485 |
|
|
#define CALL_DUMMY_START_OFFSET (0)
|
486 |
|
|
#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
|
487 |
|
|
#define SIZEOF_CALL_DUMMY_WORDS (0)
|
488 |
|
|
#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
|
489 |
|
|
#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
|
490 |
|
|
|
491 |
|
|
/* Return a location where we can set a breakpoint that will be hit
|
492 |
|
|
when an inferior function call returns. This is normally the
|
493 |
|
|
program's entry point. */
|
494 |
|
|
#define CALL_DUMMY_ADDRESS() entry_point_address ()
|
495 |
|
|
#define SAVE_DUMMY_FRAME_TOS(SP) generic_save_dummy_frame_tos (SP)
|
496 |
|
|
#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
|
497 |
|
|
#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
|
498 |
|
|
|
499 |
|
|
/* Definitions and declarations used by or1k dependent files. */
|
500 |
|
|
#define OR1K_INSTLEN 4 /* Length of an instruction */
|
501 |
|
|
typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
|
502 |
|
|
|
503 |
|
|
|
504 |
|
|
|
505 |
|
|
/* Defined in remote-or1k.c */
|
506 |
|
|
|
507 |
|
|
/* Target state names. */
|
508 |
|
|
extern const char *status_name[];
|
509 |
|
|
|
510 |
|
|
/* Target state. */
|
511 |
|
|
enum target_status
|
512 |
|
|
{
|
513 |
|
|
TARGET_UNDEFINED,
|
514 |
|
|
TARGET_CONNECTING,
|
515 |
|
|
TARGET_DISCONNECTING,
|
516 |
|
|
TARGET_RUNNING,
|
517 |
|
|
TARGET_STOPPED
|
518 |
|
|
};
|
519 |
|
|
|
520 |
|
|
/* Compare conditions for DCRx registers. */
|
521 |
|
|
enum enum_compare_condition
|
522 |
|
|
{
|
523 |
|
|
CC_MASKED, CC_EQUAL, CC_LESS, CC_LESSE, CC_GREAT, CC_GREATE, CC_NEQUAL
|
524 |
|
|
};
|
525 |
|
|
|
526 |
|
|
/* Compare operand to compare DVRx to. */
|
527 |
|
|
enum enum_compare_to
|
528 |
|
|
{
|
529 |
|
|
CT_DISABLED, CT_FETCH, CT_LEA, CT_SEA, CT_LDATA, CT_SDATA, CT_AEA, CT_ADATA
|
530 |
|
|
};
|
531 |
|
|
|
532 |
|
|
/* Matchpoint chaining types. */
|
533 |
|
|
enum enum_chaining
|
534 |
|
|
{
|
535 |
|
|
CHAINING_NONE, CHAINING_AND, CHAINING_OR
|
536 |
|
|
};
|
537 |
|
|
|
538 |
|
|
/* Names for cts. */
|
539 |
|
|
#define NUM_CT_NAMES 8
|
540 |
|
|
extern const char *compare_to_names[NUM_CT_NAMES];
|
541 |
|
|
|
542 |
|
|
/* DRCx struct */
|
543 |
|
|
struct dcr_struct
|
544 |
|
|
{
|
545 |
|
|
enum enum_compare_to ct:3;
|
546 |
|
|
unsigned int sc:1;
|
547 |
|
|
enum enum_compare_condition cc:3;
|
548 |
|
|
unsigned int dp:1;
|
549 |
|
|
};
|
550 |
|
|
|
551 |
|
|
/* All data needed for a matchpoint. */
|
552 |
|
|
struct matchpoint
|
553 |
|
|
{
|
554 |
|
|
struct dcr_struct dcr;
|
555 |
|
|
unsigned int dvr;
|
556 |
|
|
unsigned int chain_type;
|
557 |
|
|
unsigned int cause_breakpoint;
|
558 |
|
|
};
|
559 |
|
|
|
560 |
|
|
/* Trace related structures and data. */
|
561 |
|
|
#define TRACE_FILENAME_SIZE (128)
|
562 |
|
|
extern char trace_filename[TRACE_FILENAME_SIZE];
|
563 |
|
|
#define TRACE_FILENAME (&trace_filename[0])
|
564 |
|
|
#define TRACE_DATA_SIZE (sizeof(struct htrace_data_struct))
|
565 |
|
|
|
566 |
|
|
struct htrace_data_struct
|
567 |
|
|
{
|
568 |
|
|
unsigned int unused:24;
|
569 |
|
|
unsigned int data:32;
|
570 |
|
|
unsigned int type:4;
|
571 |
|
|
unsigned int reserved:3;
|
572 |
|
|
unsigned int valid:1;
|
573 |
|
|
};
|
574 |
|
|
|
575 |
|
|
enum enum_operation
|
576 |
|
|
{
|
577 |
|
|
TRIGOP_ANY, TRIGOP_OR, TRIGOP_AND
|
578 |
|
|
};
|
579 |
|
|
|
580 |
|
|
struct htrace_event_struct
|
581 |
|
|
{
|
582 |
|
|
enum enum_operation operation:2;
|
583 |
|
|
unsigned int reserved1:6;
|
584 |
|
|
unsigned int is_valid:1;
|
585 |
|
|
unsigned int is_trig:2;
|
586 |
|
|
unsigned int ls_valid:1;
|
587 |
|
|
unsigned int ls_trig:4;
|
588 |
|
|
unsigned int reserved2:2;
|
589 |
|
|
unsigned int bp_valid:1;
|
590 |
|
|
unsigned int bp_trig:1;
|
591 |
|
|
unsigned int wp_valid:1;
|
592 |
|
|
unsigned int wp_trig:11;
|
593 |
|
|
};
|
594 |
|
|
|
595 |
|
|
struct htrace_record_struct
|
596 |
|
|
{
|
597 |
|
|
unsigned int reserved:25;
|
598 |
|
|
unsigned int rec:7;
|
599 |
|
|
};
|
600 |
|
|
|
601 |
|
|
struct htrace_moder_struct
|
602 |
|
|
{
|
603 |
|
|
unsigned int reserved:29;
|
604 |
|
|
unsigned int rec_sel_dep:1;
|
605 |
|
|
unsigned int trace_enable:1;
|
606 |
|
|
unsigned int contin:1;
|
607 |
|
|
};
|
608 |
|
|
|
609 |
|
|
/* Number of records as defined in TAP. */
|
610 |
|
|
#define NUM_RECORDS (8)
|
611 |
|
|
|
612 |
|
|
struct htrace_struct
|
613 |
|
|
{
|
614 |
|
|
/* Local copy of HW regs for trace. */
|
615 |
|
|
struct htrace_event_struct trig, qual, stop;
|
616 |
|
|
struct htrace_record_struct recwp[MAX_MATCHPOINTS], recbp;
|
617 |
|
|
struct htrace_moder_struct moder;
|
618 |
|
|
/* Which matchpoints does record use? Bitmask. */
|
619 |
|
|
unsigned int wp_record_uses[MAX_MATCHPOINTS];
|
620 |
|
|
};
|
621 |
|
|
|
622 |
|
|
extern struct htrace_struct or1k_htrace;
|
623 |
|
|
extern int trace_size;
|
624 |
|
|
|
625 |
|
|
#define MAX_RECORD_NAMES 7
|
626 |
|
|
extern const char *or1k_record_names[MAX_RECORD_NAMES];
|
627 |
|
|
#define MAX_IS_NAMES 4
|
628 |
|
|
extern const char *or1k_is_names[MAX_IS_NAMES];
|
629 |
|
|
#define MAX_LS_NAMES 16
|
630 |
|
|
extern const char *or1k_ls_names[MAX_LS_NAMES];
|
631 |
|
|
|
632 |
|
|
/* Stuff for HW watches. */
|
633 |
|
|
#define MAX_HW_WATCHES MAX_MATCHPOINTS
|
634 |
|
|
|
635 |
|
|
struct hwatch_struct
|
636 |
|
|
{
|
637 |
|
|
int matchpoint_start;
|
638 |
|
|
};
|
639 |
|
|
|
640 |
|
|
extern int num_hw_watches;
|
641 |
|
|
extern struct hwatch_struct or1k_hwatch[MAX_HW_WATCHES];
|
642 |
|
|
|
643 |
|
|
/* Possible errors are listed here. */
|
644 |
|
|
enum enum_errors /* modified <chris@asics.ws> CZ 24/05/01 */
|
645 |
|
|
{
|
646 |
|
|
/* Codes > 0 are for system errors */
|
647 |
|
|
|
648 |
|
|
ERR_NONE = 0,
|
649 |
|
|
ERR_CRC = -1,
|
650 |
|
|
ERR_MEM = -2,
|
651 |
|
|
JTAG_PROXY_INVALID_COMMAND = -3,
|
652 |
|
|
JTAG_PROXY_SERVER_TERMINATED = -4,
|
653 |
|
|
JTAG_PROXY_NO_CONNECTION = -5,
|
654 |
|
|
JTAG_PROXY_PROTOCOL_ERROR = -6,
|
655 |
|
|
JTAG_PROXY_COMMAND_NOT_IMPLEMENTED = -7,
|
656 |
|
|
JTAG_PROXY_INVALID_CHAIN = -8,
|
657 |
|
|
JTAG_PROXY_INVALID_ADDRESS = -9,
|
658 |
|
|
JTAG_PROXY_ACCESS_EXCEPTION = -10, /* Write to ROM */
|
659 |
|
|
JTAG_PROXY_INVALID_LENGTH = -11,
|
660 |
|
|
JTAG_PROXY_OUT_OF_MEMORY = -12,
|
661 |
|
|
};
|
662 |
|
|
|
663 |
|
|
/* All JTAG chains. */
|
664 |
|
|
enum jtag_chains
|
665 |
|
|
{
|
666 |
|
|
SC_GLOBAL, /* 0 Global BS Chain */
|
667 |
|
|
SC_RISC_DEBUG, /* 1 RISC Debug Interface chain */
|
668 |
|
|
SC_RISC_TEST, /* 2 RISC Test Chain */
|
669 |
|
|
SC_TRACE, /* 3 Trace Chain */
|
670 |
|
|
SC_REGISTER, /* 4 Register Chain */
|
671 |
|
|
SC_WISHBONE, /* 5 Wisbone Chain */
|
672 |
|
|
SC_BLOCK /* Block Chains */
|
673 |
|
|
};
|
674 |
|
|
|
675 |
|
|
/* See JTAG documentation about these. */
|
676 |
|
|
#define JI_SIZE (4)
|
677 |
|
|
enum jtag_instr
|
678 |
|
|
{
|
679 |
|
|
JI_EXTEST,
|
680 |
|
|
JI_SAMPLE_PRELOAD,
|
681 |
|
|
JI_IDCODE,
|
682 |
|
|
JI_CHAIN_SELECT,
|
683 |
|
|
JI_INTEST,
|
684 |
|
|
JI_CLAMP,
|
685 |
|
|
JI_CLAMPZ,
|
686 |
|
|
JI_HIGHZ,
|
687 |
|
|
JI_DEBUG,
|
688 |
|
|
JI_BYPASS = 0xF
|
689 |
|
|
};
|
690 |
|
|
|
691 |
|
|
/* JTAG registers. */
|
692 |
|
|
#define JTAG_MODER (0x0)
|
693 |
|
|
#define JTAG_TSEL (0x1)
|
694 |
|
|
#define JTAG_QSEL (0x2)
|
695 |
|
|
#define JTAG_SSEL (0x3)
|
696 |
|
|
#define JTAG_RISCOP (0x4)
|
697 |
|
|
#define JTAG_RECWP0 (0x10)
|
698 |
|
|
#define JTAG_RECBP0 (0x1b)
|
699 |
|
|
|
700 |
|
|
|
701 |
|
|
/* Current register values. */
|
702 |
|
|
extern unsigned int dmr1;
|
703 |
|
|
extern unsigned int dmr2;
|
704 |
|
|
extern unsigned int dsr;
|
705 |
|
|
extern unsigned int drr;
|
706 |
|
|
|
707 |
|
|
extern int matchpoint_user_count[MAX_MATCHPOINTS];
|
708 |
|
|
|
709 |
|
|
/* Current watchpoints. */
|
710 |
|
|
extern unsigned int dvr[MAX_MATCHPOINTS];
|
711 |
|
|
extern struct dcr_struct dcr[MAX_MATCHPOINTS];
|
712 |
|
|
extern int debug_regs_changed;
|
713 |
|
|
|
714 |
|
|
/* Returns error name. */
|
715 |
|
|
extern const char *or1k_err_name PARAMS ((int e));
|
716 |
|
|
|
717 |
|
|
/* Last error number. */
|
718 |
|
|
extern int err;
|
719 |
|
|
|
720 |
|
|
extern struct struct_or1k_implementation or1k_implementation;
|
721 |
|
|
extern unsigned int or1k_fetch_instruction PARAMS ((CORE_ADDR addr));
|
722 |
|
|
extern void or1k_fetch_registers PARAMS ((int regno));
|
723 |
|
|
|
724 |
|
|
/* Sets register/memory regno to data. */
|
725 |
|
|
extern void or1k_write_spr_reg PARAMS ((unsigned int regno, unsigned int data));
|
726 |
|
|
|
727 |
|
|
/* Sets register/memory regno to data. */
|
728 |
|
|
extern unsigned int or1k_read_spr_reg PARAMS ((unsigned int regno));
|
729 |
|
|
|
730 |
|
|
/* Flushes or1k's pipeline. */
|
731 |
|
|
extern void or1k_flush_pipeline PARAMS ((void));
|
732 |
|
|
|
733 |
|
|
/* Sifts unused matchpoints to higher indexses. */
|
734 |
|
|
extern void sift_matchpoints ();
|
735 |
|
|
|
736 |
|
|
|
737 |
|
|
/* Added by Chris Ziomkowski <chris@asics.ws> 24/05/01 */
|
738 |
|
|
typedef enum {
|
739 |
|
|
JTAG_COMMAND_READ = 1,
|
740 |
|
|
JTAG_COMMAND_WRITE = 2,
|
741 |
|
|
JTAG_COMMAND_BLOCK_READ = 3,
|
742 |
|
|
JTAG_COMMAND_BLOCK_WRITE = 4,
|
743 |
|
|
JTAG_COMMAND_CHAIN = 5,
|
744 |
|
|
} JTAG_proxy_protocol_commands;
|
745 |
|
|
|
746 |
|
|
/* Each transmit structure must begin with an integer
|
747 |
|
|
which specifies the type of command. Information
|
748 |
|
|
after this is variable. Make sure to have all information
|
749 |
|
|
aligned properly. If we stick with 32 bit integers, it
|
750 |
|
|
should be portable onto every platform. These structures
|
751 |
|
|
will be transmitted across the network in network byte
|
752 |
|
|
order.
|
753 |
|
|
*/
|
754 |
|
|
|
755 |
|
|
typedef struct {
|
756 |
|
|
uint32_t command;
|
757 |
|
|
uint32_t length;
|
758 |
|
|
uint32_t address;
|
759 |
|
|
uint32_t data_H;
|
760 |
|
|
uint32_t data_L;
|
761 |
|
|
} JTAGProxyWriteMessage;
|
762 |
|
|
|
763 |
|
|
typedef struct {
|
764 |
|
|
uint32_t command;
|
765 |
|
|
uint32_t length;
|
766 |
|
|
uint32_t address;
|
767 |
|
|
} JTAGProxyReadMessage;
|
768 |
|
|
|
769 |
|
|
typedef struct {
|
770 |
|
|
uint32_t command;
|
771 |
|
|
uint32_t length;
|
772 |
|
|
uint32_t address;
|
773 |
|
|
int32_t nRegisters;
|
774 |
|
|
uint32_t data[1];
|
775 |
|
|
} JTAGProxyBlockWriteMessage;
|
776 |
|
|
|
777 |
|
|
typedef struct {
|
778 |
|
|
uint32_t command;
|
779 |
|
|
uint32_t length;
|
780 |
|
|
uint32_t address;
|
781 |
|
|
int32_t nRegisters;
|
782 |
|
|
} JTAGProxyBlockReadMessage;
|
783 |
|
|
|
784 |
|
|
typedef struct {
|
785 |
|
|
uint32_t command;
|
786 |
|
|
uint32_t length;
|
787 |
|
|
uint32_t chain;
|
788 |
|
|
} JTAGProxyChainMessage;
|
789 |
|
|
|
790 |
|
|
/* The responses are messages specific, however convention
|
791 |
|
|
states the first word should be an error code. Again,
|
792 |
|
|
sticking with 32 bit integers should provide maximum
|
793 |
|
|
portability. */
|
794 |
|
|
|
795 |
|
|
typedef struct {
|
796 |
|
|
int32_t status;
|
797 |
|
|
} JTAGProxyWriteResponse;
|
798 |
|
|
|
799 |
|
|
typedef struct {
|
800 |
|
|
int32_t status;
|
801 |
|
|
uint32_t data_H;
|
802 |
|
|
uint32_t data_L;
|
803 |
|
|
} JTAGProxyReadResponse;
|
804 |
|
|
|
805 |
|
|
typedef struct {
|
806 |
|
|
int32_t status;
|
807 |
|
|
} JTAGProxyBlockWriteResponse;
|
808 |
|
|
|
809 |
|
|
typedef struct {
|
810 |
|
|
int32_t status;
|
811 |
|
|
int32_t nRegisters;
|
812 |
|
|
uint32_t data[1];
|
813 |
|
|
/* uint32_t data[nRegisters-1] still unread */
|
814 |
|
|
} JTAGProxyBlockReadResponse;
|
815 |
|
|
|
816 |
|
|
typedef struct {
|
817 |
|
|
int32_t status;
|
818 |
|
|
} JTAGProxyChainResponse;
|
819 |
|
|
|
820 |
|
|
|
821 |
|
|
#endif /* TM_OR1K_H */
|