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1181 |
sfurman |
/* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
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Copyright 2002 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "symfile.h" /* for entry_point_address */
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#include "gdbcore.h"
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#include "arch-utils.h"
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#include "regcache.h"
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extern void _initialize_frv_tdep (void);
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static gdbarch_init_ftype frv_gdbarch_init;
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static gdbarch_register_name_ftype frv_register_name;
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static gdbarch_register_raw_size_ftype frv_register_raw_size;
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static gdbarch_register_virtual_size_ftype frv_register_virtual_size;
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static gdbarch_register_virtual_type_ftype frv_register_virtual_type;
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static gdbarch_register_byte_ftype frv_register_byte;
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static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
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static gdbarch_frame_chain_ftype frv_frame_chain;
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static gdbarch_frame_saved_pc_ftype frv_frame_saved_pc;
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static gdbarch_skip_prologue_ftype frv_skip_prologue;
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static gdbarch_frame_init_saved_regs_ftype frv_frame_init_saved_regs;
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static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value;
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static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address;
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static gdbarch_use_struct_convention_ftype frv_use_struct_convention;
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static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
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static gdbarch_init_extra_frame_info_ftype stupid_useless_init_extra_frame_info;
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static gdbarch_store_struct_return_ftype frv_store_struct_return;
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static gdbarch_push_arguments_ftype frv_push_arguments;
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static gdbarch_push_return_address_ftype frv_push_return_address;
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static gdbarch_pop_frame_ftype frv_pop_frame;
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static gdbarch_saved_pc_after_call_ftype frv_saved_pc_after_call;
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static void frv_pop_frame_regular (struct frame_info *frame);
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/* Register numbers. You can change these as needed, but don't forget
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to update the simulator accordingly. */
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enum {
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/* The total number of registers we know exist. */
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frv_num_regs = 147,
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/* Register numbers 0 -- 63 are always reserved for general-purpose
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registers. The chip at hand may have less. */
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first_gpr_regnum = 0,
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sp_regnum = 1,
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fp_regnum = 2,
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struct_return_regnum = 3,
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last_gpr_regnum = 63,
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/* Register numbers 64 -- 127 are always reserved for floating-point
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registers. The chip at hand may have less. */
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first_fpr_regnum = 64,
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last_fpr_regnum = 127,
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/* Register numbers 128 on up are always reserved for special-purpose
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registers. */
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first_spr_regnum = 128,
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pc_regnum = 128,
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psr_regnum = 129,
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ccr_regnum = 130,
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cccr_regnum = 131,
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tbr_regnum = 135,
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brr_regnum = 136,
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dbar0_regnum = 137,
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dbar1_regnum = 138,
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dbar2_regnum = 139,
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dbar3_regnum = 140,
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lr_regnum = 145,
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lcr_regnum = 146,
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last_spr_regnum = 146
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};
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static LONGEST frv_call_dummy_words[] =
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{0};
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/* The contents of this structure can only be trusted after we've
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frv_frame_init_saved_regs on the frame. */
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struct frame_extra_info
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{
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/* The offset from our frame pointer to our caller's stack
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pointer. */
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int fp_to_callers_sp_offset;
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/* Non-zero if we've saved our return address on the stack yet.
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Zero if it's still sitting in the link register. */
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int lr_saved_on_stack;
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};
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/* A structure describing a particular variant of the FRV.
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We allocate and initialize one of these structures when we create
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the gdbarch object for a variant.
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At the moment, all the FR variants we support differ only in which
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registers are present; the portable code of GDB knows that
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registers whose names are the empty string don't exist, so the
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`register_names' array captures all the per-variant information we
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need.
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in the future, if we need to have per-variant maps for raw size,
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virtual type, etc., we should replace register_names with an array
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of structures, each of which gives all the necessary info for one
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register. Don't stick parallel arrays in here --- that's so
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Fortran. */
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struct gdbarch_tdep
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{
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/* How many general-purpose registers does this variant have? */
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int num_gprs;
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/* How many floating-point registers does this variant have? */
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int num_fprs;
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/* How many hardware watchpoints can it support? */
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int num_hw_watchpoints;
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/* How many hardware breakpoints can it support? */
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int num_hw_breakpoints;
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/* Register names. */
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char **register_names;
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};
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#define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
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/* Allocate a new variant structure, and set up default values for all
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the fields. */
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static struct gdbarch_tdep *
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new_variant (void)
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{
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struct gdbarch_tdep *var;
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int r;
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char buf[20];
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var = xmalloc (sizeof (*var));
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memset (var, 0, sizeof (*var));
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var->num_gprs = 64;
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var->num_fprs = 64;
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var->num_hw_watchpoints = 0;
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var->num_hw_breakpoints = 0;
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/* By default, don't supply any general-purpose or floating-point
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register names. */
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var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *));
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for (r = 0; r < frv_num_regs; r++)
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var->register_names[r] = "";
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/* Do, however, supply default names for the special-purpose
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registers. */
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for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
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{
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sprintf (buf, "x%d", r);
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var->register_names[r] = xstrdup (buf);
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}
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var->register_names[pc_regnum] = "pc";
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var->register_names[lr_regnum] = "lr";
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var->register_names[lcr_regnum] = "lcr";
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var->register_names[psr_regnum] = "psr";
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var->register_names[ccr_regnum] = "ccr";
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var->register_names[cccr_regnum] = "cccr";
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var->register_names[tbr_regnum] = "tbr";
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/* Debug registers. */
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var->register_names[brr_regnum] = "brr";
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var->register_names[dbar0_regnum] = "dbar0";
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var->register_names[dbar1_regnum] = "dbar1";
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var->register_names[dbar2_regnum] = "dbar2";
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var->register_names[dbar3_regnum] = "dbar3";
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return var;
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}
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/* Indicate that the variant VAR has NUM_GPRS general-purpose
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registers, and fill in the names array appropriately. */
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static void
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set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs)
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{
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int r;
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var->num_gprs = num_gprs;
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for (r = 0; r < num_gprs; ++r)
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{
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char buf[20];
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sprintf (buf, "gr%d", r);
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var->register_names[first_gpr_regnum + r] = xstrdup (buf);
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}
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}
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/* Indicate that the variant VAR has NUM_FPRS floating-point
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registers, and fill in the names array appropriately. */
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static void
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set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs)
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{
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int r;
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var->num_fprs = num_fprs;
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for (r = 0; r < num_fprs; ++r)
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{
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char buf[20];
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sprintf (buf, "fr%d", r);
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var->register_names[first_fpr_regnum + r] = xstrdup (buf);
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}
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}
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static const char *
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frv_register_name (int reg)
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{
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if (reg < 0)
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return "?toosmall?";
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if (reg >= frv_num_regs)
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return "?toolarge?";
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return CURRENT_VARIANT->register_names[reg];
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}
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static int
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frv_register_raw_size (int reg)
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{
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return 4;
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}
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static int
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frv_register_virtual_size (int reg)
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{
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return 4;
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}
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static struct type *
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frv_register_virtual_type (int reg)
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{
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if (reg >= 64 && reg <= 127)
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return builtin_type_float;
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else
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return builtin_type_int;
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}
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static int
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frv_register_byte (int reg)
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{
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return (reg * 4);
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}
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static const unsigned char *
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frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
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{
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static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
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*lenp = sizeof (breakpoint);
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return breakpoint;
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}
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static CORE_ADDR
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frv_frame_chain (struct frame_info *frame)
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{
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CORE_ADDR saved_fp_addr;
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if (frame->saved_regs && frame->saved_regs[fp_regnum] != 0)
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saved_fp_addr = frame->saved_regs[fp_regnum];
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else
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/* Just assume it was saved in the usual place. */
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saved_fp_addr = frame->frame;
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return read_memory_integer (saved_fp_addr, 4);
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}
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static CORE_ADDR
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frv_frame_saved_pc (struct frame_info *frame)
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{
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frv_frame_init_saved_regs (frame);
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/* Perhaps the prologue analyzer recorded where it was stored.
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(As of 14 Oct 2001, it never does.) */
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if (frame->saved_regs && frame->saved_regs[pc_regnum] != 0)
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return read_memory_integer (frame->saved_regs[pc_regnum], 4);
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/* If the prologue analyzer tells us the link register was saved on
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the stack, get it from there. */
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if (frame->extra_info->lr_saved_on_stack)
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return read_memory_integer (frame->frame + 8, 4);
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/* Otherwise, it's still in LR.
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However, if FRAME isn't the youngest frame, this is kind of
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suspicious --- if this frame called somebody else, then its LR
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has certainly been overwritten. */
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if (! frame->next)
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return read_register (lr_regnum);
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/* By default, assume it's saved in the standard place, relative to
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the frame pointer. */
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return read_memory_integer (frame->frame + 8, 4);
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}
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324 |
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/* Return true if REG is a caller-saves ("scratch") register,
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false otherwise. */
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static int
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is_caller_saves_reg (int reg)
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{
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return ((4 <= reg && reg <= 7)
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|| (14 <= reg && reg <= 15)
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|| (32 <= reg && reg <= 47));
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}
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/* Return true if REG is a callee-saves register, false otherwise. */
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static int
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is_callee_saves_reg (int reg)
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{
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return ((16 <= reg && reg <= 31)
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|| (48 <= reg && reg <= 63));
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}
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/* Return true if REG is an argument register, false otherwise. */
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static int
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is_argument_reg (int reg)
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{
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return (8 <= reg && reg <= 13);
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}
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351 |
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/* Scan an FR-V prologue, starting at PC, until frame->PC.
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If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
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We assume FRAME's saved_regs array has already been allocated and cleared.
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Return the first PC value after the prologue.
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|
|
Note that, for unoptimized code, we almost don't need this function
|
358 |
|
|
at all; all arguments and locals live on the stack, so we just need
|
359 |
|
|
the FP to find everything. The catch: structures passed by value
|
360 |
|
|
have their addresses living in registers; they're never spilled to
|
361 |
|
|
the stack. So if you ever want to be able to get to these
|
362 |
|
|
arguments in any frame but the top, you'll need to do this serious
|
363 |
|
|
prologue analysis. */
|
364 |
|
|
static CORE_ADDR
|
365 |
|
|
frv_analyze_prologue (CORE_ADDR pc, struct frame_info *frame)
|
366 |
|
|
{
|
367 |
|
|
/* When writing out instruction bitpatterns, we use the following
|
368 |
|
|
letters to label instruction fields:
|
369 |
|
|
P - The parallel bit. We don't use this.
|
370 |
|
|
J - The register number of GRj in the instruction description.
|
371 |
|
|
K - The register number of GRk in the instruction description.
|
372 |
|
|
I - The register number of GRi.
|
373 |
|
|
S - a signed imediate offset.
|
374 |
|
|
U - an unsigned immediate offset.
|
375 |
|
|
|
376 |
|
|
The dots below the numbers indicate where hex digit boundaries
|
377 |
|
|
fall, to make it easier to check the numbers. */
|
378 |
|
|
|
379 |
|
|
/* Non-zero iff we've seen the instruction that initializes the
|
380 |
|
|
frame pointer for this function's frame. */
|
381 |
|
|
int fp_set = 0;
|
382 |
|
|
|
383 |
|
|
/* If fp_set is non_zero, then this is the distance from
|
384 |
|
|
the stack pointer to frame pointer: fp = sp + fp_offset. */
|
385 |
|
|
int fp_offset = 0;
|
386 |
|
|
|
387 |
|
|
/* Total size of frame prior to any alloca operations. */
|
388 |
|
|
int framesize = 0;
|
389 |
|
|
|
390 |
|
|
/* The number of the general-purpose register we saved the return
|
391 |
|
|
address ("link register") in, or -1 if we haven't moved it yet. */
|
392 |
|
|
int lr_save_reg = -1;
|
393 |
|
|
|
394 |
|
|
/* Non-zero iff we've saved the LR onto the stack. */
|
395 |
|
|
int lr_saved_on_stack = 0;
|
396 |
|
|
|
397 |
|
|
/* If gr_saved[i] is non-zero, then we've noticed that general
|
398 |
|
|
register i has been saved at gr_sp_offset[i] from the stack
|
399 |
|
|
pointer. */
|
400 |
|
|
char gr_saved[64];
|
401 |
|
|
int gr_sp_offset[64];
|
402 |
|
|
|
403 |
|
|
memset (gr_saved, 0, sizeof (gr_saved));
|
404 |
|
|
|
405 |
|
|
while (! frame || pc < frame->pc)
|
406 |
|
|
{
|
407 |
|
|
LONGEST op = read_memory_integer (pc, 4);
|
408 |
|
|
|
409 |
|
|
/* The tests in this chain of ifs should be in order of
|
410 |
|
|
decreasing selectivity, so that more particular patterns get
|
411 |
|
|
to fire before less particular patterns. */
|
412 |
|
|
|
413 |
|
|
/* Setting the FP from the SP:
|
414 |
|
|
ori sp, 0, fp
|
415 |
|
|
P 000010 0100010 000001 000000000000 = 0x04881000
|
416 |
|
|
|
417 |
|
|
. . . . . . . .
|
418 |
|
|
We treat this as part of the prologue. */
|
419 |
|
|
if ((op & 0x7fffffff) == 0x04881000)
|
420 |
|
|
{
|
421 |
|
|
fp_set = 1;
|
422 |
|
|
fp_offset = 0;
|
423 |
|
|
}
|
424 |
|
|
|
425 |
|
|
/* Move the link register to the scratch register grJ, before saving:
|
426 |
|
|
movsg lr, grJ
|
427 |
|
|
P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
|
428 |
|
|
|
429 |
|
|
. . . . . . . .
|
430 |
|
|
We treat this as part of the prologue. */
|
431 |
|
|
else if ((op & 0x7fffffc0) == 0x080d01c0)
|
432 |
|
|
{
|
433 |
|
|
int gr_j = op & 0x3f;
|
434 |
|
|
|
435 |
|
|
/* If we're moving it to a scratch register, that's fine. */
|
436 |
|
|
if (is_caller_saves_reg (gr_j))
|
437 |
|
|
lr_save_reg = gr_j;
|
438 |
|
|
/* Otherwise it's not a prologue instruction that we
|
439 |
|
|
recognize. */
|
440 |
|
|
else
|
441 |
|
|
break;
|
442 |
|
|
}
|
443 |
|
|
|
444 |
|
|
/* To save multiple callee-saves registers on the stack, at
|
445 |
|
|
offset zero:
|
446 |
|
|
|
447 |
|
|
std grK,@(sp,gr0)
|
448 |
|
|
P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
|
449 |
|
|
|
450 |
|
|
|
451 |
|
|
stq grK,@(sp,gr0)
|
452 |
|
|
P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
|
453 |
|
|
|
454 |
|
|
. . . . . . . .
|
455 |
|
|
We treat this as part of the prologue, and record the register's
|
456 |
|
|
saved address in the frame structure. */
|
457 |
|
|
else if ((op & 0x01ffffff) == 0x000c10c0
|
458 |
|
|
|| (op & 0x01ffffff) == 0x000c1100)
|
459 |
|
|
{
|
460 |
|
|
int gr_k = ((op >> 25) & 0x3f);
|
461 |
|
|
int ope = ((op >> 6) & 0x3f);
|
462 |
|
|
int count;
|
463 |
|
|
int i;
|
464 |
|
|
|
465 |
|
|
/* Is it an std or an stq? */
|
466 |
|
|
if (ope == 0x03)
|
467 |
|
|
count = 2;
|
468 |
|
|
else
|
469 |
|
|
count = 4;
|
470 |
|
|
|
471 |
|
|
/* Is it really a callee-saves register? */
|
472 |
|
|
if (is_callee_saves_reg (gr_k))
|
473 |
|
|
{
|
474 |
|
|
for (i = 0; i < count; i++)
|
475 |
|
|
{
|
476 |
|
|
gr_saved[gr_k + i] = 1;
|
477 |
|
|
gr_sp_offset[gr_k + i] = 4 * i;
|
478 |
|
|
}
|
479 |
|
|
}
|
480 |
|
|
else
|
481 |
|
|
/* It's not a prologue instruction. */
|
482 |
|
|
break;
|
483 |
|
|
}
|
484 |
|
|
|
485 |
|
|
/* Adjusting the stack pointer. (The stack pointer is GR1.)
|
486 |
|
|
addi sp, S, sp
|
487 |
|
|
P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
|
488 |
|
|
|
489 |
|
|
. . . . . . . .
|
490 |
|
|
We treat this as part of the prologue. */
|
491 |
|
|
else if ((op & 0x7ffff000) == 0x02401000)
|
492 |
|
|
{
|
493 |
|
|
/* Sign-extend the twelve-bit field.
|
494 |
|
|
(Isn't there a better way to do this?) */
|
495 |
|
|
int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
|
496 |
|
|
|
497 |
|
|
framesize -= s;
|
498 |
|
|
}
|
499 |
|
|
|
500 |
|
|
/* Setting the FP to a constant distance from the SP:
|
501 |
|
|
addi sp, S, fp
|
502 |
|
|
P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
|
503 |
|
|
|
504 |
|
|
. . . . . . . .
|
505 |
|
|
We treat this as part of the prologue. */
|
506 |
|
|
else if ((op & 0x7ffff000) == 0x04401000)
|
507 |
|
|
{
|
508 |
|
|
/* Sign-extend the twelve-bit field.
|
509 |
|
|
(Isn't there a better way to do this?) */
|
510 |
|
|
int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
|
511 |
|
|
fp_set = 1;
|
512 |
|
|
fp_offset = s;
|
513 |
|
|
}
|
514 |
|
|
|
515 |
|
|
/* To spill an argument register to a scratch register:
|
516 |
|
|
ori GRi, 0, GRk
|
517 |
|
|
P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
|
518 |
|
|
|
519 |
|
|
. . . . . . . .
|
520 |
|
|
For the time being, we treat this as a prologue instruction,
|
521 |
|
|
assuming that GRi is an argument register. This one's kind
|
522 |
|
|
of suspicious, because it seems like it could be part of a
|
523 |
|
|
legitimate body instruction. But we only come here when the
|
524 |
|
|
source info wasn't helpful, so we have to do the best we can.
|
525 |
|
|
Hopefully once GCC and GDB agree on how to emit line number
|
526 |
|
|
info for prologues, then this code will never come into play. */
|
527 |
|
|
else if ((op & 0x01fc0fff) == 0x00880000)
|
528 |
|
|
{
|
529 |
|
|
int gr_i = ((op >> 12) & 0x3f);
|
530 |
|
|
|
531 |
|
|
/* If the source isn't an arg register, then this isn't a
|
532 |
|
|
prologue instruction. */
|
533 |
|
|
if (! is_argument_reg (gr_i))
|
534 |
|
|
break;
|
535 |
|
|
}
|
536 |
|
|
|
537 |
|
|
/* To spill 16-bit values to the stack:
|
538 |
|
|
sthi GRk, @(fp, s)
|
539 |
|
|
P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
|
540 |
|
|
|
541 |
|
|
. . . . . . . .
|
542 |
|
|
And for 8-bit values, we use STB instructions.
|
543 |
|
|
stbi GRk, @(fp, s)
|
544 |
|
|
P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
|
545 |
|
|
|
546 |
|
|
. . . . . . . .
|
547 |
|
|
We check that GRk is really an argument register, and treat
|
548 |
|
|
all such as part of the prologue. */
|
549 |
|
|
else if ( (op & 0x01fff000) == 0x01442000
|
550 |
|
|
|| (op & 0x01fff000) == 0x01402000)
|
551 |
|
|
{
|
552 |
|
|
int gr_k = ((op >> 25) & 0x3f);
|
553 |
|
|
|
554 |
|
|
if (! is_argument_reg (gr_k))
|
555 |
|
|
break; /* Source isn't an arg register. */
|
556 |
|
|
}
|
557 |
|
|
|
558 |
|
|
/* To save multiple callee-saves register on the stack, at a
|
559 |
|
|
non-zero offset:
|
560 |
|
|
|
561 |
|
|
stdi GRk, @(sp, s)
|
562 |
|
|
P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
|
563 |
|
|
|
564 |
|
|
. . . . . . . .
|
565 |
|
|
stqi GRk, @(sp, s)
|
566 |
|
|
P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
|
567 |
|
|
|
568 |
|
|
. . . . . . . .
|
569 |
|
|
We treat this as part of the prologue, and record the register's
|
570 |
|
|
saved address in the frame structure. */
|
571 |
|
|
else if ((op & 0x01fff000) == 0x014c1000
|
572 |
|
|
|| (op & 0x01fff000) == 0x01501000)
|
573 |
|
|
{
|
574 |
|
|
int gr_k = ((op >> 25) & 0x3f);
|
575 |
|
|
int count;
|
576 |
|
|
int i;
|
577 |
|
|
|
578 |
|
|
/* Is it a stdi or a stqi? */
|
579 |
|
|
if ((op & 0x01fff000) == 0x014c1000)
|
580 |
|
|
count = 2;
|
581 |
|
|
else
|
582 |
|
|
count = 4;
|
583 |
|
|
|
584 |
|
|
/* Is it really a callee-saves register? */
|
585 |
|
|
if (is_callee_saves_reg (gr_k))
|
586 |
|
|
{
|
587 |
|
|
/* Sign-extend the twelve-bit field.
|
588 |
|
|
(Isn't there a better way to do this?) */
|
589 |
|
|
int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
|
590 |
|
|
|
591 |
|
|
for (i = 0; i < count; i++)
|
592 |
|
|
{
|
593 |
|
|
gr_saved[gr_k + i] = 1;
|
594 |
|
|
gr_sp_offset[gr_k + i] = s + (4 * i);
|
595 |
|
|
}
|
596 |
|
|
}
|
597 |
|
|
else
|
598 |
|
|
/* It's not a prologue instruction. */
|
599 |
|
|
break;
|
600 |
|
|
}
|
601 |
|
|
|
602 |
|
|
/* Storing any kind of integer register at any constant offset
|
603 |
|
|
from any other register.
|
604 |
|
|
|
605 |
|
|
st GRk, @(GRi, gr0)
|
606 |
|
|
P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
|
607 |
|
|
|
608 |
|
|
. . . . . . . .
|
609 |
|
|
sti GRk, @(GRi, d12)
|
610 |
|
|
P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
|
611 |
|
|
|
612 |
|
|
. . . . . . . .
|
613 |
|
|
These could be almost anything, but a lot of prologue
|
614 |
|
|
instructions fall into this pattern, so let's decode the
|
615 |
|
|
instruction once, and then work at a higher level. */
|
616 |
|
|
else if (((op & 0x01fc0fff) == 0x000c0080)
|
617 |
|
|
|| ((op & 0x01fc0000) == 0x01480000))
|
618 |
|
|
{
|
619 |
|
|
int gr_k = ((op >> 25) & 0x3f);
|
620 |
|
|
int gr_i = ((op >> 12) & 0x3f);
|
621 |
|
|
int offset;
|
622 |
|
|
|
623 |
|
|
/* Are we storing with gr0 as an offset, or using an
|
624 |
|
|
immediate value? */
|
625 |
|
|
if ((op & 0x01fc0fff) == 0x000c0080)
|
626 |
|
|
offset = 0;
|
627 |
|
|
else
|
628 |
|
|
offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
|
629 |
|
|
|
630 |
|
|
/* If the address isn't relative to the SP or FP, it's not a
|
631 |
|
|
prologue instruction. */
|
632 |
|
|
if (gr_i != sp_regnum && gr_i != fp_regnum)
|
633 |
|
|
break;
|
634 |
|
|
|
635 |
|
|
/* Saving the old FP in the new frame (relative to the SP). */
|
636 |
|
|
if (gr_k == fp_regnum && gr_i == sp_regnum)
|
637 |
|
|
;
|
638 |
|
|
|
639 |
|
|
/* Saving callee-saves register(s) on the stack, relative to
|
640 |
|
|
the SP. */
|
641 |
|
|
else if (gr_i == sp_regnum
|
642 |
|
|
&& is_callee_saves_reg (gr_k))
|
643 |
|
|
{
|
644 |
|
|
gr_saved[gr_k] = 1;
|
645 |
|
|
gr_sp_offset[gr_k] = offset;
|
646 |
|
|
}
|
647 |
|
|
|
648 |
|
|
/* Saving the scratch register holding the return address. */
|
649 |
|
|
else if (lr_save_reg != -1
|
650 |
|
|
&& gr_k == lr_save_reg)
|
651 |
|
|
lr_saved_on_stack = 1;
|
652 |
|
|
|
653 |
|
|
/* Spilling int-sized arguments to the stack. */
|
654 |
|
|
else if (is_argument_reg (gr_k))
|
655 |
|
|
;
|
656 |
|
|
|
657 |
|
|
/* It's not a store instruction we recognize, so this must
|
658 |
|
|
be the end of the prologue. */
|
659 |
|
|
else
|
660 |
|
|
break;
|
661 |
|
|
}
|
662 |
|
|
|
663 |
|
|
/* It's not any instruction we recognize, so this must be the end
|
664 |
|
|
of the prologue. */
|
665 |
|
|
else
|
666 |
|
|
break;
|
667 |
|
|
|
668 |
|
|
pc += 4;
|
669 |
|
|
}
|
670 |
|
|
|
671 |
|
|
if (frame)
|
672 |
|
|
{
|
673 |
|
|
frame->extra_info->lr_saved_on_stack = lr_saved_on_stack;
|
674 |
|
|
|
675 |
|
|
/* If we know the relationship between the stack and frame
|
676 |
|
|
pointers, record the addresses of the registers we noticed.
|
677 |
|
|
Note that we have to do this as a separate step at the end,
|
678 |
|
|
because instructions may save relative to the SP, but we need
|
679 |
|
|
their addresses relative to the FP. */
|
680 |
|
|
if (fp_set)
|
681 |
|
|
{
|
682 |
|
|
int i;
|
683 |
|
|
|
684 |
|
|
for (i = 0; i < 64; i++)
|
685 |
|
|
if (gr_saved[i])
|
686 |
|
|
frame->saved_regs[i] = (frame->frame
|
687 |
|
|
- fp_offset + gr_sp_offset[i]);
|
688 |
|
|
|
689 |
|
|
frame->extra_info->fp_to_callers_sp_offset = framesize - fp_offset;
|
690 |
|
|
}
|
691 |
|
|
}
|
692 |
|
|
|
693 |
|
|
return pc;
|
694 |
|
|
}
|
695 |
|
|
|
696 |
|
|
|
697 |
|
|
static CORE_ADDR
|
698 |
|
|
frv_skip_prologue (CORE_ADDR pc)
|
699 |
|
|
{
|
700 |
|
|
CORE_ADDR func_addr, func_end, new_pc;
|
701 |
|
|
|
702 |
|
|
new_pc = pc;
|
703 |
|
|
|
704 |
|
|
/* If the line table has entry for a line *within* the function
|
705 |
|
|
(i.e., not in the prologue, and not past the end), then that's
|
706 |
|
|
our location. */
|
707 |
|
|
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
|
708 |
|
|
{
|
709 |
|
|
struct symtab_and_line sal;
|
710 |
|
|
|
711 |
|
|
sal = find_pc_line (func_addr, 0);
|
712 |
|
|
|
713 |
|
|
if (sal.line != 0 && sal.end < func_end)
|
714 |
|
|
{
|
715 |
|
|
new_pc = sal.end;
|
716 |
|
|
}
|
717 |
|
|
}
|
718 |
|
|
|
719 |
|
|
/* The FR-V prologue is at least five instructions long (twenty bytes).
|
720 |
|
|
If we didn't find a real source location past that, then
|
721 |
|
|
do a full analysis of the prologue. */
|
722 |
|
|
if (new_pc < pc + 20)
|
723 |
|
|
new_pc = frv_analyze_prologue (pc, 0);
|
724 |
|
|
|
725 |
|
|
return new_pc;
|
726 |
|
|
}
|
727 |
|
|
|
728 |
|
|
static void
|
729 |
|
|
frv_frame_init_saved_regs (struct frame_info *frame)
|
730 |
|
|
{
|
731 |
|
|
if (frame->saved_regs)
|
732 |
|
|
return;
|
733 |
|
|
|
734 |
|
|
frame_saved_regs_zalloc (frame);
|
735 |
|
|
frame->saved_regs[fp_regnum] = frame->frame;
|
736 |
|
|
|
737 |
|
|
/* Find the beginning of this function, so we can analyze its
|
738 |
|
|
prologue. */
|
739 |
|
|
{
|
740 |
|
|
CORE_ADDR func_addr, func_end;
|
741 |
|
|
|
742 |
|
|
if (find_pc_partial_function (frame->pc, NULL, &func_addr, &func_end))
|
743 |
|
|
frv_analyze_prologue (func_addr, frame);
|
744 |
|
|
}
|
745 |
|
|
}
|
746 |
|
|
|
747 |
|
|
/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
|
748 |
|
|
EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
|
749 |
|
|
and TYPE is the type (which is known to be struct, union or array).
|
750 |
|
|
|
751 |
|
|
The frv returns all structs in memory. */
|
752 |
|
|
|
753 |
|
|
static int
|
754 |
|
|
frv_use_struct_convention (int gcc_p, struct type *type)
|
755 |
|
|
{
|
756 |
|
|
return 1;
|
757 |
|
|
}
|
758 |
|
|
|
759 |
|
|
static void
|
760 |
|
|
frv_extract_return_value (struct type *type, char *regbuf, char *valbuf)
|
761 |
|
|
{
|
762 |
|
|
memcpy (valbuf, (regbuf
|
763 |
|
|
+ frv_register_byte (8)
|
764 |
|
|
+ (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)),
|
765 |
|
|
TYPE_LENGTH (type));
|
766 |
|
|
}
|
767 |
|
|
|
768 |
|
|
static CORE_ADDR
|
769 |
|
|
frv_extract_struct_value_address (char *regbuf)
|
770 |
|
|
{
|
771 |
|
|
return extract_address (regbuf + frv_register_byte (struct_return_regnum),
|
772 |
|
|
4);
|
773 |
|
|
}
|
774 |
|
|
|
775 |
|
|
static void
|
776 |
|
|
frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
|
777 |
|
|
{
|
778 |
|
|
write_register (struct_return_regnum, addr);
|
779 |
|
|
}
|
780 |
|
|
|
781 |
|
|
static int
|
782 |
|
|
frv_frameless_function_invocation (struct frame_info *frame)
|
783 |
|
|
{
|
784 |
|
|
return frameless_look_for_prologue (frame);
|
785 |
|
|
}
|
786 |
|
|
|
787 |
|
|
static CORE_ADDR
|
788 |
|
|
frv_saved_pc_after_call (struct frame_info *frame)
|
789 |
|
|
{
|
790 |
|
|
return read_register (lr_regnum);
|
791 |
|
|
}
|
792 |
|
|
|
793 |
|
|
static void
|
794 |
|
|
frv_init_extra_frame_info (int fromleaf, struct frame_info *frame)
|
795 |
|
|
{
|
796 |
|
|
frame->extra_info = (struct frame_extra_info *)
|
797 |
|
|
frame_obstack_alloc (sizeof (struct frame_extra_info));
|
798 |
|
|
frame->extra_info->fp_to_callers_sp_offset = 0;
|
799 |
|
|
frame->extra_info->lr_saved_on_stack = 0;
|
800 |
|
|
}
|
801 |
|
|
|
802 |
|
|
#define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
|
803 |
|
|
#define ROUND_DOWN(n,a) ((n) & ~((a)-1))
|
804 |
|
|
|
805 |
|
|
static CORE_ADDR
|
806 |
|
|
frv_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
|
807 |
|
|
int struct_return, CORE_ADDR struct_addr)
|
808 |
|
|
{
|
809 |
|
|
int argreg;
|
810 |
|
|
int argnum;
|
811 |
|
|
char *val;
|
812 |
|
|
char valbuf[4];
|
813 |
|
|
struct value *arg;
|
814 |
|
|
struct type *arg_type;
|
815 |
|
|
int len;
|
816 |
|
|
enum type_code typecode;
|
817 |
|
|
CORE_ADDR regval;
|
818 |
|
|
int stack_space;
|
819 |
|
|
int stack_offset;
|
820 |
|
|
|
821 |
|
|
#if 0
|
822 |
|
|
printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
|
823 |
|
|
nargs, (int) sp, struct_return, struct_addr);
|
824 |
|
|
#endif
|
825 |
|
|
|
826 |
|
|
stack_space = 0;
|
827 |
|
|
for (argnum = 0; argnum < nargs; ++argnum)
|
828 |
|
|
stack_space += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
|
829 |
|
|
|
830 |
|
|
stack_space -= (6 * 4);
|
831 |
|
|
if (stack_space > 0)
|
832 |
|
|
sp -= stack_space;
|
833 |
|
|
|
834 |
|
|
/* Make sure stack is dword aligned. */
|
835 |
|
|
sp = ROUND_DOWN (sp, 8);
|
836 |
|
|
|
837 |
|
|
stack_offset = 0;
|
838 |
|
|
|
839 |
|
|
argreg = 8;
|
840 |
|
|
|
841 |
|
|
if (struct_return)
|
842 |
|
|
write_register (struct_return_regnum, struct_addr);
|
843 |
|
|
|
844 |
|
|
for (argnum = 0; argnum < nargs; ++argnum)
|
845 |
|
|
{
|
846 |
|
|
arg = args[argnum];
|
847 |
|
|
arg_type = check_typedef (VALUE_TYPE (arg));
|
848 |
|
|
len = TYPE_LENGTH (arg_type);
|
849 |
|
|
typecode = TYPE_CODE (arg_type);
|
850 |
|
|
|
851 |
|
|
if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
|
852 |
|
|
{
|
853 |
|
|
store_address (valbuf, 4, VALUE_ADDRESS (arg));
|
854 |
|
|
typecode = TYPE_CODE_PTR;
|
855 |
|
|
len = 4;
|
856 |
|
|
val = valbuf;
|
857 |
|
|
}
|
858 |
|
|
else
|
859 |
|
|
{
|
860 |
|
|
val = (char *) VALUE_CONTENTS (arg);
|
861 |
|
|
}
|
862 |
|
|
|
863 |
|
|
while (len > 0)
|
864 |
|
|
{
|
865 |
|
|
int partial_len = (len < 4 ? len : 4);
|
866 |
|
|
|
867 |
|
|
if (argreg < 14)
|
868 |
|
|
{
|
869 |
|
|
regval = extract_address (val, partial_len);
|
870 |
|
|
#if 0
|
871 |
|
|
printf(" Argnum %d data %x -> reg %d\n",
|
872 |
|
|
argnum, (int) regval, argreg);
|
873 |
|
|
#endif
|
874 |
|
|
write_register (argreg, regval);
|
875 |
|
|
++argreg;
|
876 |
|
|
}
|
877 |
|
|
else
|
878 |
|
|
{
|
879 |
|
|
#if 0
|
880 |
|
|
printf(" Argnum %d data %x -> offset %d (%x)\n",
|
881 |
|
|
argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
|
882 |
|
|
#endif
|
883 |
|
|
write_memory (sp + stack_offset, val, partial_len);
|
884 |
|
|
stack_offset += ROUND_UP(partial_len, 4);
|
885 |
|
|
}
|
886 |
|
|
len -= partial_len;
|
887 |
|
|
val += partial_len;
|
888 |
|
|
}
|
889 |
|
|
}
|
890 |
|
|
return sp;
|
891 |
|
|
}
|
892 |
|
|
|
893 |
|
|
static CORE_ADDR
|
894 |
|
|
frv_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
|
895 |
|
|
{
|
896 |
|
|
write_register (lr_regnum, CALL_DUMMY_ADDRESS ());
|
897 |
|
|
return sp;
|
898 |
|
|
}
|
899 |
|
|
|
900 |
|
|
static void
|
901 |
|
|
frv_store_return_value (struct type *type, char *valbuf)
|
902 |
|
|
{
|
903 |
|
|
int length = TYPE_LENGTH (type);
|
904 |
|
|
int reg8_offset = frv_register_byte (8);
|
905 |
|
|
|
906 |
|
|
if (length <= 4)
|
907 |
|
|
write_register_bytes (reg8_offset + (4 - length), valbuf, length);
|
908 |
|
|
else if (length == 8)
|
909 |
|
|
write_register_bytes (reg8_offset, valbuf, length);
|
910 |
|
|
else
|
911 |
|
|
internal_error (__FILE__, __LINE__,
|
912 |
|
|
"Don't know how to return a %d-byte value.", length);
|
913 |
|
|
}
|
914 |
|
|
|
915 |
|
|
static void
|
916 |
|
|
frv_pop_frame (void)
|
917 |
|
|
{
|
918 |
|
|
generic_pop_current_frame (frv_pop_frame_regular);
|
919 |
|
|
}
|
920 |
|
|
|
921 |
|
|
static void
|
922 |
|
|
frv_pop_frame_regular (struct frame_info *frame)
|
923 |
|
|
{
|
924 |
|
|
CORE_ADDR fp;
|
925 |
|
|
int regno;
|
926 |
|
|
|
927 |
|
|
fp = frame->frame;
|
928 |
|
|
|
929 |
|
|
frv_frame_init_saved_regs (frame);
|
930 |
|
|
|
931 |
|
|
write_register (pc_regnum, frv_frame_saved_pc (frame));
|
932 |
|
|
for (regno = 0; regno < frv_num_regs; ++regno)
|
933 |
|
|
{
|
934 |
|
|
if (frame->saved_regs[regno]
|
935 |
|
|
&& regno != pc_regnum
|
936 |
|
|
&& regno != sp_regnum)
|
937 |
|
|
{
|
938 |
|
|
write_register (regno,
|
939 |
|
|
read_memory_integer (frame->saved_regs[regno], 4));
|
940 |
|
|
}
|
941 |
|
|
}
|
942 |
|
|
write_register (sp_regnum, fp + frame->extra_info->fp_to_callers_sp_offset);
|
943 |
|
|
flush_cached_frames ();
|
944 |
|
|
}
|
945 |
|
|
|
946 |
|
|
|
947 |
|
|
static void
|
948 |
|
|
frv_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
|
949 |
|
|
CORE_ADDR *targ_addr, int *targ_len)
|
950 |
|
|
{
|
951 |
|
|
*targ_addr = memaddr;
|
952 |
|
|
*targ_len = nr_bytes;
|
953 |
|
|
}
|
954 |
|
|
|
955 |
|
|
|
956 |
|
|
/* Hardware watchpoint / breakpoint support for the FR500
|
957 |
|
|
and FR400. */
|
958 |
|
|
|
959 |
|
|
int
|
960 |
|
|
frv_check_watch_resources (int type, int cnt, int ot)
|
961 |
|
|
{
|
962 |
|
|
struct gdbarch_tdep *var = CURRENT_VARIANT;
|
963 |
|
|
|
964 |
|
|
/* Watchpoints not supported on simulator. */
|
965 |
|
|
if (strcmp (target_shortname, "sim") == 0)
|
966 |
|
|
return 0;
|
967 |
|
|
|
968 |
|
|
if (type == bp_hardware_breakpoint)
|
969 |
|
|
{
|
970 |
|
|
if (var->num_hw_breakpoints == 0)
|
971 |
|
|
return 0;
|
972 |
|
|
else if (cnt <= var->num_hw_breakpoints)
|
973 |
|
|
return 1;
|
974 |
|
|
}
|
975 |
|
|
else
|
976 |
|
|
{
|
977 |
|
|
if (var->num_hw_watchpoints == 0)
|
978 |
|
|
return 0;
|
979 |
|
|
else if (ot)
|
980 |
|
|
return -1;
|
981 |
|
|
else if (cnt <= var->num_hw_watchpoints)
|
982 |
|
|
return 1;
|
983 |
|
|
}
|
984 |
|
|
return -1;
|
985 |
|
|
}
|
986 |
|
|
|
987 |
|
|
|
988 |
|
|
CORE_ADDR
|
989 |
|
|
frv_stopped_data_address (void)
|
990 |
|
|
{
|
991 |
|
|
CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
|
992 |
|
|
|
993 |
|
|
brr = read_register (brr_regnum);
|
994 |
|
|
dbar0 = read_register (dbar0_regnum);
|
995 |
|
|
dbar1 = read_register (dbar1_regnum);
|
996 |
|
|
dbar2 = read_register (dbar2_regnum);
|
997 |
|
|
dbar3 = read_register (dbar3_regnum);
|
998 |
|
|
|
999 |
|
|
if (brr & (1<<11))
|
1000 |
|
|
return dbar0;
|
1001 |
|
|
else if (brr & (1<<10))
|
1002 |
|
|
return dbar1;
|
1003 |
|
|
else if (brr & (1<<9))
|
1004 |
|
|
return dbar2;
|
1005 |
|
|
else if (brr & (1<<8))
|
1006 |
|
|
return dbar3;
|
1007 |
|
|
else
|
1008 |
|
|
return 0;
|
1009 |
|
|
}
|
1010 |
|
|
|
1011 |
|
|
static struct gdbarch *
|
1012 |
|
|
frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
1013 |
|
|
{
|
1014 |
|
|
struct gdbarch *gdbarch;
|
1015 |
|
|
struct gdbarch_tdep *var;
|
1016 |
|
|
|
1017 |
|
|
/* Check to see if we've already built an appropriate architecture
|
1018 |
|
|
object for this executable. */
|
1019 |
|
|
arches = gdbarch_list_lookup_by_info (arches, &info);
|
1020 |
|
|
if (arches)
|
1021 |
|
|
return arches->gdbarch;
|
1022 |
|
|
|
1023 |
|
|
/* Select the right tdep structure for this variant. */
|
1024 |
|
|
var = new_variant ();
|
1025 |
|
|
switch (info.bfd_arch_info->mach)
|
1026 |
|
|
{
|
1027 |
|
|
case bfd_mach_frv:
|
1028 |
|
|
case bfd_mach_frvsimple:
|
1029 |
|
|
case bfd_mach_fr500:
|
1030 |
|
|
case bfd_mach_frvtomcat:
|
1031 |
|
|
set_variant_num_gprs (var, 64);
|
1032 |
|
|
set_variant_num_fprs (var, 64);
|
1033 |
|
|
break;
|
1034 |
|
|
|
1035 |
|
|
case bfd_mach_fr400:
|
1036 |
|
|
set_variant_num_gprs (var, 32);
|
1037 |
|
|
set_variant_num_fprs (var, 32);
|
1038 |
|
|
break;
|
1039 |
|
|
|
1040 |
|
|
default:
|
1041 |
|
|
/* Never heard of this variant. */
|
1042 |
|
|
return 0;
|
1043 |
|
|
}
|
1044 |
|
|
|
1045 |
|
|
gdbarch = gdbarch_alloc (&info, var);
|
1046 |
|
|
|
1047 |
|
|
set_gdbarch_short_bit (gdbarch, 16);
|
1048 |
|
|
set_gdbarch_int_bit (gdbarch, 32);
|
1049 |
|
|
set_gdbarch_long_bit (gdbarch, 32);
|
1050 |
|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
1051 |
|
|
set_gdbarch_float_bit (gdbarch, 32);
|
1052 |
|
|
set_gdbarch_double_bit (gdbarch, 64);
|
1053 |
|
|
set_gdbarch_long_double_bit (gdbarch, 64);
|
1054 |
|
|
set_gdbarch_ptr_bit (gdbarch, 32);
|
1055 |
|
|
|
1056 |
|
|
set_gdbarch_num_regs (gdbarch, frv_num_regs);
|
1057 |
|
|
set_gdbarch_sp_regnum (gdbarch, sp_regnum);
|
1058 |
|
|
set_gdbarch_fp_regnum (gdbarch, fp_regnum);
|
1059 |
|
|
set_gdbarch_pc_regnum (gdbarch, pc_regnum);
|
1060 |
|
|
|
1061 |
|
|
set_gdbarch_register_name (gdbarch, frv_register_name);
|
1062 |
|
|
set_gdbarch_register_size (gdbarch, 4);
|
1063 |
|
|
set_gdbarch_register_bytes (gdbarch, frv_num_regs * 4);
|
1064 |
|
|
set_gdbarch_register_byte (gdbarch, frv_register_byte);
|
1065 |
|
|
set_gdbarch_register_raw_size (gdbarch, frv_register_raw_size);
|
1066 |
|
|
set_gdbarch_max_register_raw_size (gdbarch, 4);
|
1067 |
|
|
set_gdbarch_register_virtual_size (gdbarch, frv_register_virtual_size);
|
1068 |
|
|
set_gdbarch_max_register_virtual_size (gdbarch, 4);
|
1069 |
|
|
set_gdbarch_register_virtual_type (gdbarch, frv_register_virtual_type);
|
1070 |
|
|
|
1071 |
|
|
set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
|
1072 |
|
|
set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
|
1073 |
|
|
|
1074 |
|
|
set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
|
1075 |
|
|
set_gdbarch_frame_args_skip (gdbarch, 0);
|
1076 |
|
|
set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
|
1077 |
|
|
|
1078 |
|
|
set_gdbarch_saved_pc_after_call (gdbarch, frv_saved_pc_after_call);
|
1079 |
|
|
|
1080 |
|
|
set_gdbarch_frame_chain (gdbarch, frv_frame_chain);
|
1081 |
|
|
set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
|
1082 |
|
|
set_gdbarch_frame_saved_pc (gdbarch, frv_frame_saved_pc);
|
1083 |
|
|
set_gdbarch_frame_args_address (gdbarch, default_frame_address);
|
1084 |
|
|
set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
|
1085 |
|
|
|
1086 |
|
|
set_gdbarch_frame_init_saved_regs (gdbarch, frv_frame_init_saved_regs);
|
1087 |
|
|
|
1088 |
|
|
set_gdbarch_use_struct_convention (gdbarch, frv_use_struct_convention);
|
1089 |
|
|
set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value);
|
1090 |
|
|
|
1091 |
|
|
set_gdbarch_store_struct_return (gdbarch, frv_store_struct_return);
|
1092 |
|
|
set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value);
|
1093 |
|
|
set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
|
1094 |
|
|
|
1095 |
|
|
/* Settings for calling functions in the inferior. */
|
1096 |
|
|
set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
|
1097 |
|
|
set_gdbarch_call_dummy_length (gdbarch, 0);
|
1098 |
|
|
set_gdbarch_coerce_float_to_double (gdbarch,
|
1099 |
|
|
standard_coerce_float_to_double);
|
1100 |
|
|
set_gdbarch_push_arguments (gdbarch, frv_push_arguments);
|
1101 |
|
|
set_gdbarch_push_return_address (gdbarch, frv_push_return_address);
|
1102 |
|
|
set_gdbarch_pop_frame (gdbarch, frv_pop_frame);
|
1103 |
|
|
|
1104 |
|
|
set_gdbarch_call_dummy_p (gdbarch, 1);
|
1105 |
|
|
set_gdbarch_call_dummy_words (gdbarch, frv_call_dummy_words);
|
1106 |
|
|
set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (frv_call_dummy_words));
|
1107 |
|
|
set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
|
1108 |
|
|
set_gdbarch_init_extra_frame_info (gdbarch, frv_init_extra_frame_info);
|
1109 |
|
|
|
1110 |
|
|
/* Settings that should be unnecessary. */
|
1111 |
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
1112 |
|
|
|
1113 |
|
|
set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
|
1114 |
|
|
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
|
1115 |
|
|
set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
|
1116 |
|
|
set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
|
1117 |
|
|
set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
|
1118 |
|
|
|
1119 |
|
|
set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
|
1120 |
|
|
set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
|
1121 |
|
|
set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
|
1122 |
|
|
set_gdbarch_call_dummy_start_offset (gdbarch, 0);
|
1123 |
|
|
set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
|
1124 |
|
|
set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
|
1125 |
|
|
set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
|
1126 |
|
|
set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
|
1127 |
|
|
|
1128 |
|
|
set_gdbarch_get_saved_register (gdbarch, generic_unwind_get_saved_register);
|
1129 |
|
|
|
1130 |
|
|
set_gdbarch_decr_pc_after_break (gdbarch, 0);
|
1131 |
|
|
set_gdbarch_function_start_offset (gdbarch, 0);
|
1132 |
|
|
set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
|
1133 |
|
|
|
1134 |
|
|
set_gdbarch_remote_translate_xfer_address
|
1135 |
|
|
(gdbarch, frv_remote_translate_xfer_address);
|
1136 |
|
|
|
1137 |
|
|
/* Hardware watchpoint / breakpoint support. */
|
1138 |
|
|
switch (info.bfd_arch_info->mach)
|
1139 |
|
|
{
|
1140 |
|
|
case bfd_mach_frv:
|
1141 |
|
|
case bfd_mach_frvsimple:
|
1142 |
|
|
case bfd_mach_fr500:
|
1143 |
|
|
case bfd_mach_frvtomcat:
|
1144 |
|
|
/* fr500-style hardware debugging support. */
|
1145 |
|
|
var->num_hw_watchpoints = 4;
|
1146 |
|
|
var->num_hw_breakpoints = 4;
|
1147 |
|
|
break;
|
1148 |
|
|
|
1149 |
|
|
case bfd_mach_fr400:
|
1150 |
|
|
/* fr400-style hardware debugging support. */
|
1151 |
|
|
var->num_hw_watchpoints = 2;
|
1152 |
|
|
var->num_hw_breakpoints = 4;
|
1153 |
|
|
break;
|
1154 |
|
|
|
1155 |
|
|
default:
|
1156 |
|
|
/* Otherwise, assume we don't have hardware debugging support. */
|
1157 |
|
|
var->num_hw_watchpoints = 0;
|
1158 |
|
|
var->num_hw_breakpoints = 0;
|
1159 |
|
|
break;
|
1160 |
|
|
}
|
1161 |
|
|
|
1162 |
|
|
return gdbarch;
|
1163 |
|
|
}
|
1164 |
|
|
|
1165 |
|
|
void
|
1166 |
|
|
_initialize_frv_tdep (void)
|
1167 |
|
|
{
|
1168 |
|
|
register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init);
|
1169 |
|
|
|
1170 |
|
|
tm_print_insn = print_insn_frv;
|
1171 |
|
|
}
|
1172 |
|
|
|
1173 |
|
|
|