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1181 |
sfurman |
/* PPC GNU/Linux native support.
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Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <signal.h>
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#include <sys/user.h>
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#include <sys/ioctl.h>
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#include <sys/wait.h>
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#include <fcntl.h>
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#include <sys/procfs.h>
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#include <sys/ptrace.h>
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/* Prototypes for supply_gregset etc. */
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#include "gregset.h"
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#include "ppc-tdep.h"
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#ifndef PT_READ_U
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#define PT_READ_U PTRACE_PEEKUSR
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#endif
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#ifndef PT_WRITE_U
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#define PT_WRITE_U PTRACE_POKEUSR
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#endif
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/* Default the type of the ptrace transfer to int. */
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#ifndef PTRACE_XFER_TYPE
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#define PTRACE_XFER_TYPE int
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#endif
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/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
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configure time check. Some older glibc's (for instance 2.2.1)
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don't have a specific powerpc version of ptrace.h, and fall back on
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a generic one. In such cases, sys/ptrace.h defines
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PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
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ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
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PTRACE_SETVRREGS to be. This also makes a configury check pretty
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much useless. */
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/* These definitions should really come from the glibc header files,
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but Glibc doesn't know about the vrregs yet. */
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#ifndef PTRACE_GETVRREGS
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#define PTRACE_GETVRREGS 18
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#define PTRACE_SETVRREGS 19
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#endif
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/* This oddity is because the Linux kernel defines elf_vrregset_t as
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an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
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However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
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the vrsave as an extra 4 bytes at the end. I opted for creating a
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flat array of chars, so that it is easier to manipulate for gdb.
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There are 32 vector registers 16 bytes longs, plus a VSCR register
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which is only 4 bytes long, but is fetched as a 16 bytes
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quantity. Up to here we have the elf_vrregset_t structure.
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Appended to this there is space for the VRSAVE register: 4 bytes.
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Even though this vrsave register is not included in the regset
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typedef, it is handled by the ptrace requests.
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Note that GNU/Linux doesn't support little endian PPC hardware,
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therefore the offset at which the real value of the VSCR register
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is located will be always 12 bytes.
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The layout is like this (where x is the actual value of the vscr reg): */
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/* *INDENT-OFF* */
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/*
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|.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
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<-------> <-------><-------><->
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VR0 VR31 VSCR VRSAVE
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*/
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/* *INDENT-ON* */
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#define SIZEOF_VRREGS 33*16+4
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typedef char gdb_vrregset_t[SIZEOF_VRREGS];
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/* For runtime check of ptrace support for VRREGS. */
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int have_ptrace_getvrregs = 1;
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int
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kernel_u_size (void)
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{
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return (sizeof (struct user));
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}
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/* *INDENT-OFF* */
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/* registers layout, as presented by the ptrace interface:
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PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
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PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
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PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
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PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
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PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
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PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
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PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
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PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
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PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
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/* *INDENT_ON * */
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static int
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ppc_register_u_addr (int regno)
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{
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int u_addr = -1;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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/* General purpose registers occupy 1 slot each in the buffer */
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if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum )
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u_addr = ((PT_R0 + regno) * 4);
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/* Floating point regs: 2 slots each */
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if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
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u_addr = ((PT_FPR0 + (regno - FP0_REGNUM) * 2) * 4);
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/* UISA special purpose registers: 1 slot each */
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if (regno == PC_REGNUM)
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u_addr = PT_NIP * 4;
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if (regno == tdep->ppc_lr_regnum)
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u_addr = PT_LNK * 4;
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if (regno == tdep->ppc_cr_regnum)
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u_addr = PT_CCR * 4;
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if (regno == tdep->ppc_xer_regnum)
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u_addr = PT_XER * 4;
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if (regno == tdep->ppc_ctr_regnum)
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u_addr = PT_CTR * 4;
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if (regno == tdep->ppc_mq_regnum)
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u_addr = PT_MQ * 4;
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if (regno == tdep->ppc_ps_regnum)
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u_addr = PT_MSR * 4;
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if (regno == tdep->ppc_fpscr_regnum)
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u_addr = PT_FPSCR * 4;
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return u_addr;
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}
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static int
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ppc_ptrace_cannot_fetch_store_register (int regno)
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{
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return (ppc_register_u_addr (regno) == -1);
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}
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/* The Linux kernel ptrace interface for AltiVec registers uses the
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registers set mechanism, as opposed to the interface for all the
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other registers, that stores/fetches each register individually. */
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static void
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fetch_altivec_register (int tid, int regno)
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{
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int ret;
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int offset = 0;
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gdb_vrregset_t regs;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
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ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
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if (ret < 0)
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{
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if (errno == EIO)
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{
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have_ptrace_getvrregs = 0;
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return;
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}
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perror_with_name ("Unable to fetch AltiVec register");
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}
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/* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
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long on the hardware. We deal only with the lower 4 bytes of the
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vector. VRSAVE is at the end of the array in a 4 bytes slot, so
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there is no need to define an offset for it. */
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if (regno == (tdep->ppc_vrsave_regnum - 1))
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offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
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supply_register (regno,
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regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
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}
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static void
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fetch_register (int tid, int regno)
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{
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/* This isn't really an address. But ptrace thinks of it as one. */
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char mess[128]; /* For messages */
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register int i;
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unsigned int offset; /* Offset of registers within the u area. */
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char *buf = alloca (MAX_REGISTER_RAW_SIZE);
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CORE_ADDR regaddr = ppc_register_u_addr (regno);
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if (altivec_register_p (regno))
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{
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/* If this is the first time through, or if it is not the first
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time through, and we have comfirmed that there is kernel
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support for such a ptrace request, then go and fetch the
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register. */
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if (have_ptrace_getvrregs)
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{
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fetch_altivec_register (tid, regno);
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return;
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}
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/* If we have discovered that there is no ptrace support for
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AltiVec registers, fall through and return zeroes, because
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regaddr will be -1 in this case. */
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}
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if (regaddr == -1)
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{
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memset (buf, '\0', REGISTER_RAW_SIZE (regno)); /* Supply zeroes */
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supply_register (regno, buf);
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return;
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}
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for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
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{
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errno = 0;
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*(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid,
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(PTRACE_ARG3_TYPE) regaddr, 0);
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regaddr += sizeof (PTRACE_XFER_TYPE);
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if (errno != 0)
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{
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sprintf (mess, "reading register %s (#%d)",
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REGISTER_NAME (regno), regno);
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perror_with_name (mess);
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}
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}
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supply_register (regno, buf);
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}
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static void
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supply_vrregset (gdb_vrregset_t *vrregsetp)
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{
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int i;
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
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int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
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int offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
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for (i = 0; i < num_of_vrregs; i++)
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{
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/* The last 2 registers of this set are only 32 bit long, not
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128. However an offset is necessary only for VSCR because it
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occupies a whole vector, while VRSAVE occupies a full 4 bytes
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slot. */
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if (i == (num_of_vrregs - 2))
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supply_register (tdep->ppc_vr0_regnum + i,
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*vrregsetp + i * vrregsize + offset);
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else
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supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
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}
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}
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269 |
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static void
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fetch_altivec_registers (int tid)
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272 |
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{
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273 |
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int ret;
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274 |
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gdb_vrregset_t regs;
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275 |
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ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
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277 |
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if (ret < 0)
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{
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279 |
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if (errno == EIO)
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280 |
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{
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281 |
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have_ptrace_getvrregs = 0;
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282 |
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return;
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283 |
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}
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284 |
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perror_with_name ("Unable to fetch AltiVec registers");
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285 |
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}
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286 |
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supply_vrregset (®s);
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}
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288 |
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289 |
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static void
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290 |
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fetch_ppc_registers (int tid)
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291 |
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{
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292 |
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int i;
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293 |
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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294 |
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295 |
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for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
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fetch_register (tid, i);
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297 |
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if (tdep->ppc_mq_regnum != -1)
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298 |
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fetch_register (tid, tdep->ppc_mq_regnum);
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299 |
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if (have_ptrace_getvrregs)
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if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
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301 |
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fetch_altivec_registers (tid);
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}
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303 |
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304 |
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/* Fetch registers from the child process. Fetch all registers if
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305 |
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regno == -1, otherwise fetch all general registers or all floating
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306 |
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point registers depending upon the value of regno. */
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307 |
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void
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308 |
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fetch_inferior_registers (int regno)
|
309 |
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{
|
310 |
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/* Overload thread id onto process id */
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311 |
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int tid = TIDGET (inferior_ptid);
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312 |
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313 |
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/* No thread id, just use process id */
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314 |
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if (tid == 0)
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tid = PIDGET (inferior_ptid);
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316 |
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317 |
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if (regno == -1)
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318 |
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fetch_ppc_registers (tid);
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319 |
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else
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320 |
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fetch_register (tid, regno);
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321 |
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}
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322 |
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323 |
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/* Store one register. */
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324 |
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static void
|
325 |
|
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store_altivec_register (int tid, int regno)
|
326 |
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{
|
327 |
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int ret;
|
328 |
|
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int offset = 0;
|
329 |
|
|
gdb_vrregset_t regs;
|
330 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
331 |
|
|
int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
|
332 |
|
|
|
333 |
|
|
ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
|
334 |
|
|
if (ret < 0)
|
335 |
|
|
{
|
336 |
|
|
if (errno == EIO)
|
337 |
|
|
{
|
338 |
|
|
have_ptrace_getvrregs = 0;
|
339 |
|
|
return;
|
340 |
|
|
}
|
341 |
|
|
perror_with_name ("Unable to fetch AltiVec register");
|
342 |
|
|
}
|
343 |
|
|
|
344 |
|
|
/* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
|
345 |
|
|
long on the hardware. */
|
346 |
|
|
if (regno == (tdep->ppc_vrsave_regnum - 1))
|
347 |
|
|
offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
|
348 |
|
|
|
349 |
|
|
regcache_collect (regno,
|
350 |
|
|
regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
|
351 |
|
|
|
352 |
|
|
ret = ptrace (PTRACE_SETVRREGS, tid, 0, ®s);
|
353 |
|
|
if (ret < 0)
|
354 |
|
|
perror_with_name ("Unable to store AltiVec register");
|
355 |
|
|
}
|
356 |
|
|
|
357 |
|
|
static void
|
358 |
|
|
store_register (int tid, int regno)
|
359 |
|
|
{
|
360 |
|
|
/* This isn't really an address. But ptrace thinks of it as one. */
|
361 |
|
|
CORE_ADDR regaddr = ppc_register_u_addr (regno);
|
362 |
|
|
char mess[128]; /* For messages */
|
363 |
|
|
register int i;
|
364 |
|
|
unsigned int offset; /* Offset of registers within the u area. */
|
365 |
|
|
char *buf = alloca (MAX_REGISTER_RAW_SIZE);
|
366 |
|
|
|
367 |
|
|
if (altivec_register_p (regno))
|
368 |
|
|
{
|
369 |
|
|
store_altivec_register (tid, regno);
|
370 |
|
|
return;
|
371 |
|
|
}
|
372 |
|
|
|
373 |
|
|
if (regaddr == -1)
|
374 |
|
|
return;
|
375 |
|
|
|
376 |
|
|
regcache_collect (regno, buf);
|
377 |
|
|
for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
|
378 |
|
|
{
|
379 |
|
|
errno = 0;
|
380 |
|
|
ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
|
381 |
|
|
*(PTRACE_XFER_TYPE *) & buf[i]);
|
382 |
|
|
regaddr += sizeof (PTRACE_XFER_TYPE);
|
383 |
|
|
|
384 |
|
|
if (errno == EIO
|
385 |
|
|
&& regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum)
|
386 |
|
|
{
|
387 |
|
|
/* Some older kernel versions don't allow fpscr to be written. */
|
388 |
|
|
continue;
|
389 |
|
|
}
|
390 |
|
|
|
391 |
|
|
if (errno != 0)
|
392 |
|
|
{
|
393 |
|
|
sprintf (mess, "writing register %s (#%d)",
|
394 |
|
|
REGISTER_NAME (regno), regno);
|
395 |
|
|
perror_with_name (mess);
|
396 |
|
|
}
|
397 |
|
|
}
|
398 |
|
|
}
|
399 |
|
|
|
400 |
|
|
static void
|
401 |
|
|
fill_vrregset (gdb_vrregset_t *vrregsetp)
|
402 |
|
|
{
|
403 |
|
|
int i;
|
404 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
405 |
|
|
int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
|
406 |
|
|
int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
|
407 |
|
|
int offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
|
408 |
|
|
|
409 |
|
|
for (i = 0; i < num_of_vrregs; i++)
|
410 |
|
|
{
|
411 |
|
|
/* The last 2 registers of this set are only 32 bit long, not
|
412 |
|
|
128, but only VSCR is fetched as a 16 bytes quantity. */
|
413 |
|
|
if (i == (num_of_vrregs - 2))
|
414 |
|
|
regcache_collect (tdep->ppc_vr0_regnum + i,
|
415 |
|
|
*vrregsetp + i * vrregsize + offset);
|
416 |
|
|
else
|
417 |
|
|
regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
|
418 |
|
|
}
|
419 |
|
|
}
|
420 |
|
|
|
421 |
|
|
static void
|
422 |
|
|
store_altivec_registers (int tid)
|
423 |
|
|
{
|
424 |
|
|
int ret;
|
425 |
|
|
gdb_vrregset_t regs;
|
426 |
|
|
|
427 |
|
|
ret = ptrace (PTRACE_GETVRREGS, tid, 0, (int) ®s);
|
428 |
|
|
if (ret < 0)
|
429 |
|
|
{
|
430 |
|
|
if (errno == EIO)
|
431 |
|
|
{
|
432 |
|
|
have_ptrace_getvrregs = 0;
|
433 |
|
|
return;
|
434 |
|
|
}
|
435 |
|
|
perror_with_name ("Couldn't get AltiVec registers");
|
436 |
|
|
}
|
437 |
|
|
|
438 |
|
|
fill_vrregset (®s);
|
439 |
|
|
|
440 |
|
|
if (ptrace (PTRACE_SETVRREGS, tid, 0, (int) ®s) < 0)
|
441 |
|
|
perror_with_name ("Couldn't write AltiVec registers");
|
442 |
|
|
}
|
443 |
|
|
|
444 |
|
|
static void
|
445 |
|
|
store_ppc_registers (int tid)
|
446 |
|
|
{
|
447 |
|
|
int i;
|
448 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
449 |
|
|
|
450 |
|
|
for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
|
451 |
|
|
store_register (tid, i);
|
452 |
|
|
if (tdep->ppc_mq_regnum != -1)
|
453 |
|
|
store_register (tid, tdep->ppc_mq_regnum);
|
454 |
|
|
if (have_ptrace_getvrregs)
|
455 |
|
|
if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
|
456 |
|
|
store_altivec_registers (tid);
|
457 |
|
|
}
|
458 |
|
|
|
459 |
|
|
void
|
460 |
|
|
store_inferior_registers (int regno)
|
461 |
|
|
{
|
462 |
|
|
/* Overload thread id onto process id */
|
463 |
|
|
int tid = TIDGET (inferior_ptid);
|
464 |
|
|
|
465 |
|
|
/* No thread id, just use process id */
|
466 |
|
|
if (tid == 0)
|
467 |
|
|
tid = PIDGET (inferior_ptid);
|
468 |
|
|
|
469 |
|
|
if (regno >= 0)
|
470 |
|
|
store_register (tid, regno);
|
471 |
|
|
else
|
472 |
|
|
store_ppc_registers (tid);
|
473 |
|
|
}
|
474 |
|
|
|
475 |
|
|
void
|
476 |
|
|
supply_gregset (gdb_gregset_t *gregsetp)
|
477 |
|
|
{
|
478 |
|
|
ppc_linux_supply_gregset ((char *) gregsetp);
|
479 |
|
|
}
|
480 |
|
|
|
481 |
|
|
void
|
482 |
|
|
fill_gregset (gdb_gregset_t *gregsetp, int regno)
|
483 |
|
|
{
|
484 |
|
|
int regi;
|
485 |
|
|
elf_greg_t *regp = (elf_greg_t *) gregsetp;
|
486 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
487 |
|
|
|
488 |
|
|
for (regi = 0; regi < 32; regi++)
|
489 |
|
|
{
|
490 |
|
|
if ((regno == -1) || regno == regi)
|
491 |
|
|
regcache_collect (regi, regp + PT_R0 + regi);
|
492 |
|
|
}
|
493 |
|
|
|
494 |
|
|
if ((regno == -1) || regno == PC_REGNUM)
|
495 |
|
|
regcache_collect (PC_REGNUM, regp + PT_NIP);
|
496 |
|
|
if ((regno == -1) || regno == tdep->ppc_lr_regnum)
|
497 |
|
|
regcache_collect (tdep->ppc_lr_regnum, regp + PT_LNK);
|
498 |
|
|
if ((regno == -1) || regno == tdep->ppc_cr_regnum)
|
499 |
|
|
regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR);
|
500 |
|
|
if ((regno == -1) || regno == tdep->ppc_xer_regnum)
|
501 |
|
|
regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
|
502 |
|
|
if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
|
503 |
|
|
regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR);
|
504 |
|
|
if (((regno == -1) || regno == tdep->ppc_mq_regnum)
|
505 |
|
|
&& (tdep->ppc_mq_regnum != -1))
|
506 |
|
|
regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ);
|
507 |
|
|
if ((regno == -1) || regno == tdep->ppc_ps_regnum)
|
508 |
|
|
regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR);
|
509 |
|
|
}
|
510 |
|
|
|
511 |
|
|
void
|
512 |
|
|
supply_fpregset (gdb_fpregset_t * fpregsetp)
|
513 |
|
|
{
|
514 |
|
|
ppc_linux_supply_fpregset ((char *) fpregsetp);
|
515 |
|
|
}
|
516 |
|
|
|
517 |
|
|
/* Given a pointer to a floating point register set in /proc format
|
518 |
|
|
(fpregset_t *), update the register specified by REGNO from gdb's
|
519 |
|
|
idea of the current floating point register set. If REGNO is -1,
|
520 |
|
|
update them all. */
|
521 |
|
|
void
|
522 |
|
|
fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
|
523 |
|
|
{
|
524 |
|
|
int regi;
|
525 |
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
|
526 |
|
|
|
527 |
|
|
for (regi = 0; regi < 32; regi++)
|
528 |
|
|
{
|
529 |
|
|
if ((regno == -1) || (regno == FP0_REGNUM + regi))
|
530 |
|
|
regcache_collect (FP0_REGNUM + regi, (char *) (*fpregsetp + regi));
|
531 |
|
|
}
|
532 |
|
|
if ((regno == -1) || regno == tdep->ppc_fpscr_regnum)
|
533 |
|
|
regcache_collect (tdep->ppc_fpscr_regnum, (char *) (*fpregsetp + regi));
|
534 |
|
|
}
|