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1181 |
sfurman |
/* Target-dependent code for the x86-64 for GDB, the GNU debugger.
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Copyright 2001, 2002 Free Software Foundation, Inc.
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Contributed by Jiri Smid, SuSE Labs.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "gdbcmd.h"
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#include "arch-utils.h"
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#include "regcache.h"
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#include "symfile.h"
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#include "objfiles.h"
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#include "x86-64-tdep.h"
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#include "dwarf2cfi.h"
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#include "gdb_assert.h"
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/* Register numbers of various important registers. */
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#define RAX_REGNUM 0
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#define RDX_REGNUM 3
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#define RDI_REGNUM 5
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#define EFLAGS_REGNUM 17
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#define ST0_REGNUM 22
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#define XMM1_REGNUM 39
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struct register_info
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{
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int size;
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char *name;
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struct type **type;
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};
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/* x86_64_register_raw_size_table[i] is the number of bytes of storage in
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GDB's register array occupied by register i. */
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static struct register_info x86_64_register_info_table[] = {
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/* 0 */ {8, "rax", &builtin_type_int64},
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/* 1 */ {8, "rbx", &builtin_type_int64},
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/* 2 */ {8, "rcx", &builtin_type_int64},
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/* 3 */ {8, "rdx", &builtin_type_int64},
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/* 4 */ {8, "rsi", &builtin_type_int64},
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/* 5 */ {8, "rdi", &builtin_type_int64},
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/* 6 */ {8, "rbp", &builtin_type_void_func_ptr},
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/* 7 */ {8, "rsp", &builtin_type_void_func_ptr},
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/* 8 */ {8, "r8", &builtin_type_int64},
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/* 9 */ {8, "r9", &builtin_type_int64},
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/* 10 */ {8, "r10", &builtin_type_int64},
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/* 11 */ {8, "r11", &builtin_type_int64},
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/* 12 */ {8, "r12", &builtin_type_int64},
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/* 13 */ {8, "r13", &builtin_type_int64},
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/* 14 */ {8, "r14", &builtin_type_int64},
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/* 15 */ {8, "r15", &builtin_type_int64},
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/* 16 */ {8, "rip", &builtin_type_void_func_ptr},
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/* 17 */ {4, "eflags", &builtin_type_int32},
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/* 18 */ {4, "ds", &builtin_type_int32},
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/* 19 */ {4, "es", &builtin_type_int32},
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/* 20 */ {4, "fs", &builtin_type_int32},
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/* 21 */ {4, "gs", &builtin_type_int32},
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/* 22 */ {10, "st0", &builtin_type_i387_ext},
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/* 23 */ {10, "st1", &builtin_type_i387_ext},
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/* 24 */ {10, "st2", &builtin_type_i387_ext},
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/* 25 */ {10, "st3", &builtin_type_i387_ext},
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/* 26 */ {10, "st4", &builtin_type_i387_ext},
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/* 27 */ {10, "st5", &builtin_type_i387_ext},
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/* 28 */ {10, "st6", &builtin_type_i387_ext},
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/* 29 */ {10, "st7", &builtin_type_i387_ext},
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/* 30 */ {4, "fctrl", &builtin_type_int32},
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/* 31 */ {4, "fstat", &builtin_type_int32},
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/* 32 */ {4, "ftag", &builtin_type_int32},
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/* 33 */ {4, "fiseg", &builtin_type_int32},
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/* 34 */ {4, "fioff", &builtin_type_int32},
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/* 35 */ {4, "foseg", &builtin_type_int32},
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/* 36 */ {4, "fooff", &builtin_type_int32},
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/* 37 */ {4, "fop", &builtin_type_int32},
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/* 38 */ {16, "xmm0", &builtin_type_v4sf},
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/* 39 */ {16, "xmm1", &builtin_type_v4sf},
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/* 40 */ {16, "xmm2", &builtin_type_v4sf},
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/* 41 */ {16, "xmm3", &builtin_type_v4sf},
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/* 42 */ {16, "xmm4", &builtin_type_v4sf},
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/* 43 */ {16, "xmm5", &builtin_type_v4sf},
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/* 44 */ {16, "xmm6", &builtin_type_v4sf},
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/* 45 */ {16, "xmm7", &builtin_type_v4sf},
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/* 46 */ {16, "xmm8", &builtin_type_v4sf},
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/* 47 */ {16, "xmm9", &builtin_type_v4sf},
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/* 48 */ {16, "xmm10", &builtin_type_v4sf},
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/* 49 */ {16, "xmm11", &builtin_type_v4sf},
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/* 50 */ {16, "xmm12", &builtin_type_v4sf},
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/* 51 */ {16, "xmm13", &builtin_type_v4sf},
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/* 52 */ {16, "xmm14", &builtin_type_v4sf},
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/* 53 */ {16, "xmm15", &builtin_type_v4sf},
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/* 54 */ {4, "mxcsr", &builtin_type_int32}
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};
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/* This array is a mapping from Dwarf-2 register
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numbering to GDB's one. Dwarf-2 numbering is
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defined in x86-64 ABI, section 3.6. */
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static int x86_64_dwarf2gdb_regno_map[] = {
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0, 1, 2, 3, /* RAX - RDX */
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4, 5, 6, 7, /* RSI, RDI, RBP, RSP */
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8, 9, 10, 11, /* R8 - R11 */
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12, 13, 14, 15, /* R12 - R15 */
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-1, /* RA - not mapped */
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XMM1_REGNUM - 1, XMM1_REGNUM, /* XMM0 ... */
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XMM1_REGNUM + 1, XMM1_REGNUM + 2,
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XMM1_REGNUM + 3, XMM1_REGNUM + 4,
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XMM1_REGNUM + 5, XMM1_REGNUM + 6,
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XMM1_REGNUM + 7, XMM1_REGNUM + 8,
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XMM1_REGNUM + 9, XMM1_REGNUM + 10,
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XMM1_REGNUM + 11, XMM1_REGNUM + 12,
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XMM1_REGNUM + 13, XMM1_REGNUM + 14, /* ... XMM15 */
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ST0_REGNUM + 0, ST0_REGNUM + 1, /* ST0 ... */
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ST0_REGNUM + 2, ST0_REGNUM + 3,
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ST0_REGNUM + 4, ST0_REGNUM + 5,
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ST0_REGNUM + 6, ST0_REGNUM + 7 /* ... ST7 */
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};
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static int x86_64_dwarf2gdb_regno_map_length =
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sizeof (x86_64_dwarf2gdb_regno_map) /
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sizeof (x86_64_dwarf2gdb_regno_map[0]);
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/* Number of all registers */
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#define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \
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sizeof (x86_64_register_info_table[0]))
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/* Number of general registers. */
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#define X86_64_NUM_GREGS (22)
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int x86_64_num_regs = X86_64_NUM_REGS;
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int x86_64_num_gregs = X86_64_NUM_GREGS;
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/* Did we already print a note about frame pointer? */
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int omit_fp_note_printed = 0;
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/* Number of bytes of storage in the actual machine representation for
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register REGNO. */
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int
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x86_64_register_raw_size (int regno)
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{
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return x86_64_register_info_table[regno].size;
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}
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/* x86_64_register_byte_table[i] is the offset into the register file of the
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start of register number i. We initialize this from
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x86_64_register_info_table. */
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int x86_64_register_byte_table[X86_64_NUM_REGS];
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/* Index within `registers' of the first byte of the space for register REGNO. */
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int
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x86_64_register_byte (int regno)
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{
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return x86_64_register_byte_table[regno];
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}
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/* Return the GDB type object for the "standard" data type of data in
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register N. */
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static struct type *
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x86_64_register_virtual_type (int regno)
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{
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return *x86_64_register_info_table[regno].type;
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}
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/* x86_64_register_convertible is true if register N's virtual format is
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different from its raw format. Note that this definition assumes
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that the host supports IEEE 32-bit floats, since it doesn't say
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that SSE registers need conversion. Even if we can't find a
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counterexample, this is still sloppy. */
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int
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x86_64_register_convertible (int regno)
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{
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return IS_FP_REGNUM (regno);
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}
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/* Convert data from raw format for register REGNUM in buffer FROM to
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virtual format with type TYPE in buffer TO. In principle both
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formats are identical except that the virtual format has two extra
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bytes appended that aren't used. We set these to zero. */
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void
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x86_64_register_convert_to_virtual (int regnum, struct type *type,
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char *from, char *to)
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{
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char buf[12];
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/* We only support floating-point values. */
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if (TYPE_CODE (type) != TYPE_CODE_FLT)
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{
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warning ("Cannot convert floating-point register value "
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"to non-floating-point type.");
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memset (to, 0, TYPE_LENGTH (type));
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return;
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}
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/* First add the necessary padding. */
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memcpy (buf, from, FPU_REG_RAW_SIZE);
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memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE);
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/* Convert to TYPE. This should be a no-op, if TYPE is equivalent
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to the extended floating-point format used by the FPU. */
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convert_typed_floating (to, type, buf,
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x86_64_register_virtual_type (regnum));
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}
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/* Convert data from virtual format with type TYPE in buffer FROM to
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raw format for register REGNUM in buffer TO. Simply omit the two
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unused bytes. */
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void
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x86_64_register_convert_to_raw (struct type *type, int regnum,
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char *from, char *to)
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{
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gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12);
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/* Simply omit the two unused bytes. */
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memcpy (to, from, FPU_REG_RAW_SIZE);
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}
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/* Dwarf-2 <-> GDB register numbers mapping. */
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int
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x86_64_dwarf2_reg_to_regnum (int dw_reg)
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{
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if (dw_reg < 0 || dw_reg > x86_64_dwarf2gdb_regno_map_length)
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{
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warning ("Dwarf-2 uses unmapped register #%d\n", dw_reg);
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return dw_reg;
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}
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return x86_64_dwarf2gdb_regno_map[dw_reg];
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}
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/* This is the variable that is set with "set disassembly-flavour", and
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its legitimate values. */
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static const char att_flavour[] = "att";
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static const char intel_flavour[] = "intel";
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static const char *valid_flavours[] = {
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att_flavour,
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intel_flavour,
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NULL
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};
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static const char *disassembly_flavour = att_flavour;
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static CORE_ADDR
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x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
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{
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char buf[8];
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store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
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write_memory (sp - 8, buf, 8);
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return sp - 8;
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}
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264 |
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void
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x86_64_pop_frame (void)
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{
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generic_pop_current_frame (cfi_pop_frame);
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}
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270 |
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271 |
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272 |
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/* The returning of values is done according to the special algorithm.
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Some types are returned in registers an some (big structures) in memory.
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See ABI for details.
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*/
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#define MAX_CLASSES 4
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enum x86_64_reg_class
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{
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X86_64_NO_CLASS,
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X86_64_INTEGER_CLASS,
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X86_64_INTEGERSI_CLASS,
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X86_64_SSE_CLASS,
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X86_64_SSESF_CLASS,
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X86_64_SSEDF_CLASS,
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X86_64_SSEUP_CLASS,
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X86_64_X87_CLASS,
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X86_64_X87UP_CLASS,
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X86_64_MEMORY_CLASS
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};
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293 |
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/* Return the union class of CLASS1 and CLASS2.
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See the x86-64 ABI for details. */
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static enum x86_64_reg_class
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merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
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{
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/* Rule #1: If both classes are equal, this is the resulting class. */
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if (class1 == class2)
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return class1;
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/* Rule #2: If one of the classes is NO_CLASS, the resulting class is
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the other class. */
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if (class1 == X86_64_NO_CLASS)
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return class2;
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if (class2 == X86_64_NO_CLASS)
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return class1;
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310 |
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/* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
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if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
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return X86_64_MEMORY_CLASS;
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/* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
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if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
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|| (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
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317 |
|
|
return X86_64_INTEGERSI_CLASS;
|
318 |
|
|
if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
|
319 |
|
|
|| class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
|
320 |
|
|
return X86_64_INTEGER_CLASS;
|
321 |
|
|
|
322 |
|
|
/* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
|
323 |
|
|
if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
|
324 |
|
|
|| class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
|
325 |
|
|
return X86_64_MEMORY_CLASS;
|
326 |
|
|
|
327 |
|
|
/* Rule #6: Otherwise class SSE is used. */
|
328 |
|
|
return X86_64_SSE_CLASS;
|
329 |
|
|
}
|
330 |
|
|
|
331 |
|
|
|
332 |
|
|
/* Classify the argument type.
|
333 |
|
|
CLASSES will be filled by the register class used to pass each word
|
334 |
|
|
of the operand. The number of words is returned. In case the parameter
|
335 |
|
|
should be passed in memory, 0 is returned. As a special case for zero
|
336 |
|
|
sized containers, classes[0] will be NO_CLASS and 1 is returned.
|
337 |
|
|
|
338 |
|
|
See the x86-64 PS ABI for details.
|
339 |
|
|
*/
|
340 |
|
|
|
341 |
|
|
static int
|
342 |
|
|
classify_argument (struct type *type,
|
343 |
|
|
enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
|
344 |
|
|
{
|
345 |
|
|
int bytes = TYPE_LENGTH (type);
|
346 |
|
|
int words = (bytes + 8 - 1) / 8;
|
347 |
|
|
|
348 |
|
|
switch (TYPE_CODE (type))
|
349 |
|
|
{
|
350 |
|
|
case TYPE_CODE_ARRAY:
|
351 |
|
|
case TYPE_CODE_STRUCT:
|
352 |
|
|
case TYPE_CODE_UNION:
|
353 |
|
|
{
|
354 |
|
|
int i;
|
355 |
|
|
enum x86_64_reg_class subclasses[MAX_CLASSES];
|
356 |
|
|
|
357 |
|
|
/* On x86-64 we pass structures larger than 16 bytes on the stack. */
|
358 |
|
|
if (bytes > 16)
|
359 |
|
|
return 0;
|
360 |
|
|
|
361 |
|
|
for (i = 0; i < words; i++)
|
362 |
|
|
classes[i] = X86_64_NO_CLASS;
|
363 |
|
|
|
364 |
|
|
/* Zero sized arrays or structures are NO_CLASS. We return 0 to
|
365 |
|
|
signalize memory class, so handle it as special case. */
|
366 |
|
|
if (!words)
|
367 |
|
|
{
|
368 |
|
|
classes[0] = X86_64_NO_CLASS;
|
369 |
|
|
return 1;
|
370 |
|
|
}
|
371 |
|
|
switch (TYPE_CODE (type))
|
372 |
|
|
{
|
373 |
|
|
case TYPE_CODE_STRUCT:
|
374 |
|
|
{
|
375 |
|
|
int j;
|
376 |
|
|
for (j = 0; j < TYPE_NFIELDS (type); ++j)
|
377 |
|
|
{
|
378 |
|
|
int num = classify_argument (TYPE_FIELDS (type)[j].type,
|
379 |
|
|
subclasses,
|
380 |
|
|
(TYPE_FIELDS (type)[j].loc.
|
381 |
|
|
bitpos + bit_offset) % 256);
|
382 |
|
|
if (!num)
|
383 |
|
|
return 0;
|
384 |
|
|
for (i = 0; i < num; i++)
|
385 |
|
|
{
|
386 |
|
|
int pos =
|
387 |
|
|
(TYPE_FIELDS (type)[j].loc.bitpos +
|
388 |
|
|
bit_offset) / 8 / 8;
|
389 |
|
|
classes[i + pos] =
|
390 |
|
|
merge_classes (subclasses[i], classes[i + pos]);
|
391 |
|
|
}
|
392 |
|
|
}
|
393 |
|
|
}
|
394 |
|
|
break;
|
395 |
|
|
case TYPE_CODE_ARRAY:
|
396 |
|
|
{
|
397 |
|
|
int num;
|
398 |
|
|
|
399 |
|
|
num = classify_argument (TYPE_TARGET_TYPE (type),
|
400 |
|
|
subclasses, bit_offset);
|
401 |
|
|
if (!num)
|
402 |
|
|
return 0;
|
403 |
|
|
|
404 |
|
|
/* The partial classes are now full classes. */
|
405 |
|
|
if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
|
406 |
|
|
subclasses[0] = X86_64_SSE_CLASS;
|
407 |
|
|
if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
|
408 |
|
|
subclasses[0] = X86_64_INTEGER_CLASS;
|
409 |
|
|
|
410 |
|
|
for (i = 0; i < words; i++)
|
411 |
|
|
classes[i] = subclasses[i % num];
|
412 |
|
|
}
|
413 |
|
|
break;
|
414 |
|
|
case TYPE_CODE_UNION:
|
415 |
|
|
{
|
416 |
|
|
int j;
|
417 |
|
|
{
|
418 |
|
|
for (j = 0; j < TYPE_NFIELDS (type); ++j)
|
419 |
|
|
{
|
420 |
|
|
int num;
|
421 |
|
|
num = classify_argument (TYPE_FIELDS (type)[j].type,
|
422 |
|
|
subclasses, bit_offset);
|
423 |
|
|
if (!num)
|
424 |
|
|
return 0;
|
425 |
|
|
for (i = 0; i < num; i++)
|
426 |
|
|
classes[i] = merge_classes (subclasses[i], classes[i]);
|
427 |
|
|
}
|
428 |
|
|
}
|
429 |
|
|
}
|
430 |
|
|
break;
|
431 |
|
|
default:
|
432 |
|
|
break;
|
433 |
|
|
}
|
434 |
|
|
/* Final merger cleanup. */
|
435 |
|
|
for (i = 0; i < words; i++)
|
436 |
|
|
{
|
437 |
|
|
/* If one class is MEMORY, everything should be passed in
|
438 |
|
|
memory. */
|
439 |
|
|
if (classes[i] == X86_64_MEMORY_CLASS)
|
440 |
|
|
return 0;
|
441 |
|
|
|
442 |
|
|
/* The X86_64_SSEUP_CLASS should be always preceeded by
|
443 |
|
|
X86_64_SSE_CLASS. */
|
444 |
|
|
if (classes[i] == X86_64_SSEUP_CLASS
|
445 |
|
|
&& (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
|
446 |
|
|
classes[i] = X86_64_SSE_CLASS;
|
447 |
|
|
|
448 |
|
|
/* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
|
449 |
|
|
if (classes[i] == X86_64_X87UP_CLASS
|
450 |
|
|
&& (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
|
451 |
|
|
classes[i] = X86_64_SSE_CLASS;
|
452 |
|
|
}
|
453 |
|
|
return words;
|
454 |
|
|
}
|
455 |
|
|
break;
|
456 |
|
|
case TYPE_CODE_FLT:
|
457 |
|
|
switch (bytes)
|
458 |
|
|
{
|
459 |
|
|
case 4:
|
460 |
|
|
if (!(bit_offset % 64))
|
461 |
|
|
classes[0] = X86_64_SSESF_CLASS;
|
462 |
|
|
else
|
463 |
|
|
classes[0] = X86_64_SSE_CLASS;
|
464 |
|
|
return 1;
|
465 |
|
|
case 8:
|
466 |
|
|
classes[0] = X86_64_SSEDF_CLASS;
|
467 |
|
|
return 1;
|
468 |
|
|
case 16:
|
469 |
|
|
classes[0] = X86_64_X87_CLASS;
|
470 |
|
|
classes[1] = X86_64_X87UP_CLASS;
|
471 |
|
|
return 2;
|
472 |
|
|
}
|
473 |
|
|
break;
|
474 |
|
|
case TYPE_CODE_INT:
|
475 |
|
|
case TYPE_CODE_PTR:
|
476 |
|
|
switch (bytes)
|
477 |
|
|
{
|
478 |
|
|
case 1:
|
479 |
|
|
case 2:
|
480 |
|
|
case 4:
|
481 |
|
|
case 8:
|
482 |
|
|
if (bytes * 8 + bit_offset <= 32)
|
483 |
|
|
classes[0] = X86_64_INTEGERSI_CLASS;
|
484 |
|
|
else
|
485 |
|
|
classes[0] = X86_64_INTEGER_CLASS;
|
486 |
|
|
return 1;
|
487 |
|
|
case 16:
|
488 |
|
|
classes[0] = classes[1] = X86_64_INTEGER_CLASS;
|
489 |
|
|
return 2;
|
490 |
|
|
default:
|
491 |
|
|
break;
|
492 |
|
|
}
|
493 |
|
|
case TYPE_CODE_VOID:
|
494 |
|
|
return 0;
|
495 |
|
|
default: /* Avoid warning. */
|
496 |
|
|
break;
|
497 |
|
|
}
|
498 |
|
|
internal_error (__FILE__, __LINE__,
|
499 |
|
|
"classify_argument: unknown argument type");
|
500 |
|
|
}
|
501 |
|
|
|
502 |
|
|
/* Examine the argument and return set number of register required in each
|
503 |
|
|
class. Return 0 ifif parameter should be passed in memory. */
|
504 |
|
|
|
505 |
|
|
static int
|
506 |
|
|
examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
|
507 |
|
|
int n, int *int_nregs, int *sse_nregs)
|
508 |
|
|
{
|
509 |
|
|
*int_nregs = 0;
|
510 |
|
|
*sse_nregs = 0;
|
511 |
|
|
if (!n)
|
512 |
|
|
return 0;
|
513 |
|
|
for (n--; n >= 0; n--)
|
514 |
|
|
switch (classes[n])
|
515 |
|
|
{
|
516 |
|
|
case X86_64_INTEGER_CLASS:
|
517 |
|
|
case X86_64_INTEGERSI_CLASS:
|
518 |
|
|
(*int_nregs)++;
|
519 |
|
|
break;
|
520 |
|
|
case X86_64_SSE_CLASS:
|
521 |
|
|
case X86_64_SSESF_CLASS:
|
522 |
|
|
case X86_64_SSEDF_CLASS:
|
523 |
|
|
(*sse_nregs)++;
|
524 |
|
|
break;
|
525 |
|
|
case X86_64_NO_CLASS:
|
526 |
|
|
case X86_64_SSEUP_CLASS:
|
527 |
|
|
case X86_64_X87_CLASS:
|
528 |
|
|
case X86_64_X87UP_CLASS:
|
529 |
|
|
break;
|
530 |
|
|
case X86_64_MEMORY_CLASS:
|
531 |
|
|
internal_error (__FILE__, __LINE__,
|
532 |
|
|
"examine_argument: unexpected memory class");
|
533 |
|
|
}
|
534 |
|
|
return 1;
|
535 |
|
|
}
|
536 |
|
|
|
537 |
|
|
#define RET_INT_REGS 2
|
538 |
|
|
#define RET_SSE_REGS 2
|
539 |
|
|
|
540 |
|
|
/* Check if the structure in value_type is returned in registers or in
|
541 |
|
|
memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
|
542 |
|
|
EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
|
543 |
|
|
will be used. */
|
544 |
|
|
int
|
545 |
|
|
x86_64_use_struct_convention (int gcc_p, struct type *value_type)
|
546 |
|
|
{
|
547 |
|
|
enum x86_64_reg_class class[MAX_CLASSES];
|
548 |
|
|
int n = classify_argument (value_type, class, 0);
|
549 |
|
|
int needed_intregs;
|
550 |
|
|
int needed_sseregs;
|
551 |
|
|
|
552 |
|
|
return (!n ||
|
553 |
|
|
!examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
|
554 |
|
|
needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
|
555 |
|
|
}
|
556 |
|
|
|
557 |
|
|
|
558 |
|
|
/* Extract from an array REGBUF containing the (raw) register state, a
|
559 |
|
|
function return value of TYPE, and copy that, in virtual format,
|
560 |
|
|
into VALBUF. */
|
561 |
|
|
|
562 |
|
|
void
|
563 |
|
|
x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
|
564 |
|
|
{
|
565 |
|
|
enum x86_64_reg_class class[MAX_CLASSES];
|
566 |
|
|
int n = classify_argument (type, class, 0);
|
567 |
|
|
int needed_intregs;
|
568 |
|
|
int needed_sseregs;
|
569 |
|
|
int intreg = 0;
|
570 |
|
|
int ssereg = 0;
|
571 |
|
|
int offset = 0;
|
572 |
|
|
int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
|
573 |
|
|
int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
|
574 |
|
|
|
575 |
|
|
if (!n ||
|
576 |
|
|
!examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
|
577 |
|
|
needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
|
578 |
|
|
{ /* memory class */
|
579 |
|
|
CORE_ADDR addr;
|
580 |
|
|
memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
|
581 |
|
|
read_memory (addr, valbuf, TYPE_LENGTH (type));
|
582 |
|
|
return;
|
583 |
|
|
}
|
584 |
|
|
else
|
585 |
|
|
{
|
586 |
|
|
int i;
|
587 |
|
|
for (i = 0; i < n; i++)
|
588 |
|
|
{
|
589 |
|
|
switch (class[i])
|
590 |
|
|
{
|
591 |
|
|
case X86_64_NO_CLASS:
|
592 |
|
|
break;
|
593 |
|
|
case X86_64_INTEGER_CLASS:
|
594 |
|
|
memcpy (valbuf + offset,
|
595 |
|
|
regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
|
596 |
|
|
8);
|
597 |
|
|
offset += 8;
|
598 |
|
|
intreg += 2;
|
599 |
|
|
break;
|
600 |
|
|
case X86_64_INTEGERSI_CLASS:
|
601 |
|
|
memcpy (valbuf + offset,
|
602 |
|
|
regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
|
603 |
|
|
offset += 8;
|
604 |
|
|
intreg++;
|
605 |
|
|
break;
|
606 |
|
|
case X86_64_SSEDF_CLASS:
|
607 |
|
|
case X86_64_SSESF_CLASS:
|
608 |
|
|
case X86_64_SSE_CLASS:
|
609 |
|
|
memcpy (valbuf + offset,
|
610 |
|
|
regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
|
611 |
|
|
8);
|
612 |
|
|
offset += 8;
|
613 |
|
|
ssereg += 2;
|
614 |
|
|
break;
|
615 |
|
|
case X86_64_SSEUP_CLASS:
|
616 |
|
|
memcpy (valbuf + offset + 8,
|
617 |
|
|
regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
|
618 |
|
|
offset += 8;
|
619 |
|
|
ssereg++;
|
620 |
|
|
break;
|
621 |
|
|
case X86_64_X87_CLASS:
|
622 |
|
|
memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
|
623 |
|
|
8);
|
624 |
|
|
offset += 8;
|
625 |
|
|
break;
|
626 |
|
|
case X86_64_X87UP_CLASS:
|
627 |
|
|
memcpy (valbuf + offset,
|
628 |
|
|
regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
|
629 |
|
|
offset += 8;
|
630 |
|
|
break;
|
631 |
|
|
case X86_64_MEMORY_CLASS:
|
632 |
|
|
default:
|
633 |
|
|
internal_error (__FILE__, __LINE__,
|
634 |
|
|
"Unexpected argument class");
|
635 |
|
|
}
|
636 |
|
|
}
|
637 |
|
|
}
|
638 |
|
|
}
|
639 |
|
|
|
640 |
|
|
/* Handled by unwind informations. */
|
641 |
|
|
static void
|
642 |
|
|
x86_64_frame_init_saved_regs (struct frame_info *fi)
|
643 |
|
|
{
|
644 |
|
|
}
|
645 |
|
|
|
646 |
|
|
#define INT_REGS 6
|
647 |
|
|
#define SSE_REGS 16
|
648 |
|
|
|
649 |
|
|
CORE_ADDR
|
650 |
|
|
x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
|
651 |
|
|
int struct_return, CORE_ADDR struct_addr)
|
652 |
|
|
{
|
653 |
|
|
int intreg = 0;
|
654 |
|
|
int ssereg = 0;
|
655 |
|
|
int i;
|
656 |
|
|
static int int_parameter_registers[INT_REGS] = {
|
657 |
|
|
5 /* RDI */ , 4 /* RSI */ ,
|
658 |
|
|
3 /* RDX */ , 2 /* RCX */ ,
|
659 |
|
|
8 /* R8 */ , 9 /* R9 */
|
660 |
|
|
};
|
661 |
|
|
/* XMM0 - XMM15 */
|
662 |
|
|
static int sse_parameter_registers[SSE_REGS] = {
|
663 |
|
|
XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2,
|
664 |
|
|
XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6,
|
665 |
|
|
XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10,
|
666 |
|
|
XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14
|
667 |
|
|
};
|
668 |
|
|
int stack_values_count = 0;
|
669 |
|
|
int *stack_values;
|
670 |
|
|
stack_values = alloca (nargs * sizeof (int));
|
671 |
|
|
for (i = 0; i < nargs; i++)
|
672 |
|
|
{
|
673 |
|
|
enum x86_64_reg_class class[MAX_CLASSES];
|
674 |
|
|
int n = classify_argument (args[i]->type, class, 0);
|
675 |
|
|
int needed_intregs;
|
676 |
|
|
int needed_sseregs;
|
677 |
|
|
|
678 |
|
|
if (!n ||
|
679 |
|
|
!examine_argument (class, n, &needed_intregs, &needed_sseregs)
|
680 |
|
|
|| intreg / 2 + needed_intregs > INT_REGS
|
681 |
|
|
|| ssereg / 2 + needed_sseregs > SSE_REGS)
|
682 |
|
|
{ /* memory class */
|
683 |
|
|
stack_values[stack_values_count++] = i;
|
684 |
|
|
}
|
685 |
|
|
else
|
686 |
|
|
{
|
687 |
|
|
int j;
|
688 |
|
|
for (j = 0; j < n; j++)
|
689 |
|
|
{
|
690 |
|
|
int offset = 0;
|
691 |
|
|
switch (class[j])
|
692 |
|
|
{
|
693 |
|
|
case X86_64_NO_CLASS:
|
694 |
|
|
break;
|
695 |
|
|
case X86_64_INTEGER_CLASS:
|
696 |
|
|
write_register_gen (int_parameter_registers
|
697 |
|
|
[(intreg + 1) / 2],
|
698 |
|
|
VALUE_CONTENTS_ALL (args[i]) + offset);
|
699 |
|
|
offset += 8;
|
700 |
|
|
intreg += 2;
|
701 |
|
|
break;
|
702 |
|
|
case X86_64_INTEGERSI_CLASS:
|
703 |
|
|
write_register_gen (int_parameter_registers[intreg / 2],
|
704 |
|
|
VALUE_CONTENTS_ALL (args[i]) + offset);
|
705 |
|
|
offset += 8;
|
706 |
|
|
intreg++;
|
707 |
|
|
break;
|
708 |
|
|
case X86_64_SSEDF_CLASS:
|
709 |
|
|
case X86_64_SSESF_CLASS:
|
710 |
|
|
case X86_64_SSE_CLASS:
|
711 |
|
|
write_register_gen (sse_parameter_registers
|
712 |
|
|
[(ssereg + 1) / 2],
|
713 |
|
|
VALUE_CONTENTS_ALL (args[i]) + offset);
|
714 |
|
|
offset += 8;
|
715 |
|
|
ssereg += 2;
|
716 |
|
|
break;
|
717 |
|
|
case X86_64_SSEUP_CLASS:
|
718 |
|
|
write_register_gen (sse_parameter_registers[ssereg / 2],
|
719 |
|
|
VALUE_CONTENTS_ALL (args[i]) + offset);
|
720 |
|
|
offset += 8;
|
721 |
|
|
ssereg++;
|
722 |
|
|
break;
|
723 |
|
|
case X86_64_X87_CLASS:
|
724 |
|
|
case X86_64_MEMORY_CLASS:
|
725 |
|
|
stack_values[stack_values_count++] = i;
|
726 |
|
|
break;
|
727 |
|
|
case X86_64_X87UP_CLASS:
|
728 |
|
|
break;
|
729 |
|
|
default:
|
730 |
|
|
internal_error (__FILE__, __LINE__,
|
731 |
|
|
"Unexpected argument class");
|
732 |
|
|
}
|
733 |
|
|
intreg += intreg % 2;
|
734 |
|
|
ssereg += ssereg % 2;
|
735 |
|
|
}
|
736 |
|
|
}
|
737 |
|
|
}
|
738 |
|
|
while (--stack_values_count >= 0)
|
739 |
|
|
{
|
740 |
|
|
struct value *arg = args[stack_values[stack_values_count]];
|
741 |
|
|
int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
|
742 |
|
|
len += 7;
|
743 |
|
|
len -= len % 8;
|
744 |
|
|
sp -= len;
|
745 |
|
|
write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
|
746 |
|
|
}
|
747 |
|
|
return sp;
|
748 |
|
|
}
|
749 |
|
|
|
750 |
|
|
/* Write into the appropriate registers a function return value stored
|
751 |
|
|
in VALBUF of type TYPE, given in virtual format. */
|
752 |
|
|
void
|
753 |
|
|
x86_64_store_return_value (struct type *type, char *valbuf)
|
754 |
|
|
{
|
755 |
|
|
int len = TYPE_LENGTH (type);
|
756 |
|
|
|
757 |
|
|
if (TYPE_CODE_FLT == TYPE_CODE (type))
|
758 |
|
|
{
|
759 |
|
|
/* Floating-point return values can be found in %st(0). */
|
760 |
|
|
if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
|
761 |
|
|
&& TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
|
762 |
|
|
{
|
763 |
|
|
/* Copy straight over. */
|
764 |
|
|
write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
|
765 |
|
|
FPU_REG_RAW_SIZE);
|
766 |
|
|
}
|
767 |
|
|
else
|
768 |
|
|
{
|
769 |
|
|
char buf[FPU_REG_RAW_SIZE];
|
770 |
|
|
DOUBLEST val;
|
771 |
|
|
|
772 |
|
|
/* Convert the value found in VALBUF to the extended
|
773 |
|
|
floating point format used by the FPU. This is probably
|
774 |
|
|
not exactly how it would happen on the target itself, but
|
775 |
|
|
it is the best we can do. */
|
776 |
|
|
val = extract_floating (valbuf, TYPE_LENGTH (type));
|
777 |
|
|
floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
|
778 |
|
|
write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
|
779 |
|
|
FPU_REG_RAW_SIZE);
|
780 |
|
|
}
|
781 |
|
|
}
|
782 |
|
|
else
|
783 |
|
|
{
|
784 |
|
|
int low_size = REGISTER_RAW_SIZE (0);
|
785 |
|
|
int high_size = REGISTER_RAW_SIZE (1);
|
786 |
|
|
|
787 |
|
|
if (len <= low_size)
|
788 |
|
|
write_register_bytes (REGISTER_BYTE (0), valbuf, len);
|
789 |
|
|
else if (len <= (low_size + high_size))
|
790 |
|
|
{
|
791 |
|
|
write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
|
792 |
|
|
write_register_bytes (REGISTER_BYTE (1),
|
793 |
|
|
valbuf + low_size, len - low_size);
|
794 |
|
|
}
|
795 |
|
|
else
|
796 |
|
|
internal_error (__FILE__, __LINE__,
|
797 |
|
|
"Cannot store return value of %d bytes long.", len);
|
798 |
|
|
}
|
799 |
|
|
}
|
800 |
|
|
|
801 |
|
|
|
802 |
|
|
const char *
|
803 |
|
|
x86_64_register_name (int reg_nr)
|
804 |
|
|
{
|
805 |
|
|
if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS)
|
806 |
|
|
return NULL;
|
807 |
|
|
return x86_64_register_info_table[reg_nr].name;
|
808 |
|
|
}
|
809 |
|
|
|
810 |
|
|
int
|
811 |
|
|
x86_64_register_number (const char *name)
|
812 |
|
|
{
|
813 |
|
|
int reg_nr;
|
814 |
|
|
|
815 |
|
|
for (reg_nr = 0; reg_nr < X86_64_NUM_REGS; reg_nr++)
|
816 |
|
|
if (strcmp (name, x86_64_register_info_table[reg_nr].name) == 0)
|
817 |
|
|
return reg_nr;
|
818 |
|
|
return -1;
|
819 |
|
|
}
|
820 |
|
|
|
821 |
|
|
|
822 |
|
|
|
823 |
|
|
/* We have two flavours of disassembly. The machinery on this page
|
824 |
|
|
deals with switching between those. */
|
825 |
|
|
|
826 |
|
|
static int
|
827 |
|
|
gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
|
828 |
|
|
{
|
829 |
|
|
if (disassembly_flavour == att_flavour)
|
830 |
|
|
return print_insn_i386_att (memaddr, info);
|
831 |
|
|
else if (disassembly_flavour == intel_flavour)
|
832 |
|
|
return print_insn_i386_intel (memaddr, info);
|
833 |
|
|
/* Never reached -- disassembly_flavour is always either att_flavour
|
834 |
|
|
or intel_flavour. */
|
835 |
|
|
internal_error (__FILE__, __LINE__, "failed internal consistency check");
|
836 |
|
|
}
|
837 |
|
|
|
838 |
|
|
|
839 |
|
|
/* Store the address of the place in which to copy the structure the
|
840 |
|
|
subroutine will return. This is called from call_function. */
|
841 |
|
|
void
|
842 |
|
|
x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
|
843 |
|
|
{
|
844 |
|
|
write_register (RDI_REGNUM, addr);
|
845 |
|
|
}
|
846 |
|
|
|
847 |
|
|
int
|
848 |
|
|
x86_64_frameless_function_invocation (struct frame_info *frame)
|
849 |
|
|
{
|
850 |
|
|
return 0;
|
851 |
|
|
}
|
852 |
|
|
|
853 |
|
|
/* If a function with debugging information and known beginning
|
854 |
|
|
is detected, we will return pc of the next line in the source
|
855 |
|
|
code. With this approach we effectively skip the prolog. */
|
856 |
|
|
|
857 |
|
|
#define PROLOG_BUFSIZE 4
|
858 |
|
|
CORE_ADDR
|
859 |
|
|
x86_64_skip_prologue (CORE_ADDR pc)
|
860 |
|
|
{
|
861 |
|
|
int i;
|
862 |
|
|
struct symtab_and_line v_sal;
|
863 |
|
|
struct symbol *v_function;
|
864 |
|
|
CORE_ADDR endaddr;
|
865 |
|
|
|
866 |
|
|
/* We will handle only functions beginning with:
|
867 |
|
|
55 pushq %rbp
|
868 |
|
|
48 89 e5 movq %rsp,%rbp
|
869 |
|
|
*/
|
870 |
|
|
unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 },
|
871 |
|
|
prolog_buf[PROLOG_BUFSIZE];
|
872 |
|
|
|
873 |
|
|
read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE);
|
874 |
|
|
|
875 |
|
|
/* First check, whether pc points to pushq %rbp, movq %rsp,%rbp. */
|
876 |
|
|
for (i = 0; i < PROLOG_BUFSIZE; i++)
|
877 |
|
|
if (prolog_expect[i] != prolog_buf[i])
|
878 |
|
|
return pc; /* ... no, it doesn't. Nothing to skip. */
|
879 |
|
|
|
880 |
|
|
/* OK, we have found the prologue and want PC of the first
|
881 |
|
|
non-prologue instruction. */
|
882 |
|
|
pc += PROLOG_BUFSIZE;
|
883 |
|
|
|
884 |
|
|
v_function = find_pc_function (pc);
|
885 |
|
|
v_sal = find_pc_line (pc, 0);
|
886 |
|
|
|
887 |
|
|
/* If pc doesn't point to a function with debuginfo,
|
888 |
|
|
some of the following may be NULL. */
|
889 |
|
|
if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab)
|
890 |
|
|
return pc;
|
891 |
|
|
|
892 |
|
|
endaddr = v_function->ginfo.value.block->endaddr;
|
893 |
|
|
|
894 |
|
|
for (i = 0; i < v_sal.symtab->linetable->nitems; i++)
|
895 |
|
|
if (v_sal.symtab->linetable->item[i].pc >= pc
|
896 |
|
|
&& v_sal.symtab->linetable->item[i].pc < endaddr)
|
897 |
|
|
{
|
898 |
|
|
pc = v_sal.symtab->linetable->item[i].pc;
|
899 |
|
|
break;
|
900 |
|
|
}
|
901 |
|
|
|
902 |
|
|
return pc;
|
903 |
|
|
}
|
904 |
|
|
|
905 |
|
|
/* Sequence of bytes for breakpoint instruction. */
|
906 |
|
|
static unsigned char *
|
907 |
|
|
x86_64_breakpoint_from_pc (CORE_ADDR * pc, int *lenptr)
|
908 |
|
|
{
|
909 |
|
|
static unsigned char breakpoint[] = { 0xcc };
|
910 |
|
|
*lenptr = 1;
|
911 |
|
|
return breakpoint;
|
912 |
|
|
}
|
913 |
|
|
|
914 |
|
|
static struct gdbarch *
|
915 |
|
|
x86_64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
916 |
|
|
{
|
917 |
|
|
struct gdbarch *gdbarch;
|
918 |
|
|
struct gdbarch_tdep *tdep;
|
919 |
|
|
int i, sum;
|
920 |
|
|
|
921 |
|
|
/* Find a candidate among the list of pre-declared architectures. */
|
922 |
|
|
for (arches = gdbarch_list_lookup_by_info (arches, &info);
|
923 |
|
|
arches != NULL;
|
924 |
|
|
arches = gdbarch_list_lookup_by_info (arches->next, &info))
|
925 |
|
|
{
|
926 |
|
|
switch (info.bfd_arch_info->mach)
|
927 |
|
|
{
|
928 |
|
|
case bfd_mach_x86_64:
|
929 |
|
|
case bfd_mach_x86_64_intel_syntax:
|
930 |
|
|
switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
|
931 |
|
|
{
|
932 |
|
|
case bfd_mach_x86_64:
|
933 |
|
|
case bfd_mach_x86_64_intel_syntax:
|
934 |
|
|
return arches->gdbarch;
|
935 |
|
|
case bfd_mach_i386_i386:
|
936 |
|
|
case bfd_mach_i386_i8086:
|
937 |
|
|
case bfd_mach_i386_i386_intel_syntax:
|
938 |
|
|
break;
|
939 |
|
|
default:
|
940 |
|
|
internal_error (__FILE__, __LINE__,
|
941 |
|
|
"x86_64_gdbarch_init: unknown machine type");
|
942 |
|
|
}
|
943 |
|
|
break;
|
944 |
|
|
case bfd_mach_i386_i386:
|
945 |
|
|
case bfd_mach_i386_i8086:
|
946 |
|
|
case bfd_mach_i386_i386_intel_syntax:
|
947 |
|
|
switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
|
948 |
|
|
{
|
949 |
|
|
case bfd_mach_x86_64:
|
950 |
|
|
case bfd_mach_x86_64_intel_syntax:
|
951 |
|
|
break;
|
952 |
|
|
case bfd_mach_i386_i386:
|
953 |
|
|
case bfd_mach_i386_i8086:
|
954 |
|
|
case bfd_mach_i386_i386_intel_syntax:
|
955 |
|
|
return arches->gdbarch;
|
956 |
|
|
default:
|
957 |
|
|
internal_error (__FILE__, __LINE__,
|
958 |
|
|
"x86_64_gdbarch_init: unknown machine type");
|
959 |
|
|
}
|
960 |
|
|
break;
|
961 |
|
|
default:
|
962 |
|
|
internal_error (__FILE__, __LINE__,
|
963 |
|
|
"x86_64_gdbarch_init: unknown machine type");
|
964 |
|
|
}
|
965 |
|
|
}
|
966 |
|
|
|
967 |
|
|
tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
|
968 |
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
969 |
|
|
|
970 |
|
|
switch (info.bfd_arch_info->mach)
|
971 |
|
|
{
|
972 |
|
|
case bfd_mach_x86_64:
|
973 |
|
|
case bfd_mach_x86_64_intel_syntax:
|
974 |
|
|
tdep->num_xmm_regs = 16;
|
975 |
|
|
break;
|
976 |
|
|
case bfd_mach_i386_i386:
|
977 |
|
|
case bfd_mach_i386_i8086:
|
978 |
|
|
case bfd_mach_i386_i386_intel_syntax:
|
979 |
|
|
/* This is place for definition of i386 target vector. */
|
980 |
|
|
break;
|
981 |
|
|
default:
|
982 |
|
|
internal_error (__FILE__, __LINE__,
|
983 |
|
|
"x86_64_gdbarch_init: unknown machine type");
|
984 |
|
|
}
|
985 |
|
|
|
986 |
|
|
set_gdbarch_long_bit (gdbarch, 64);
|
987 |
|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
988 |
|
|
set_gdbarch_ptr_bit (gdbarch, 64);
|
989 |
|
|
|
990 |
|
|
set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
|
991 |
|
|
|
992 |
|
|
set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
|
993 |
|
|
set_gdbarch_register_name (gdbarch, x86_64_register_name);
|
994 |
|
|
set_gdbarch_register_size (gdbarch, 8);
|
995 |
|
|
set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
|
996 |
|
|
set_gdbarch_max_register_raw_size (gdbarch, 16);
|
997 |
|
|
set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
|
998 |
|
|
|
999 |
|
|
/* Total amount of space needed to store our copies of the machine's register
|
1000 |
|
|
(SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
|
1001 |
|
|
for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++)
|
1002 |
|
|
sum += x86_64_register_info_table[i].size;
|
1003 |
|
|
set_gdbarch_register_bytes (gdbarch, sum);
|
1004 |
|
|
set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
|
1005 |
|
|
set_gdbarch_max_register_virtual_size (gdbarch, 16);
|
1006 |
|
|
|
1007 |
|
|
set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
|
1008 |
|
|
|
1009 |
|
|
set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
|
1010 |
|
|
set_gdbarch_register_convert_to_virtual (gdbarch,
|
1011 |
|
|
x86_64_register_convert_to_virtual);
|
1012 |
|
|
set_gdbarch_register_convert_to_raw (gdbarch,
|
1013 |
|
|
x86_64_register_convert_to_raw);
|
1014 |
|
|
|
1015 |
|
|
/* Register numbers of various important registers. */
|
1016 |
|
|
set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
|
1017 |
|
|
set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
|
1018 |
|
|
set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
|
1019 |
|
|
|
1020 |
|
|
set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* First FPU floating-point register. */
|
1021 |
|
|
|
1022 |
|
|
set_gdbarch_read_fp (gdbarch, cfi_read_fp);
|
1023 |
|
|
|
1024 |
|
|
/* Discard from the stack the innermost frame, restoring all registers. */
|
1025 |
|
|
set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
|
1026 |
|
|
|
1027 |
|
|
/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
|
1028 |
|
|
chain-pointer. */
|
1029 |
|
|
set_gdbarch_frame_chain (gdbarch, cfi_frame_chain);
|
1030 |
|
|
|
1031 |
|
|
set_gdbarch_frameless_function_invocation (gdbarch,
|
1032 |
|
|
x86_64_frameless_function_invocation);
|
1033 |
|
|
set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
|
1034 |
|
|
|
1035 |
|
|
set_gdbarch_frame_args_address (gdbarch, default_frame_address);
|
1036 |
|
|
set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
|
1037 |
|
|
|
1038 |
|
|
/* Return number of bytes at start of arglist that are not really args. */
|
1039 |
|
|
set_gdbarch_frame_args_skip (gdbarch, 8);
|
1040 |
|
|
|
1041 |
|
|
set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
|
1042 |
|
|
|
1043 |
|
|
/* Frame pc initialization is handled by unwind informations. */
|
1044 |
|
|
set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc);
|
1045 |
|
|
|
1046 |
|
|
/* Initialization of unwind informations. */
|
1047 |
|
|
set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
|
1048 |
|
|
|
1049 |
|
|
/* Getting saved registers is handled by unwind informations. */
|
1050 |
|
|
set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
|
1051 |
|
|
|
1052 |
|
|
set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
|
1053 |
|
|
|
1054 |
|
|
/* Cons up virtual frame pointer for trace */
|
1055 |
|
|
set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
|
1056 |
|
|
|
1057 |
|
|
|
1058 |
|
|
set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
|
1059 |
|
|
|
1060 |
|
|
set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
|
1061 |
|
|
set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
|
1062 |
|
|
set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
|
1063 |
|
|
set_gdbarch_call_dummy_length (gdbarch, 0);
|
1064 |
|
|
set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
|
1065 |
|
|
set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
|
1066 |
|
|
set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
|
1067 |
|
|
set_gdbarch_call_dummy_words (gdbarch, 0);
|
1068 |
|
|
set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
|
1069 |
|
|
set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
|
1070 |
|
|
set_gdbarch_call_dummy_p (gdbarch, 1);
|
1071 |
|
|
set_gdbarch_call_dummy_start_offset (gdbarch, 0);
|
1072 |
|
|
set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
|
1073 |
|
|
set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
|
1074 |
|
|
set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
|
1075 |
|
|
set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
|
1076 |
|
|
|
1077 |
|
|
/* Return number of args passed to a frame, no way to tell. */
|
1078 |
|
|
set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
|
1079 |
|
|
/* Don't use default structure extract routine */
|
1080 |
|
|
set_gdbarch_deprecated_extract_struct_value_address (gdbarch, 0);
|
1081 |
|
|
|
1082 |
|
|
/* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
|
1083 |
|
|
and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
|
1084 |
|
|
the case when structure is returned in registers. */
|
1085 |
|
|
set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
|
1086 |
|
|
|
1087 |
|
|
/* Store the address of the place in which to copy the structure the
|
1088 |
|
|
subroutine will return. This is called from call_function. */
|
1089 |
|
|
set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
|
1090 |
|
|
|
1091 |
|
|
/* Extract from an array REGBUF containing the (raw) register state
|
1092 |
|
|
a function return value of type TYPE, and copy that, in virtual format,
|
1093 |
|
|
into VALBUF. */
|
1094 |
|
|
set_gdbarch_deprecated_extract_return_value (gdbarch, x86_64_extract_return_value);
|
1095 |
|
|
|
1096 |
|
|
|
1097 |
|
|
/* Write into the appropriate registers a function return value stored
|
1098 |
|
|
in VALBUF of type TYPE, given in virtual format. */
|
1099 |
|
|
set_gdbarch_deprecated_store_return_value (gdbarch, x86_64_store_return_value);
|
1100 |
|
|
|
1101 |
|
|
|
1102 |
|
|
/* Offset from address of function to start of its code. */
|
1103 |
|
|
set_gdbarch_function_start_offset (gdbarch, 0);
|
1104 |
|
|
|
1105 |
|
|
set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
|
1106 |
|
|
|
1107 |
|
|
set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
|
1108 |
|
|
|
1109 |
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
1110 |
|
|
|
1111 |
|
|
set_gdbarch_breakpoint_from_pc (gdbarch,
|
1112 |
|
|
(gdbarch_breakpoint_from_pc_ftype *)
|
1113 |
|
|
x86_64_breakpoint_from_pc);
|
1114 |
|
|
|
1115 |
|
|
set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
|
1116 |
|
|
|
1117 |
|
|
/* Amount PC must be decremented by after a breakpoint. This is often the
|
1118 |
|
|
number of bytes in BREAKPOINT but not always. */
|
1119 |
|
|
set_gdbarch_decr_pc_after_break (gdbarch, 1);
|
1120 |
|
|
|
1121 |
|
|
/* Use dwarf2 debug frame informations. */
|
1122 |
|
|
set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
|
1123 |
|
|
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum);
|
1124 |
|
|
|
1125 |
|
|
return gdbarch;
|
1126 |
|
|
}
|
1127 |
|
|
|
1128 |
|
|
void
|
1129 |
|
|
_initialize_x86_64_tdep (void)
|
1130 |
|
|
{
|
1131 |
|
|
register_gdbarch_init (bfd_arch_i386, x86_64_gdbarch_init);
|
1132 |
|
|
|
1133 |
|
|
/* Initialize the table saying where each register starts in the
|
1134 |
|
|
register file. */
|
1135 |
|
|
{
|
1136 |
|
|
int i, offset;
|
1137 |
|
|
|
1138 |
|
|
offset = 0;
|
1139 |
|
|
for (i = 0; i < X86_64_NUM_REGS; i++)
|
1140 |
|
|
{
|
1141 |
|
|
x86_64_register_byte_table[i] = offset;
|
1142 |
|
|
offset += x86_64_register_info_table[i].size;
|
1143 |
|
|
}
|
1144 |
|
|
}
|
1145 |
|
|
|
1146 |
|
|
tm_print_insn = gdb_print_insn_x86_64;
|
1147 |
|
|
tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
|
1148 |
|
|
|
1149 |
|
|
/* Add the variable that controls the disassembly flavour. */
|
1150 |
|
|
{
|
1151 |
|
|
struct cmd_list_element *new_cmd;
|
1152 |
|
|
|
1153 |
|
|
new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
|
1154 |
|
|
valid_flavours, &disassembly_flavour, "\
|
1155 |
|
|
Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
|
1156 |
|
|
and the default value is \"att\".", &setlist);
|
1157 |
|
|
add_show_from_set (new_cmd, &showlist);
|
1158 |
|
|
}
|
1159 |
|
|
}
|