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1181 |
sfurman |
/* Table of opcodes for the Texas Instruments TMS320C[34]X family.
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Copyright (c) 2002 Free Software Foundation.
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Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* FIXME: Only allow floating point registers for floating point
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instructions. Use another field in the instruction table?
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This field could also flag which instructions are valid for
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which architectures...
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e.g., OP_FP | OP_C40 or OP_C40_FP */
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#define IS_CPU_C3X(v) ((v) == 30 || (v) == 31 || (v) == 32)
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#define IS_CPU_C4X(v) ((v) == 0 || (v) == 40 || (v) == 44)
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/* Define some bitfield extraction/insertion macros. */
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#define EXTR(inst, m, l) ((inst) << (31 - (m)) >> (31 - ((m) - (l))))
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#define EXTRU(inst, m, l) EXTR ((unsigned long)(inst), (m), (l))
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#define EXTRS(inst, m, l) EXTR ((long)(inst), (m), (l))
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#define INSERTU(inst, val, m, l) (inst |= ((val) << (l)))
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#define INSERTS(inst, val, m, l) INSERTU (inst, ((val) & ((1 << ((m) - (l) + 1)) - 1)), m, l)
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/* Define register numbers. */
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typedef enum
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{
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REG_R0, REG_R1, REG_R2, REG_R3,
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REG_R4, REG_R5, REG_R6, REG_R7,
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REG_AR0, REG_AR1, REG_AR2, REG_AR3,
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REG_AR4, REG_AR5, REG_AR6, REG_AR7,
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REG_DP, REG_IR0, REG_IR1, REG_BK,
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REG_SP, REG_ST, REG_DIE, REG_IIE,
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REG_IIF, REG_RS, REG_RE, REG_RC,
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REG_R8, REG_R9, REG_R10, REG_R11,
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REG_IVTP, REG_TVTP
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}
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c4x_reg_t;
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/* Note that the actual register numbers for IVTP is 0 and TVTP is 1. */
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#define REG_IE REG_DIE /* C3x only */
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#define REG_IF REG_IIE /* C3x only */
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#define REG_IOF REG_IIF /* C3x only */
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#define C3X_REG_MAX REG_RC
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#define C4X_REG_MAX REG_TVTP
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/* Register table size including C4x expansion regs. */
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#define REG_TABLE_SIZE (C4X_REG_MAX + 1)
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struct c4x_register
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{
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char * name;
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unsigned long regno;
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};
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typedef struct c4x_register c4x_register_t;
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/* We could store register synonyms here. */
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static const c4x_register_t c3x_registers[] =
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{
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{"f0", REG_R0},
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{"r0", REG_R0},
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{"f1", REG_R1},
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{"r1", REG_R1},
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{"f2", REG_R2},
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{"r2", REG_R2},
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{"f3", REG_R3},
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{"r3", REG_R3},
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{"f4", REG_R4},
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{"r4", REG_R4},
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{"f5", REG_R5},
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{"r5", REG_R5},
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{"f6", REG_R6},
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{"r6", REG_R6},
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{"f7", REG_R7},
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{"r7", REG_R7},
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{"ar0", REG_AR0},
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{"ar1", REG_AR1},
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{"ar2", REG_AR2},
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{"ar3", REG_AR3},
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{"ar4", REG_AR4},
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{"ar5", REG_AR5},
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{"ar6", REG_AR6},
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{"ar7", REG_AR7},
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{"dp", REG_DP},
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{"ir0", REG_IR0},
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{"ir1", REG_IR1},
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{"bk", REG_BK},
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{"sp", REG_SP},
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{"st", REG_ST},
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{"ie", REG_IE},
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{"if", REG_IF},
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{"iof", REG_IOF},
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{"rs", REG_RS},
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{"re", REG_RE},
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{"rc", REG_RC},
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{"", 0}
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};
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const unsigned int c3x_num_registers = (((sizeof c3x_registers) / (sizeof c3x_registers[0])) - 1);
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/* Define C4x registers in addition to C3x registers. */
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static const c4x_register_t c4x_registers[] =
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{
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{"die", REG_DIE}, /* Clobbers C3x REG_IE */
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{"iie", REG_IIE}, /* Clobbers C3x REG_IF */
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{"iif", REG_IIF}, /* Clobbers C3x REG_IOF */
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{"f8", REG_R8},
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{"r8", REG_R8},
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{"f9", REG_R9},
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{"r9", REG_R9},
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{"f10", REG_R10},
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{"r10", REG_R10},
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{"f11", REG_R11},
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{"r11", REG_R11},
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{"ivtp", REG_IVTP},
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{"tvtp", REG_TVTP},
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{"", 0}
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};
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const unsigned int c4x_num_registers = (((sizeof c4x_registers) / (sizeof c4x_registers[0])) - 1);
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/* Instruction template. */
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struct c4x_inst
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{
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char * name;
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unsigned long opcode;
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unsigned long opmask;
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char * args;
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};
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typedef struct c4x_inst c4x_inst_t;
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/* B condition 16--20
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C condition 23--27
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, required arg follows
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; optional arg follows
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General addressing modes
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* indirect 0--15
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# direct (for ldp only) 0--15
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@ direct 0--15
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F short float immediate 0--15
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Q register 0--15
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R register 16--20
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S short int immediate 0--15
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D src and dst same reg
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Three operand addressing modes
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E register 0--7
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G register 8--15
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I indirect(short) 0--7
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J indirect(short) 8--15
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R register 16--20
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W short int (C4x) 0--7
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C indirect(short) (C4x) 0--7
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O indirect(short) (C4x) 8--15
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Parallel instruction addressing modes
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E register 0--7
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G register 8--15
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I indirect(short) 0--7
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J indirect(short) 8--15
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K register 19--21
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L register 22--24
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M register (R2,R3) 22--22
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N register (R0,R1) 23--23
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Misc. addressing modes
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A address register 22--24
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B unsigned integer 0--23 (absolute on C3x, relative on C4x)
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P displacement (PC Rel) 0--15
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U unsigned integer 0--15
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V vector 0--4 (C4x 0--8)
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T integer (C4x stik) 16--20
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Y address reg (C4x) 16--20
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X expansion reg (C4x) 0--4
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Z expansion reg (C4x) 16--20. */
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#define C4X_OPERANDS_MAX 7 /* Max number of operands for an inst. */
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#define C4X_NAME_MAX 16 /* Max number of chars in parallel name. */
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/* General (two) operand group. */
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#define G_F_r "F,R"
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#define G_I_r "S,R"
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#define G_L_r "U,R"
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#define G_Q_r "*,R"
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#define G_T_r "@,R"
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#define G_r_r "Q;R"
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/* Three operand group (Type 1 with missing third operand). */
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#define T_rr_ "E,G"
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#define T_rS_ "E,J"
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#define T_Sr_ "I,G"
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#define T_SS_ "I,J"
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/* Three operand group (Type 2 with missing third operand). */
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#define T_Jr_ "W,G" /* C4x only */
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#define T_rJ_ "G,W" /* C4x only (commutative insns only) */
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#define T_Rr_ "C,G" /* C4x only */
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#define T_rR_ "G,C" /* C4x only (commutative insns only) */
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#define T_JR_ "W,O" /* C4x only */
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#define T_RJ_ "O,W" /* C4x only (commutative insns only) */
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#define T_RR_ "C,O" /* C4x only */
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/* Three operand group (Type 1). */
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#define T_rrr "E,G;R"
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#define T_Srr "E,J,R"
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#define T_rSr "I,G;R"
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#define T_SSr "I,J,R"
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/* Three operand group (Type 2). */
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#define T_Jrr "W,G;R" /* C4x only */
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#define T_rJr "G,W,R" /* C4x only (commutative insns only) */
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#define T_Rrr "C,G;R" /* C4x only */
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#define T_rRr "G,C,R" /* C4x only (commutative insns only) */
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#define T_JRr "W,O,R" /* C4x only */
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#define T_RJr "O,W,R" /* C4x only (commutative insns only) */
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#define T_RRr "C,O,R" /* C4x only */
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/* Parallel group (store || op). */
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#define Q_rS_rSr "H,J|K,I,L"
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#define Q_rS_Sr "H,J|I,L"
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#define Q_rS_Srr "H,J|I,K;L"
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/* Parallel group (op || store). */
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#define P_rSr_rS "K,I,L|H,J"
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#define P_Srr_rS "I,K;L|H,J"
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#define P_rS_rS "L,I|H,J"
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/* Parallel group (load || load). */
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#define P_Sr_Sr "I,L|J,K"
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#define Q_Sr_Sr "J,K|I,L"
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/* Parallel group (store || store). */
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#define P_Sr_rS "I,L|H,J"
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#define Q_rS_rS "H,J|L,I"
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/* Parallel group (multiply || add/sub). */
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#define P_SSr_rrr "I,J,N|H,K;M" /* 00 (User manual transposes I,J) */
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#define P_Srr_rSr "J,K;N|H,I,M" /* 01 */
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#define P_rSr_rSr "K,J,N|H,I,M" /* 01 */
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#define P_rrr_SSr "H,K;N|I,J,M" /* 10 (User manual transposes H,K) */
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#define P_Srr_Srr "J,K;N|I,H;M" /* 11 */
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#define P_rSr_Srr "K,J,N|I,H;M" /* 11 */
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#define Q_rrr_SSr "H,K;M|I,J,N" /* 00 (User manual transposes I,J) */
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#define Q_rSr_Srr "H,I,M|J,K;N" /* 01 */
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#define Q_rSr_rSr "H,I,M|K,J,N" /* 01 */
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#define Q_SSr_rrr "I,J,M|H,K;N" /* 10 (User manual transposes H,K) */
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#define Q_Srr_Srr "I,H;M|J,K;N" /* 11 */
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#define Q_Srr_rSr "I,H;M|K,J,N" /* 11 */
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/* Define c3x opcodes for assembler and disassembler. */
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static const c4x_inst_t c3x_insts[] =
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{
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/* Put synonyms after the desired forms in table so that they get
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overwritten in the lookup table. The disassembler will thus
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print the `proper' mnemonics. Note that the disassembler
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only decodes the 11 MSBs, so instructions like ldp @0x500 will
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be printed as ldiu 5, dp. Note that with parallel instructions,
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the second part is executed before the first part, unless
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the sti1||sti2 form is used. We also allow sti2||sti1
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which is equivalent to the default sti||sti form.
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277 |
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Put most common forms first to speed up assembler.
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278 |
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279 |
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FIXME: Add all the other parallel/load forms, like absf1_stf2
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280 |
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Perhaps I should have used a few macros...especially with
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all the bloat after adding the C4x opcodes...too late now! */
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282 |
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283 |
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/* Parallel instructions. */
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284 |
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{ "absf_stf", 0xc8000000, 0xfe000000, P_Sr_rS },
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{ "absi_sti", 0xca000000, 0xfe000000, P_Sr_rS },
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286 |
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{ "addf_mpyf", 0x80000000, 0xff000000, Q_rrr_SSr },
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287 |
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{ "addf_mpyf", 0x81000000, 0xff000000, Q_rSr_Srr },
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{ "addf_mpyf", 0x81000000, 0xff000000, Q_rSr_rSr },
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289 |
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{ "addf_mpyf", 0x82000000, 0xff000000, Q_SSr_rrr },
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{ "addf_mpyf", 0x83000000, 0xff000000, Q_Srr_Srr },
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291 |
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{ "addf_mpyf", 0x83000000, 0xff000000, Q_Srr_rSr },
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{ "addf3_mpyf3", 0x80000000, 0xff000000, Q_rrr_SSr },
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293 |
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{ "addf3_mpyf3", 0x81000000, 0xff000000, Q_rSr_Srr },
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{ "addf3_mpyf3", 0x81000000, 0xff000000, Q_rSr_rSr },
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295 |
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{ "addf3_mpyf3", 0x82000000, 0xff000000, Q_SSr_rrr },
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{ "addf3_mpyf3", 0x83000000, 0xff000000, Q_Srr_Srr },
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297 |
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{ "addf3_mpyf3", 0x83000000, 0xff000000, Q_Srr_rSr },
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{ "addf_stf", 0xcc000000, 0xfe000000, P_Srr_rS },
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299 |
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{ "addf_stf", 0xcc000000, 0xfe000000, P_rSr_rS },
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300 |
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{ "addf3_stf", 0xcc000000, 0xfe000000, P_Srr_rS },
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301 |
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{ "addf3_stf", 0xcc000000, 0xfe000000, P_rSr_rS },
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302 |
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{ "addi_mpyi", 0x88000000, 0xff000000, Q_rrr_SSr },
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303 |
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{ "addi_mpyi", 0x89000000, 0xff000000, Q_rSr_Srr },
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304 |
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{ "addi_mpyi", 0x89000000, 0xff000000, Q_rSr_rSr },
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305 |
|
|
{ "addi_mpyi", 0x8a000000, 0xff000000, Q_SSr_rrr },
|
306 |
|
|
{ "addi_mpyi", 0x8b000000, 0xff000000, Q_Srr_Srr },
|
307 |
|
|
{ "addi3_mpyi3", 0x88000000, 0xff000000, Q_rrr_SSr },
|
308 |
|
|
{ "addi3_mpyi3", 0x89000000, 0xff000000, Q_rSr_Srr },
|
309 |
|
|
{ "addi3_mpyi3", 0x8a000000, 0xff000000, Q_SSr_rrr },
|
310 |
|
|
{ "addi3_mpyi3", 0x8b000000, 0xff000000, Q_Srr_Srr },
|
311 |
|
|
{ "addi3_mpyi3", 0x8b000000, 0xff000000, Q_Srr_rSr },
|
312 |
|
|
{ "addi_sti", 0xce000000, 0xfe000000, P_Srr_rS },
|
313 |
|
|
{ "addi_sti", 0xce000000, 0xfe000000, P_rSr_rS },
|
314 |
|
|
{ "addi3_sti", 0xce000000, 0xfe000000, P_Srr_rS },
|
315 |
|
|
{ "addi3_sti", 0xce000000, 0xfe000000, P_rSr_rS },
|
316 |
|
|
{ "and_sti", 0xd0000000, 0xfe000000, P_Srr_rS },
|
317 |
|
|
{ "and_sti", 0xd0000000, 0xfe000000, P_rSr_rS },
|
318 |
|
|
{ "and3_sti", 0xd0000000, 0xfe000000, P_Srr_rS },
|
319 |
|
|
{ "and3_sti", 0xd0000000, 0xfe000000, P_rSr_rS },
|
320 |
|
|
{ "ash_sti", 0xd2000000, 0xfe000000, P_rSr_rS },
|
321 |
|
|
{ "ash3_sti", 0xd2000000, 0xfe000000, P_rSr_rS },
|
322 |
|
|
{ "fix_sti", 0xd4000000, 0xfe000000, P_Sr_rS },
|
323 |
|
|
{ "float_stf", 0xd6000000, 0xfe000000, P_Sr_rS },
|
324 |
|
|
{ "ldf_ldf", 0xc4000000, 0xfe000000, P_Sr_Sr },
|
325 |
|
|
{ "ldf1_ldf2", 0xc4000000, 0xfe000000, Q_Sr_Sr }, /* synonym */
|
326 |
|
|
{ "ldf2_ldf1", 0xc4000000, 0xfe000000, P_Sr_Sr }, /* synonym */
|
327 |
|
|
{ "ldf_stf", 0xd8000000, 0xfe000000, P_Sr_rS },
|
328 |
|
|
{ "ldi_ldi", 0xc6000000, 0xfe000000, P_Sr_Sr },
|
329 |
|
|
{ "ldi1_ldi2", 0xc6000000, 0xfe000000, Q_Sr_Sr }, /* synonym */
|
330 |
|
|
{ "ldi2_ldi1", 0xc6000000, 0xfe000000, P_Sr_Sr }, /* synonym */
|
331 |
|
|
{ "ldi_sti", 0xda000000, 0xfe000000, P_Sr_rS },
|
332 |
|
|
{ "lsh_sti", 0xdc000000, 0xfe000000, P_rSr_rS },
|
333 |
|
|
{ "lsh3_sti", 0xdc000000, 0xfe000000, P_rSr_rS },
|
334 |
|
|
{ "mpyf_addf", 0x80000000, 0xff000000, P_SSr_rrr },
|
335 |
|
|
{ "mpyf_addf", 0x81000000, 0xff000000, P_Srr_rSr },
|
336 |
|
|
{ "mpyf_addf", 0x81000000, 0xff000000, P_rSr_rSr },
|
337 |
|
|
{ "mpyf_addf", 0x82000000, 0xff000000, P_rrr_SSr },
|
338 |
|
|
{ "mpyf_addf", 0x83000000, 0xff000000, P_Srr_Srr },
|
339 |
|
|
{ "mpyf_addf", 0x83000000, 0xff000000, P_rSr_Srr },
|
340 |
|
|
{ "mpyf3_addf3", 0x80000000, 0xff000000, P_SSr_rrr },
|
341 |
|
|
{ "mpyf3_addf3", 0x81000000, 0xff000000, P_Srr_rSr },
|
342 |
|
|
{ "mpyf3_addf3", 0x81000000, 0xff000000, P_rSr_rSr },
|
343 |
|
|
{ "mpyf3_addf3", 0x82000000, 0xff000000, P_rrr_SSr },
|
344 |
|
|
{ "mpyf3_addf3", 0x83000000, 0xff000000, P_Srr_Srr },
|
345 |
|
|
{ "mpyf3_addf3", 0x83000000, 0xff000000, P_rSr_Srr },
|
346 |
|
|
{ "mpyf_stf", 0xde000000, 0xfe000000, P_Srr_rS },
|
347 |
|
|
{ "mpyf_stf", 0xde000000, 0xfe000000, P_rSr_rS },
|
348 |
|
|
{ "mpyf3_stf", 0xde000000, 0xfe000000, P_Srr_rS },
|
349 |
|
|
{ "mpyf3_stf", 0xde000000, 0xfe000000, P_rSr_rS },
|
350 |
|
|
{ "mpyf_subf", 0x84000000, 0xff000000, P_SSr_rrr },
|
351 |
|
|
{ "mpyf_subf", 0x85000000, 0xff000000, P_Srr_rSr },
|
352 |
|
|
{ "mpyf_subf", 0x85000000, 0xff000000, P_rSr_rSr },
|
353 |
|
|
{ "mpyf_subf", 0x86000000, 0xff000000, P_rrr_SSr },
|
354 |
|
|
{ "mpyf_subf", 0x87000000, 0xff000000, P_Srr_Srr },
|
355 |
|
|
{ "mpyf_subf", 0x87000000, 0xff000000, P_rSr_Srr },
|
356 |
|
|
{ "mpyf3_subf3", 0x84000000, 0xff000000, P_SSr_rrr },
|
357 |
|
|
{ "mpyf3_subf3", 0x85000000, 0xff000000, P_Srr_rSr },
|
358 |
|
|
{ "mpyf3_subf3", 0x85000000, 0xff000000, P_rSr_rSr },
|
359 |
|
|
{ "mpyf3_subf3", 0x86000000, 0xff000000, P_rrr_SSr },
|
360 |
|
|
{ "mpyf3_subf3", 0x87000000, 0xff000000, P_Srr_Srr },
|
361 |
|
|
{ "mpyf3_subf3", 0x87000000, 0xff000000, P_rSr_Srr },
|
362 |
|
|
{ "mpyi_addi", 0x88000000, 0xff000000, P_SSr_rrr },
|
363 |
|
|
{ "mpyi_addi", 0x89000000, 0xff000000, P_Srr_rSr },
|
364 |
|
|
{ "mpyi_addi", 0x89000000, 0xff000000, P_rSr_rSr },
|
365 |
|
|
{ "mpyi_addi", 0x8a000000, 0xff000000, P_rrr_SSr },
|
366 |
|
|
{ "mpyi_addi", 0x8b000000, 0xff000000, P_Srr_Srr },
|
367 |
|
|
{ "mpyi_addi", 0x8b000000, 0xff000000, P_rSr_Srr },
|
368 |
|
|
{ "mpyi3_addi3", 0x88000000, 0xff000000, P_SSr_rrr },
|
369 |
|
|
{ "mpyi3_addi3", 0x89000000, 0xff000000, P_Srr_rSr },
|
370 |
|
|
{ "mpyi3_addi3", 0x89000000, 0xff000000, P_rSr_rSr },
|
371 |
|
|
{ "mpyi3_addi3", 0x8a000000, 0xff000000, P_rrr_SSr },
|
372 |
|
|
{ "mpyi3_addi3", 0x8b000000, 0xff000000, P_Srr_Srr },
|
373 |
|
|
{ "mpyi3_addi3", 0x8b000000, 0xff000000, P_rSr_Srr },
|
374 |
|
|
{ "mpyi_sti", 0xe0000000, 0xfe000000, P_Srr_rS },
|
375 |
|
|
{ "mpyi_sti", 0xe0000000, 0xfe000000, P_rSr_rS },
|
376 |
|
|
{ "mpyi3_sti", 0xe0000000, 0xfe000000, P_Srr_rS },
|
377 |
|
|
{ "mpyi3_sti", 0xe0000000, 0xfe000000, P_rSr_rS },
|
378 |
|
|
{ "mpyi_subi", 0x8c000000, 0xff000000, P_SSr_rrr },
|
379 |
|
|
{ "mpyi_subi", 0x8d000000, 0xff000000, P_Srr_rSr },
|
380 |
|
|
{ "mpyi_subi", 0x8d000000, 0xff000000, P_rSr_rSr },
|
381 |
|
|
{ "mpyi_subi", 0x8e000000, 0xff000000, P_rrr_SSr },
|
382 |
|
|
{ "mpyi_subi", 0x8f000000, 0xff000000, P_Srr_Srr },
|
383 |
|
|
{ "mpyi_subi", 0x8f000000, 0xff000000, P_rSr_Srr },
|
384 |
|
|
{ "mpyi3_subi3", 0x8c000000, 0xff000000, P_SSr_rrr },
|
385 |
|
|
{ "mpyi3_subi3", 0x8d000000, 0xff000000, P_Srr_rSr },
|
386 |
|
|
{ "mpyi3_subi3", 0x8d000000, 0xff000000, P_rSr_rSr },
|
387 |
|
|
{ "mpyi3_subi3", 0x8e000000, 0xff000000, P_rrr_SSr },
|
388 |
|
|
{ "mpyi3_subi3", 0x8f000000, 0xff000000, P_Srr_Srr },
|
389 |
|
|
{ "mpyi3_subi3", 0x8f000000, 0xff000000, P_rSr_Srr },
|
390 |
|
|
{ "negf_stf", 0xe2000000, 0xfe000000, P_Sr_rS },
|
391 |
|
|
{ "negi_sti", 0xe4000000, 0xfe000000, P_Sr_rS },
|
392 |
|
|
{ "not_sti", 0xe6000000, 0xfe000000, P_Sr_rS },
|
393 |
|
|
{ "or3_sti", 0xe8000000, 0xfe000000, P_Srr_rS },
|
394 |
|
|
{ "or3_sti", 0xe8000000, 0xfe000000, P_rSr_rS },
|
395 |
|
|
{ "stf_absf", 0xc8000000, 0xfe000000, Q_rS_Sr },
|
396 |
|
|
{ "stf_addf", 0xcc000000, 0xfe000000, Q_rS_Srr },
|
397 |
|
|
{ "stf_addf", 0xcc000000, 0xfe000000, Q_rS_rSr },
|
398 |
|
|
{ "stf_addf3", 0xcc000000, 0xfe000000, Q_rS_Srr },
|
399 |
|
|
{ "stf_addf3", 0xcc000000, 0xfe000000, Q_rS_rSr },
|
400 |
|
|
{ "stf_float", 0xd6000000, 0xfe000000, Q_rS_Sr },
|
401 |
|
|
{ "stf_mpyf", 0xde000000, 0xfe000000, Q_rS_Srr },
|
402 |
|
|
{ "stf_mpyf", 0xde000000, 0xfe000000, Q_rS_rSr },
|
403 |
|
|
{ "stf_mpyf3", 0xde000000, 0xfe000000, Q_rS_Srr },
|
404 |
|
|
{ "stf_mpyf3", 0xde000000, 0xfe000000, Q_rS_rSr },
|
405 |
|
|
{ "stf_negf", 0xe2000000, 0xfe000000, Q_rS_Sr },
|
406 |
|
|
{ "stf_stf", 0xc0000000, 0xfe000000, P_rS_rS },
|
407 |
|
|
{ "stf1_stf2", 0xc0000000, 0xfe000000, Q_rS_rS }, /* synonym */
|
408 |
|
|
{ "stf2_stf1", 0xc0000000, 0xfe000000, P_rS_rS }, /* synonym */
|
409 |
|
|
{ "stf_subf", 0xea000000, 0xfe000000, Q_rS_rSr },
|
410 |
|
|
{ "stf_subf3", 0xea000000, 0xfe000000, Q_rS_rSr },
|
411 |
|
|
{ "sti_absi", 0xca000000, 0xfe000000, Q_rS_Sr },
|
412 |
|
|
{ "sti_addi", 0xce000000, 0xfe000000, Q_rS_Srr },
|
413 |
|
|
{ "sti_addi", 0xce000000, 0xfe000000, Q_rS_rSr },
|
414 |
|
|
{ "sti_addi3", 0xce000000, 0xfe000000, Q_rS_Srr },
|
415 |
|
|
{ "sti_addi3", 0xce000000, 0xfe000000, Q_rS_rSr },
|
416 |
|
|
{ "sti_and", 0xd0000000, 0xfe000000, Q_rS_Srr },
|
417 |
|
|
{ "sti_and", 0xd0000000, 0xfe000000, Q_rS_rSr },
|
418 |
|
|
{ "sti_and3", 0xd0000000, 0xfe000000, Q_rS_Srr },
|
419 |
|
|
{ "sti_and3", 0xd0000000, 0xfe000000, Q_rS_rSr },
|
420 |
|
|
{ "sti_ash3", 0xd2000000, 0xfe000000, Q_rS_rSr },
|
421 |
|
|
{ "sti_fix", 0xd4000000, 0xfe000000, Q_rS_Sr },
|
422 |
|
|
{ "sti_ldi", 0xda000000, 0xfe000000, Q_rS_Sr },
|
423 |
|
|
{ "sti_lsh", 0xdc000000, 0xfe000000, Q_rS_rSr },
|
424 |
|
|
{ "sti_lsh3", 0xdc000000, 0xfe000000, Q_rS_rSr },
|
425 |
|
|
{ "sti_mpyi", 0xe0000000, 0xfe000000, Q_rS_Srr },
|
426 |
|
|
{ "sti_mpyi", 0xe0000000, 0xfe000000, Q_rS_rSr },
|
427 |
|
|
{ "sti_mpyi3", 0xe0000000, 0xfe000000, Q_rS_Srr },
|
428 |
|
|
{ "sti_mpyi3", 0xe0000000, 0xfe000000, Q_rS_rSr },
|
429 |
|
|
{ "sti_negi", 0xe4000000, 0xfe000000, Q_rS_Sr },
|
430 |
|
|
{ "sti_not", 0xe6000000, 0xfe000000, Q_rS_Sr },
|
431 |
|
|
{ "sti_or", 0xe8000000, 0xfe000000, Q_rS_Srr },
|
432 |
|
|
{ "sti_or", 0xe8000000, 0xfe000000, Q_rS_rSr },
|
433 |
|
|
{ "sti_or3", 0xe8000000, 0xfe000000, Q_rS_Srr },
|
434 |
|
|
{ "sti_or3", 0xe8000000, 0xfe000000, Q_rS_rSr },
|
435 |
|
|
{ "sti_sti", 0xc2000000, 0xfe000000, P_rS_rS },
|
436 |
|
|
{ "sti1_sti2", 0xc2000000, 0xfe000000, Q_rS_rS }, /* synonym */
|
437 |
|
|
{ "sti2_sti1", 0xc2000000, 0xfe000000, P_rS_rS }, /* synonym */
|
438 |
|
|
{ "sti_subi", 0xec000000, 0xfe000000, Q_rS_rSr },
|
439 |
|
|
{ "sti_subi3", 0xec000000, 0xfe000000, Q_rS_rSr },
|
440 |
|
|
{ "sti_xor", 0xee000000, 0xfe000000, Q_rS_Srr },
|
441 |
|
|
{ "sti_xor", 0xee000000, 0xfe000000, Q_rS_rSr },
|
442 |
|
|
{ "sti_xor3", 0xee000000, 0xfe000000, Q_rS_Srr },
|
443 |
|
|
{ "sti_xor3", 0xee000000, 0xfe000000, Q_rS_rSr },
|
444 |
|
|
{ "subf_mpyf", 0x84000000, 0xff000000, Q_rrr_SSr },
|
445 |
|
|
{ "subf_mpyf", 0x85000000, 0xff000000, Q_rSr_Srr },
|
446 |
|
|
{ "subf_mpyf", 0x85000000, 0xff000000, Q_rSr_rSr },
|
447 |
|
|
{ "subf_mpyf", 0x86000000, 0xff000000, Q_SSr_rrr },
|
448 |
|
|
{ "subf_mpyf", 0x87000000, 0xff000000, Q_Srr_Srr },
|
449 |
|
|
{ "subf_mpyf", 0x87000000, 0xff000000, Q_Srr_rSr },
|
450 |
|
|
{ "subf3_mpyf3", 0x84000000, 0xff000000, Q_rrr_SSr },
|
451 |
|
|
{ "subf3_mpyf3", 0x85000000, 0xff000000, Q_rSr_Srr },
|
452 |
|
|
{ "subf3_mpyf3", 0x85000000, 0xff000000, Q_rSr_rSr },
|
453 |
|
|
{ "subf3_mpyf3", 0x86000000, 0xff000000, Q_SSr_rrr },
|
454 |
|
|
{ "subf3_mpyf3", 0x87000000, 0xff000000, Q_Srr_Srr },
|
455 |
|
|
{ "subf3_mpyf3", 0x87000000, 0xff000000, Q_Srr_rSr },
|
456 |
|
|
{ "subf_stf", 0xea000000, 0xfe000000, P_rSr_rS },
|
457 |
|
|
{ "subf3_stf", 0xea000000, 0xfe000000, P_rSr_rS },
|
458 |
|
|
{ "subi_mpyi", 0x8c000000, 0xff000000, Q_rrr_SSr },
|
459 |
|
|
{ "subi_mpyi", 0x8d000000, 0xff000000, Q_rSr_Srr },
|
460 |
|
|
{ "subi_mpyi", 0x8d000000, 0xff000000, Q_rSr_rSr },
|
461 |
|
|
{ "subi_mpyi", 0x8e000000, 0xff000000, Q_SSr_rrr },
|
462 |
|
|
{ "subi_mpyi", 0x8f000000, 0xff000000, Q_Srr_Srr },
|
463 |
|
|
{ "subi_mpyi", 0x8f000000, 0xff000000, Q_Srr_rSr },
|
464 |
|
|
{ "subi3_mpyi3", 0x8c000000, 0xff000000, Q_rrr_SSr },
|
465 |
|
|
{ "subi3_mpyi3", 0x8d000000, 0xff000000, Q_rSr_Srr },
|
466 |
|
|
{ "subi3_mpyi3", 0x8d000000, 0xff000000, Q_rSr_rSr },
|
467 |
|
|
{ "subi3_mpyi3", 0x8e000000, 0xff000000, Q_SSr_rrr },
|
468 |
|
|
{ "subi3_mpyi3", 0x8f000000, 0xff000000, Q_Srr_Srr },
|
469 |
|
|
{ "subi3_mpyi3", 0x8f000000, 0xff000000, Q_Srr_rSr },
|
470 |
|
|
{ "subi_sti", 0xec000000, 0xfe000000, P_rSr_rS },
|
471 |
|
|
{ "subi3_sti", 0xec000000, 0xfe000000, P_rSr_rS },
|
472 |
|
|
{ "xor_sti", 0xee000000, 0xfe000000, P_Srr_rS },
|
473 |
|
|
{ "xor_sti", 0xee000000, 0xfe000000, P_rSr_rS },
|
474 |
|
|
{ "xor3_sti", 0xee000000, 0xfe000000, P_Srr_rS },
|
475 |
|
|
{ "xor3_sti", 0xee000000, 0xfe000000, P_rSr_rS },
|
476 |
|
|
|
477 |
|
|
{ "absf", 0x00000000, 0xffe00000, G_r_r },
|
478 |
|
|
{ "absf", 0x00200000, 0xffe00000, G_T_r },
|
479 |
|
|
{ "absf", 0x00400000, 0xffe00000, G_Q_r },
|
480 |
|
|
{ "absf", 0x00600000, 0xffe00000, G_F_r },
|
481 |
|
|
{ "absi", 0x00800000, 0xffe00000, G_r_r },
|
482 |
|
|
{ "absi", 0x00a00000, 0xffe00000, G_T_r },
|
483 |
|
|
{ "absi", 0x00c00000, 0xffe00000, G_Q_r },
|
484 |
|
|
{ "absi", 0x00e00000, 0xffe00000, G_I_r },
|
485 |
|
|
{ "addc", 0x01000000, 0xffe00000, G_r_r },
|
486 |
|
|
{ "addc", 0x01200000, 0xffe00000, G_T_r },
|
487 |
|
|
{ "addc", 0x01400000, 0xffe00000, G_Q_r },
|
488 |
|
|
{ "addc", 0x01600000, 0xffe00000, G_I_r },
|
489 |
|
|
{ "addc", 0x20000000, 0xffe00000, T_rrr },
|
490 |
|
|
{ "addc", 0x20200000, 0xffe00000, T_Srr },
|
491 |
|
|
{ "addc", 0x20400000, 0xffe00000, T_rSr },
|
492 |
|
|
{ "addc", 0x20600000, 0xffe00000, T_SSr },
|
493 |
|
|
{ "addc", 0x30000000, 0xffe00000, T_Jrr }, /* C4x */
|
494 |
|
|
{ "addc", 0x30000000, 0xffe00000, T_rJr }, /* C4x */
|
495 |
|
|
{ "addc", 0x30200000, 0xffe00000, T_rRr }, /* C4x */
|
496 |
|
|
{ "addc", 0x30200000, 0xffe00000, T_Rrr }, /* C4x */
|
497 |
|
|
{ "addc", 0x30400000, 0xffe00000, T_JRr }, /* C4x */
|
498 |
|
|
{ "addc", 0x30400000, 0xffe00000, T_RJr }, /* C4x */
|
499 |
|
|
{ "addc", 0x30600000, 0xffe00000, T_RRr }, /* C4x */
|
500 |
|
|
{ "addc3", 0x20000000, 0xffe00000, T_rrr },
|
501 |
|
|
{ "addc3", 0x20200000, 0xffe00000, T_Srr },
|
502 |
|
|
{ "addc3", 0x20400000, 0xffe00000, T_rSr },
|
503 |
|
|
{ "addc3", 0x20600000, 0xffe00000, T_SSr },
|
504 |
|
|
{ "addc3", 0x30000000, 0xffe00000, T_Jrr }, /* C4x */
|
505 |
|
|
{ "addc3", 0x30000000, 0xffe00000, T_rJr }, /* C4x */
|
506 |
|
|
{ "addc3", 0x30200000, 0xffe00000, T_rRr }, /* C4x */
|
507 |
|
|
{ "addc3", 0x30200000, 0xffe00000, T_Rrr }, /* C4x */
|
508 |
|
|
{ "addc3", 0x30400000, 0xffe00000, T_JRr }, /* C4x */
|
509 |
|
|
{ "addc3", 0x30400000, 0xffe00000, T_RJr }, /* C4x */
|
510 |
|
|
{ "addc3", 0x30600000, 0xffe00000, T_RRr }, /* C4x */
|
511 |
|
|
{ "addf", 0x01800000, 0xffe00000, G_r_r },
|
512 |
|
|
{ "addf", 0x01a00000, 0xffe00000, G_T_r },
|
513 |
|
|
{ "addf", 0x01c00000, 0xffe00000, G_Q_r },
|
514 |
|
|
{ "addf", 0x01e00000, 0xffe00000, G_F_r },
|
515 |
|
|
{ "addf", 0x20800000, 0xffe00000, T_rrr },
|
516 |
|
|
{ "addf", 0x20a00000, 0xffe00000, T_Srr },
|
517 |
|
|
{ "addf", 0x20c00000, 0xffe00000, T_rSr },
|
518 |
|
|
{ "addf", 0x20e00000, 0xffe00000, T_SSr },
|
519 |
|
|
{ "addf", 0x30800000, 0xffe00000, T_Jrr }, /* C4x */
|
520 |
|
|
{ "addf", 0x30800000, 0xffe00000, T_rJr }, /* C4x */
|
521 |
|
|
{ "addf", 0x30a00000, 0xffe00000, T_rRr }, /* C4x */
|
522 |
|
|
{ "addf", 0x30a00000, 0xffe00000, T_Rrr }, /* C4x */
|
523 |
|
|
{ "addf", 0x30c00000, 0xffe00000, T_JRr }, /* C4x */
|
524 |
|
|
{ "addf", 0x30c00000, 0xffe00000, T_RJr }, /* C4x */
|
525 |
|
|
{ "addf", 0x30e00000, 0xffe00000, T_RRr }, /* C4x */
|
526 |
|
|
{ "addf3", 0x20800000, 0xffe00000, T_rrr },
|
527 |
|
|
{ "addf3", 0x20a00000, 0xffe00000, T_Srr },
|
528 |
|
|
{ "addf3", 0x20c00000, 0xffe00000, T_rSr },
|
529 |
|
|
{ "addf3", 0x20e00000, 0xffe00000, T_SSr },
|
530 |
|
|
{ "addf3", 0x30800000, 0xffe00000, T_Jrr }, /* C4x */
|
531 |
|
|
{ "addf3", 0x30800000, 0xffe00000, T_rJr }, /* C4x */
|
532 |
|
|
{ "addf3", 0x30a00000, 0xffe00000, T_rRr }, /* C4x */
|
533 |
|
|
{ "addf3", 0x30a00000, 0xffe00000, T_Rrr }, /* C4x */
|
534 |
|
|
{ "addf3", 0x30c00000, 0xffe00000, T_JRr }, /* C4x */
|
535 |
|
|
{ "addf3", 0x30c00000, 0xffe00000, T_RJr }, /* C4x */
|
536 |
|
|
{ "addf3", 0x30e00000, 0xffe00000, T_RRr }, /* C4x */
|
537 |
|
|
{ "addi", 0x02000000, 0xffe00000, G_r_r },
|
538 |
|
|
{ "addi", 0x02200000, 0xffe00000, G_T_r },
|
539 |
|
|
{ "addi", 0x02400000, 0xffe00000, G_Q_r },
|
540 |
|
|
{ "addi", 0x02600000, 0xffe00000, G_I_r },
|
541 |
|
|
{ "addi", 0x21000000, 0xffe00000, T_rrr },
|
542 |
|
|
{ "addi", 0x21200000, 0xffe00000, T_Srr },
|
543 |
|
|
{ "addi", 0x21400000, 0xffe00000, T_rSr },
|
544 |
|
|
{ "addi", 0x21600000, 0xffe00000, T_SSr },
|
545 |
|
|
{ "addi", 0x31000000, 0xffe00000, T_Jrr }, /* C4x */
|
546 |
|
|
{ "addi", 0x31000000, 0xffe00000, T_rJr }, /* C4x */
|
547 |
|
|
{ "addi", 0x31200000, 0xffe00000, T_rRr }, /* C4x */
|
548 |
|
|
{ "addi", 0x31200000, 0xffe00000, T_Rrr }, /* C4x */
|
549 |
|
|
{ "addi", 0x31400000, 0xffe00000, T_JRr }, /* C4x */
|
550 |
|
|
{ "addi", 0x31400000, 0xffe00000, T_RJr }, /* C4x */
|
551 |
|
|
{ "addi", 0x31600000, 0xffe00000, T_RRr }, /* C4x */
|
552 |
|
|
{ "addi3", 0x21000000, 0xffe00000, T_rrr },
|
553 |
|
|
{ "addi3", 0x21200000, 0xffe00000, T_Srr },
|
554 |
|
|
{ "addi3", 0x21400000, 0xffe00000, T_rSr },
|
555 |
|
|
{ "addi3", 0x21600000, 0xffe00000, T_SSr },
|
556 |
|
|
{ "addi3", 0x31000000, 0xffe00000, T_Jrr }, /* C4x */
|
557 |
|
|
{ "addi3", 0x31000000, 0xffe00000, T_rJr }, /* C4x */
|
558 |
|
|
{ "addi3", 0x31200000, 0xffe00000, T_rRr }, /* C4x */
|
559 |
|
|
{ "addi3", 0x31200000, 0xffe00000, T_Rrr }, /* C4x */
|
560 |
|
|
{ "addi3", 0x31400000, 0xffe00000, T_JRr }, /* C4x */
|
561 |
|
|
{ "addi3", 0x31400000, 0xffe00000, T_RJr }, /* C4x */
|
562 |
|
|
{ "addi3", 0x31600000, 0xffe00000, T_RRr }, /* C4x */
|
563 |
|
|
{ "and", 0x02800000, 0xffe00000, G_r_r },
|
564 |
|
|
{ "and", 0x02a00000, 0xffe00000, G_T_r },
|
565 |
|
|
{ "and", 0x02c00000, 0xffe00000, G_Q_r },
|
566 |
|
|
{ "and", 0x02e00000, 0xffe00000, G_L_r },
|
567 |
|
|
{ "and", 0x21800000, 0xffe00000, T_rrr },
|
568 |
|
|
{ "and", 0x21a00000, 0xffe00000, T_Srr },
|
569 |
|
|
{ "and", 0x21c00000, 0xffe00000, T_rSr },
|
570 |
|
|
{ "and", 0x21e00000, 0xffe00000, T_SSr },
|
571 |
|
|
{ "and", 0x31800000, 0xffe00000, T_Jrr }, /* C4x */
|
572 |
|
|
{ "and", 0x31800000, 0xffe00000, T_rJr }, /* C4x */
|
573 |
|
|
{ "and", 0x31a00000, 0xffe00000, T_rRr }, /* C4x */
|
574 |
|
|
{ "and", 0x31a00000, 0xffe00000, T_Rrr }, /* C4x */
|
575 |
|
|
{ "and", 0x31c00000, 0xffe00000, T_JRr }, /* C4x */
|
576 |
|
|
{ "and", 0x31c00000, 0xffe00000, T_RJr }, /* C4x */
|
577 |
|
|
{ "and", 0x31e00000, 0xffe00000, T_RRr }, /* C4x */
|
578 |
|
|
{ "and3", 0x21800000, 0xffe00000, T_rrr },
|
579 |
|
|
{ "and3", 0x21a00000, 0xffe00000, T_Srr },
|
580 |
|
|
{ "and3", 0x21c00000, 0xffe00000, T_rSr },
|
581 |
|
|
{ "and3", 0x21e00000, 0xffe00000, T_SSr },
|
582 |
|
|
{ "and3", 0x31800000, 0xffe00000, T_Jrr }, /* C4x */
|
583 |
|
|
{ "and3", 0x31800000, 0xffe00000, T_rJr }, /* C4x */
|
584 |
|
|
{ "and3", 0x31a00000, 0xffe00000, T_rRr }, /* C4x */
|
585 |
|
|
{ "and3", 0x31a00000, 0xffe00000, T_Rrr }, /* C4x */
|
586 |
|
|
{ "and3", 0x31c00000, 0xffe00000, T_JRr }, /* C4x */
|
587 |
|
|
{ "and3", 0x31c00000, 0xffe00000, T_RJr }, /* C4x */
|
588 |
|
|
{ "and3", 0x31e00000, 0xffe00000, T_RRr }, /* C4x */
|
589 |
|
|
{ "andn", 0x03000000, 0xffe00000, G_r_r },
|
590 |
|
|
{ "andn", 0x03200000, 0xffe00000, G_T_r },
|
591 |
|
|
{ "andn", 0x03400000, 0xffe00000, G_Q_r },
|
592 |
|
|
{ "andn", 0x03600000, 0xffe00000, G_L_r },
|
593 |
|
|
{ "andn", 0x22000000, 0xffe00000, T_rrr },
|
594 |
|
|
{ "andn", 0x22200000, 0xffe00000, T_Srr },
|
595 |
|
|
{ "andn", 0x22400000, 0xffe00000, T_rSr },
|
596 |
|
|
{ "andn", 0x22600000, 0xffe00000, T_SSr },
|
597 |
|
|
{ "andn", 0x32000000, 0xffe00000, T_Jrr }, /* C4x */
|
598 |
|
|
{ "andn", 0x32200000, 0xffe00000, T_Rrr }, /* C4x */
|
599 |
|
|
{ "andn", 0x32400000, 0xffe00000, T_JRr }, /* C4x */
|
600 |
|
|
{ "andn", 0x32600000, 0xffe00000, T_RRr }, /* C4x */
|
601 |
|
|
{ "andn3", 0x22000000, 0xffe00000, T_rrr },
|
602 |
|
|
{ "andn3", 0x22200000, 0xffe00000, T_Srr },
|
603 |
|
|
{ "andn3", 0x22400000, 0xffe00000, T_rSr },
|
604 |
|
|
{ "andn3", 0x22600000, 0xffe00000, T_SSr },
|
605 |
|
|
{ "andn3", 0x32000000, 0xffe00000, T_Jrr }, /* C4x */
|
606 |
|
|
{ "andn3", 0x32200000, 0xffe00000, T_Rrr }, /* C4x */
|
607 |
|
|
{ "andn3", 0x32400000, 0xffe00000, T_JRr }, /* C4x */
|
608 |
|
|
{ "andn3", 0x32600000, 0xffe00000, T_RRr }, /* C4x */
|
609 |
|
|
{ "ash", 0x03800000, 0xffe00000, G_r_r },
|
610 |
|
|
{ "ash", 0x03a00000, 0xffe00000, G_T_r },
|
611 |
|
|
{ "ash", 0x03c00000, 0xffe00000, G_Q_r },
|
612 |
|
|
{ "ash", 0x03e00000, 0xffe00000, G_I_r },
|
613 |
|
|
{ "ash", 0x22800000, 0xffe00000, T_rrr },
|
614 |
|
|
{ "ash", 0x22a00000, 0xffe00000, T_Srr },
|
615 |
|
|
{ "ash", 0x22c00000, 0xffe00000, T_rSr },
|
616 |
|
|
{ "ash", 0x22e00000, 0xffe00000, T_SSr },
|
617 |
|
|
{ "ash", 0x32800000, 0xffe00000, T_Jrr }, /* C4x */
|
618 |
|
|
{ "ash", 0x32a00000, 0xffe00000, T_Rrr }, /* C4x */
|
619 |
|
|
{ "ash", 0x32c00000, 0xffe00000, T_JRr }, /* C4x */
|
620 |
|
|
{ "ash", 0x32e00000, 0xffe00000, T_RRr }, /* C4x */
|
621 |
|
|
{ "ash3", 0x22800000, 0xffe00000, T_rrr },
|
622 |
|
|
{ "ash3", 0x22a00000, 0xffe00000, T_Srr },
|
623 |
|
|
{ "ash3", 0x22c00000, 0xffe00000, T_rSr },
|
624 |
|
|
{ "ash3", 0x22e00000, 0xffe00000, T_SSr },
|
625 |
|
|
{ "ash3", 0x32800000, 0xffe00000, T_Jrr }, /* C4x */
|
626 |
|
|
{ "ash3", 0x32a00000, 0xffe00000, T_Rrr }, /* C4x */
|
627 |
|
|
{ "ash3", 0x32c00000, 0xffe00000, T_JRr }, /* C4x */
|
628 |
|
|
{ "ash3", 0x32e00000, 0xffe00000, T_RRr }, /* C4x */
|
629 |
|
|
{ "bB", 0x68000000, 0xffe00000, "Q" },
|
630 |
|
|
{ "bB", 0x6a000000, 0xffe00000, "P" },
|
631 |
|
|
{ "b", 0x68000000, 0xffe00000, "Q" }, /* synonym for bu */
|
632 |
|
|
{ "b", 0x6a000000, 0xffe00000, "P" }, /* synonym for bu */
|
633 |
|
|
{ "bBd", 0x68200000, 0xffe00000, "Q" },
|
634 |
|
|
{ "bBd", 0x6a200000, 0xffe00000, "P" },
|
635 |
|
|
{ "bd", 0x68200000, 0xffe00000, "Q" }, /* synonym for bud */
|
636 |
|
|
{ "bd", 0x6a200000, 0xffe00000, "P" }, /* synonym for bud */
|
637 |
|
|
{ "br", 0x60000000, 0xff000000, "B" },
|
638 |
|
|
{ "brd", 0x61000000, 0xff000000, "B" },
|
639 |
|
|
{ "call", 0x62000000, 0xff000000, "B" },
|
640 |
|
|
{ "callB", 0x70000000, 0xffe00000, "Q" },
|
641 |
|
|
{ "callB", 0x72000000, 0xffe00000, "P" },
|
642 |
|
|
{ "cmpf", 0x04000000, 0xffe00000, G_r_r },
|
643 |
|
|
{ "cmpf", 0x04200000, 0xffe00000, G_T_r },
|
644 |
|
|
{ "cmpf", 0x04400000, 0xffe00000, G_Q_r },
|
645 |
|
|
{ "cmpf", 0x04600000, 0xffe00000, G_F_r },
|
646 |
|
|
{ "cmpf", 0x23000000, 0xffe00000, T_rr_ },
|
647 |
|
|
{ "cmpf", 0x23200000, 0xffe00000, T_rS_ },
|
648 |
|
|
{ "cmpf", 0x23400000, 0xffe00000, T_Sr_ },
|
649 |
|
|
{ "cmpf", 0x23600000, 0xffe00000, T_SS_ },
|
650 |
|
|
{ "cmpf", 0x33200000, 0xffe00000, T_Rr_ }, /* C4x */
|
651 |
|
|
{ "cmpf", 0x33600000, 0xffe00000, T_RR_ }, /* C4x */
|
652 |
|
|
{ "cmpf3", 0x23000000, 0xffe00000, T_rr_ },
|
653 |
|
|
{ "cmpf3", 0x23200000, 0xffe00000, T_rS_ },
|
654 |
|
|
{ "cmpf3", 0x23400000, 0xffe00000, T_Sr_ },
|
655 |
|
|
{ "cmpf3", 0x23600000, 0xffe00000, T_SS_ },
|
656 |
|
|
{ "cmpf3", 0x33200000, 0xffe00000, T_Rr_ }, /* C4x */
|
657 |
|
|
{ "cmpf3", 0x33600000, 0xffe00000, T_RR_ }, /* C4x */
|
658 |
|
|
{ "cmpi", 0x04800000, 0xffe00000, G_r_r },
|
659 |
|
|
{ "cmpi", 0x04a00000, 0xffe00000, G_T_r },
|
660 |
|
|
{ "cmpi", 0x04c00000, 0xffe00000, G_Q_r },
|
661 |
|
|
{ "cmpi", 0x04e00000, 0xffe00000, G_I_r },
|
662 |
|
|
{ "cmpi", 0x23800000, 0xffe00000, T_rr_ },
|
663 |
|
|
{ "cmpi", 0x23a00000, 0xffe00000, T_rS_ },
|
664 |
|
|
{ "cmpi", 0x23c00000, 0xffe00000, T_Sr_ },
|
665 |
|
|
{ "cmpi", 0x23e00000, 0xffe00000, T_SS_ },
|
666 |
|
|
{ "cmpi", 0x33800000, 0xffe00000, T_Jr_ }, /* C4x */
|
667 |
|
|
{ "cmpi", 0x33a00000, 0xffe00000, T_Rr_ }, /* C4x */
|
668 |
|
|
{ "cmpi", 0x33c00000, 0xffe00000, T_JR_ }, /* C4x */
|
669 |
|
|
{ "cmpi", 0x33e00000, 0xffe00000, T_RR_ }, /* C4x */
|
670 |
|
|
{ "cmpi3", 0x23800000, 0xffe00000, T_rr_ },
|
671 |
|
|
{ "cmpi3", 0x23a00000, 0xffe00000, T_rS_ },
|
672 |
|
|
{ "cmpi3", 0x23c00000, 0xffe00000, T_Sr_ },
|
673 |
|
|
{ "cmpi3", 0x23e00000, 0xffe00000, T_SS_ },
|
674 |
|
|
{ "cmpi3", 0x33800000, 0xffe00000, T_Jr_ }, /* C4x */
|
675 |
|
|
{ "cmpi3", 0x33a00000, 0xffe00000, T_Rr_ }, /* C4x */
|
676 |
|
|
{ "cmpi3", 0x33c00000, 0xffe00000, T_JR_ }, /* C4x */
|
677 |
|
|
{ "cmpi3", 0x33e00000, 0xffe00000, T_RR_ }, /* C4x */
|
678 |
|
|
{ "dbB", 0x6c000000, 0xfe200000, "A,Q" },
|
679 |
|
|
{ "dbB", 0x6e000000, 0xfe200000, "A,P" },
|
680 |
|
|
{ "db", 0x6c000000, 0xfe200000, "A,Q" }, /* synonym for dbu */
|
681 |
|
|
{ "db", 0x6e000000, 0xfe200000, "A,P" }, /* synonym for dbu */
|
682 |
|
|
{ "dbBd", 0x6c200000, 0xfe200000, "A,Q" },
|
683 |
|
|
{ "dbBd", 0x6e200000, 0xfe200000, "A,P" },
|
684 |
|
|
{ "dbd", 0x6c200000, 0xfe200000, "A,Q" }, /* synonym for dbud */
|
685 |
|
|
{ "dbd", 0x6e200000, 0xfe200000, "A,P" }, /* synonym for dbud */
|
686 |
|
|
{ "fix", 0x05000000, 0xffe00000, G_r_r },
|
687 |
|
|
{ "fix", 0x05200000, 0xffe00000, G_T_r },
|
688 |
|
|
{ "fix", 0x05400000, 0xffe00000, G_Q_r },
|
689 |
|
|
{ "fix", 0x05600000, 0xffe00000, G_F_r },
|
690 |
|
|
{ "float", 0x05800000, 0xffe00000, G_r_r },
|
691 |
|
|
{ "float", 0x05a00000, 0xffe00000, G_T_r },
|
692 |
|
|
{ "float", 0x05c00000, 0xffe00000, G_Q_r },
|
693 |
|
|
{ "float", 0x05e00000, 0xffe00000, G_I_r },
|
694 |
|
|
{ "iack", 0x1b200000, 0xffe00000, "@" },
|
695 |
|
|
{ "iack", 0x1b400000, 0xffe00000, "*" },
|
696 |
|
|
{ "idle", 0x06000000, 0xffffffff, "" },
|
697 |
|
|
{ "lde", 0x06800000, 0xffe00000, G_r_r },
|
698 |
|
|
{ "lde", 0x06a00000, 0xffe00000, G_T_r },
|
699 |
|
|
{ "lde", 0x06c00000, 0xffe00000, G_Q_r },
|
700 |
|
|
{ "lde", 0x06e00000, 0xffe00000, G_F_r },
|
701 |
|
|
{ "ldf", 0x07000000, 0xffe00000, G_r_r },
|
702 |
|
|
{ "ldf", 0x07200000, 0xffe00000, G_T_r },
|
703 |
|
|
{ "ldf", 0x07400000, 0xffe00000, G_Q_r },
|
704 |
|
|
{ "ldf", 0x07600000, 0xffe00000, G_F_r },
|
705 |
|
|
{ "ldfC", 0x40000000, 0xf0600000, G_r_r },
|
706 |
|
|
{ "ldfC", 0x40200000, 0xf0600000, G_T_r },
|
707 |
|
|
{ "ldfC", 0x40400000, 0xf0600000, G_Q_r },
|
708 |
|
|
{ "ldfC", 0x40600000, 0xf0600000, G_F_r },
|
709 |
|
|
{ "ldfi", 0x07a00000, 0xffe00000, G_T_r },
|
710 |
|
|
{ "ldfi", 0x07c00000, 0xffe00000, G_Q_r },
|
711 |
|
|
{ "ldi", 0x08000000, 0xffe00000, G_r_r },
|
712 |
|
|
{ "ldi", 0x08200000, 0xffe00000, G_T_r },
|
713 |
|
|
{ "ldi", 0x08400000, 0xffe00000, G_Q_r },
|
714 |
|
|
{ "ldi", 0x08600000, 0xffe00000, G_I_r },
|
715 |
|
|
{ "ldiC", 0x50000000, 0xf0600000, G_r_r },
|
716 |
|
|
{ "ldiC", 0x50200000, 0xf0600000, G_T_r },
|
717 |
|
|
{ "ldiC", 0x50400000, 0xf0600000, G_Q_r },
|
718 |
|
|
{ "ldiC", 0x50600000, 0xf0600000, G_I_r },
|
719 |
|
|
{ "ldii", 0x08a00000, 0xffe00000, G_T_r },
|
720 |
|
|
{ "ldii", 0x08c00000, 0xffe00000, G_Q_r },
|
721 |
|
|
{ "ldp", 0x50700000, 0xffff0000, "#" }, /* synonym for ldiu #,dp */
|
722 |
|
|
{ "ldm", 0x09000000, 0xffe00000, G_r_r },
|
723 |
|
|
{ "ldm", 0x09200000, 0xffe00000, G_T_r },
|
724 |
|
|
{ "ldm", 0x09400000, 0xffe00000, G_Q_r },
|
725 |
|
|
{ "ldm", 0x09600000, 0xffe00000, G_F_r },
|
726 |
|
|
{ "lsh", 0x09800000, 0xffe00000, G_r_r },
|
727 |
|
|
{ "lsh", 0x09a00000, 0xffe00000, G_T_r },
|
728 |
|
|
{ "lsh", 0x09c00000, 0xffe00000, G_Q_r },
|
729 |
|
|
{ "lsh", 0x09e00000, 0xffe00000, G_I_r },
|
730 |
|
|
{ "lsh", 0x24000000, 0xffe00000, T_rrr },
|
731 |
|
|
{ "lsh", 0x24200000, 0xffe00000, T_Srr },
|
732 |
|
|
{ "lsh", 0x24400000, 0xffe00000, T_rSr },
|
733 |
|
|
{ "lsh", 0x24600000, 0xffe00000, T_SSr },
|
734 |
|
|
{ "lsh", 0x34000000, 0xffe00000, T_Jrr }, /* C4x */
|
735 |
|
|
{ "lsh", 0x34200000, 0xffe00000, T_Rrr }, /* C4x */
|
736 |
|
|
{ "lsh", 0x34400000, 0xffe00000, T_JRr }, /* C4x */
|
737 |
|
|
{ "lsh", 0x34600000, 0xffe00000, T_RRr }, /* C4x */
|
738 |
|
|
{ "lsh3", 0x24000000, 0xffe00000, T_rrr },
|
739 |
|
|
{ "lsh3", 0x24200000, 0xffe00000, T_Srr },
|
740 |
|
|
{ "lsh3", 0x24400000, 0xffe00000, T_rSr },
|
741 |
|
|
{ "lsh3", 0x24600000, 0xffe00000, T_SSr },
|
742 |
|
|
{ "lsh3", 0x34000000, 0xffe00000, T_Jrr }, /* C4x */
|
743 |
|
|
{ "lsh3", 0x34200000, 0xffe00000, T_Rrr }, /* C4x */
|
744 |
|
|
{ "lsh3", 0x34400000, 0xffe00000, T_JRr }, /* C4x */
|
745 |
|
|
{ "lsh3", 0x34600000, 0xffe00000, T_RRr }, /* C4x */
|
746 |
|
|
{ "mpyf", 0x0a000000, 0xffe00000, G_r_r },
|
747 |
|
|
{ "mpyf", 0x0a200000, 0xffe00000, G_T_r },
|
748 |
|
|
{ "mpyf", 0x0a400000, 0xffe00000, G_Q_r },
|
749 |
|
|
{ "mpyf", 0x0a600000, 0xffe00000, G_F_r },
|
750 |
|
|
{ "mpyf", 0x24800000, 0xffe00000, T_rrr },
|
751 |
|
|
{ "mpyf", 0x24a00000, 0xffe00000, T_Srr },
|
752 |
|
|
{ "mpyf", 0x24c00000, 0xffe00000, T_rSr },
|
753 |
|
|
{ "mpyf", 0x24e00000, 0xffe00000, T_SSr },
|
754 |
|
|
{ "mpyf", 0x34800000, 0xffe00000, T_Jrr }, /* C4x */
|
755 |
|
|
{ "mpyf", 0x34800000, 0xffe00000, T_rJr }, /* C4x */
|
756 |
|
|
{ "mpyf", 0x34a00000, 0xffe00000, T_rRr }, /* C4x */
|
757 |
|
|
{ "mpyf", 0x34a00000, 0xffe00000, T_Rrr }, /* C4x */
|
758 |
|
|
{ "mpyf", 0x34c00000, 0xffe00000, T_JRr }, /* C4x */
|
759 |
|
|
{ "mpyf", 0x34c00000, 0xffe00000, T_RJr }, /* C4x */
|
760 |
|
|
{ "mpyf", 0x34e00000, 0xffe00000, T_RRr }, /* C4x */
|
761 |
|
|
{ "mpyf3", 0x24800000, 0xffe00000, T_rrr },
|
762 |
|
|
{ "mpyf3", 0x24a00000, 0xffe00000, T_Srr },
|
763 |
|
|
{ "mpyf3", 0x24c00000, 0xffe00000, T_rSr },
|
764 |
|
|
{ "mpyf3", 0x24e00000, 0xffe00000, T_SSr },
|
765 |
|
|
{ "mpyf3", 0x34800000, 0xffe00000, T_Jrr }, /* C4x */
|
766 |
|
|
{ "mpyf3", 0x34800000, 0xffe00000, T_rJr }, /* C4x */
|
767 |
|
|
{ "mpyf3", 0x34a00000, 0xffe00000, T_rRr }, /* C4x */
|
768 |
|
|
{ "mpyf3", 0x34a00000, 0xffe00000, T_Rrr }, /* C4x */
|
769 |
|
|
{ "mpyf3", 0x34c00000, 0xffe00000, T_JRr }, /* C4x */
|
770 |
|
|
{ "mpyf3", 0x34c00000, 0xffe00000, T_RJr }, /* C4x */
|
771 |
|
|
{ "mpyf3", 0x34e00000, 0xffe00000, T_RRr }, /* C4x */
|
772 |
|
|
{ "mpyi", 0x0a800000, 0xffe00000, G_r_r },
|
773 |
|
|
{ "mpyi", 0x0aa00000, 0xffe00000, G_T_r },
|
774 |
|
|
{ "mpyi", 0x0ac00000, 0xffe00000, G_Q_r },
|
775 |
|
|
{ "mpyi", 0x0ae00000, 0xffe00000, G_I_r },
|
776 |
|
|
{ "mpyi", 0x25000000, 0xffe00000, T_rrr },
|
777 |
|
|
{ "mpyi", 0x25200000, 0xffe00000, T_Srr },
|
778 |
|
|
{ "mpyi", 0x25400000, 0xffe00000, T_rSr },
|
779 |
|
|
{ "mpyi", 0x25600000, 0xffe00000, T_SSr },
|
780 |
|
|
{ "mpyi", 0x35000000, 0xffe00000, T_Jrr }, /* C4x */
|
781 |
|
|
{ "mpyi", 0x35000000, 0xffe00000, T_rJr }, /* C4x */
|
782 |
|
|
{ "mpyi", 0x35200000, 0xffe00000, T_rRr }, /* C4x */
|
783 |
|
|
{ "mpyi", 0x35200000, 0xffe00000, T_Rrr }, /* C4x */
|
784 |
|
|
{ "mpyi", 0x35400000, 0xffe00000, T_JRr }, /* C4x */
|
785 |
|
|
{ "mpyi", 0x35400000, 0xffe00000, T_RJr }, /* C4x */
|
786 |
|
|
{ "mpyi", 0x35600000, 0xffe00000, T_RRr }, /* C4x */
|
787 |
|
|
{ "mpyi3", 0x25000000, 0xffe00000, T_rrr },
|
788 |
|
|
{ "mpyi3", 0x25200000, 0xffe00000, T_Srr },
|
789 |
|
|
{ "mpyi3", 0x25400000, 0xffe00000, T_rSr },
|
790 |
|
|
{ "mpyi3", 0x25600000, 0xffe00000, T_SSr },
|
791 |
|
|
{ "mpyi3", 0x35000000, 0xffe00000, T_Jrr }, /* C4x */
|
792 |
|
|
{ "mpyi3", 0x35000000, 0xffe00000, T_rJr }, /* C4x */
|
793 |
|
|
{ "mpyi3", 0x35200000, 0xffe00000, T_rRr }, /* C4x */
|
794 |
|
|
{ "mpyi3", 0x35200000, 0xffe00000, T_Rrr }, /* C4x */
|
795 |
|
|
{ "mpyi3", 0x35400000, 0xffe00000, T_JRr }, /* C4x */
|
796 |
|
|
{ "mpyi3", 0x35400000, 0xffe00000, T_RJr }, /* C4x */
|
797 |
|
|
{ "mpyi3", 0x35600000, 0xffe00000, T_RRr }, /* C4x */
|
798 |
|
|
{ "negb", 0x0b000000, 0xffe00000, G_r_r },
|
799 |
|
|
{ "negb", 0x0b200000, 0xffe00000, G_T_r },
|
800 |
|
|
{ "negb", 0x0b400000, 0xffe00000, G_Q_r },
|
801 |
|
|
{ "negb", 0x0b600000, 0xffe00000, G_I_r },
|
802 |
|
|
{ "negf", 0x0b800000, 0xffe00000, G_r_r },
|
803 |
|
|
{ "negf", 0x0ba00000, 0xffe00000, G_T_r },
|
804 |
|
|
{ "negf", 0x0bc00000, 0xffe00000, G_Q_r },
|
805 |
|
|
{ "negf", 0x0be00000, 0xffe00000, G_F_r },
|
806 |
|
|
{ "negi", 0x0c000000, 0xffe00000, G_r_r },
|
807 |
|
|
{ "negi", 0x0c200000, 0xffe00000, G_T_r },
|
808 |
|
|
{ "negi", 0x0c400000, 0xffe00000, G_Q_r },
|
809 |
|
|
{ "negi", 0x0c600000, 0xffe00000, G_I_r },
|
810 |
|
|
{ "nop", 0x0c800000, 0xffe00000, "Q" },
|
811 |
|
|
{ "nop", 0x0cc00000, 0xffe00000, "*" },
|
812 |
|
|
{ "nop", 0x0c800000, 0xffe00000, "" },
|
813 |
|
|
{ "norm", 0x0d000000, 0xffe00000, G_r_r },
|
814 |
|
|
{ "norm", 0x0d200000, 0xffe00000, G_T_r },
|
815 |
|
|
{ "norm", 0x0d400000, 0xffe00000, G_Q_r },
|
816 |
|
|
{ "norm", 0x0d600000, 0xffe00000, G_F_r },
|
817 |
|
|
{ "not", 0x0d800000, 0xffe00000, G_r_r },
|
818 |
|
|
{ "not", 0x0da00000, 0xffe00000, G_T_r },
|
819 |
|
|
{ "not", 0x0dc00000, 0xffe00000, G_Q_r },
|
820 |
|
|
{ "not", 0x0de00000, 0xffe00000, G_L_r },
|
821 |
|
|
{ "or", 0x10000000, 0xffe00000, G_r_r },
|
822 |
|
|
{ "or", 0x10200000, 0xffe00000, G_T_r },
|
823 |
|
|
{ "or", 0x10400000, 0xffe00000, G_Q_r },
|
824 |
|
|
{ "or", 0x10600000, 0xffe00000, G_L_r },
|
825 |
|
|
{ "or", 0x25800000, 0xffe00000, T_rrr },
|
826 |
|
|
{ "or", 0x25a00000, 0xffe00000, T_Srr },
|
827 |
|
|
{ "or", 0x25c00000, 0xffe00000, T_rSr },
|
828 |
|
|
{ "or", 0x25e00000, 0xffe00000, T_SSr },
|
829 |
|
|
{ "or", 0x35800000, 0xffe00000, T_Jrr }, /* C4x */
|
830 |
|
|
{ "or", 0x35800000, 0xffe00000, T_rJr }, /* C4x */
|
831 |
|
|
{ "or", 0x35a00000, 0xffe00000, T_rRr }, /* C4x */
|
832 |
|
|
{ "or", 0x35a00000, 0xffe00000, T_Rrr }, /* C4x */
|
833 |
|
|
{ "or", 0x35c00000, 0xffe00000, T_JRr }, /* C4x */
|
834 |
|
|
{ "or", 0x35c00000, 0xffe00000, T_RJr }, /* C4x */
|
835 |
|
|
{ "or", 0x35e00000, 0xffe00000, T_RRr }, /* C4x */
|
836 |
|
|
{ "or3", 0x25800000, 0xffe00000, T_rrr },
|
837 |
|
|
{ "or3", 0x25a00000, 0xffe00000, T_Srr },
|
838 |
|
|
{ "or3", 0x25c00000, 0xffe00000, T_rSr },
|
839 |
|
|
{ "or3", 0x25e00000, 0xffe00000, T_SSr },
|
840 |
|
|
{ "or3", 0x35800000, 0xffe00000, T_Jrr }, /* C4x */
|
841 |
|
|
{ "or3", 0x35800000, 0xffe00000, T_rJr }, /* C4x */
|
842 |
|
|
{ "or3", 0x35a00000, 0xffe00000, T_rRr }, /* C4x */
|
843 |
|
|
{ "or3", 0x35a00000, 0xffe00000, T_Rrr }, /* C4x */
|
844 |
|
|
{ "or3", 0x35c00000, 0xffe00000, T_JRr }, /* C4x */
|
845 |
|
|
{ "or3", 0x35c00000, 0xffe00000, T_RJr }, /* C4x */
|
846 |
|
|
{ "or3", 0x35e00000, 0xffe00000, T_RRr }, /* C4x */
|
847 |
|
|
{ "pop", 0x0e200000, 0xffe00000, "R" },
|
848 |
|
|
{ "popf", 0x0ea00000, 0xffe00000, "R" },
|
849 |
|
|
{ "push", 0x0f200000, 0xffe00000, "R" },
|
850 |
|
|
{ "pushf", 0x0fa00000, 0xffe00000, "R" },
|
851 |
|
|
{ "retiB", 0x78000000, 0xffe00000, "" },
|
852 |
|
|
{ "reti", 0x78000000, 0xffe00000, "" }, /* synonym for reti */
|
853 |
|
|
{ "retsB", 0x78800000, 0xffe00000, "" },
|
854 |
|
|
{ "rets", 0x78800000, 0xffe00000, "" }, /* synonym for rets */
|
855 |
|
|
{ "rnd", 0x11000000, 0xffe00000, G_r_r },
|
856 |
|
|
{ "rnd", 0x11200000, 0xffe00000, G_T_r },
|
857 |
|
|
{ "rnd", 0x11400000, 0xffe00000, G_Q_r },
|
858 |
|
|
{ "rnd", 0x11600000, 0xffe00000, G_F_r },
|
859 |
|
|
{ "rol", 0x11e00000, 0xffe00000, "R" },
|
860 |
|
|
{ "rolc", 0x12600000, 0xffe00000, "R" },
|
861 |
|
|
{ "ror", 0x12e00000, 0xffe00000, "R" },
|
862 |
|
|
{ "rorc", 0x13600000, 0xffe00000, "R" },
|
863 |
|
|
{ "rptb", 0x64000000, 0xff000000, "B" },
|
864 |
|
|
{ "rptb", 0x79000000, 0xff000000, "Q" }, /* C4x */
|
865 |
|
|
{ "rpts", 0x139b0000, 0xffff0000, "Q" },
|
866 |
|
|
{ "rpts", 0x13bb0000, 0xffff0000, "@" },
|
867 |
|
|
{ "rpts", 0x13db0000, 0xffff0000, "*" },
|
868 |
|
|
{ "rpts", 0x13fb0000, 0xffff0000, "U" },
|
869 |
|
|
{ "sigi", 0x16000000, 0xffe00000, "" }, /* C3x */
|
870 |
|
|
{ "sigi", 0x16200000, 0xffe00000, G_T_r }, /* C4x */
|
871 |
|
|
{ "sigi", 0x16400000, 0xffe00000, G_Q_r }, /* C4x */
|
872 |
|
|
{ "stf", 0x14200000, 0xffe00000, "R,@" },
|
873 |
|
|
{ "stf", 0x14400000, 0xffe00000, "R,*" },
|
874 |
|
|
{ "stfi", 0x14a00000, 0xffe00000, "R,@" },
|
875 |
|
|
{ "stfi", 0x14c00000, 0xffe00000, "R,*" },
|
876 |
|
|
{ "sti", 0x15000000, 0xffe00000, "T,@" }, /* C4x only */
|
877 |
|
|
{ "sti", 0x15200000, 0xffe00000, "R,@" },
|
878 |
|
|
{ "sti", 0x15400000, 0xffe00000, "R,*" },
|
879 |
|
|
{ "sti", 0x15600000, 0xffe00000, "T,*" }, /* C4x only */
|
880 |
|
|
{ "stii", 0x15a00000, 0xffe00000, "R,@" },
|
881 |
|
|
{ "stii", 0x15c00000, 0xffe00000, "R,*" },
|
882 |
|
|
{ "subb", 0x16800000, 0xffe00000, G_r_r },
|
883 |
|
|
{ "subb", 0x16a00000, 0xffe00000, G_T_r },
|
884 |
|
|
{ "subb", 0x16c00000, 0xffe00000, G_Q_r },
|
885 |
|
|
{ "subb", 0x16e00000, 0xffe00000, G_I_r },
|
886 |
|
|
{ "subb", 0x26000000, 0xffe00000, T_rrr },
|
887 |
|
|
{ "subb", 0x26200000, 0xffe00000, T_Srr },
|
888 |
|
|
{ "subb", 0x26400000, 0xffe00000, T_rSr },
|
889 |
|
|
{ "subb", 0x26600000, 0xffe00000, T_SSr },
|
890 |
|
|
{ "subb", 0x36000000, 0xffe00000, T_Jrr }, /* C4x */
|
891 |
|
|
{ "subb", 0x36200000, 0xffe00000, T_Rrr }, /* C4x */
|
892 |
|
|
{ "subb", 0x36400000, 0xffe00000, T_JRr }, /* C4x */
|
893 |
|
|
{ "subb", 0x36600000, 0xffe00000, T_RRr }, /* C4x */
|
894 |
|
|
{ "subb3", 0x26000000, 0xffe00000, T_rrr },
|
895 |
|
|
{ "subb3", 0x26200000, 0xffe00000, T_Srr },
|
896 |
|
|
{ "subb3", 0x26400000, 0xffe00000, T_rSr },
|
897 |
|
|
{ "subb3", 0x26600000, 0xffe00000, T_SSr },
|
898 |
|
|
{ "subb3", 0x36000000, 0xffe00000, T_Jrr }, /* C4x */
|
899 |
|
|
{ "subb3", 0x36200000, 0xffe00000, T_Rrr }, /* C4x */
|
900 |
|
|
{ "subb3", 0x36400000, 0xffe00000, T_JRr }, /* C4x */
|
901 |
|
|
{ "subb3", 0x36600000, 0xffe00000, T_RRr }, /* C4x */
|
902 |
|
|
{ "subc", 0x17000000, 0xffe00000, G_r_r },
|
903 |
|
|
{ "subc", 0x17200000, 0xffe00000, G_T_r },
|
904 |
|
|
{ "subc", 0x17400000, 0xffe00000, G_Q_r },
|
905 |
|
|
{ "subc", 0x17600000, 0xffe00000, G_I_r },
|
906 |
|
|
{ "subf", 0x17800000, 0xffe00000, G_r_r },
|
907 |
|
|
{ "subf", 0x17a00000, 0xffe00000, G_T_r },
|
908 |
|
|
{ "subf", 0x17c00000, 0xffe00000, G_Q_r },
|
909 |
|
|
{ "subf", 0x17e00000, 0xffe00000, G_F_r },
|
910 |
|
|
{ "subf", 0x26800000, 0xffe00000, T_rrr },
|
911 |
|
|
{ "subf", 0x26a00000, 0xffe00000, T_Srr },
|
912 |
|
|
{ "subf", 0x26c00000, 0xffe00000, T_rSr },
|
913 |
|
|
{ "subf", 0x26e00000, 0xffe00000, T_SSr },
|
914 |
|
|
{ "subf", 0x36800000, 0xffe00000, T_Jrr }, /* C4x */
|
915 |
|
|
{ "subf", 0x36a00000, 0xffe00000, T_Rrr }, /* C4x */
|
916 |
|
|
{ "subf", 0x36c00000, 0xffe00000, T_JRr }, /* C4x */
|
917 |
|
|
{ "subf", 0x36e00000, 0xffe00000, T_RRr }, /* C4x */
|
918 |
|
|
{ "subf3", 0x26800000, 0xffe00000, T_rrr },
|
919 |
|
|
{ "subf3", 0x26a00000, 0xffe00000, T_Srr },
|
920 |
|
|
{ "subf3", 0x26c00000, 0xffe00000, T_rSr },
|
921 |
|
|
{ "subf3", 0x26e00000, 0xffe00000, T_SSr },
|
922 |
|
|
{ "subf3", 0x36800000, 0xffe00000, T_Jrr }, /* C4x */
|
923 |
|
|
{ "subf3", 0x36a00000, 0xffe00000, T_Rrr }, /* C4x */
|
924 |
|
|
{ "subf3", 0x36c00000, 0xffe00000, T_JRr }, /* C4x */
|
925 |
|
|
{ "subf3", 0x36e00000, 0xffe00000, T_RRr }, /* C4x */
|
926 |
|
|
{ "subi", 0x18000000, 0xffe00000, G_r_r },
|
927 |
|
|
{ "subi", 0x18200000, 0xffe00000, G_T_r },
|
928 |
|
|
{ "subi", 0x18400000, 0xffe00000, G_Q_r },
|
929 |
|
|
{ "subi", 0x18600000, 0xffe00000, G_I_r },
|
930 |
|
|
{ "subi", 0x27000000, 0xffe00000, T_rrr },
|
931 |
|
|
{ "subi", 0x27200000, 0xffe00000, T_Srr },
|
932 |
|
|
{ "subi", 0x27400000, 0xffe00000, T_rSr },
|
933 |
|
|
{ "subi", 0x27600000, 0xffe00000, T_SSr },
|
934 |
|
|
{ "subi", 0x37000000, 0xffe00000, T_Jrr }, /* C4x */
|
935 |
|
|
{ "subi", 0x37200000, 0xffe00000, T_Rrr }, /* C4x */
|
936 |
|
|
{ "subi", 0x37400000, 0xffe00000, T_JRr }, /* C4x */
|
937 |
|
|
{ "subi", 0x37600000, 0xffe00000, T_RRr }, /* C4x */
|
938 |
|
|
{ "subi3", 0x27000000, 0xffe00000, T_rrr },
|
939 |
|
|
{ "subi3", 0x27200000, 0xffe00000, T_Srr },
|
940 |
|
|
{ "subi3", 0x27400000, 0xffe00000, T_rSr },
|
941 |
|
|
{ "subi3", 0x27600000, 0xffe00000, T_SSr },
|
942 |
|
|
{ "subi3", 0x37000000, 0xffe00000, T_Jrr }, /* C4x */
|
943 |
|
|
{ "subi3", 0x37200000, 0xffe00000, T_Rrr }, /* C4x */
|
944 |
|
|
{ "subi3", 0x37400000, 0xffe00000, T_JRr }, /* C4x */
|
945 |
|
|
{ "subi3", 0x37600000, 0xffe00000, T_RRr }, /* C4x */
|
946 |
|
|
{ "subrb", 0x18800000, 0xffe00000, G_r_r },
|
947 |
|
|
{ "subrb", 0x18a00000, 0xffe00000, G_T_r },
|
948 |
|
|
{ "subrb", 0x18c00000, 0xffe00000, G_Q_r },
|
949 |
|
|
{ "subrb", 0x18e00000, 0xffe00000, G_I_r },
|
950 |
|
|
{ "subrf", 0x19000000, 0xffe00000, G_r_r },
|
951 |
|
|
{ "subrf", 0x19200000, 0xffe00000, G_T_r },
|
952 |
|
|
{ "subrf", 0x19400000, 0xffe00000, G_Q_r },
|
953 |
|
|
{ "subrf", 0x19600000, 0xffe00000, G_F_r },
|
954 |
|
|
{ "subri", 0x19800000, 0xffe00000, G_r_r },
|
955 |
|
|
{ "subri", 0x19a00000, 0xffe00000, G_T_r },
|
956 |
|
|
{ "subri", 0x19c00000, 0xffe00000, G_Q_r },
|
957 |
|
|
{ "subri", 0x19e00000, 0xffe00000, G_I_r },
|
958 |
|
|
{ "swi", 0x66000000, 0xffffffff, "" },
|
959 |
|
|
{ "trapB", 0x74000000, 0xffe00000, "V" },
|
960 |
|
|
{ "trap", 0x74000000, 0xffe00000, "V" }, /* synonym for trapu */
|
961 |
|
|
{ "tstb", 0x1a000000, 0xffe00000, G_r_r },
|
962 |
|
|
{ "tstb", 0x1a200000, 0xffe00000, G_T_r },
|
963 |
|
|
{ "tstb", 0x1a400000, 0xffe00000, G_Q_r },
|
964 |
|
|
{ "tstb", 0x1a600000, 0xffe00000, G_L_r },
|
965 |
|
|
{ "tstb", 0x27800000, 0xffe00000, T_rr_ },
|
966 |
|
|
{ "tstb", 0x27a00000, 0xffe00000, T_rS_ },
|
967 |
|
|
{ "tstb", 0x27c00000, 0xffe00000, T_Sr_ },
|
968 |
|
|
{ "tstb", 0x27e00000, 0xffe00000, T_SS_ },
|
969 |
|
|
{ "tstb", 0x37800000, 0xffe00000, T_Jr_ }, /* C4x */
|
970 |
|
|
{ "tstb", 0x37800000, 0xffe00000, T_rJ_ }, /* C4x */
|
971 |
|
|
{ "tstb", 0x37a00000, 0xffe00000, T_rR_ }, /* C4x */
|
972 |
|
|
{ "tstb", 0x37a00000, 0xffe00000, T_Rr_ }, /* C4x */
|
973 |
|
|
{ "tstb", 0x37c00000, 0xffe00000, T_JR_ }, /* C4x */
|
974 |
|
|
{ "tstb", 0x37c00000, 0xffe00000, T_RJ_ }, /* C4x */
|
975 |
|
|
{ "tstb", 0x37e00000, 0xffe00000, T_RR_ }, /* C4x */
|
976 |
|
|
{ "tstb3", 0x27800000, 0xffe00000, T_rr_ },
|
977 |
|
|
{ "tstb3", 0x27a00000, 0xffe00000, T_rS_ },
|
978 |
|
|
{ "tstb3", 0x27c00000, 0xffe00000, T_Sr_ },
|
979 |
|
|
{ "tstb3", 0x27e00000, 0xffe00000, T_SS_ },
|
980 |
|
|
{ "tstb3", 0x37800000, 0xffe00000, T_Jr_ }, /* C4x */
|
981 |
|
|
{ "tstb3", 0x37800000, 0xffe00000, T_rJ_ }, /* C4x */
|
982 |
|
|
{ "tstb3", 0x37a00000, 0xffe00000, T_rR_ }, /* C4x */
|
983 |
|
|
{ "tstb3", 0x37a00000, 0xffe00000, T_Rr_ }, /* C4x */
|
984 |
|
|
{ "tstb3", 0x37c00000, 0xffe00000, T_JR_ }, /* C4x */
|
985 |
|
|
{ "tstb3", 0x37c00000, 0xffe00000, T_RJ_ }, /* C4x */
|
986 |
|
|
{ "tstb3", 0x37e00000, 0xffe00000, T_RR_ }, /* C4x */
|
987 |
|
|
{ "xor", 0x1a800000, 0xffe00000, G_r_r },
|
988 |
|
|
{ "xor", 0x1aa00000, 0xffe00000, G_T_r },
|
989 |
|
|
{ "xor", 0x1ac00000, 0xffe00000, G_Q_r },
|
990 |
|
|
{ "xor", 0x1ae00000, 0xffe00000, G_L_r },
|
991 |
|
|
{ "xor", 0x28000000, 0xffe00000, T_rrr },
|
992 |
|
|
{ "xor", 0x28200000, 0xffe00000, T_Srr },
|
993 |
|
|
{ "xor", 0x28400000, 0xffe00000, T_rSr },
|
994 |
|
|
{ "xor", 0x28600000, 0xffe00000, T_SSr },
|
995 |
|
|
{ "xor", 0x38000000, 0xffe00000, T_Jrr }, /* C4x */
|
996 |
|
|
{ "xor", 0x38000000, 0xffe00000, T_rJr }, /* C4x */
|
997 |
|
|
{ "xor", 0x38200000, 0xffe00000, T_rRr }, /* C4x */
|
998 |
|
|
{ "xor", 0x38200000, 0xffe00000, T_Rrr }, /* C4x */
|
999 |
|
|
{ "xor", 0x3c400000, 0xffe00000, T_JRr }, /* C4x */
|
1000 |
|
|
{ "xor", 0x3c400000, 0xffe00000, T_RJr }, /* C4x */
|
1001 |
|
|
{ "xor", 0x3c600000, 0xffe00000, T_RRr }, /* C4x */
|
1002 |
|
|
{ "xor3", 0x28000000, 0xffe00000, T_rrr },
|
1003 |
|
|
{ "xor3", 0x28200000, 0xffe00000, T_Srr },
|
1004 |
|
|
{ "xor3", 0x28400000, 0xffe00000, T_rSr },
|
1005 |
|
|
{ "xor3", 0x28600000, 0xffe00000, T_SSr },
|
1006 |
|
|
{ "xor3", 0x38000000, 0xffe00000, T_Jrr }, /* C4x */
|
1007 |
|
|
{ "xor3", 0x38000000, 0xffe00000, T_rJr }, /* C4x */
|
1008 |
|
|
{ "xor3", 0x38200000, 0xffe00000, T_rRr }, /* C4x */
|
1009 |
|
|
{ "xor3", 0x38200000, 0xffe00000, T_Rrr }, /* C4x */
|
1010 |
|
|
{ "xor3", 0x3c400000, 0xffe00000, T_JRr }, /* C4x */
|
1011 |
|
|
{ "xor3", 0x3c400000, 0xffe00000, T_RJr }, /* C4x */
|
1012 |
|
|
{ "xor3", 0x3c600000, 0xffe00000, T_RRr }, /* C4x */
|
1013 |
|
|
|
1014 |
|
|
/* Dummy entry, not included in c3x_num_insts. This
|
1015 |
|
|
lets code examine entry i + 1 without checking
|
1016 |
|
|
if we've run off the end of the table. */
|
1017 |
|
|
{ "", 0x0, 0x00, "" }
|
1018 |
|
|
};
|
1019 |
|
|
|
1020 |
|
|
const unsigned int c3x_num_insts = (((sizeof c3x_insts) / (sizeof c3x_insts[0])) - 1);
|
1021 |
|
|
|
1022 |
|
|
/* Define c4x additional opcodes for assembler and disassembler. */
|
1023 |
|
|
static const c4x_inst_t c4x_insts[] =
|
1024 |
|
|
{
|
1025 |
|
|
/* Parallel instructions. */
|
1026 |
|
|
{ "frieee_stf", 0xf2000000, 0xfe000000, P_Sr_rS },
|
1027 |
|
|
{ "toieee_stf", 0xf0000000, 0xfe000000, P_Sr_rS },
|
1028 |
|
|
|
1029 |
|
|
{ "bBaf", 0x68a00000, 0xffe00000, "Q" },
|
1030 |
|
|
{ "bBaf", 0x6aa00000, 0xffe00000, "P" },
|
1031 |
|
|
{ "baf", 0x68a00000, 0xffe00000, "Q" }, /* synonym for buaf */
|
1032 |
|
|
{ "baf", 0x6aa00000, 0xffe00000, "P" }, /* synonym for buaf */
|
1033 |
|
|
{ "bBat", 0x68600000, 0xffe00000, "Q" },
|
1034 |
|
|
{ "bBat", 0x6a600000, 0xffe00000, "P" },
|
1035 |
|
|
{ "bat", 0x68600000, 0xffe00000, "Q" }, /* synonym for buat */
|
1036 |
|
|
{ "bat", 0x6a600000, 0xffe00000, "P" }, /* synonym for buat */
|
1037 |
|
|
{ "laj", 0x63000000, 0xff000000, "B" },
|
1038 |
|
|
{ "lajB", 0x70200000, 0xffe00000, "Q" },
|
1039 |
|
|
{ "lajB", 0x72200000, 0xffe00000, "P" },
|
1040 |
|
|
{ "latB", 0x74800000, 0xffe00000, "V" },
|
1041 |
|
|
|
1042 |
|
|
{ "frieee", 0x1c000000, 0xffe00000, G_r_r },
|
1043 |
|
|
{ "frieee", 0x1c200000, 0xffe00000, G_T_r },
|
1044 |
|
|
{ "frieee", 0x1c400000, 0xffe00000, G_Q_r },
|
1045 |
|
|
{ "frieee", 0x1c600000, 0xffe00000, G_F_r },
|
1046 |
|
|
|
1047 |
|
|
{ "lb0", 0xb0000000, 0xffe00000, G_r_r },
|
1048 |
|
|
{ "lb0", 0xb0200000, 0xffe00000, G_T_r },
|
1049 |
|
|
{ "lb0", 0xb0400000, 0xffe00000, G_Q_r },
|
1050 |
|
|
{ "lb0", 0xb0600000, 0xffe00000, G_I_r },
|
1051 |
|
|
{ "lbu0", 0xb2000000, 0xffe00000, G_r_r },
|
1052 |
|
|
{ "lbu0", 0xb2200000, 0xffe00000, G_T_r },
|
1053 |
|
|
{ "lbu0", 0xb2400000, 0xffe00000, G_Q_r },
|
1054 |
|
|
{ "lbu0", 0xb2600000, 0xffe00000, G_L_r },
|
1055 |
|
|
{ "lb1", 0xb0800000, 0xffe00000, G_r_r },
|
1056 |
|
|
{ "lb1", 0xb0a00000, 0xffe00000, G_T_r },
|
1057 |
|
|
{ "lb1", 0xb0c00000, 0xffe00000, G_Q_r },
|
1058 |
|
|
{ "lb1", 0xb0e00000, 0xffe00000, G_I_r },
|
1059 |
|
|
{ "lbu1", 0xb2800000, 0xffe00000, G_r_r },
|
1060 |
|
|
{ "lbu1", 0xb2a00000, 0xffe00000, G_T_r },
|
1061 |
|
|
{ "lbu1", 0xb2c00000, 0xffe00000, G_Q_r },
|
1062 |
|
|
{ "lbu1", 0xb2e00000, 0xffe00000, G_L_r },
|
1063 |
|
|
{ "lb2", 0xb1000000, 0xffe00000, G_r_r },
|
1064 |
|
|
{ "lb2", 0xb1200000, 0xffe00000, G_T_r },
|
1065 |
|
|
{ "lb2", 0xb1400000, 0xffe00000, G_Q_r },
|
1066 |
|
|
{ "lb2", 0xb1600000, 0xffe00000, G_I_r },
|
1067 |
|
|
{ "lbu2", 0xb3000000, 0xffe00000, G_r_r },
|
1068 |
|
|
{ "lbu2", 0xb3200000, 0xffe00000, G_T_r },
|
1069 |
|
|
{ "lbu2", 0xb3400000, 0xffe00000, G_Q_r },
|
1070 |
|
|
{ "lbu2", 0xb3600000, 0xffe00000, G_L_r },
|
1071 |
|
|
{ "lb3", 0xb1800000, 0xffe00000, G_r_r },
|
1072 |
|
|
{ "lb3", 0xb1a00000, 0xffe00000, G_T_r },
|
1073 |
|
|
{ "lb3", 0xb1c00000, 0xffe00000, G_Q_r },
|
1074 |
|
|
{ "lb3", 0xb1e00000, 0xffe00000, G_I_r },
|
1075 |
|
|
{ "lbu3", 0xb3800000, 0xffe00000, G_r_r },
|
1076 |
|
|
{ "lbu3", 0xb3a00000, 0xffe00000, G_T_r },
|
1077 |
|
|
{ "lbu3", 0xb3c00000, 0xffe00000, G_Q_r },
|
1078 |
|
|
{ "lbu3", 0xb3e00000, 0xffe00000, G_L_r },
|
1079 |
|
|
{ "lda", 0x1e800000, 0xffe00000, "Q,Y" },
|
1080 |
|
|
{ "lda", 0x1ea00000, 0xffe00000, "@,Y" },
|
1081 |
|
|
{ "lda", 0x1ec00000, 0xffe00000, "*,Y" },
|
1082 |
|
|
{ "lda", 0x1ee00000, 0xffe00000, "S,Y" },
|
1083 |
|
|
{ "ldep", 0x76000000, 0xffe00000, "X,R" },
|
1084 |
|
|
{ "ldhi", 0x1fe00000, 0xffe00000, G_L_r },
|
1085 |
|
|
{ "ldhi", 0x1fe00000, 0xffe00000, "#,R" },
|
1086 |
|
|
{ "ldpe", 0x76800000, 0xffe00000, "Q,Z" },
|
1087 |
|
|
{ "ldpk", 0x1F700000, 0xffff0000, "#" },
|
1088 |
|
|
{ "lh0", 0xba000000, 0xffe00000, G_r_r },
|
1089 |
|
|
{ "lh0", 0xba200000, 0xffe00000, G_T_r },
|
1090 |
|
|
{ "lh0", 0xba400000, 0xffe00000, G_Q_r },
|
1091 |
|
|
{ "lh0", 0xba600000, 0xffe00000, G_I_r },
|
1092 |
|
|
{ "lhu0", 0xbb000000, 0xffe00000, G_r_r },
|
1093 |
|
|
{ "lhu0", 0xbb200000, 0xffe00000, G_T_r },
|
1094 |
|
|
{ "lhu0", 0xbb400000, 0xffe00000, G_Q_r },
|
1095 |
|
|
{ "lhu0", 0xbb600000, 0xffe00000, G_L_r },
|
1096 |
|
|
{ "lh1", 0xba800000, 0xffe00000, G_r_r },
|
1097 |
|
|
{ "lh1", 0xbaa00000, 0xffe00000, G_T_r },
|
1098 |
|
|
{ "lh1", 0xbac00000, 0xffe00000, G_Q_r },
|
1099 |
|
|
{ "lh1", 0xbae00000, 0xffe00000, G_I_r },
|
1100 |
|
|
{ "lhu1", 0xbb800000, 0xffe00000, G_r_r },
|
1101 |
|
|
{ "lhu1", 0xbba00000, 0xffe00000, G_T_r },
|
1102 |
|
|
{ "lhu1", 0xbbc00000, 0xffe00000, G_Q_r },
|
1103 |
|
|
{ "lhu1", 0xbbe00000, 0xffe00000, G_L_r },
|
1104 |
|
|
{ "lwl0", 0xb4000000, 0xffe00000, G_r_r },
|
1105 |
|
|
{ "lwl0", 0xb4200000, 0xffe00000, G_T_r },
|
1106 |
|
|
{ "lwl0", 0xb4400000, 0xffe00000, G_Q_r },
|
1107 |
|
|
{ "lwl0", 0xb4600000, 0xffe00000, G_I_r },
|
1108 |
|
|
{ "lwl1", 0xb4800000, 0xffe00000, G_r_r },
|
1109 |
|
|
{ "lwl1", 0xb4a00000, 0xffe00000, G_T_r },
|
1110 |
|
|
{ "lwl1", 0xb4c00000, 0xffe00000, G_Q_r },
|
1111 |
|
|
{ "lwl1", 0xb4e00000, 0xffe00000, G_I_r },
|
1112 |
|
|
{ "lwl2", 0xb5000000, 0xffe00000, G_r_r },
|
1113 |
|
|
{ "lwl2", 0xb5200000, 0xffe00000, G_T_r },
|
1114 |
|
|
{ "lwl2", 0xb5400000, 0xffe00000, G_Q_r },
|
1115 |
|
|
{ "lwl2", 0xb5600000, 0xffe00000, G_I_r },
|
1116 |
|
|
{ "lwl3", 0xb5800000, 0xffe00000, G_r_r },
|
1117 |
|
|
{ "lwl3", 0xb5a00000, 0xffe00000, G_T_r },
|
1118 |
|
|
{ "lwl3", 0xb5c00000, 0xffe00000, G_Q_r },
|
1119 |
|
|
{ "lwl3", 0xb5e00000, 0xffe00000, G_I_r },
|
1120 |
|
|
{ "lwr0", 0xb6000000, 0xffe00000, G_r_r },
|
1121 |
|
|
{ "lwr0", 0xb6200000, 0xffe00000, G_T_r },
|
1122 |
|
|
{ "lwr0", 0xb6400000, 0xffe00000, G_Q_r },
|
1123 |
|
|
{ "lwr0", 0xb6600000, 0xffe00000, G_I_r },
|
1124 |
|
|
{ "lwr1", 0xb6800000, 0xffe00000, G_r_r },
|
1125 |
|
|
{ "lwr1", 0xb6a00000, 0xffe00000, G_T_r },
|
1126 |
|
|
{ "lwr1", 0xb6c00000, 0xffe00000, G_Q_r },
|
1127 |
|
|
{ "lwr1", 0xb6e00000, 0xffe00000, G_I_r },
|
1128 |
|
|
{ "lwr2", 0xb7000000, 0xffe00000, G_r_r },
|
1129 |
|
|
{ "lwr2", 0xb7200000, 0xffe00000, G_T_r },
|
1130 |
|
|
{ "lwr2", 0xb7400000, 0xffe00000, G_Q_r },
|
1131 |
|
|
{ "lwr2", 0xb7600000, 0xffe00000, G_I_r },
|
1132 |
|
|
{ "lwr3", 0xb7800000, 0xffe00000, G_r_r },
|
1133 |
|
|
{ "lwr3", 0xb7a00000, 0xffe00000, G_T_r },
|
1134 |
|
|
{ "lwr3", 0xb7c00000, 0xffe00000, G_Q_r },
|
1135 |
|
|
{ "lwr3", 0xb7e00000, 0xffe00000, G_I_r },
|
1136 |
|
|
{ "mb0", 0xb8000000, 0xffe00000, G_r_r },
|
1137 |
|
|
{ "mb0", 0xb8200000, 0xffe00000, G_T_r },
|
1138 |
|
|
{ "mb0", 0xb8400000, 0xffe00000, G_Q_r },
|
1139 |
|
|
{ "mb0", 0xb8600000, 0xffe00000, G_I_r },
|
1140 |
|
|
{ "mb1", 0xb8800000, 0xffe00000, G_r_r },
|
1141 |
|
|
{ "mb1", 0xb8a00000, 0xffe00000, G_T_r },
|
1142 |
|
|
{ "mb1", 0xb8c00000, 0xffe00000, G_Q_r },
|
1143 |
|
|
{ "mb1", 0xb8e00000, 0xffe00000, G_I_r },
|
1144 |
|
|
{ "mb2", 0xb9000000, 0xffe00000, G_r_r },
|
1145 |
|
|
{ "mb2", 0xb9200000, 0xffe00000, G_T_r },
|
1146 |
|
|
{ "mb2", 0xb9400000, 0xffe00000, G_Q_r },
|
1147 |
|
|
{ "mb2", 0xb9600000, 0xffe00000, G_I_r },
|
1148 |
|
|
{ "mb3", 0xb9800000, 0xffe00000, G_r_r },
|
1149 |
|
|
{ "mb3", 0xb9a00000, 0xffe00000, G_T_r },
|
1150 |
|
|
{ "mb3", 0xb9c00000, 0xffe00000, G_Q_r },
|
1151 |
|
|
{ "mb3", 0xb9e00000, 0xffe00000, G_I_r },
|
1152 |
|
|
{ "mh0", 0xbc000000, 0xffe00000, G_r_r },
|
1153 |
|
|
{ "mh0", 0xbc200000, 0xffe00000, G_T_r },
|
1154 |
|
|
{ "mh0", 0xbc400000, 0xffe00000, G_Q_r },
|
1155 |
|
|
{ "mh0", 0xbc600000, 0xffe00000, G_I_r },
|
1156 |
|
|
{ "mh1", 0xbc800000, 0xffe00000, G_r_r },
|
1157 |
|
|
{ "mh1", 0xbca00000, 0xffe00000, G_T_r },
|
1158 |
|
|
{ "mh1", 0xbcc00000, 0xffe00000, G_Q_r },
|
1159 |
|
|
{ "mh1", 0xbce00000, 0xffe00000, G_I_r },
|
1160 |
|
|
{ "mh2", 0xbd000000, 0xffe00000, G_r_r },
|
1161 |
|
|
{ "mh2", 0xbd200000, 0xffe00000, G_T_r },
|
1162 |
|
|
{ "mh2", 0xbd400000, 0xffe00000, G_Q_r },
|
1163 |
|
|
{ "mh2", 0xbd600000, 0xffe00000, G_I_r },
|
1164 |
|
|
{ "mh3", 0xbd800000, 0xffe00000, G_r_r },
|
1165 |
|
|
{ "mh3", 0xbda00000, 0xffe00000, G_T_r },
|
1166 |
|
|
{ "mh3", 0xbdc00000, 0xffe00000, G_Q_r },
|
1167 |
|
|
{ "mh3", 0xbde00000, 0xffe00000, G_I_r },
|
1168 |
|
|
{ "mpyshi", 0x1d800000, 0xffe00000, G_r_r },
|
1169 |
|
|
{ "mpyshi", 0x1da00000, 0xffe00000, G_T_r },
|
1170 |
|
|
{ "mpyshi", 0x1dc00000, 0xffe00000, G_Q_r },
|
1171 |
|
|
{ "mpyshi", 0x1de00000, 0xffe00000, G_I_r },
|
1172 |
|
|
{ "mpyshi", 0x28800000, 0xffe00000, T_rrr },
|
1173 |
|
|
{ "mpyshi", 0x28a00000, 0xffe00000, T_Srr },
|
1174 |
|
|
{ "mpyshi", 0x28c00000, 0xffe00000, T_rSr },
|
1175 |
|
|
{ "mpyshi", 0x28e00000, 0xffe00000, T_SSr },
|
1176 |
|
|
{ "mpyshi", 0x38800000, 0xffe00000, T_Jrr }, /* C4x */
|
1177 |
|
|
{ "mpyshi", 0x38800000, 0xffe00000, T_rJr }, /* C4x */
|
1178 |
|
|
{ "mpyshi", 0x38a00000, 0xffe00000, T_rRr }, /* C4x */
|
1179 |
|
|
{ "mpyshi", 0x38a00000, 0xffe00000, T_Rrr }, /* C4x */
|
1180 |
|
|
{ "mpyshi", 0x38c00000, 0xffe00000, T_JRr }, /* C4x */
|
1181 |
|
|
{ "mpyshi", 0x38c00000, 0xffe00000, T_RJr }, /* C4x */
|
1182 |
|
|
{ "mpyshi", 0x38e00000, 0xffe00000, T_RRr }, /* C4x */
|
1183 |
|
|
{ "mpyshi3", 0x28800000, 0xffe00000, T_rrr },
|
1184 |
|
|
{ "mpyshi3", 0x28a00000, 0xffe00000, T_Srr },
|
1185 |
|
|
{ "mpyshi3", 0x28c00000, 0xffe00000, T_rSr },
|
1186 |
|
|
{ "mpyshi3", 0x28e00000, 0xffe00000, T_SSr },
|
1187 |
|
|
{ "mpyshi3", 0x38800000, 0xffe00000, T_Jrr }, /* C4x */
|
1188 |
|
|
{ "mpyshi3", 0x38800000, 0xffe00000, T_rJr }, /* C4x */
|
1189 |
|
|
{ "mpyshi3", 0x38a00000, 0xffe00000, T_rRr }, /* C4x */
|
1190 |
|
|
{ "mpyshi3", 0x38a00000, 0xffe00000, T_Rrr }, /* C4x */
|
1191 |
|
|
{ "mpyshi3", 0x38c00000, 0xffe00000, T_JRr }, /* C4x */
|
1192 |
|
|
{ "mpyshi3", 0x38c00000, 0xffe00000, T_RJr }, /* C4x */
|
1193 |
|
|
{ "mpyshi3", 0x38e00000, 0xffe00000, T_RRr }, /* C4x */
|
1194 |
|
|
{ "mpyuhi", 0x1e000000, 0xffe00000, G_r_r },
|
1195 |
|
|
{ "mpyuhi", 0x1e200000, 0xffe00000, G_T_r },
|
1196 |
|
|
{ "mpyuhi", 0x1e400000, 0xffe00000, G_Q_r },
|
1197 |
|
|
{ "mpyuhi", 0x1e600000, 0xffe00000, G_I_r },
|
1198 |
|
|
{ "mpyuhi", 0x29000000, 0xffe00000, T_rrr },
|
1199 |
|
|
{ "mpyuhi", 0x29200000, 0xffe00000, T_Srr },
|
1200 |
|
|
{ "mpyuhi", 0x29400000, 0xffe00000, T_rSr },
|
1201 |
|
|
{ "mpyuhi", 0x29600000, 0xffe00000, T_SSr },
|
1202 |
|
|
{ "mpyuhi", 0x39000000, 0xffe00000, T_Jrr }, /* C4x */
|
1203 |
|
|
{ "mpyuhi", 0x39000000, 0xffe00000, T_rJr }, /* C4x */
|
1204 |
|
|
{ "mpyuhi", 0x39200000, 0xffe00000, T_rRr }, /* C4x */
|
1205 |
|
|
{ "mpyuhi", 0x39200000, 0xffe00000, T_Rrr }, /* C4x */
|
1206 |
|
|
{ "mpyuhi", 0x39400000, 0xffe00000, T_JRr }, /* C4x */
|
1207 |
|
|
{ "mpyuhi", 0x39400000, 0xffe00000, T_RJr }, /* C4x */
|
1208 |
|
|
{ "mpyuhi", 0x39600000, 0xffe00000, T_RRr }, /* C4x */
|
1209 |
|
|
{ "mpyuhi3", 0x29000000, 0xffe00000, T_rrr },
|
1210 |
|
|
{ "mpyuhi3", 0x29200000, 0xffe00000, T_Srr },
|
1211 |
|
|
{ "mpyuhi3", 0x29400000, 0xffe00000, T_rSr },
|
1212 |
|
|
{ "mpyuhi3", 0x29600000, 0xffe00000, T_SSr },
|
1213 |
|
|
{ "mpyuhi3", 0x39000000, 0xffe00000, T_Jrr }, /* C4x */
|
1214 |
|
|
{ "mpyuhi3", 0x39000000, 0xffe00000, T_rJr }, /* C4x */
|
1215 |
|
|
{ "mpyuhi3", 0x39200000, 0xffe00000, T_rRr }, /* C4x */
|
1216 |
|
|
{ "mpyuhi3", 0x39200000, 0xffe00000, T_Rrr }, /* C4x */
|
1217 |
|
|
{ "mpyuhi3", 0x39400000, 0xffe00000, T_JRr }, /* C4x */
|
1218 |
|
|
{ "mpyuhi3", 0x39400000, 0xffe00000, T_RJr }, /* C4x */
|
1219 |
|
|
{ "mpyuhi3", 0x39600000, 0xffe00000, T_RRr }, /* C4x */
|
1220 |
|
|
{ "rcpf", 0x1d000000, 0xffe00000, G_r_r },
|
1221 |
|
|
{ "rcpf", 0x1d200000, 0xffe00000, G_T_r },
|
1222 |
|
|
{ "rcpf", 0x1d400000, 0xffe00000, G_Q_r },
|
1223 |
|
|
{ "rcpf", 0x1d600000, 0xffe00000, G_F_r },
|
1224 |
|
|
{ "retiBd", 0x78200000, 0xffe00000, "" },
|
1225 |
|
|
{ "retid", 0x78200000, 0xffe00000, "" }, /* synonym for retiud */
|
1226 |
|
|
{ "rptbd", 0x79800000, 0xff000000, "Q" },
|
1227 |
|
|
{ "rptbd", 0x65000000, 0xff000000, "B" },
|
1228 |
|
|
{ "rsqrf", 0x1c800000, 0xffe00000, G_r_r },
|
1229 |
|
|
{ "rsqrf", 0x1ca00000, 0xffe00000, G_T_r },
|
1230 |
|
|
{ "rsqrf", 0x1cc00000, 0xffe00000, G_Q_r },
|
1231 |
|
|
{ "rsqrf", 0x1ce00000, 0xffe00000, G_F_r },
|
1232 |
|
|
{ "stik", 0x15000000, 0xffe00000, "T,@" },
|
1233 |
|
|
{ "stik", 0x15600000, 0xffe00000, "T,*" },
|
1234 |
|
|
{ "toieee", 0x1b800000, 0xffe00000, G_r_r },
|
1235 |
|
|
{ "toieee", 0x1ba00000, 0xffe00000, G_T_r },
|
1236 |
|
|
{ "toieee", 0x1bc00000, 0xffe00000, G_Q_r },
|
1237 |
|
|
{ "toieee", 0x1be00000, 0xffe00000, G_F_r },
|
1238 |
|
|
{ "idle2", 0x06000001, 0xffffffff, "" },
|
1239 |
|
|
|
1240 |
|
|
/* Dummy entry, not included in num_insts. This
|
1241 |
|
|
lets code examine entry i+1 without checking
|
1242 |
|
|
if we've run off the end of the table. */
|
1243 |
|
|
{ "", 0x0, 0x00, "" }
|
1244 |
|
|
};
|
1245 |
|
|
|
1246 |
|
|
const unsigned int c4x_num_insts = (((sizeof c4x_insts) / (sizeof c4x_insts[0])) - 1);
|
1247 |
|
|
|
1248 |
|
|
|
1249 |
|
|
struct c4x_cond
|
1250 |
|
|
{
|
1251 |
|
|
char * name;
|
1252 |
|
|
unsigned long cond;
|
1253 |
|
|
};
|
1254 |
|
|
|
1255 |
|
|
typedef struct c4x_cond c4x_cond_t;
|
1256 |
|
|
|
1257 |
|
|
/* Define conditional branch/load suffixes. Put desired form for
|
1258 |
|
|
disassembler last. */
|
1259 |
|
|
static const c4x_cond_t c4x_conds[] =
|
1260 |
|
|
{
|
1261 |
|
|
{ "u", 0x00 },
|
1262 |
|
|
{ "c", 0x01 }, { "lo", 0x01 },
|
1263 |
|
|
{ "ls", 0x02 },
|
1264 |
|
|
{ "hi", 0x03 },
|
1265 |
|
|
{ "nc", 0x04 }, { "hs", 0x04 },
|
1266 |
|
|
{ "z", 0x05 }, { "eq", 0x05 },
|
1267 |
|
|
{ "nz", 0x06 }, { "ne", 0x06 },
|
1268 |
|
|
{ "n", 0x07 }, { "l", 0x07 }, { "lt", 0x07 },
|
1269 |
|
|
{ "le", 0x08 },
|
1270 |
|
|
{ "p", 0x09 }, { "gt", 0x09 },
|
1271 |
|
|
{ "nn", 0x0a }, { "ge", 0x0a },
|
1272 |
|
|
{ "nv", 0x0c },
|
1273 |
|
|
{ "v", 0x0d },
|
1274 |
|
|
{ "nuf", 0x0e },
|
1275 |
|
|
{ "uf", 0x0f },
|
1276 |
|
|
{ "nlv", 0x10 },
|
1277 |
|
|
{ "lv", 0x11 },
|
1278 |
|
|
{ "nluf", 0x12 },
|
1279 |
|
|
{ "luf", 0x13 },
|
1280 |
|
|
{ "zuf", 0x14 },
|
1281 |
|
|
/* Dummy entry, not included in num_conds. This
|
1282 |
|
|
lets code examine entry i+1 without checking
|
1283 |
|
|
if we've run off the end of the table. */
|
1284 |
|
|
{ "", 0x0}
|
1285 |
|
|
};
|
1286 |
|
|
|
1287 |
|
|
const unsigned int num_conds = (((sizeof c4x_conds) / (sizeof c4x_conds[0])) - 1);
|
1288 |
|
|
|
1289 |
|
|
struct c4x_indirect
|
1290 |
|
|
{
|
1291 |
|
|
char * name;
|
1292 |
|
|
unsigned long modn;
|
1293 |
|
|
};
|
1294 |
|
|
|
1295 |
|
|
typedef struct c4x_indirect c4x_indirect_t;
|
1296 |
|
|
|
1297 |
|
|
/* Define indirect addressing modes where:
|
1298 |
|
|
d displacement (signed)
|
1299 |
|
|
y ir0
|
1300 |
|
|
z ir1 */
|
1301 |
|
|
|
1302 |
|
|
static const c4x_indirect_t c4x_indirects[] =
|
1303 |
|
|
{
|
1304 |
|
|
{ "*+a(d)", 0x00 },
|
1305 |
|
|
{ "*-a(d)", 0x01 },
|
1306 |
|
|
{ "*++a(d)", 0x02 },
|
1307 |
|
|
{ "*--a(d)", 0x03 },
|
1308 |
|
|
{ "*a++(d)", 0x04 },
|
1309 |
|
|
{ "*a--(d)", 0x05 },
|
1310 |
|
|
{ "*a++(d)%", 0x06 },
|
1311 |
|
|
{ "*a--(d)%", 0x07 },
|
1312 |
|
|
{ "*+a(y)", 0x08 },
|
1313 |
|
|
{ "*-a(y)", 0x09 },
|
1314 |
|
|
{ "*++a(y)", 0x0a },
|
1315 |
|
|
{ "*--a(y)", 0x0b },
|
1316 |
|
|
{ "*a++(y)", 0x0c },
|
1317 |
|
|
{ "*a--(y)", 0x0d },
|
1318 |
|
|
{ "*a++(y)%", 0x0e },
|
1319 |
|
|
{ "*a--(y)%", 0x0f },
|
1320 |
|
|
{ "*+a(z)", 0x10 },
|
1321 |
|
|
{ "*-a(z)", 0x11 },
|
1322 |
|
|
{ "*++a(z)", 0x12 },
|
1323 |
|
|
{ "*--a(z)", 0x13 },
|
1324 |
|
|
{ "*a++(z)", 0x14 },
|
1325 |
|
|
{ "*a--(z)", 0x15 },
|
1326 |
|
|
{ "*a++(z)%", 0x16 },
|
1327 |
|
|
{ "*a--(z)%", 0x17 },
|
1328 |
|
|
{ "*a", 0x18 },
|
1329 |
|
|
{ "*a++(y)b", 0x19 },
|
1330 |
|
|
/* Dummy entry, not included in num_indirects. This
|
1331 |
|
|
lets code examine entry i+1 without checking
|
1332 |
|
|
if we've run off the end of the table. */
|
1333 |
|
|
{ "", 0x0}
|
1334 |
|
|
};
|
1335 |
|
|
|
1336 |
|
|
#define C3X_MODN_MAX 0x19
|
1337 |
|
|
|
1338 |
|
|
const unsigned int num_indirects = (((sizeof c4x_indirects) / (sizeof c4x_indirects[0])) - 1);
|