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1181 |
sfurman |
/* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
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Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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Written by Stephane Carrez (stcarrez@nerim.fr)
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "ansidecl.h"
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#include "opcode/m68hc11.h"
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#include "dis-asm.h"
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static const char *const reg_name[] = {
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"X", "Y", "SP", "PC"
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};
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static const char *const reg_src_table[] = {
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"A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
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};
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static const char *const reg_dst_table[] = {
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"A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
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};
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#define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)
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/* Prototypes for local functions. */
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static int read_memory
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PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
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static int print_indexed_operand
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PARAMS ((bfd_vma, struct disassemble_info *, int*, int));
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static int print_insn
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PARAMS ((bfd_vma, struct disassemble_info *, int));
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static int
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read_memory (memaddr, buffer, size, info)
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bfd_vma memaddr;
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bfd_byte *buffer;
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int size;
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struct disassemble_info *info;
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{
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int status;
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/* Get first byte. Only one at a time because we don't know the
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size of the insn. */
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status = (*info->read_memory_func) (memaddr, buffer, size, info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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return 0;
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}
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/* Read the 68HC12 indexed operand byte and print the corresponding mode.
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Returns the number of bytes read or -1 if failure. */
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static int
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print_indexed_operand (memaddr, info, indirect, mov_insn)
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bfd_vma memaddr;
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struct disassemble_info *info;
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int *indirect;
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int mov_insn;
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{
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bfd_byte buffer[4];
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int reg;
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int status;
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short sval;
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int pos = 1;
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if (indirect)
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*indirect = 0;
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status = read_memory (memaddr, &buffer[0], 1, info);
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if (status != 0)
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{
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return status;
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}
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/* n,r with 5-bits signed constant. */
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if ((buffer[0] & 0x20) == 0)
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{
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reg = (buffer[0] >> 6) & 3;
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sval = (buffer[0] & 0x1f);
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if (sval & 0x10)
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sval |= 0xfff0;
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(*info->fprintf_func) (info->stream, "%d,%s",
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(int) sval, reg_name[reg]);
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}
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/* Auto pre/post increment/decrement. */
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else if ((buffer[0] & 0xc0) != 0xc0)
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{
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const char *mode;
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reg = (buffer[0] >> 6) & 3;
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sval = (buffer[0] & 0x0f);
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if (sval & 0x8)
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{
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sval |= 0xfff0;
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sval = -sval;
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mode = "-";
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}
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else
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{
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sval = sval + 1;
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mode = "+";
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}
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(*info->fprintf_func) (info->stream, "%d,%s%s%s",
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(int) sval,
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(buffer[0] & 0x10 ? "" : mode),
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reg_name[reg], (buffer[0] & 0x10 ? mode : ""));
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}
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/* [n,r] 16-bits offset indexed indirect. */
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else if ((buffer[0] & 0x07) == 3)
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{
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if (mov_insn)
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{
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(*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
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buffer[0] & 0x0ff);
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return 0;
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}
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reg = (buffer[0] >> 3) & 0x03;
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status = read_memory (memaddr + pos, &buffer[0], 2, info);
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if (status != 0)
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{
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return status;
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}
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pos += 2;
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sval = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
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(*info->fprintf_func) (info->stream, "[%u,%s]",
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sval & 0x0ffff, reg_name[reg]);
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if (indirect)
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*indirect = 1;
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}
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else if ((buffer[0] & 0x4) == 0)
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{
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if (mov_insn)
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{
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(*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
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buffer[0] & 0x0ff);
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return 0;
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}
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reg = (buffer[0] >> 3) & 0x03;
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status = read_memory (memaddr + pos,
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&buffer[1], (buffer[0] & 0x2 ? 2 : 1), info);
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if (status != 0)
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{
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return status;
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}
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if (buffer[0] & 2)
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{
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sval = ((buffer[1] << 8) | (buffer[2] & 0x0FF));
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sval &= 0x0FFFF;
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pos += 2;
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}
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else
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{
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sval = buffer[1] & 0x00ff;
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if (buffer[0] & 0x01)
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sval |= 0xff00;
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pos++;
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}
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(*info->fprintf_func) (info->stream, "%d,%s",
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(int) sval, reg_name[reg]);
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}
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else
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{
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reg = (buffer[0] >> 3) & 0x03;
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switch (buffer[0] & 3)
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{
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case 0:
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(*info->fprintf_func) (info->stream, "A,%s", reg_name[reg]);
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break;
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case 1:
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(*info->fprintf_func) (info->stream, "B,%s", reg_name[reg]);
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break;
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case 2:
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(*info->fprintf_func) (info->stream, "D,%s", reg_name[reg]);
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break;
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case 3:
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default:
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(*info->fprintf_func) (info->stream, "[D,%s]", reg_name[reg]);
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if (indirect)
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*indirect = 1;
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break;
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}
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}
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return pos;
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}
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/* Disassemble one instruction at address 'memaddr'. Returns the number
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of bytes used by that instruction. */
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static int
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print_insn (memaddr, info, arch)
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bfd_vma memaddr;
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struct disassemble_info *info;
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int arch;
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{
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int status;
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bfd_byte buffer[4];
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unsigned char code;
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long format, pos, i;
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short sval;
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const struct m68hc11_opcode *opcode;
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/* Get first byte. Only one at a time because we don't know the
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size of the insn. */
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status = read_memory (memaddr, buffer, 1, info);
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if (status != 0)
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{
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return status;
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}
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format = 0;
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code = buffer[0];
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pos = 0;
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/* Look for page2,3,4 opcodes. */
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if (code == M6811_OPCODE_PAGE2)
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{
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pos++;
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format = M6811_OP_PAGE2;
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}
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else if (code == M6811_OPCODE_PAGE3 && arch == cpu6811)
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{
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pos++;
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format = M6811_OP_PAGE3;
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}
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else if (code == M6811_OPCODE_PAGE4 && arch == cpu6811)
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{
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pos++;
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format = M6811_OP_PAGE4;
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}
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| 251 |
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/* We are in page2,3,4; get the real opcode. */
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if (pos == 1)
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{
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status = read_memory (memaddr + pos, &buffer[1], 1, info);
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if (status != 0)
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{
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| 257 |
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return status;
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| 258 |
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}
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| 259 |
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code = buffer[1];
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| 260 |
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}
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| 261 |
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| 262 |
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| 263 |
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/* Look first for a 68HC12 alias. All of them are 2-bytes long and
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in page 1. There is no operand to print. We read the second byte
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only when we have a possible match. */
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if ((arch & cpu6812) && format == 0)
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{
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| 268 |
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int must_read = 1;
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| 269 |
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| 270 |
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/* Walk the alias table to find a code1+code2 match. */
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| 271 |
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for (i = 0; i < m68hc12_num_alias; i++)
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| 272 |
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{
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| 273 |
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if (m68hc12_alias[i].code1 == code)
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| 274 |
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{
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| 275 |
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if (must_read)
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| 276 |
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{
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| 277 |
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status = read_memory (memaddr + pos + 1,
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| 278 |
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&buffer[1], 1, info);
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| 279 |
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if (status != 0)
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| 280 |
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break;
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| 281 |
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| 282 |
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must_read = 1;
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| 283 |
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}
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| 284 |
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if (m68hc12_alias[i].code2 == (unsigned char) buffer[1])
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| 285 |
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{
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| 286 |
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(*info->fprintf_func) (info->stream, "%s",
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| 287 |
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m68hc12_alias[i].name);
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| 288 |
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return 2;
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| 289 |
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}
|
| 290 |
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}
|
| 291 |
|
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}
|
| 292 |
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}
|
| 293 |
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|
| 294 |
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pos++;
|
| 295 |
|
|
|
| 296 |
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/* Scan the opcode table until we find the opcode
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| 297 |
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with the corresponding page. */
|
| 298 |
|
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opcode = m68hc11_opcodes;
|
| 299 |
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for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
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| 300 |
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{
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| 301 |
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int offset;
|
| 302 |
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|
|
| 303 |
|
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if ((opcode->arch & arch) == 0)
|
| 304 |
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continue;
|
| 305 |
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if (opcode->opcode != code)
|
| 306 |
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continue;
|
| 307 |
|
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if ((opcode->format & OP_PAGE_MASK) != format)
|
| 308 |
|
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continue;
|
| 309 |
|
|
|
| 310 |
|
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if (opcode->format & M6812_OP_REG)
|
| 311 |
|
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{
|
| 312 |
|
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int j;
|
| 313 |
|
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int is_jump;
|
| 314 |
|
|
|
| 315 |
|
|
if (opcode->format & M6811_OP_JUMP_REL)
|
| 316 |
|
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is_jump = 1;
|
| 317 |
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else
|
| 318 |
|
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is_jump = 0;
|
| 319 |
|
|
|
| 320 |
|
|
status = read_memory (memaddr + pos, &buffer[0], 1, info);
|
| 321 |
|
|
if (status != 0)
|
| 322 |
|
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{
|
| 323 |
|
|
return status;
|
| 324 |
|
|
}
|
| 325 |
|
|
for (j = 0; i + j < m68hc11_num_opcodes; j++)
|
| 326 |
|
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{
|
| 327 |
|
|
if ((opcode[j].arch & arch) == 0)
|
| 328 |
|
|
continue;
|
| 329 |
|
|
if (opcode[j].opcode != code)
|
| 330 |
|
|
continue;
|
| 331 |
|
|
if (is_jump)
|
| 332 |
|
|
{
|
| 333 |
|
|
if (!(opcode[j].format & M6811_OP_JUMP_REL))
|
| 334 |
|
|
continue;
|
| 335 |
|
|
|
| 336 |
|
|
if ((opcode[j].format & M6812_OP_IBCC_MARKER)
|
| 337 |
|
|
&& (buffer[0] & 0xc0) != 0x80)
|
| 338 |
|
|
continue;
|
| 339 |
|
|
if ((opcode[j].format & M6812_OP_TBCC_MARKER)
|
| 340 |
|
|
&& (buffer[0] & 0xc0) != 0x40)
|
| 341 |
|
|
continue;
|
| 342 |
|
|
if ((opcode[j].format & M6812_OP_DBCC_MARKER)
|
| 343 |
|
|
&& (buffer[0] & 0xc0) != 0)
|
| 344 |
|
|
continue;
|
| 345 |
|
|
if ((opcode[j].format & M6812_OP_EQ_MARKER)
|
| 346 |
|
|
&& (buffer[0] & 0x20) == 0)
|
| 347 |
|
|
break;
|
| 348 |
|
|
if (!(opcode[j].format & M6812_OP_EQ_MARKER)
|
| 349 |
|
|
&& (buffer[0] & 0x20) != 0)
|
| 350 |
|
|
break;
|
| 351 |
|
|
continue;
|
| 352 |
|
|
}
|
| 353 |
|
|
if (opcode[j].format & M6812_OP_EXG_MARKER && buffer[0] & 0x80)
|
| 354 |
|
|
break;
|
| 355 |
|
|
if ((opcode[j].format & M6812_OP_SEX_MARKER)
|
| 356 |
|
|
&& (((buffer[0] & 0x07) >= 3 && (buffer[0] & 7) <= 7))
|
| 357 |
|
|
&& ((buffer[0] & 0x0f0) <= 0x20))
|
| 358 |
|
|
break;
|
| 359 |
|
|
if (opcode[j].format & M6812_OP_TFR_MARKER
|
| 360 |
|
|
&& !(buffer[0] & 0x80))
|
| 361 |
|
|
break;
|
| 362 |
|
|
}
|
| 363 |
|
|
if (i + j < m68hc11_num_opcodes)
|
| 364 |
|
|
opcode = &opcode[j];
|
| 365 |
|
|
}
|
| 366 |
|
|
|
| 367 |
|
|
/* We have found the opcode. Extract the operand and print it. */
|
| 368 |
|
|
(*info->fprintf_func) (info->stream, "%s", opcode->name);
|
| 369 |
|
|
|
| 370 |
|
|
format = opcode->format;
|
| 371 |
|
|
if (format & (M6811_OP_MASK | M6811_OP_BITMASK
|
| 372 |
|
|
| M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
|
| 373 |
|
|
{
|
| 374 |
|
|
(*info->fprintf_func) (info->stream, "\t");
|
| 375 |
|
|
}
|
| 376 |
|
|
|
| 377 |
|
|
/* The movb and movw must be handled in a special way...
|
| 378 |
|
|
The source constant 'ii' is not always at the same place.
|
| 379 |
|
|
This is the same for the destination for the post-indexed byte.
|
| 380 |
|
|
The 'offset' is used to do the appropriate correction.
|
| 381 |
|
|
|
| 382 |
|
|
offset offset
|
| 383 |
|
|
for constant for destination
|
| 384 |
|
|
movb 18 OB ii hh ll 0 0
|
| 385 |
|
|
18 08 xb ii 1 -1
|
| 386 |
|
|
18 0C hh ll hh ll 0 0
|
| 387 |
|
|
18 09 xb hh ll 1 -1
|
| 388 |
|
|
18 0D xb hh ll 0 0
|
| 389 |
|
|
18 0A xb xb 0 0
|
| 390 |
|
|
|
| 391 |
|
|
movw 18 03 jj kk hh ll 0 0
|
| 392 |
|
|
18 00 xb jj kk 1 -1
|
| 393 |
|
|
18 04 hh ll hh ll 0 0
|
| 394 |
|
|
18 01 xb hh ll 1 -1
|
| 395 |
|
|
18 05 xb hh ll 0 0
|
| 396 |
|
|
18 02 xb xb 0 0
|
| 397 |
|
|
|
| 398 |
|
|
After the source operand is read, the position 'pos' is incremented
|
| 399 |
|
|
this explains the negative offset for destination.
|
| 400 |
|
|
|
| 401 |
|
|
movb/movw above are the only instructions with this matching
|
| 402 |
|
|
format. */
|
| 403 |
|
|
offset = ((format & M6812_OP_IDX_P2)
|
| 404 |
|
|
&& (format & (M6811_OP_IMM8 | M6811_OP_IMM16 |
|
| 405 |
|
|
M6811_OP_IND16)));
|
| 406 |
|
|
|
| 407 |
|
|
/* Operand with one more byte: - immediate, offset,
|
| 408 |
|
|
direct-low address. */
|
| 409 |
|
|
if (format &
|
| 410 |
|
|
(M6811_OP_IMM8 | M6811_OP_IX | M6811_OP_IY | M6811_OP_DIRECT))
|
| 411 |
|
|
{
|
| 412 |
|
|
status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
|
| 413 |
|
|
if (status != 0)
|
| 414 |
|
|
{
|
| 415 |
|
|
return status;
|
| 416 |
|
|
}
|
| 417 |
|
|
|
| 418 |
|
|
pos++;
|
| 419 |
|
|
|
| 420 |
|
|
/* This movb/movw is special (see above). */
|
| 421 |
|
|
offset = -offset;
|
| 422 |
|
|
|
| 423 |
|
|
if (format & M6811_OP_IMM8)
|
| 424 |
|
|
{
|
| 425 |
|
|
(*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
|
| 426 |
|
|
format &= ~M6811_OP_IMM8;
|
| 427 |
|
|
}
|
| 428 |
|
|
else if (format & M6811_OP_IX)
|
| 429 |
|
|
{
|
| 430 |
|
|
/* Offsets are in range 0..255, print them unsigned. */
|
| 431 |
|
|
(*info->fprintf_func) (info->stream, "%u,x", buffer[0] & 0x0FF);
|
| 432 |
|
|
format &= ~M6811_OP_IX;
|
| 433 |
|
|
}
|
| 434 |
|
|
else if (format & M6811_OP_IY)
|
| 435 |
|
|
{
|
| 436 |
|
|
(*info->fprintf_func) (info->stream, "%u,y", buffer[0] & 0x0FF);
|
| 437 |
|
|
format &= ~M6811_OP_IY;
|
| 438 |
|
|
}
|
| 439 |
|
|
else if (format & M6811_OP_DIRECT)
|
| 440 |
|
|
{
|
| 441 |
|
|
(*info->fprintf_func) (info->stream, "*");
|
| 442 |
|
|
(*info->print_address_func) (buffer[0] & 0x0FF, info);
|
| 443 |
|
|
format &= ~M6811_OP_DIRECT;
|
| 444 |
|
|
}
|
| 445 |
|
|
}
|
| 446 |
|
|
|
| 447 |
|
|
#define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
|
| 448 |
|
|
/* Analyze the 68HC12 indexed byte. */
|
| 449 |
|
|
if (format & M6812_INDEXED_FLAGS)
|
| 450 |
|
|
{
|
| 451 |
|
|
int indirect;
|
| 452 |
|
|
|
| 453 |
|
|
status = print_indexed_operand (memaddr + pos, info, &indirect, 0);
|
| 454 |
|
|
if (status < 0)
|
| 455 |
|
|
{
|
| 456 |
|
|
return status;
|
| 457 |
|
|
}
|
| 458 |
|
|
pos += status;
|
| 459 |
|
|
|
| 460 |
|
|
/* The indirect addressing mode of the call instruction does
|
| 461 |
|
|
not need the page code. */
|
| 462 |
|
|
if ((format & M6812_OP_PAGE) && indirect)
|
| 463 |
|
|
format &= ~M6812_OP_PAGE;
|
| 464 |
|
|
}
|
| 465 |
|
|
|
| 466 |
|
|
/* 68HC12 dbcc/ibcc/tbcc operands. */
|
| 467 |
|
|
if ((format & M6812_OP_REG) && (format & M6811_OP_JUMP_REL))
|
| 468 |
|
|
{
|
| 469 |
|
|
status = read_memory (memaddr + pos, &buffer[0], 2, info);
|
| 470 |
|
|
if (status != 0)
|
| 471 |
|
|
{
|
| 472 |
|
|
return status;
|
| 473 |
|
|
}
|
| 474 |
|
|
(*info->fprintf_func) (info->stream, "%s,",
|
| 475 |
|
|
reg_src_table[buffer[0] & 0x07]);
|
| 476 |
|
|
sval = buffer[1] & 0x0ff;
|
| 477 |
|
|
if (buffer[0] & 0x10)
|
| 478 |
|
|
sval |= 0xff00;
|
| 479 |
|
|
|
| 480 |
|
|
pos += 2;
|
| 481 |
|
|
(*info->print_address_func) (memaddr + pos + sval, info);
|
| 482 |
|
|
format &= ~(M6812_OP_REG | M6811_OP_JUMP_REL);
|
| 483 |
|
|
}
|
| 484 |
|
|
else if (format & (M6812_OP_REG | M6812_OP_REG_2))
|
| 485 |
|
|
{
|
| 486 |
|
|
status = read_memory (memaddr + pos, &buffer[0], 1, info);
|
| 487 |
|
|
if (status != 0)
|
| 488 |
|
|
{
|
| 489 |
|
|
return status;
|
| 490 |
|
|
}
|
| 491 |
|
|
|
| 492 |
|
|
pos++;
|
| 493 |
|
|
(*info->fprintf_func) (info->stream, "%s,%s",
|
| 494 |
|
|
reg_src_table[(buffer[0] >> 4) & 7],
|
| 495 |
|
|
reg_dst_table[(buffer[0] & 7)]);
|
| 496 |
|
|
}
|
| 497 |
|
|
|
| 498 |
|
|
if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
|
| 499 |
|
|
{
|
| 500 |
|
|
int val;
|
| 501 |
|
|
bfd_vma addr;
|
| 502 |
|
|
unsigned page = 0;
|
| 503 |
|
|
|
| 504 |
|
|
status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
|
| 505 |
|
|
if (status != 0)
|
| 506 |
|
|
{
|
| 507 |
|
|
return status;
|
| 508 |
|
|
}
|
| 509 |
|
|
if (format & M6812_OP_IDX_P2)
|
| 510 |
|
|
offset = -2;
|
| 511 |
|
|
else
|
| 512 |
|
|
offset = 0;
|
| 513 |
|
|
pos += 2;
|
| 514 |
|
|
|
| 515 |
|
|
val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
|
| 516 |
|
|
val &= 0x0FFFF;
|
| 517 |
|
|
addr = val;
|
| 518 |
|
|
if (format & M6812_OP_PAGE)
|
| 519 |
|
|
{
|
| 520 |
|
|
status = read_memory (memaddr + pos + offset, buffer, 1, info);
|
| 521 |
|
|
if (status != 0)
|
| 522 |
|
|
return status;
|
| 523 |
|
|
|
| 524 |
|
|
page = (unsigned) buffer[0];
|
| 525 |
|
|
if (addr >= M68HC12_BANK_BASE && addr < 0x0c000)
|
| 526 |
|
|
addr = ((val - M68HC12_BANK_BASE)
|
| 527 |
|
|
| (page << M68HC12_BANK_SHIFT))
|
| 528 |
|
|
+ M68HC12_BANK_VIRT;
|
| 529 |
|
|
}
|
| 530 |
|
|
else if ((arch & cpu6812)
|
| 531 |
|
|
&& addr >= M68HC12_BANK_BASE && addr < 0x0c000)
|
| 532 |
|
|
{
|
| 533 |
|
|
int cur_page;
|
| 534 |
|
|
bfd_vma vaddr;
|
| 535 |
|
|
|
| 536 |
|
|
if (memaddr >= M68HC12_BANK_VIRT)
|
| 537 |
|
|
cur_page = ((memaddr - M68HC12_BANK_VIRT)
|
| 538 |
|
|
>> M68HC12_BANK_SHIFT);
|
| 539 |
|
|
else
|
| 540 |
|
|
cur_page = 0;
|
| 541 |
|
|
|
| 542 |
|
|
vaddr = ((addr - M68HC12_BANK_BASE)
|
| 543 |
|
|
+ (cur_page << M68HC12_BANK_SHIFT))
|
| 544 |
|
|
+ M68HC12_BANK_VIRT;
|
| 545 |
|
|
if (!info->symbol_at_address_func (addr, info)
|
| 546 |
|
|
&& info->symbol_at_address_func (vaddr, info))
|
| 547 |
|
|
addr = vaddr;
|
| 548 |
|
|
}
|
| 549 |
|
|
if (format & M6811_OP_IMM16)
|
| 550 |
|
|
{
|
| 551 |
|
|
format &= ~M6811_OP_IMM16;
|
| 552 |
|
|
(*info->fprintf_func) (info->stream, "#");
|
| 553 |
|
|
}
|
| 554 |
|
|
else
|
| 555 |
|
|
format &= ~M6811_OP_IND16;
|
| 556 |
|
|
|
| 557 |
|
|
(*info->print_address_func) (addr, info);
|
| 558 |
|
|
if (format & M6812_OP_PAGE)
|
| 559 |
|
|
{
|
| 560 |
|
|
(* info->fprintf_func) (info->stream, " {");
|
| 561 |
|
|
(* info->print_address_func) (val, info);
|
| 562 |
|
|
(* info->fprintf_func) (info->stream, ", %d}", page);
|
| 563 |
|
|
format &= ~M6812_OP_PAGE;
|
| 564 |
|
|
pos += 1;
|
| 565 |
|
|
}
|
| 566 |
|
|
}
|
| 567 |
|
|
|
| 568 |
|
|
if (format & M6812_OP_IDX_P2)
|
| 569 |
|
|
{
|
| 570 |
|
|
(*info->fprintf_func) (info->stream, ", ");
|
| 571 |
|
|
status = print_indexed_operand (memaddr + pos + offset, info, 0, 1);
|
| 572 |
|
|
if (status < 0)
|
| 573 |
|
|
return status;
|
| 574 |
|
|
pos += status;
|
| 575 |
|
|
}
|
| 576 |
|
|
|
| 577 |
|
|
if (format & M6812_OP_IND16_P2)
|
| 578 |
|
|
{
|
| 579 |
|
|
int val;
|
| 580 |
|
|
|
| 581 |
|
|
(*info->fprintf_func) (info->stream, ", ");
|
| 582 |
|
|
|
| 583 |
|
|
status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
|
| 584 |
|
|
if (status != 0)
|
| 585 |
|
|
{
|
| 586 |
|
|
return status;
|
| 587 |
|
|
}
|
| 588 |
|
|
pos += 2;
|
| 589 |
|
|
|
| 590 |
|
|
val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
|
| 591 |
|
|
val &= 0x0FFFF;
|
| 592 |
|
|
(*info->print_address_func) (val, info);
|
| 593 |
|
|
}
|
| 594 |
|
|
|
| 595 |
|
|
/* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
|
| 596 |
|
|
and in that order. The brset/brclr insn have a bitmask and then
|
| 597 |
|
|
a relative branch offset. */
|
| 598 |
|
|
if (format & M6811_OP_BITMASK)
|
| 599 |
|
|
{
|
| 600 |
|
|
status = read_memory (memaddr + pos, &buffer[0], 1, info);
|
| 601 |
|
|
if (status != 0)
|
| 602 |
|
|
{
|
| 603 |
|
|
return status;
|
| 604 |
|
|
}
|
| 605 |
|
|
pos++;
|
| 606 |
|
|
(*info->fprintf_func) (info->stream, " #$%02x%s",
|
| 607 |
|
|
buffer[0] & 0x0FF,
|
| 608 |
|
|
(format & M6811_OP_JUMP_REL ? " " : ""));
|
| 609 |
|
|
format &= ~M6811_OP_BITMASK;
|
| 610 |
|
|
}
|
| 611 |
|
|
if (format & M6811_OP_JUMP_REL)
|
| 612 |
|
|
{
|
| 613 |
|
|
int val;
|
| 614 |
|
|
|
| 615 |
|
|
status = read_memory (memaddr + pos, &buffer[0], 1, info);
|
| 616 |
|
|
if (status != 0)
|
| 617 |
|
|
{
|
| 618 |
|
|
return status;
|
| 619 |
|
|
}
|
| 620 |
|
|
|
| 621 |
|
|
pos++;
|
| 622 |
|
|
val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
|
| 623 |
|
|
(*info->print_address_func) (memaddr + pos + val, info);
|
| 624 |
|
|
format &= ~M6811_OP_JUMP_REL;
|
| 625 |
|
|
}
|
| 626 |
|
|
else if (format & M6812_OP_JUMP_REL16)
|
| 627 |
|
|
{
|
| 628 |
|
|
int val;
|
| 629 |
|
|
|
| 630 |
|
|
status = read_memory (memaddr + pos, &buffer[0], 2, info);
|
| 631 |
|
|
if (status != 0)
|
| 632 |
|
|
{
|
| 633 |
|
|
return status;
|
| 634 |
|
|
}
|
| 635 |
|
|
|
| 636 |
|
|
pos += 2;
|
| 637 |
|
|
val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
|
| 638 |
|
|
if (val & 0x8000)
|
| 639 |
|
|
val |= 0xffff0000;
|
| 640 |
|
|
|
| 641 |
|
|
(*info->print_address_func) (memaddr + pos + val, info);
|
| 642 |
|
|
format &= ~M6812_OP_JUMP_REL16;
|
| 643 |
|
|
}
|
| 644 |
|
|
|
| 645 |
|
|
if (format & M6812_OP_PAGE)
|
| 646 |
|
|
{
|
| 647 |
|
|
int val;
|
| 648 |
|
|
|
| 649 |
|
|
status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
|
| 650 |
|
|
if (status != 0)
|
| 651 |
|
|
{
|
| 652 |
|
|
return status;
|
| 653 |
|
|
}
|
| 654 |
|
|
pos += 1;
|
| 655 |
|
|
|
| 656 |
|
|
val = buffer[0] & 0x0ff;
|
| 657 |
|
|
(*info->fprintf_func) (info->stream, ", %d", val);
|
| 658 |
|
|
}
|
| 659 |
|
|
|
| 660 |
|
|
#ifdef DEBUG
|
| 661 |
|
|
/* Consistency check. 'format' must be 0, so that we have handled
|
| 662 |
|
|
all formats; and the computed size of the insn must match the
|
| 663 |
|
|
opcode table content. */
|
| 664 |
|
|
if (format & ~(M6811_OP_PAGE4 | M6811_OP_PAGE3 | M6811_OP_PAGE2))
|
| 665 |
|
|
{
|
| 666 |
|
|
(*info->fprintf_func) (info->stream, "; Error, format: %x", format);
|
| 667 |
|
|
}
|
| 668 |
|
|
if (pos != opcode->size)
|
| 669 |
|
|
{
|
| 670 |
|
|
(*info->fprintf_func) (info->stream, "; Error, size: %d expect %d",
|
| 671 |
|
|
pos, opcode->size);
|
| 672 |
|
|
}
|
| 673 |
|
|
#endif
|
| 674 |
|
|
return pos;
|
| 675 |
|
|
}
|
| 676 |
|
|
|
| 677 |
|
|
/* Opcode not recognized. */
|
| 678 |
|
|
if (format == M6811_OP_PAGE2 && arch & cpu6812
|
| 679 |
|
|
&& ((code >= 0x30 && code <= 0x39) || (code >= 0x40 && code <= 0xff)))
|
| 680 |
|
|
(*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);
|
| 681 |
|
|
|
| 682 |
|
|
else if (format == M6811_OP_PAGE2)
|
| 683 |
|
|
(*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
|
| 684 |
|
|
M6811_OPCODE_PAGE2, code);
|
| 685 |
|
|
else if (format == M6811_OP_PAGE3)
|
| 686 |
|
|
(*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
|
| 687 |
|
|
M6811_OPCODE_PAGE3, code);
|
| 688 |
|
|
else if (format == M6811_OP_PAGE4)
|
| 689 |
|
|
(*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
|
| 690 |
|
|
M6811_OPCODE_PAGE4, code);
|
| 691 |
|
|
else
|
| 692 |
|
|
(*info->fprintf_func) (info->stream, ".byte\t0x%02x", code);
|
| 693 |
|
|
|
| 694 |
|
|
return pos;
|
| 695 |
|
|
}
|
| 696 |
|
|
|
| 697 |
|
|
/* Disassemble one instruction at address 'memaddr'. Returns the number
|
| 698 |
|
|
of bytes used by that instruction. */
|
| 699 |
|
|
int
|
| 700 |
|
|
print_insn_m68hc11 (memaddr, info)
|
| 701 |
|
|
bfd_vma memaddr;
|
| 702 |
|
|
struct disassemble_info *info;
|
| 703 |
|
|
{
|
| 704 |
|
|
return print_insn (memaddr, info, cpu6811);
|
| 705 |
|
|
}
|
| 706 |
|
|
|
| 707 |
|
|
int
|
| 708 |
|
|
print_insn_m68hc12 (memaddr, info)
|
| 709 |
|
|
bfd_vma memaddr;
|
| 710 |
|
|
struct disassemble_info *info;
|
| 711 |
|
|
{
|
| 712 |
|
|
return print_insn (memaddr, info, cpu6812);
|
| 713 |
|
|
}
|
