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[/] [or1k/] [trunk/] [gdb-5.3/] [opcodes/] [mcore-dis.c] - Blame information for rev 1771

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Line No. Rev Author Line
1 1181 sfurman
/* Disassemble Motorola M*Core instructions.
2
   Copyright 1993, 1999, 2000 Free Software Foundation, Inc.
3
 
4
This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
8
 
9
This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
13
 
14
You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
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18
#include "sysdep.h"
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#include <stdio.h>
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#define STATIC_TABLE
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#define DEFINE_TABLE
22
 
23
#include "mcore-opc.h"
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#include "dis-asm.h"
25
 
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/* Mask for each mcore_opclass: */
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static const unsigned short imsk[] = {
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    /* O0  */ 0xFFFF,
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    /* OT  */ 0xFFFC,
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    /* O1  */ 0xFFF0,
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    /* OC  */ 0xFE00,
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    /* O2  */ 0xFF00,
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    /* X1  */ 0xFFF0,
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    /* OI  */ 0xFE00,
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    /* OB  */ 0xFE00,
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    /* OMa */ 0xFFF0,
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    /* SI  */ 0xFE00,
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    /* I7  */ 0xF800,
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    /* LS  */ 0xF000,
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    /* BR  */ 0xF800,
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    /* BL  */ 0xFF00,
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    /* LR  */ 0xF000,
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    /* LJ  */ 0xFF00,
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    /* RM  */ 0xFFF0,
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    /* RQ  */ 0xFFF0,
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    /* JSR */ 0xFFF0,
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    /* JMP */ 0xFFF0,
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    /* OBRa*/ 0xFFF0,
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    /* OBRb*/ 0xFF80,
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    /* OBRc*/ 0xFF00,
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    /* OBR2*/ 0xFE00,
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    /* O1R1*/ 0xFFF0,
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    /* OMb */ 0xFF80,
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    /* OMc */ 0xFF00,
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    /* SIa */ 0xFE00,
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  /* MULSH */ 0xFF00,
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  /* OPSR  */ 0xFFF8,   /* psrset/psrclr */
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    /* JC  */ 0,         /* JC,JU,JL don't appear in object */
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    /* JU  */ 0,
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    /* JL  */ 0,
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    /* RSI */ 0,
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    /* DO21*/ 0,
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    /* OB2 */ 0          /* OB2 won't appear in object.  */
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};
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static const char *grname[] = {
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 "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
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 "r8",  "r9", "r10", "r11", "r12", "r13", "r14", "r15"
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};
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static const char X[] = "??";
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static const char *crname[] = {
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  "psr",  "vbr", "epsr", "fpsr", "epc",  "fpc",  "ss0",  "ss1",
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  "ss2",  "ss3", "ss4",  "gcr",  "gsr",     X,      X,      X,
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     X,      X,      X,      X,      X,     X,      X,      X,
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     X,      X,      X,      X,      X,     X,      X,      X
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};
84
 
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static const unsigned isiz[] = { 2, 0, 1, 0 };
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87
int
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print_insn_mcore (memaddr, info)
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     bfd_vma memaddr;
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     struct disassemble_info *info;
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{
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  unsigned char       ibytes[4];
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  fprintf_ftype       fprintf = info->fprintf_func;
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  void *              stream = info->stream;
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  unsigned short      inst;
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  mcore_opcode_info * op;
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  int                 status;
98
 
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  info->bytes_per_chunk = 2;
100
 
101
  status = info->read_memory_func (memaddr, ibytes, 2, info);
102
 
103
  if (status != 0)
104
    {
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      info->memory_error_func (status, memaddr, info);
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      return -1;
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    }
108
 
109
  if (info->endian == BFD_ENDIAN_BIG)
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    inst = (ibytes[0] << 8) | ibytes[1];
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  else if (info->endian == BFD_ENDIAN_LITTLE)
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    inst = (ibytes[1] << 8) | ibytes[0];
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  else
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    abort ();
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116
  /* Just a linear search of the table.  */
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  for (op = mcore_table; op->name != 0; op++)
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    if (op->inst == (inst & imsk[op->opclass]))
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      break;
120
 
121
  if (op->name == 0)
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    fprintf (stream, ".short 0x%04x", inst);
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  else
124
    {
125
      const char *name = grname[inst & 0x0F];
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127
      fprintf (stream, "%s", op->name);
128
 
129
      switch (op->opclass)
130
        {
131
        case O0: break;
132
        case OT: fprintf (stream, "\t%d", inst & 0x3); break;
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        case O1:
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        case JMP:
135
        case JSR: fprintf (stream, "\t%s", name); break;
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        case OC:  fprintf (stream, "\t%s, %s", name, crname[(inst >> 4) & 0x1F]); break;
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        case O1R1: fprintf (stream, "\t%s, r1", name); break;
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        case MULSH:
139
        case O2: fprintf (stream, "\t%s, %s", name, grname[(inst >> 4) & 0xF]); break;
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        case X1: fprintf (stream, "\tr1, %s", name); break;
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        case OI: fprintf (stream, "\t%s, %d", name, ((inst >> 4) & 0x1F) + 1); break;
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        case RM: fprintf (stream, "\t%s-r15, (r0)", name); break;
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        case RQ: fprintf (stream, "\tr4-r7, (%s)", name); break;
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        case OB:
145
        case OBRa:
146
        case OBRb:
147
        case OBRc:
148
        case SI:
149
        case SIa:
150
        case OMa:
151
        case OMb:
152
        case OMc: fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x1F); break;
153
        case I7: fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x7F); break;
154
        case LS: fprintf (stream, "\t%s, (%s, %d)", grname[(inst >> 8) & 0xF],
155
                          name, ((inst >> 4) & 0xF) << isiz[(inst >> 13) & 3]);
156
          break;
157
 
158
        case BR:
159
          {
160
            long val = inst & 0x3FF;
161
 
162
            if (inst & 0x400)
163
              val |= 0xFFFFFC00;
164
 
165
            fprintf (stream, "\t0x%x", memaddr + 2 + (val << 1));
166
 
167
            if (strcmp (op->name, "bsr") == 0)
168
              {
169
                /* For bsr, we'll try to get a symbol for the target.  */
170
                val = memaddr + 2 + (val << 1);
171
 
172
                if (info->print_address_func && val != 0)
173
                  {
174
                    fprintf (stream, "\t// ");
175
                    info->print_address_func (val, info);
176
                  }
177
              }
178
          }
179
          break;
180
 
181
        case BL:
182
          {
183
            long val;
184
            val = (inst & 0x000F);
185
            fprintf (stream, "\t%s, 0x%x",
186
                     grname[(inst >> 4) & 0xF], memaddr - (val << 1));
187
          }
188
          break;
189
 
190
        case LR:
191
          {
192
            unsigned long val;
193
 
194
            val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
195
 
196
            status = info->read_memory_func (val, ibytes, 4, info);
197
            if (status != 0)
198
              {
199
                info->memory_error_func (status, memaddr, info);
200
                break;
201
              }
202
 
203
            if (info->endian == BFD_ENDIAN_LITTLE)
204
              val = (ibytes[3] << 24) | (ibytes[2] << 16)
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                | (ibytes[1] << 8) | (ibytes[0]);
206
            else
207
              val = (ibytes[0] << 24) | (ibytes[1] << 16)
208
                | (ibytes[2] << 8) | (ibytes[3]);
209
 
210
            /* Removed [] around literal value to match ABI syntax 12/95.  */
211
            fprintf (stream, "\t%s, 0x%X", grname[(inst >> 8) & 0xF], val);
212
 
213
            if (val == 0)
214
              fprintf (stream, "\t// from address pool at 0x%x",
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                       (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
216
          }
217
          break;
218
 
219
        case LJ:
220
          {
221
            unsigned long val;
222
 
223
            val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
224
 
225
            status = info->read_memory_func (val, ibytes, 4, info);
226
            if (status != 0)
227
              {
228
                info->memory_error_func (status, memaddr, info);
229
                break;
230
              }
231
 
232
            if (info->endian == BFD_ENDIAN_LITTLE)
233
              val = (ibytes[3] << 24) | (ibytes[2] << 16)
234
                | (ibytes[1] << 8) | (ibytes[0]);
235
            else
236
              val = (ibytes[0] << 24) | (ibytes[1] << 16)
237
                | (ibytes[2] << 8) | (ibytes[3]);
238
 
239
            /* Removed [] around literal value to match ABI syntax 12/95.  */
240
            fprintf (stream, "\t0x%X", val);
241
            /* For jmpi/jsri, we'll try to get a symbol for the target.  */
242
            if (info->print_address_func && val != 0)
243
              {
244
                fprintf (stream, "\t// ");
245
                info->print_address_func (val, info);
246
              }
247
            else
248
              {
249
                fprintf (stream, "\t// from address pool at 0x%x",
250
                         (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
251
              }
252
          }
253
          break;
254
 
255
        case OPSR:
256
          {
257
            static char *fields[] = {
258
              "af", "ie",    "fe",    "fe,ie",
259
              "ee", "ee,ie", "ee,fe", "ee,fe,ie"
260
            };
261
 
262
            fprintf (stream, "\t%s", fields[inst & 0x7]);
263
          }
264
          break;
265
 
266
        default:
267
          /* If the disassembler lags the instruction set.  */
268
          fprintf (stream, "\tundecoded operands, inst is 0x%04x", inst);
269
          break;
270
        }
271
    }
272
 
273
  /* Say how many bytes we consumed.  */
274
  return 2;
275
}

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