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[/] [or1k/] [trunk/] [gdb-5.3/] [opcodes/] [or32-opc.c] - Blame information for rev 1777

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1 1181 sfurman 
/* Table of opcodes for the OpenRISC 1000 ISA.
2 1183 sfurman 
   Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
3 1181 sfurman 
   Contributed by Damjan Lampret (lampret@opencores.org).
4 
 
5 1183 sfurman 
This file is part of gen_or1k_isa, or1ksim, GDB and GAS.
6 1181 sfurman 
 
7 1183 sfurman 
This program is free software; you can redistribute it and/or modify
8 
it under the terms of the GNU General Public License as published by
9 
the Free Software Foundation; either version 2 of the License, or
10 
(at your option) any later version.
11 1181 sfurman 
 
12 1183 sfurman 
This program is distributed in the hope that it will be useful,
13 
but WITHOUT ANY WARRANTY; without even the implied warranty of
14 
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 
GNU General Public License for more details.
16 1181 sfurman 
 
17 1183 sfurman 
You should have received a copy of the GNU General Public License
18 
along with this program; if not, write to the Free Software
19 
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
20 1181 sfurman 
 
21 
/* We treat all letters the same in encode/decode routines so
22 1183 sfurman 
   we need to assign some characteristics to them like signess etc.*/
23 1181 sfurman 
#include <string.h>
24 
#include <stdio.h>
25 
#include <stdlib.h>
26 1183 sfurman 
#include <ctype.h>
27 
 
28 
 
29 1181 sfurman 
#ifdef HAVE_CONFIG_H
30 
# include "config.h"
31 
#endif
32 
#include "opcode/or32.h"
33 
 
34 1183 sfurman 
/* **INDENT-OFF** */
35 1181 sfurman 
 
36 1183 sfurman 
CONST struct or32_letter or32_letters[] =
37 
{
38 
{ 'A', NUM_UNSIGNED },
39 
{ 'B', NUM_UNSIGNED },
40 
{ 'D', NUM_UNSIGNED },
41 
{ 'I', NUM_SIGNED },
42 
{ 'K', NUM_UNSIGNED },
43 
{ 'L', NUM_UNSIGNED },
44 
{ 'N', NUM_SIGNED },
45 
{ '0', NUM_UNSIGNED },
46 
{ '\0', 0 }     /* dummy entry */
47 
};
48 1181 sfurman 
 
49 
/* Opcode encoding:
50 
   machine[31:30]: first two bits of opcode
51 
                   00 - neither of source operands is GPR
52 
                   01 - second source operand is GPR (rB)
53 
                   10 - first source operand is GPR (rA)
54 
                   11 - both source operands are GPRs (rA and rB)
55 
   machine[29:26]: next four bits of opcode
56 
   machine[25:00]: instruction operands (specific to individual instruction)
57 
 
58 
  Recommendation: irrelevant instruction bits should be set with a value of
59 
  bits in same positions of instruction preceding current instruction in the
60 1183 sfurman 
  code (when assembling).
61 
*/
62 1181 sfurman 
 
63 1183 sfurman 
#if defined HAS_EXECUTION && SIMPLE_EXECUTION
64 1181 sfurman 
#define EFN &l_none
65 
#define EF(func) &(func)
66 
#define EFI &l_invalid
67 
#else  /* HAS_EXECUTION */
68 1183 sfurman 
 
69 
#ifndef HAS_EXECUTION
70 
#define EFN &l_none
71 1181 sfurman 
#define EF(func) EFN
72 
#define EFI EFN
73 1183 sfurman 
#else  /* !HAS_EXECUTION */
74 
#define EFN "l_none"
75 
#define EFI "l_invalid"
76 
#ifdef __GNUC__
77 
#define EF(func) #func
78 
#else
79 
#define EF(func) "func"
80 
#endif
81 
#endif /* !HAS_EXECUTION */
82 
 
83 1181 sfurman 
#endif /* HAS_EXECUTION */
84 
 
85 1183 sfurman 
CONST struct or32_opcode or32_opcodes[] =
86 
{
87 1181 sfurman 
 
88 1183 sfurman 
{ "l.j",       "N",            "00 0x0  NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_j), OR32_IF_DELAY },
89 
{ "l.jal",     "N",            "00 0x1  NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_jal), OR32_IF_DELAY },
90 
{ "l.bnf",     "N",            "00 0x3  NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG},
91 
{ "l.bf",      "N",            "00 0x4  NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG },
92 
{ "l.nop",     "K",            "00 0x5  01--- ----- KKKK KKKK KKKK KKKK", EF(l_nop), 0 },
93 
{ "l.movhi",   "rD,K",         "00 0x6  DDDDD ----0 KKKK KKKK KKKK KKKK", EF(l_movhi), 0 }, /*MM*/
94 
{ "l.macrc",   "rD",           "00 0x6  DDDDD ----1 0000 0000 0000 0000", EF(l_macrc), 0 }, /*MM*/
95 1181 sfurman 
 
96 1183 sfurman 
{ "l.sys",     "K",            "00 0x8  00000 00000 KKKK KKKK KKKK KKKK", EF(l_sys), 0 },
97 
{ "l.trap",    "K",            "00 0x8  01000 00000 KKKK KKKK KKKK KKKK", EF(l_trap), 0 }, /* CZ 21/06/01 */
98 
{ "l.msync",   "",             "00 0x8  10000 00000 0000 0000 0000 0000", EFN, 0 },
99 
{ "l.psync",   "",             "00 0x8  10100 00000 0000 0000 0000 0000", EFN, 0 },
100 
{ "l.csync",   "",             "00 0x8  11000 00000 0000 0000 0000 0000", EFN, 0 },
101 
{ "l.rfe",     "",             "00 0x9  ----- ----- ---- ---- ---- ----", EF(l_rfe), OR32_IF_DELAY },
102 1181 sfurman 
 
103 1183 sfurman 
{ "lv.all_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
104 
{ "lv.all_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
105 
{ "lv.all_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
106 
{ "lv.all_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
107 
{ "lv.all_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
108 
{ "lv.all_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },
109 
{ "lv.all_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
110 
{ "lv.all_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
111 
{ "lv.all_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
112 
{ "lv.all_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
113 
{ "lv.all_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
114 
{ "lv.all_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0 },
115 
{ "lv.any_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0 },
116 
{ "lv.any_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0 },
117 
{ "lv.any_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0 },
118 
{ "lv.any_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0 },
119 
{ "lv.any_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0 },
120 
{ "lv.any_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0 },
121 
{ "lv.any_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0 },
122 
{ "lv.any_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0 },
123 
{ "lv.any_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0 },
124 
{ "lv.any_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0 },
125 
{ "lv.any_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0 },
126 
{ "lv.any_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0 },
127 
{ "lv.add.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0 },
128 
{ "lv.add.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0 },
129 
{ "lv.adds.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0 },
130 
{ "lv.adds.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0 },
131 
{ "lv.addu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0 },
132 
{ "lv.addu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0 },
133 
{ "lv.addus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0 },
134 
{ "lv.addus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0 },
135 
{ "lv.and",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0 },
136 
{ "lv.avg.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0 },
137 
{ "lv.avg.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0 },
138 
{ "lv.cmp_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0 },
139 
{ "lv.cmp_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0 },
140 
{ "lv.cmp_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0 },
141 
{ "lv.cmp_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0 },
142 
{ "lv.cmp_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0 },
143 
{ "lv.cmp_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0 },
144 
{ "lv.cmp_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0 },
145 
{ "lv.cmp_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0 },
146 
{ "lv.cmp_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0 },
147 
{ "lv.cmp_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0 },
148 
{ "lv.cmp_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0 },
149 
{ "lv.cmp_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0 },
150 
{ "lv.madds.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0 },
151 
{ "lv.max.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0 },
152 
{ "lv.max.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0 },
153 
{ "lv.merge.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0 },
154 
{ "lv.merge.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0 },
155 
{ "lv.min.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0 },
156 
{ "lv.min.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0 },
157 
{ "lv.msubs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0 },
158 
{ "lv.muls.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0 },
159 
{ "lv.nand",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0 },
160 
{ "lv.nor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0 },
161 
{ "lv.or",     "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0 },
162 
{ "lv.pack.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0 },
163 
{ "lv.pack.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0 },
164 
{ "lv.packs.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0 },
165 
{ "lv.packs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0 },
166 
{ "lv.packus.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0 },
167 
{ "lv.packus.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0 },
168 
{ "lv.perm.n", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0 },
169 
{ "lv.rl.b",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0 },
170 
{ "lv.rl.h",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0 },
171 
{ "lv.sll.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0 },
172 
{ "lv.sll.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0 },
173 
{ "lv.sll",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0 },
174 
{ "lv.srl.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0 },
175 
{ "lv.srl.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0 },
176 
{ "lv.sra.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0 },
177 
{ "lv.sra.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0 },
178 
{ "lv.srl",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0 },
179 
{ "lv.sub.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0 },
180 
{ "lv.sub.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0 },
181 
{ "lv.subs.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0 },
182 
{ "lv.subs.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0 },
183 
{ "lv.subu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0 },
184 
{ "lv.subu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0 },
185 
{ "lv.subus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0 },
186 
{ "lv.subus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0 },
187 
{ "lv.unpack.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0 },
188 
{ "lv.unpack.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0 },
189 
{ "lv.xor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0 },
190 
{ "lv.cust1",  "",             "00 0xA  ----- ----- ---- ---- 0xC ----", EFI, 0 },
191 
{ "lv.cust2",  "",             "00 0xA  ----- ----- ---- ---- 0xD ----", EFI, 0 },
192 
{ "lv.cust3",  "",             "00 0xA  ----- ----- ---- ---- 0xE ----", EFI, 0 },
193 
{ "lv.cust4",  "",             "00 0xA  ----- ----- ---- ---- 0xF ----", EFI, 0 },
194 1181 sfurman 
 
195 1183 sfurman 
{ "lf.add.s",   "rD,rA,rB",    "00 0xB  DDDDD AAAAA BBBB B--- 0x1 0x0", EF(lf_add_s), 0 },
196 
{ "lf.sub.s",   "rD,rA,rB",    "00 0xB  DDDDD AAAAA BBBB B--- 0x1 0x1", EF(lf_sub_s), 0 },
197 
{ "lf.mul.s",   "rD,rA,rB",    "00 0xB  DDDDD AAAAA BBBB B--- 0x1 0x2", EF(lf_mul_s), 0 },
198 
{ "lf.div.s",   "rD,rA,rB",    "00 0xB  DDDDD AAAAA BBBB B--- 0x1 0x3", EF(lf_div_s), 0 },
199 
/*{ "lf.itof.s",  "rD,rA",       "00 0xB  DDDDD AAAAA BBBB B--- 0x1 0x4", EF(lf_itof_s), 0 },
200 
{ "lf.ftoi.s",  "rD,rA",       "00 0xB  DDDDD AAAAA BBBB B--- 0x1 0x5", EF(lf_ftoi_s), 0 },*/
201 
{ "lf.rem.s",   "rD,rA,rB",    "00 0xB  DDDDD AAAAA BBBB B--- 0x1 0x6", EF(lf_rem_s), 0 },
202 
{ "lf.madd.s",  "rD,rA,rB",    "00 0xB  DDDDD AAAAA BBBB B--- 0x1 0x7", EF(lf_madd_s), 0 },
203 
{ "lf.sfeq.s",  "rA,rB",       "00 0xB  ----- AAAAA BBBB B--- 0x1 0x8", EF(lf_sfeq_s), 0 },
204 
{ "lf.sfne.s",  "rA,rB",       "00 0xB  ----- AAAAA BBBB B--- 0x1 0x9", EF(lf_sfne_s), 0 },
205 
{ "lf.sfgt.s",  "rA,rB",       "00 0xB  ----- AAAAA BBBB B--- 0x1 0xA", EF(lf_sfgt_s), 0 },
206 
{ "lf.sfge.s",  "rA,rB",       "00 0xB  ----- AAAAA BBBB B--- 0x1 0xB", EF(lf_sfge_s), 0 },
207 
{ "lf.sflt.s",  "rA,rB",       "00 0xB  ----- AAAAA BBBB B--- 0x1 0xC", EF(lf_sflt_s), 0 },
208 
{ "lf.sfle.s",  "rA,rB",       "00 0xB  ----- AAAAA BBBB B--- 0x1 0xD", EF(lf_sfle_s), 0 },
209 
{ "lf.cust1.s", "",            "00 0xB  ----- ----- ---- ---- 0xE ----", EFI, 0 },
210 1181 sfurman 
 
211 1183 sfurman 
{ "lf.add.d",   "rD,rA,rB",    "00 0xC  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
212 
{ "lf.sub.d",   "rD,rA,rB",    "00 0xC  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
213 
{ "lf.mul.d",   "rD,rA,rB",    "00 0xC  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
214 
{ "lf.div.d",   "rD,rA,rB",    "00 0xC  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
215 
/*{ "lf.itof.d",  "rD,rA",       "00 0xC  DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
216 
{ "lf.ftoi.d",  "rD,rA",       "00 0xC  DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },*/
217 
{ "lf.rem.d",   "rD,rA,rB",    "00 0xC  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
218 
{ "lf.madd.d",  "rD,rA,rB",    "00 0xC  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
219 
{ "lf.sfeq.d",  "rA,rB",       "00 0xC  ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
220 
{ "lf.sfne.d",  "rA,rB",       "00 0xC  ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
221 
{ "lf.sfgt.d",  "rA,rB",       "00 0xC  ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
222 
{ "lf.sfge.d",  "rA,rB",       "00 0xC  ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0 },
223 
{ "lf.sflt.d",  "rA,rB",       "00 0xC  ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0 },
224 
{ "lf.sfle.d",  "rA,rB",       "00 0xC  ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0 },
225 
{ "lf.cust1.d", "",            "00 0xC  ----- ----- ---- ---- 0xE ----", EFI, 0 },
226 1181 sfurman 
 
227 1183 sfurman 
{ "lvf.ld",     "rD,0(rA)",    "00 0xD  DDDDD AAAAA ---- ---- 0x0 0x0", EFI, 0 },
228 
{ "lvf.lw",     "rD,0(rA)",    "00 0xD  DDDDD AAAAA ---- ---- 0x0 0x1", EFI, 0 },
229 
{ "lvf.sd",     "0(rA),rB",    "00 0xD  ----- AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
230 
{ "lvf.sw",     "0(rA),rB",    "00 0xD  ----- AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
231 1181 sfurman 
 
232 1183 sfurman 
{ "l.jr",      "rB",           "01 0x1  ----- ----- BBBB B--- ---- ----", EF(l_jr), OR32_IF_DELAY },
233 
{ "l.jalr",    "rB",           "01 0x2  ----- ----- BBBB B--- ---- ----", EF(l_jalr), OR32_IF_DELAY },
234 
{ "l.maci",    "rB,I",         "01 0x3  IIIII ----- BBBB BIII IIII IIII", EF(l_mac), 0 },
235 
{ "l.cust1",   "",             "01 0xC  ----- ----- ---- ---- ---- ----", EF(l_cust1), 0 },
236 
{ "l.cust2",   "",             "01 0xD  ----- ----- ---- ---- ---- ----", EF(l_cust2), 0 },
237 
{ "l.cust3",   "",             "01 0xE  ----- ----- ---- ---- ---- ----", EF(l_cust3), 0 },
238 
{ "l.cust4",   "",             "01 0xF  ----- ----- ---- ---- ---- ----", EF(l_cust4), 0 },
239 1181 sfurman 
 
240 1183 sfurman 
{ "l.ld",      "rD,I(rA)",     "10 0x0  DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
241 
{ "l.lwz",     "rD,I(rA)",     "10 0x1  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lwz), 0 },
242 
{ "l.lws",     "rD,I(rA)",     "10 0x2  DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
243 
{ "l.lbz",     "rD,I(rA)",     "10 0x3  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbz), 0 },
244 
{ "l.lbs",     "rD,I(rA)",     "10 0x4  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbs), 0 },
245 
{ "l.lhz",     "rD,I(rA)",     "10 0x5  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhz), 0 },
246 
{ "l.lhs",     "rD,I(rA)",     "10 0x6  DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhs), 0 },
247 1181 sfurman 
 
248 1183 sfurman 
{ "l.addi",    "rD,rA,I",      "10 0x7  DDDDD AAAAA IIII IIII IIII IIII", EF(l_add), OR32_W_FLAG },
249 
{ "l.addic",   "rD,rA,I",      "10 0x8  DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
250 
{ "l.andi",    "rD,rA,K",      "10 0x9  DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_and), OR32_W_FLAG },
251 
{ "l.ori",     "rD,rA,K",      "10 0xA  DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_or), 0  },
252 
{ "l.xori",    "rD,rA,I",      "10 0xB  DDDDD AAAAA IIII IIII IIII IIII", EF(l_xor), 0 },
253 
{ "l.muli",    "rD,rA,I",      "10 0xC  DDDDD AAAAA IIII IIII IIII IIII", EF(l_mul), 0 },
254 
{ "l.mfspr",   "rD,rA,K",      "10 0xD  DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_mfspr), 0 },
255 
{ "l.slli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 00LL LLLL", EF(l_sll), 0 },
256 
{ "l.srli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 01LL LLLL", EF(l_srl), 0 },
257 
{ "l.srai",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 10LL LLLL", EF(l_sra), 0 },
258 
{ "l.rori",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 11LL LLLL", EFI, 0 },
259 1181 sfurman 
 
260 1183 sfurman 
{ "l.sfeqi",   "rA,I",         "10 0xF  00000 AAAAA IIII IIII IIII IIII", EF(l_sfeq), OR32_W_FLAG },
261 
{ "l.sfnei",   "rA,I",         "10 0xF  00001 AAAAA IIII IIII IIII IIII", EF(l_sfne), OR32_W_FLAG },
262 
{ "l.sfgtui",  "rA,I",         "10 0xF  00010 AAAAA IIII IIII IIII IIII", EF(l_sfgtu), OR32_W_FLAG },
263 
{ "l.sfgeui",  "rA,I",         "10 0xF  00011 AAAAA IIII IIII IIII IIII", EF(l_sfgeu), OR32_W_FLAG },
264 
{ "l.sfltui",  "rA,I",         "10 0xF  00100 AAAAA IIII IIII IIII IIII", EF(l_sfltu), OR32_W_FLAG },
265 
{ "l.sfleui",  "rA,I",         "10 0xF  00101 AAAAA IIII IIII IIII IIII", EF(l_sfleu), OR32_W_FLAG },
266 
{ "l.sfgtsi",  "rA,I",         "10 0xF  01010 AAAAA IIII IIII IIII IIII", EF(l_sfgts), OR32_W_FLAG },
267 
{ "l.sfgesi",  "rA,I",         "10 0xF  01011 AAAAA IIII IIII IIII IIII", EF(l_sfges), OR32_W_FLAG },
268 
{ "l.sfltsi",  "rA,I",         "10 0xF  01100 AAAAA IIII IIII IIII IIII", EF(l_sflts), OR32_W_FLAG },
269 
{ "l.sflesi",  "rA,I",         "10 0xF  01101 AAAAA IIII IIII IIII IIII", EF(l_sfles), OR32_W_FLAG },
270 1181 sfurman 
 
271 1183 sfurman 
{ "l.mtspr",   "rA,rB,K",      "11 0x0  KKKKK AAAAA BBBB BKKK KKKK KKKK", EF(l_mtspr), 0 },
272 
{ "l.mac",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x1", EF(l_mac), 0 }, /*MM*/
273 
{ "l.msb",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x2", EF(l_msb), 0 }, /*MM*/
274 1181 sfurman 
 
275 1183 sfurman 
{ "l.sd",      "I(rA),rB",     "11 0x4  IIIII AAAAA BBBB BIII IIII IIII", EFI, 0 },
276 
{ "l.sw",      "I(rA),rB",     "11 0x5  IIIII AAAAA BBBB BIII IIII IIII", EF(l_sw), 0 },
277 
{ "l.sb",      "I(rA),rB",     "11 0x6  IIIII AAAAA BBBB BIII IIII IIII", EF(l_sb), 0 },
278 
{ "l.sh",      "I(rA),rB",     "11 0x7  IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 },
279 1181 sfurman 
 
280 1183 sfurman 
{ "l.add",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), OR32_W_FLAG },
281 
{ "l.addc",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 },
282 
{ "l.sub",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
283 
{ "l.and",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), OR32_W_FLAG },
284 
{ "l.or",      "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },
285 
{ "l.xor",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x5", EF(l_xor), 0 },
286 
{ "l.mul",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x6", EF(l_mul), 0 },
287 1181 sfurman 
 
288 1183 sfurman 
{ "l.sll",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 00-- 0x8", EF(l_sll), 0 },
289 
{ "l.srl",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 01-- 0x8", EF(l_srl), 0 },
290 
{ "l.sra",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 10-- 0x8", EF(l_sra), 0 },
291 
{ "l.ror",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 11-- 0x8", EFI, 0 },
292 
{ "l.div",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x9", EF(l_div), 0 },
293 
{ "l.divu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xA", EF(l_divu), 0 },
294 
{ "l.mulu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xB", EFI, 0 },
295 
{ "l.extbs",   "rD,rA,rB",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xC", EF(l_extbs), 0 },
296 
{ "l.exths",   "rD,rA,rB",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xC", EF(l_exths), 0 },
297 
{ "l.extws",   "rD,rA,rB",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xD", EF(l_extws), 0 },
298 
{ "l.extbz",   "rD,rA,rB",     "11 0x8  DDDDD AAAAA ---- --00 11-- 0xC", EF(l_extbz), 0 },
299 
{ "l.exthz",   "rD,rA,rB",     "11 0x8  DDDDD AAAAA ---- --00 10-- 0xC", EF(l_exthz), 0 },
300 
{ "l.extwz",   "rD,rA,rB",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xD", EF(l_extwz), 0 },
301 
{ "l.cmov",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xE", EF(l_cmov), OR32_R_FLAG },
302 
{ "l.ff1",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, 0 },
303 1181 sfurman 
 
304 1183 sfurman 
{ "l.sfeq",    "rA,rB",        "11 0x9  00000 AAAAA BBBB B--- ---- ----", EF(l_sfeq), OR32_W_FLAG },
305 
{ "l.sfne",    "rA,rB",        "11 0x9  00001 AAAAA BBBB B--- ---- ----", EF(l_sfne), OR32_W_FLAG },
306 
{ "l.sfgtu",   "rA,rB",        "11 0x9  00010 AAAAA BBBB B--- ---- ----", EF(l_sfgtu), OR32_W_FLAG },
307 
{ "l.sfgeu",   "rA,rB",        "11 0x9  00011 AAAAA BBBB B--- ---- ----", EF(l_sfgeu), OR32_W_FLAG },
308 
{ "l.sfltu",   "rA,rB",        "11 0x9  00100 AAAAA BBBB B--- ---- ----", EF(l_sfltu), OR32_W_FLAG },
309 
{ "l.sfleu",   "rA,rB",        "11 0x9  00101 AAAAA BBBB B--- ---- ----", EF(l_sfleu), OR32_W_FLAG },
310 
{ "l.sfgts",   "rA,rB",        "11 0x9  01010 AAAAA BBBB B--- ---- ----", EF(l_sfgts), OR32_W_FLAG },
311 
{ "l.sfges",   "rA,rB",        "11 0x9  01011 AAAAA BBBB B--- ---- ----", EF(l_sfges), OR32_W_FLAG },
312 
{ "l.sflts",   "rA,rB",        "11 0x9  01100 AAAAA BBBB B--- ---- ----", EF(l_sflts), OR32_W_FLAG },
313 
{ "l.sfles",   "rA,rB",        "11 0x9  01101 AAAAA BBBB B--- ---- ----", EF(l_sfles), OR32_W_FLAG },
314 
 
315 
{ "l.cust5",   "",             "11 0xC  ----- ----- ---- ---- ---- ----", EFI, 0 },
316 
{ "l.cust6",   "",             "11 0xD  ----- ----- ---- ---- ---- ----", EFI, 0 },
317 
{ "l.cust7",   "",             "11 0xE  ----- ----- ---- ---- ---- ----", EFI, 0 },
318 
{ "l.cust8",   "",             "11 0xF  ----- ----- ---- ---- ---- ----", EFI, 0 },
319 
 
320 
/* This section should not be defined in or1ksim, since it contains duplicates,
321 
   which would cause machine builder to complain.  */
322 1181 sfurman 
#ifdef HAS_CUST
323 1183 sfurman 
{ "l.cust5_1",   "rD",         "11 0xC  DDDDD ----- ---- ---- ---- ----", EFI, 0 },
324 
{ "l.cust5_2",   "rD,rA"   ,   "11 0xC  DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
325 
{ "l.cust5_3",   "rD,rA,rB",   "11 0xC  DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
326 1181 sfurman 
 
327 1183 sfurman 
{ "l.cust6_1",   "rD",         "11 0xD  DDDDD ----- ---- ---- ---- ----", EFI, 0 },
328 
{ "l.cust6_2",   "rD,rA"   ,   "11 0xD  DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
329 
{ "l.cust6_3",   "rD,rA,rB",   "11 0xD  DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
330 1181 sfurman 
 
331 1183 sfurman 
{ "l.cust7_1",   "rD",         "11 0xE  DDDDD ----- ---- ---- ---- ----", EFI, 0 },
332 
{ "l.cust7_2",   "rD,rA"   ,   "11 0xE  DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
333 
{ "l.cust7_3",   "rD,rA,rB",   "11 0xE  DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
334 1181 sfurman 
 
335 1183 sfurman 
{ "l.cust8_1",   "rD",         "11 0xF  DDDDD ----- ---- ---- ---- ----", EFI, 0 },
336 
{ "l.cust8_2",   "rD,rA"   ,   "11 0xF  DDDDD AAAAA ---- ---- ---- ----", EFI, 0 },
337 
{ "l.cust8_3",   "rD,rA,rB",   "11 0xF  DDDDD AAAAA BBBB B--- ---- ----", EFI, 0 },
338 1181 sfurman 
#endif
339 
 
340 1183 sfurman 
{ "", "", "", EFI, 0 }           /* Dummy entry, not included in num_opcodes.  This
341 
                           lets code examine entry i+1 without checking
342 
                           if we've run off the end of the table.  */
343 1181 sfurman 
};
344 
 
345 
#undef EFI
346 
#undef EFN
347 
#undef EF
348 
 
349 1183 sfurman 
/* **INDENT-ON** */
350 
 
351 1181 sfurman 
/* Define dummy, if debug is not defined.  */
352 
#if !defined HAS_DEBUG
353 1183 sfurman 
void debug(int level, const char *format, ...)
354 1181 sfurman 
{
355 
  /* Just to get rid of warnings.  */
356 1183 sfurman 
  format = level = 0;
357 1181 sfurman 
}
358 
#endif
359 
 
360 1183 sfurman 
CONST int num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1;
361 1181 sfurman 
 
362 1183 sfurman 
/* Calculates instruction length in bytes. Always 4 for OR32. */
363 1181 sfurman 
int
364 1183 sfurman 
insn_len(int insn_index)
365 1181 sfurman 
{
366 1183 sfurman 
  insn_index = 0; /* Just to get rid that warning.  */
367 1181 sfurman 
  return 4;
368 
}
369 
 
370 1183 sfurman 
/* Is individual insn's operand signed or unsigned? */
371 1181 sfurman 
int
372 1183 sfurman 
letter_signed(char l)
373 1181 sfurman 
{
374 1183 sfurman 
  CONST struct or32_letter *pletter;
375 1181 sfurman 
 
376 1183 sfurman 
  for(pletter = or32_letters; pletter->letter != '\0'; pletter++)
377 1181 sfurman 
    if (pletter->letter == l)
378 
      return pletter->sign;
379 
 
380 1183 sfurman 
  printf("letter_signed(%c): Unknown letter.\n", l);
381 1181 sfurman 
  return 0;
382 
}
383 
 
384 1183 sfurman 
/* Simple cache for letter ranges */
385 
static int range_cache[256] = {0};
386 1181 sfurman 
 
387 1183 sfurman 
/* Number of letters in the individual lettered operand. */
388 1181 sfurman 
int
389 1183 sfurman 
letter_range(char l)
390 1181 sfurman 
{
391 1183 sfurman 
  CONST struct or32_opcode *pinsn;
392 1181 sfurman 
  char *enc;
393 
  int range = 0;
394 1183 sfurman 
 
395 
  /* Is value cached? */
396 
  if (range = range_cache[(unsigned char)l]) return range;
397 1181 sfurman 
 
398 1183 sfurman 
  for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
399 1181 sfurman 
    {
400 1183 sfurman 
      if (strchr(pinsn->encoding,l))
401 1181 sfurman 
        {
402 
          for (enc = pinsn->encoding; *enc != '\0'; enc++)
403 
            if ((*enc == '0') && (*(enc+1) == 'x'))
404 
              enc += 2;
405 
            else if (*enc == l)
406 
              range++;
407 1183 sfurman 
          return range_cache[(unsigned char)l] = range;
408 1181 sfurman 
        }
409 
    }
410 1183 sfurman 
 
411 
  printf("\nABORT: letter_range(%c): Never used letter.\n", l);
412 
  exit(1);
413 1181 sfurman 
}
414 
 
415 
/* MM: Returns index of given instruction name.  */
416 
int
417 
insn_index (char *insn)
418 
{
419 1183 sfurman 
  int i, found = -1;
420 
  for (i = 0; i < num_opcodes; i++)
421 1181 sfurman 
    if (!strcmp (or32_opcodes[i].name, insn))
422 
      {
423 
        found = i;
424 
        break;
425 
      }
426 
  return found;
427 
}
428 
 
429 1183 sfurman 
/* Returns name of the specified instruction index */
430 
CONST char *
431 
insn_name(int index)
432 1181 sfurman 
{
433 1183 sfurman 
  if (index >= 0 && index < num_opcodes)
434 1181 sfurman 
    return or32_opcodes[index].name;
435 
  else
436 
    return "???";
437 
}
438 
 
439 
void
440 1183 sfurman 
l_none()
441 1181 sfurman 
{
442 
}
443 
 
444 1183 sfurman 
/*** Finite automata for instruction decoding building code ***/
445 1181 sfurman 
 
446 
/* Find simbols in encoding.  */
447 1183 sfurman 
unsigned long
448 
insn_extract(param_ch, enc_initial)
449 1181 sfurman 
     char param_ch;
450 
     char *enc_initial;
451 
{
452 
  char *enc;
453 
  unsigned long ret = 0;
454 
  unsigned opc_pos = 32;
455 
  for (enc = enc_initial; *enc != '\0'; )
456 1183 sfurman 
    if ((*enc == '0') && (*(enc+1) == 'x'))
457 1181 sfurman 
      {
458 1183 sfurman 
        unsigned long tmp = strtol(enc+2, NULL, 16);
459 1181 sfurman 
        opc_pos -= 4;
460 
        if (param_ch == '0' || param_ch == '1')
461 
          {
462 
            if (param_ch == '0')
463 
              tmp = 15 - tmp;
464 
            ret |= tmp << opc_pos;
465 
          }
466 
        enc += 3;
467 
      }
468 
    else
469 
      {
470 1183 sfurman 
        if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha(*enc) )
471 1181 sfurman 
          {
472 
            opc_pos--;
473 
            if (param_ch == *enc)
474 
              ret |= 1 << opc_pos;
475 
          }
476 
        enc++;
477 
      }
478 
  return ret;
479 
}
480 
 
481 
#define MAX_AUTOMATA_SIZE (1200)
482 
#define MAX_OP_TABLE_SIZE (1200)
483 
#define LEAF_FLAG         (0x80000000)
484 
#define MAX_LEN           (8)
485 
 
486 
#ifndef MIN
487 
# define MIN(x,y)          ((x) < (y) ? (x) : (y))
488 
#endif
489 
 
490 
unsigned long *automata;
491 
int nuncovered;
492 
int curpass = 0;
493 
 
494 
/* MM: Struct that hold runtime build information about instructions.  */
495 
struct temp_insn_struct
496 
{
497 
  unsigned long insn;
498 
  unsigned long insn_mask;
499 
  int in_pass;
500 
} *ti;
501 
 
502 
struct insn_op_struct *op_data, **op_start;
503 
 
504 
/* Recursive utility function used to find best match and to build automata.  */
505 
 
506 
static unsigned long *
507 1183 sfurman 
cover_insn (unsigned long *cur, int pass, unsigned int mask)
508 1181 sfurman 
{
509 1183 sfurman 
  int best_first = 0, best_len = 0, i, last_match = -1, ninstr = 0;
510 1181 sfurman 
  unsigned long cur_mask = mask;
511 
  unsigned long *next;
512 
 
513 1183 sfurman 
  for (i = 0; i < num_opcodes; i++)
514 1181 sfurman 
    if (ti[i].in_pass == pass)
515 
      {
516 
        cur_mask &= ti[i].insn_mask;
517 
        ninstr++;
518 
        last_match = i;
519 
      }
520 
 
521 1183 sfurman 
  debug(8, "%08X %08X\n", mask, cur_mask);
522 1181 sfurman 
  if (ninstr == 0)
523 
    return 0;
524 
  if (ninstr == 1)
525 
    {
526 1183 sfurman 
      /* Leaf holds instruction index. */
527 
      debug(8, "%i>I%i %s\n", cur - automata, last_match, or32_opcodes[last_match].name);
528 1181 sfurman 
      *cur = LEAF_FLAG | last_match;
529 
      cur++;
530 
      nuncovered--;
531 1183 sfurman 
    } else {
532 1181 sfurman 
      /* Find longest match.  */
533 
      for (i = 0; i < 32; i++)
534 
        {
535 1183 sfurman 
          int len;
536 
          for (len = best_len + 1; len < MIN(MAX_LEN, 33 - i); len++)
537 1181 sfurman 
            {
538 
              unsigned long m = (1UL << ((unsigned long)len)) - 1;
539 1183 sfurman 
              debug(9, " (%i(%08X & %08X>>%i = %08X, %08X)",len,m, cur_mask, i, (cur_mask >> (unsigned)i), (cur_mask >> (unsigned)i) & m);
540 1181 sfurman 
              if ((m & (cur_mask >> (unsigned)i)) == m)
541 
                {
542 
                  best_len = len;
543 
                  best_first = i;
544 1183 sfurman 
                  debug(9, "!");
545 1181 sfurman 
                }
546 
              else
547 
                break;
548 
            }
549 
        }
550 1183 sfurman 
      debug(9, "\n");
551 1181 sfurman 
      if (!best_len)
552 
        {
553 
          fprintf (stderr, "%i instructions match mask 0x%08X:\n", ninstr, mask);
554 1183 sfurman 
          for (i = 0; i < num_opcodes; i++)
555 1181 sfurman 
            if (ti[i].in_pass == pass)
556 
              fprintf (stderr, "%s ", or32_opcodes[i].name);
557 
 
558 
          fprintf (stderr, "\n");
559 
          exit (1);
560 
        }
561 1183 sfurman 
      debug(8, "%i> #### %i << %i (%i) ####\n", cur - automata, best_len, best_first, ninstr);
562 1181 sfurman 
      *cur = best_first;
563 
      cur++;
564 
      *cur = (1 << best_len) - 1;
565 
      cur++;
566 
      next = cur;
567 
      /* Allocate space for pointers.  */
568 
      cur += 1 << best_len;
569 
      cur_mask = (1 << (unsigned long)best_len) - 1;
570 
 
571 1183 sfurman 
      for (i = 0; i < (1 << (unsigned long)best_len); i++)
572 1181 sfurman 
        {
573 1183 sfurman 
          int j;
574 1181 sfurman 
          unsigned long *c;
575 
          curpass++;
576 1183 sfurman 
          for (j = 0; j < num_opcodes; j++)
577 1181 sfurman 
            if (ti[j].in_pass == pass
578 
                && ((ti[j].insn >> best_first) & cur_mask) == (unsigned long) i
579 
                && ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask)
580 
              ti[j].in_pass = curpass;
581 
 
582 1183 sfurman 
          debug(9, "%08X %08X %i\n", mask, cur_mask, best_first);
583 1181 sfurman 
          c = cover_insn (cur, curpass, mask & (~(cur_mask << best_first)));
584 
          if (c)
585 
            {
586 1183 sfurman 
              debug(8, "%i> #%X -> %u\n", next - automata, i, cur - automata);
587 1181 sfurman 
              *next = cur - automata;
588 
              cur = c;
589 
            }
590 
          else
591 
            {
592 1183 sfurman 
              debug(8, "%i> N/A\n", next - automata);
593 1181 sfurman 
              *next = 0;
594 
            }
595 
          next++;
596 
        }
597 
    }
598 
  return cur;
599 
}
600 
 
601 1183 sfurman 
/* Returns number of nonzero bits. */
602 1181 sfurman 
static int
603 1183 sfurman 
num_ones (unsigned long value)
604 1181 sfurman 
{
605 
  int c = 0;
606 
  while (value)
607 
    {
608 
      if (value & 1)
609 
        c++;
610 
      value >>= 1;
611 
    }
612 
  return c;
613 
}
614 
 
615 
/* Utility function, which converts parameters from or32_opcode format to more binary form.
616 
   Parameters are stored in ti struct.  */
617 
 
618 
static struct insn_op_struct *
619 1183 sfurman 
parse_params (CONST struct or32_opcode *opcode, struct insn_op_struct *cur)
620 1181 sfurman 
{
621 
  char *args = opcode->args;
622 
  int i, type;
623 
 
624 
  i = 0;
625 
  type = 0;
626 
  /* In case we don't have any parameters, we add dummy read from r0.  */
627 1183 sfurman 
  if (!(*args)) {
628 
    cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
629 
    cur->data = 0;
630 
    debug(9, "#%08X %08X\n", cur->type, cur->data);
631 
    cur++;
632 
    return cur;
633 1181 sfurman 
  }
634 
 
635 
  while (*args != '\0')
636 
    {
637 
      if (*args == 'r')
638 
        {
639 
          args++;
640 
          type |= OPTYPE_REG;
641 
        }
642 1183 sfurman 
      else if (isalpha (*args))
643 1181 sfurman 
        {
644 
          unsigned long arg;
645 1183 sfurman 
          arg = insn_extract(*args, opcode->encoding);
646 
          debug(9, "%s : %08X ------\n", opcode->name, arg);
647 1181 sfurman 
          if (letter_signed (*args))
648 
            {
649 
              type |= OPTYPE_SIG;
650 
              type |= ((num_ones (arg) - 1) << OPTYPE_SBIT_SHR) & OPTYPE_SBIT;
651 
            }
652 
 
653 
          /* Split argument to sequences of consecutive ones.  */
654 
          while (arg)
655 
            {
656 
              int shr = 0;
657 
              unsigned long tmp = arg, mask = 0;
658 
              while ((tmp & 1) == 0)
659 
                {
660 
                  shr++;
661 
                  tmp >>= 1;
662 
                }
663 
              while (tmp & 1)
664 
                {
665 
                  mask++;
666 
                  tmp >>= 1;
667 
                }
668 
              cur->type = type | shr;
669 
              cur->data = mask;
670 
              arg &= ~(((1 << mask) - 1) << shr);
671 1183 sfurman 
              debug(6, "|%08X %08X\n", cur->type, cur->data);
672 1181 sfurman 
              cur++;
673 
            }
674 
          args++;
675 
        }
676 
      else if (*args == '(')
677 
        {
678 
          /* Next param is displacement.  Later we will treat them as one operand.  */
679 
          cur--;
680 
          cur->type = type | cur->type | OPTYPE_DIS | OPTYPE_OP;
681 1183 sfurman 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
682 1181 sfurman 
          cur++;
683 
          type = 0;
684 
          i++;
685 
          args++;
686 
        }
687 
      else if (*args == OPERAND_DELIM)
688 
        {
689 
          cur--;
690 
          cur->type = type | cur->type | OPTYPE_OP;
691 1183 sfurman 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
692 1181 sfurman 
          cur++;
693 
          type = 0;
694 
          i++;
695 
          args++;
696 
        }
697 
      else if (*args == '0')
698 
        {
699 
          cur->type = type;
700 
          cur->data = 0;
701 1183 sfurman 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
702 1181 sfurman 
          cur++;
703 
          type = 0;
704 
          i++;
705 
          args++;
706 
        }
707 
      else if (*args == ')')
708 
        args++;
709 
      else
710 
        {
711 
          fprintf (stderr, "%s : parse error in args.\n", opcode->name);
712 
          exit (1);
713 
        }
714 
    }
715 
  cur--;
716 
  cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST;
717 1183 sfurman 
  debug(9, "#%08X %08X\n", cur->type, cur->data);
718 1181 sfurman 
  cur++;
719 
  return cur;
720 
}
721 
 
722 
/* Constructs new automata based on or32_opcodes array.  */
723 
 
724 
void
725 1183 sfurman 
build_automata()
726 1181 sfurman 
{
727 1183 sfurman 
  int i;
728 1181 sfurman 
  unsigned long *end;
729 
  struct insn_op_struct *cur;
730 
 
731 
  automata = (unsigned long *) malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long));
732 1183 sfurman 
  ti = (struct temp_insn_struct *) malloc (sizeof (struct temp_insn_struct) * num_opcodes);
733 1181 sfurman 
 
734 1183 sfurman 
  nuncovered = num_opcodes;
735 
 
736 
#ifdef HAS_EXECUTION
737 
  printf("Building automata... ");
738 
#endif
739 
 
740 1181 sfurman 
  /* Build temporary information about instructions.  */
741 1183 sfurman 
  for (i = 0; i < num_opcodes; i++)
742 1181 sfurman 
    {
743 
      unsigned long ones, zeros;
744 
      char *encoding = or32_opcodes[i].encoding;
745 
      ones  = insn_extract('1', encoding);
746 
      zeros = insn_extract('0', encoding);
747 
      ti[i].insn_mask = ones | zeros;
748 
      ti[i].insn = ones;
749 
      ti[i].in_pass = curpass = 0;
750 
      /*debug(9, "%s: %s %08X %08X\n", or32_opcodes[i].name,
751 
        or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/
752 
    }
753 
 
754 
  /* Until all are covered search for best criteria to separate them.  */
755 
  end = cover_insn (automata, curpass, 0xFFFFFFFF);
756 
  if (end - automata > MAX_AUTOMATA_SIZE)
757 
    {
758 
      fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE.");
759 
      exit (1);
760 
    }
761 1183 sfurman 
#ifdef HAS_EXECUTION
762 
  printf("done, num uncovered: %i/%i.\n", nuncovered, num_opcodes);
763 
#endif
764 1181 sfurman 
 
765 1183 sfurman 
#ifdef HAS_EXECUTION
766 
  printf("Parsing operands data... ");
767 
#endif
768 1181 sfurman 
  op_data = (struct insn_op_struct *) malloc (MAX_OP_TABLE_SIZE * sizeof (struct insn_op_struct));
769 1183 sfurman 
  op_start = (struct insn_op_struct **) malloc (num_opcodes * sizeof (struct insn_op_struct *));
770 1181 sfurman 
  cur = op_data;
771 1183 sfurman 
  for (i = 0; i < num_opcodes; i++)
772 1181 sfurman 
    {
773 
      op_start[i] = cur;
774 
      cur = parse_params (&or32_opcodes[i], cur);
775 
      if (cur - op_data > MAX_OP_TABLE_SIZE)
776 
        {
777 
          fprintf (stderr, "Operands table too small, increase MAX_OP_TABLE_SIZE.\n");
778 
          exit (1);
779 
        }
780 
    }
781 1183 sfurman 
#ifdef HAS_EXECUTION
782 
  printf("done.\n");
783 
#endif
784 1181 sfurman 
}
785 
 
786 1183 sfurman 
void destruct_automata ()
787 1181 sfurman 
{
788 
  free (ti);
789 
  free (automata);
790 
  free (op_data);
791 
  free (op_start);
792 
}
793 
 
794 
/* Decodes instruction and returns instruction index.  */
795 1183 sfurman 
int insn_decode (unsigned int insn)
796 1181 sfurman 
{
797 
  unsigned long *a = automata;
798 
  int i;
799 
  while (!(*a & LEAF_FLAG))
800 
    {
801 
      unsigned int first = *a;
802 1183 sfurman 
      //debug(9, "%i ", a - automata);
803 1181 sfurman 
      a++;
804 
      i = (insn >> first) & *a;
805 
      a++;
806 
      if (!*(a + i))
807 1183 sfurman 
        { /* Invalid instruction found?  */
808 
          //debug(9, "XXX\n", i);
809 1181 sfurman 
          return -1;
810 
        }
811 
      a = automata + *(a + i);
812 
    }
813 
  i = *a & ~LEAF_FLAG;
814 1183 sfurman 
  //debug(9, "%i\n", i);
815 1181 sfurman 
  /* Final check - do we have direct match?
816 
     (based on or32_opcodes this should be the only possibility,
817 
     but in case of invalid/missing instruction we must perform a check)  */
818 
  if ((ti[i].insn_mask & insn) == ti[i].insn)
819 
    return i;
820 
  else
821 
    return -1;
822 
}
823 
 
824 
static char disassembled_str[50];
825 
char *disassembled = &disassembled_str[0];
826 
 
827 
/* Automagically does zero- or sign- extension and also finds correct
828 
   sign bit position if sign extension is correct extension. Which extension
829 1183 sfurman 
   is proper is figured out from letter description. */
830 1181 sfurman 
 
831 1183 sfurman 
unsigned long
832 
extend_imm(unsigned long imm, char l)
833 1181 sfurman 
{
834 
  unsigned long mask;
835 
  int letter_bits;
836 
 
837 
  /* First truncate all bits above valid range for this letter
838 1183 sfurman 
     in case it is zero extend. */
839 
  letter_bits = letter_range(l);
840 1181 sfurman 
  mask = (1 << letter_bits) - 1;
841 
  imm &= mask;
842 
 
843 1183 sfurman 
  /* Do sign extend if this is the right one. */
844 1181 sfurman 
  if (letter_signed(l) && (imm >> (letter_bits - 1)))
845 
    imm |= (~mask);
846 
 
847 
  return imm;
848 
}
849 
 
850 1183 sfurman 
unsigned long
851 
or32_extract(param_ch, enc_initial, insn)
852 1181 sfurman 
     char param_ch;
853 
     char *enc_initial;
854 
     unsigned long insn;
855 
{
856 
  char *enc;
857 
  unsigned long ret = 0;
858 
  int opc_pos = 0;
859 
  int param_pos = 0;
860 
 
861 
  for (enc = enc_initial; *enc != '\0'; enc++)
862 
    if (*enc == param_ch)
863 
      {
864 
        if (enc - 2 >= enc_initial && (*(enc - 2) == '0') && (*(enc - 1) == 'x'))
865 
          continue;
866 
        else
867 
          param_pos++;
868 
      }
869 
 
870 
#if DEBUG
871 1183 sfurman 
  printf("or32_extract: %x ", param_pos);
872 1181 sfurman 
#endif
873 
  opc_pos = 32;
874 
  for (enc = enc_initial; *enc != '\0'; )
875 1183 sfurman 
    if ((*enc == '0') && (*(enc+1) == 'x'))
876 1181 sfurman 
      {
877 
        opc_pos -= 4;
878 
        if ((param_ch == '0') || (param_ch == '1'))
879 
          {
880 1183 sfurman 
            unsigned long tmp = strtol(enc, NULL, 16);
881 1181 sfurman 
#if DEBUG
882 1183 sfurman 
            printf(" enc=%s, tmp=%x ", enc, tmp);
883 1181 sfurman 
#endif
884 
            if (param_ch == '0')
885 
              tmp = 15 - tmp;
886 
            ret |= tmp << opc_pos;
887 
          }
888 
        enc += 3;
889 
      }
890 
    else if ((*enc == '0') || (*enc == '1'))
891 
      {
892 
        opc_pos--;
893 
        if (param_ch == *enc)
894 
          ret |= 1 << opc_pos;
895 
        enc++;
896 
      }
897 
    else if (*enc == param_ch)
898 
      {
899 
        opc_pos--;
900 
        param_pos--;
901 
#if DEBUG
902 1183 sfurman 
        printf("\n  ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos);
903 1181 sfurman 
#endif
904 1183 sfurman 
        if (islower(param_ch))
905 1181 sfurman 
          ret -= ((insn >> opc_pos) & 0x1) << param_pos;
906 
        else
907 
          ret += ((insn >> opc_pos) & 0x1) << param_pos;
908 
        enc++;
909 
      }
910 1183 sfurman 
    else if (isalpha(*enc))
911 1181 sfurman 
      {
912 
        opc_pos--;
913 
        enc++;
914 
      }
915 
    else if (*enc == '-')
916 
      {
917 
        opc_pos--;
918 
        enc++;
919 
      }
920 
    else
921 
      enc++;
922 
 
923 
#if DEBUG
924 
  printf ("ret=%x\n", ret);
925 
#endif
926 
  return ret;
927 
}
928 
 
929 1183 sfurman 
/* Print register. Used only by print_insn. */
930 1181 sfurman 
 
931 1183 sfurman 
static char *
932 
or32_print_register (dest, param_ch, encoding, insn)
933 
     char *dest;
934 1181 sfurman 
     char param_ch;
935 
     char *encoding;
936 
     unsigned long insn;
937 
{
938 
  int regnum = or32_extract(param_ch, encoding, insn);
939 
 
940 1183 sfurman 
  sprintf (dest, "r%d", regnum);
941 
  while (*dest) dest++;
942 
  return dest;
943 1181 sfurman 
}
944 
 
945 1183 sfurman 
/* Print immediate. Used only by print_insn. */
946 1181 sfurman 
 
947 1183 sfurman 
static char *
948 
or32_print_immediate (dest, param_ch, encoding, insn)
949 
     char *dest;
950 1181 sfurman 
     char param_ch;
951 
     char *encoding;
952 
     unsigned long insn;
953 
{
954 
  int imm = or32_extract (param_ch, encoding, insn);
955 
 
956 1183 sfurman 
  imm = extend_imm(imm, param_ch);
957 1181 sfurman 
 
958 1183 sfurman 
  if (letter_signed(param_ch))
959 1181 sfurman 
    {
960 
      if (imm < 0)
961 1183 sfurman 
        sprintf (dest, "%d", imm);
962 1181 sfurman 
      else
963 1183 sfurman 
        sprintf (dest, "0x%x", imm);
964 1181 sfurman 
    }
965 
  else
966 1183 sfurman 
    sprintf (dest, "%#x", imm);
967 
  while (*dest) dest++;
968 
  return dest;
969 1181 sfurman 
}
970 
 
971 
/* Disassemble one instruction from insn to disassemble.
972 
   Return the size of the instruction.  */
973 
 
974 
int
975 
disassemble_insn (insn)
976 
     unsigned long insn;
977 
{
978 
  int index;
979 1183 sfurman 
  return disassemble_index (insn, insn_decode (insn));
980 
}
981 1181 sfurman 
 
982 1183 sfurman 
/* Disassemble one instruction from insn index.
983 
   Return the size of the instruction.  */
984 
 
985 
int
986 
disassemble_index (insn, index)
987 
     unsigned long insn;
988 
     int index;
989 
{
990 
  char *dest = disassembled;
991 1181 sfurman 
  if (index >= 0)
992 
    {
993 
      struct or32_opcode const *opcode = &or32_opcodes[index];
994 
      char *s;
995 
 
996 1183 sfurman 
      strcpy (dest, opcode->name);
997 
      while (*dest) dest++;
998 
      *dest++ = ' ';
999 
      *dest = 0;
1000 
 
1001 1181 sfurman 
      for (s = opcode->args; *s != '\0'; ++s)
1002 
        {
1003 
          switch (*s)
1004 
            {
1005 
            case '\0':
1006 1183 sfurman 
              return insn_len (insn);
1007 
 
1008 1181 sfurman 
            case 'r':
1009 1183 sfurman 
              dest = or32_print_register(dest, *++s, opcode->encoding, insn);
1010 1181 sfurman 
              break;
1011 1183 sfurman 
 
1012 1181 sfurman 
            default:
1013 
              if (strchr (opcode->encoding, *s))
1014 1183 sfurman 
                dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
1015 
              else {
1016 
                *dest++ = *s;
1017 
                *dest = 0;
1018 
              }
1019 1181 sfurman 
            }
1020 
        }
1021 
    }
1022 
  else
1023 
    {
1024 
      /* This used to be %8x for binutils.  */
1025 1183 sfurman 
      sprintf(dest, ".word 0x%08x", insn);
1026 
      while (*dest) dest++;
1027 1181 sfurman 
    }
1028 
  return insn_len (insn);
1029 
}

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