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[/] [or1k/] [trunk/] [gdb-5.3/] [sim/] [arm/] [tconfig.in] - Blame information for rev 1765
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/* ARM target configuration file. */
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/* Define this if the simulator supports profiling.
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See the mips simulator for an example.
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This enables the `-p foo' and `-s bar' options.
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The target is required to provide sim_set_profile{,_size}. */
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/* #define SIM_HAVE_PROFILE */
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/* Define this if the simulator uses an instruction cache.
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See the h8/300 simulator for an example.
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This enables the `-c size' option to set the size of the cache.
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The target is required to provide sim_set_simcache_size. */
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/* #define SIM_HAVE_SIMCACHE */
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/* Define this if the target cpu is bi-endian
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and the simulator supports it. */
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#define SIM_HAVE_BIENDIAN
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