URL
https://opencores.org/ocsvn/or1k/or1k/trunk
[/] [or1k/] [trunk/] [gdb-5.3/] [sim/] [common/] [sim-info.c] - Blame information for rev 1181
Go to most recent revision |
Details |
Compare with Previous |
View Log
Line No. |
Rev |
Author |
Line |
1 |
1181 |
sfurman |
/* Generic memory read/write for hardware simulator models.
|
2 |
|
|
Copyright (C) 1998 Free Software Foundation, Inc.
|
3 |
|
|
Contributed by Cygnus Support.
|
4 |
|
|
|
5 |
|
|
This file is part of GDB, the GNU debugger.
|
6 |
|
|
|
7 |
|
|
This program is free software; you can redistribute it and/or modify
|
8 |
|
|
it under the terms of the GNU General Public License as published by
|
9 |
|
|
the Free Software Foundation; either version 2, or (at your option)
|
10 |
|
|
any later version.
|
11 |
|
|
|
12 |
|
|
This program is distributed in the hope that it will be useful,
|
13 |
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
14 |
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
15 |
|
|
GNU General Public License for more details.
|
16 |
|
|
|
17 |
|
|
You should have received a copy of the GNU General Public License along
|
18 |
|
|
with this program; if not, write to the Free Software Foundation, Inc.,
|
19 |
|
|
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
20 |
|
|
|
21 |
|
|
#include "sim-main.h"
|
22 |
|
|
#include "sim-assert.h"
|
23 |
|
|
|
24 |
|
|
/* Generic implementation of sim_info that works with simulators using
|
25 |
|
|
sim-module. */
|
26 |
|
|
|
27 |
|
|
void
|
28 |
|
|
sim_info (SIM_DESC sd, int verbose)
|
29 |
|
|
{
|
30 |
|
|
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
|
31 |
|
|
sim_module_info (sd, verbose || STATE_VERBOSE_P (sd));
|
32 |
|
|
}
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.