OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [gdb-5.3/] [sim/] [fr30/] [fr30-sim.h] - Blame information for rev 1782

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1181 sfurman
// OBSOLETE /* collection of junk waiting time to sort out
2
// OBSOLETE    Copyright (C) 1998, 1999 Free Software Foundation, Inc.
3
// OBSOLETE    Contributed by Cygnus Solutions.
4
// OBSOLETE 
5
// OBSOLETE This file is part of the GNU Simulators.
6
// OBSOLETE 
7
// OBSOLETE This program is free software; you can redistribute it and/or modify
8
// OBSOLETE it under the terms of the GNU General Public License as published by
9
// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
10
// OBSOLETE any later version.
11
// OBSOLETE 
12
// OBSOLETE This program is distributed in the hope that it will be useful,
13
// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
14
// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
// OBSOLETE GNU General Public License for more details.
16
// OBSOLETE 
17
// OBSOLETE You should have received a copy of the GNU General Public License along
18
// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
19
// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
20
// OBSOLETE 
21
// OBSOLETE #ifndef FR30_SIM_H
22
// OBSOLETE #define FR30_SIM_H
23
// OBSOLETE 
24
// OBSOLETE /* gdb register numbers */
25
// OBSOLETE #define PC_REGNUM   16
26
// OBSOLETE #define PS_REGNUM   17
27
// OBSOLETE #define TBR_REGNUM  18
28
// OBSOLETE #define RP_REGNUM   19
29
// OBSOLETE #define SSP_REGNUM  20
30
// OBSOLETE #define USP_REGNUM  21
31
// OBSOLETE #define MDH_REGNUM  22
32
// OBSOLETE #define MDL_REGNUM  23
33
// OBSOLETE 
34
// OBSOLETE extern BI fr30bf_h_sbit_get_handler (SIM_CPU *);
35
// OBSOLETE extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI);
36
// OBSOLETE 
37
// OBSOLETE extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *);
38
// OBSOLETE extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI);
39
// OBSOLETE 
40
// OBSOLETE extern UQI fr30bf_h_scr_get_handler (SIM_CPU *);
41
// OBSOLETE extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI);
42
// OBSOLETE 
43
// OBSOLETE extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *);
44
// OBSOLETE extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI);
45
// OBSOLETE 
46
// OBSOLETE extern USI fr30bf_h_ps_get_handler (SIM_CPU *);
47
// OBSOLETE extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI);
48
// OBSOLETE 
49
// OBSOLETE extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT);
50
// OBSOLETE extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI);
51
// OBSOLETE 
52
// OBSOLETE #define GETTWI GETTSI
53
// OBSOLETE #define SETTWI SETTSI
54
// OBSOLETE 
55
// OBSOLETE /* Hardware/device support.
56
// OBSOLETE    ??? Will eventually want to move device stuff to config files.  */
57
// OBSOLETE 
58
// OBSOLETE /* Special purpose traps.  */
59
// OBSOLETE #define TRAP_SYSCALL        10
60
// OBSOLETE #define TRAP_BREAKPOINT     9
61
// OBSOLETE 
62
// OBSOLETE /* Support for the MCCR register (Cache Control Register) is needed in order
63
// OBSOLETE    for overlays to work correctly with the scache: cached instructions need
64
// OBSOLETE    to be flushed when the instruction space is changed at runtime.  */
65
// OBSOLETE 
66
// OBSOLETE /* Cache Control Register */
67
// OBSOLETE #define MCCR_ADDR 0xffffffff
68
// OBSOLETE #define MCCR_CP 0x80
69
// OBSOLETE /* not supported */
70
// OBSOLETE #define MCCR_CM0 2
71
// OBSOLETE #define MCCR_CM1 1
72
// OBSOLETE 
73
// OBSOLETE /* Serial device addresses.  */
74
// OBSOLETE /* These are the values for the MSA2000 board.
75
// OBSOLETE    ??? Will eventually need to move this to a config file.  */
76
// OBSOLETE #define UART_INCHAR_ADDR    0xff004009
77
// OBSOLETE #define UART_OUTCHAR_ADDR   0xff004007
78
// OBSOLETE #define UART_STATUS_ADDR    0xff004002
79
// OBSOLETE 
80
// OBSOLETE #define UART_INPUT_READY    0x4
81
// OBSOLETE #define UART_OUTPUT_READY   0x1
82
// OBSOLETE 
83
// OBSOLETE /* Start address and length of all device support.  */
84
// OBSOLETE #define FR30_DEVICE_ADDR    0xff000000
85
// OBSOLETE #define FR30_DEVICE_LEN             0x00ffffff
86
// OBSOLETE 
87
// OBSOLETE /* sim_core_attach device argument.  */
88
// OBSOLETE extern device fr30_devices;
89
// OBSOLETE 
90
// OBSOLETE /* FIXME: Temporary, until device support ready.  */
91
// OBSOLETE struct _device { int foo; };
92
// OBSOLETE 
93
// OBSOLETE /* Handle the trap insn.  */
94
// OBSOLETE USI fr30_int (SIM_CPU *, PCADDR, int);
95
// OBSOLETE 
96
// OBSOLETE #endif /* FR30_SIM_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.