1 |
1181 |
sfurman |
/* Simulator instruction semantics for i960base.
|
2 |
|
|
|
3 |
|
|
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
4 |
|
|
|
5 |
|
|
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
|
6 |
|
|
|
7 |
|
|
This file is part of the GNU Simulators.
|
8 |
|
|
|
9 |
|
|
This program is free software; you can redistribute it and/or modify
|
10 |
|
|
it under the terms of the GNU General Public License as published by
|
11 |
|
|
the Free Software Foundation; either version 2, or (at your option)
|
12 |
|
|
any later version.
|
13 |
|
|
|
14 |
|
|
This program is distributed in the hope that it will be useful,
|
15 |
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
16 |
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
17 |
|
|
GNU General Public License for more details.
|
18 |
|
|
|
19 |
|
|
You should have received a copy of the GNU General Public License along
|
20 |
|
|
with this program; if not, write to the Free Software Foundation, Inc.,
|
21 |
|
|
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
22 |
|
|
|
23 |
|
|
*/
|
24 |
|
|
|
25 |
|
|
#define WANT_CPU i960base
|
26 |
|
|
#define WANT_CPU_I960BASE
|
27 |
|
|
|
28 |
|
|
#include "sim-main.h"
|
29 |
|
|
#include "cgen-mem.h"
|
30 |
|
|
#include "cgen-ops.h"
|
31 |
|
|
|
32 |
|
|
#undef GET_ATTR
|
33 |
|
|
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
|
34 |
|
|
|
35 |
|
|
/* This is used so that we can compile two copies of the semantic code,
|
36 |
|
|
one with full feature support and one without that runs fast(er).
|
37 |
|
|
FAST_P, when desired, is defined on the command line, -DFAST_P=1. */
|
38 |
|
|
#if FAST_P
|
39 |
|
|
#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
|
40 |
|
|
#undef TRACE_RESULT
|
41 |
|
|
#define TRACE_RESULT(cpu, abuf, name, type, val)
|
42 |
|
|
#else
|
43 |
|
|
#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
|
44 |
|
|
#endif
|
45 |
|
|
|
46 |
|
|
/* x-invalid: --invalid-- */
|
47 |
|
|
|
48 |
|
|
static SEM_PC
|
49 |
|
|
SEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
50 |
|
|
{
|
51 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
52 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
53 |
|
|
int UNUSED written = 0;
|
54 |
|
|
IADDR UNUSED pc = abuf->addr;
|
55 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
|
56 |
|
|
|
57 |
|
|
{
|
58 |
|
|
/* Update the recorded pc in the cpu state struct.
|
59 |
|
|
Only necessary for WITH_SCACHE case, but to avoid the
|
60 |
|
|
conditional compilation .... */
|
61 |
|
|
SET_H_PC (pc);
|
62 |
|
|
/* Virtual insns have zero size. Overwrite vpc with address of next insn
|
63 |
|
|
using the default-insn-bitsize spec. When executing insns in parallel
|
64 |
|
|
we may want to queue the fault and continue execution. */
|
65 |
|
|
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
66 |
|
|
vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
|
67 |
|
|
}
|
68 |
|
|
|
69 |
|
|
return vpc;
|
70 |
|
|
#undef FLD
|
71 |
|
|
}
|
72 |
|
|
|
73 |
|
|
/* x-after: --after-- */
|
74 |
|
|
|
75 |
|
|
static SEM_PC
|
76 |
|
|
SEM_FN_NAME (i960base,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
77 |
|
|
{
|
78 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
79 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
80 |
|
|
int UNUSED written = 0;
|
81 |
|
|
IADDR UNUSED pc = abuf->addr;
|
82 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
|
83 |
|
|
|
84 |
|
|
{
|
85 |
|
|
#if WITH_SCACHE_PBB_I960BASE
|
86 |
|
|
i960base_pbb_after (current_cpu, sem_arg);
|
87 |
|
|
#endif
|
88 |
|
|
}
|
89 |
|
|
|
90 |
|
|
return vpc;
|
91 |
|
|
#undef FLD
|
92 |
|
|
}
|
93 |
|
|
|
94 |
|
|
/* x-before: --before-- */
|
95 |
|
|
|
96 |
|
|
static SEM_PC
|
97 |
|
|
SEM_FN_NAME (i960base,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
98 |
|
|
{
|
99 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
100 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
101 |
|
|
int UNUSED written = 0;
|
102 |
|
|
IADDR UNUSED pc = abuf->addr;
|
103 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
|
104 |
|
|
|
105 |
|
|
{
|
106 |
|
|
#if WITH_SCACHE_PBB_I960BASE
|
107 |
|
|
i960base_pbb_before (current_cpu, sem_arg);
|
108 |
|
|
#endif
|
109 |
|
|
}
|
110 |
|
|
|
111 |
|
|
return vpc;
|
112 |
|
|
#undef FLD
|
113 |
|
|
}
|
114 |
|
|
|
115 |
|
|
/* x-cti-chain: --cti-chain-- */
|
116 |
|
|
|
117 |
|
|
static SEM_PC
|
118 |
|
|
SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
119 |
|
|
{
|
120 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
121 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
122 |
|
|
int UNUSED written = 0;
|
123 |
|
|
IADDR UNUSED pc = abuf->addr;
|
124 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
|
125 |
|
|
|
126 |
|
|
{
|
127 |
|
|
#if WITH_SCACHE_PBB_I960BASE
|
128 |
|
|
#ifdef DEFINE_SWITCH
|
129 |
|
|
vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
|
130 |
|
|
pbb_br_type, pbb_br_npc);
|
131 |
|
|
BREAK (sem);
|
132 |
|
|
#else
|
133 |
|
|
/* FIXME: Allow provision of explicit ifmt spec in insn spec. */
|
134 |
|
|
vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
|
135 |
|
|
CPU_PBB_BR_TYPE (current_cpu),
|
136 |
|
|
CPU_PBB_BR_NPC (current_cpu));
|
137 |
|
|
#endif
|
138 |
|
|
#endif
|
139 |
|
|
}
|
140 |
|
|
|
141 |
|
|
return vpc;
|
142 |
|
|
#undef FLD
|
143 |
|
|
}
|
144 |
|
|
|
145 |
|
|
/* x-chain: --chain-- */
|
146 |
|
|
|
147 |
|
|
static SEM_PC
|
148 |
|
|
SEM_FN_NAME (i960base,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
149 |
|
|
{
|
150 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
151 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
152 |
|
|
int UNUSED written = 0;
|
153 |
|
|
IADDR UNUSED pc = abuf->addr;
|
154 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
|
155 |
|
|
|
156 |
|
|
{
|
157 |
|
|
#if WITH_SCACHE_PBB_I960BASE
|
158 |
|
|
vpc = i960base_pbb_chain (current_cpu, sem_arg);
|
159 |
|
|
#ifdef DEFINE_SWITCH
|
160 |
|
|
BREAK (sem);
|
161 |
|
|
#endif
|
162 |
|
|
#endif
|
163 |
|
|
}
|
164 |
|
|
|
165 |
|
|
return vpc;
|
166 |
|
|
#undef FLD
|
167 |
|
|
}
|
168 |
|
|
|
169 |
|
|
/* x-begin: --begin-- */
|
170 |
|
|
|
171 |
|
|
static SEM_PC
|
172 |
|
|
SEM_FN_NAME (i960base,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
173 |
|
|
{
|
174 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
175 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
176 |
|
|
int UNUSED written = 0;
|
177 |
|
|
IADDR UNUSED pc = abuf->addr;
|
178 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
|
179 |
|
|
|
180 |
|
|
{
|
181 |
|
|
#if WITH_SCACHE_PBB_I960BASE
|
182 |
|
|
#ifdef DEFINE_SWITCH
|
183 |
|
|
/* In the switch case FAST_P is a constant, allowing several optimizations
|
184 |
|
|
in any called inline functions. */
|
185 |
|
|
vpc = i960base_pbb_begin (current_cpu, FAST_P);
|
186 |
|
|
#else
|
187 |
|
|
vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
|
188 |
|
|
#endif
|
189 |
|
|
#endif
|
190 |
|
|
}
|
191 |
|
|
|
192 |
|
|
return vpc;
|
193 |
|
|
#undef FLD
|
194 |
|
|
}
|
195 |
|
|
|
196 |
|
|
/* mulo: mulo $src1, $src2, $dst */
|
197 |
|
|
|
198 |
|
|
static SEM_PC
|
199 |
|
|
SEM_FN_NAME (i960base,mulo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
200 |
|
|
{
|
201 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
202 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
203 |
|
|
int UNUSED written = 0;
|
204 |
|
|
IADDR UNUSED pc = abuf->addr;
|
205 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
206 |
|
|
|
207 |
|
|
{
|
208 |
|
|
SI opval = MULSI (* FLD (i_src1), * FLD (i_src2));
|
209 |
|
|
* FLD (i_dst) = opval;
|
210 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
211 |
|
|
}
|
212 |
|
|
|
213 |
|
|
return vpc;
|
214 |
|
|
#undef FLD
|
215 |
|
|
}
|
216 |
|
|
|
217 |
|
|
/* mulo1: mulo $lit1, $src2, $dst */
|
218 |
|
|
|
219 |
|
|
static SEM_PC
|
220 |
|
|
SEM_FN_NAME (i960base,mulo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
221 |
|
|
{
|
222 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
223 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
224 |
|
|
int UNUSED written = 0;
|
225 |
|
|
IADDR UNUSED pc = abuf->addr;
|
226 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
227 |
|
|
|
228 |
|
|
{
|
229 |
|
|
SI opval = MULSI (FLD (f_src1), * FLD (i_src2));
|
230 |
|
|
* FLD (i_dst) = opval;
|
231 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
232 |
|
|
}
|
233 |
|
|
|
234 |
|
|
return vpc;
|
235 |
|
|
#undef FLD
|
236 |
|
|
}
|
237 |
|
|
|
238 |
|
|
/* mulo2: mulo $src1, $lit2, $dst */
|
239 |
|
|
|
240 |
|
|
static SEM_PC
|
241 |
|
|
SEM_FN_NAME (i960base,mulo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
242 |
|
|
{
|
243 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
244 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
245 |
|
|
int UNUSED written = 0;
|
246 |
|
|
IADDR UNUSED pc = abuf->addr;
|
247 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
248 |
|
|
|
249 |
|
|
{
|
250 |
|
|
SI opval = MULSI (* FLD (i_src1), FLD (f_src2));
|
251 |
|
|
* FLD (i_dst) = opval;
|
252 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
253 |
|
|
}
|
254 |
|
|
|
255 |
|
|
return vpc;
|
256 |
|
|
#undef FLD
|
257 |
|
|
}
|
258 |
|
|
|
259 |
|
|
/* mulo3: mulo $lit1, $lit2, $dst */
|
260 |
|
|
|
261 |
|
|
static SEM_PC
|
262 |
|
|
SEM_FN_NAME (i960base,mulo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
263 |
|
|
{
|
264 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
265 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
266 |
|
|
int UNUSED written = 0;
|
267 |
|
|
IADDR UNUSED pc = abuf->addr;
|
268 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
269 |
|
|
|
270 |
|
|
{
|
271 |
|
|
SI opval = MULSI (FLD (f_src1), FLD (f_src2));
|
272 |
|
|
* FLD (i_dst) = opval;
|
273 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
274 |
|
|
}
|
275 |
|
|
|
276 |
|
|
return vpc;
|
277 |
|
|
#undef FLD
|
278 |
|
|
}
|
279 |
|
|
|
280 |
|
|
/* remo: remo $src1, $src2, $dst */
|
281 |
|
|
|
282 |
|
|
static SEM_PC
|
283 |
|
|
SEM_FN_NAME (i960base,remo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
284 |
|
|
{
|
285 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
286 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
287 |
|
|
int UNUSED written = 0;
|
288 |
|
|
IADDR UNUSED pc = abuf->addr;
|
289 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
290 |
|
|
|
291 |
|
|
{
|
292 |
|
|
SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1));
|
293 |
|
|
* FLD (i_dst) = opval;
|
294 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
295 |
|
|
}
|
296 |
|
|
|
297 |
|
|
return vpc;
|
298 |
|
|
#undef FLD
|
299 |
|
|
}
|
300 |
|
|
|
301 |
|
|
/* remo1: remo $lit1, $src2, $dst */
|
302 |
|
|
|
303 |
|
|
static SEM_PC
|
304 |
|
|
SEM_FN_NAME (i960base,remo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
305 |
|
|
{
|
306 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
307 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
308 |
|
|
int UNUSED written = 0;
|
309 |
|
|
IADDR UNUSED pc = abuf->addr;
|
310 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
311 |
|
|
|
312 |
|
|
{
|
313 |
|
|
SI opval = UMODSI (* FLD (i_src2), FLD (f_src1));
|
314 |
|
|
* FLD (i_dst) = opval;
|
315 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
316 |
|
|
}
|
317 |
|
|
|
318 |
|
|
return vpc;
|
319 |
|
|
#undef FLD
|
320 |
|
|
}
|
321 |
|
|
|
322 |
|
|
/* remo2: remo $src1, $lit2, $dst */
|
323 |
|
|
|
324 |
|
|
static SEM_PC
|
325 |
|
|
SEM_FN_NAME (i960base,remo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
326 |
|
|
{
|
327 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
328 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
329 |
|
|
int UNUSED written = 0;
|
330 |
|
|
IADDR UNUSED pc = abuf->addr;
|
331 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
332 |
|
|
|
333 |
|
|
{
|
334 |
|
|
SI opval = UMODSI (FLD (f_src2), * FLD (i_src1));
|
335 |
|
|
* FLD (i_dst) = opval;
|
336 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
337 |
|
|
}
|
338 |
|
|
|
339 |
|
|
return vpc;
|
340 |
|
|
#undef FLD
|
341 |
|
|
}
|
342 |
|
|
|
343 |
|
|
/* remo3: remo $lit1, $lit2, $dst */
|
344 |
|
|
|
345 |
|
|
static SEM_PC
|
346 |
|
|
SEM_FN_NAME (i960base,remo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
347 |
|
|
{
|
348 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
349 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
350 |
|
|
int UNUSED written = 0;
|
351 |
|
|
IADDR UNUSED pc = abuf->addr;
|
352 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
353 |
|
|
|
354 |
|
|
{
|
355 |
|
|
SI opval = UMODSI (FLD (f_src2), FLD (f_src1));
|
356 |
|
|
* FLD (i_dst) = opval;
|
357 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
358 |
|
|
}
|
359 |
|
|
|
360 |
|
|
return vpc;
|
361 |
|
|
#undef FLD
|
362 |
|
|
}
|
363 |
|
|
|
364 |
|
|
/* divo: divo $src1, $src2, $dst */
|
365 |
|
|
|
366 |
|
|
static SEM_PC
|
367 |
|
|
SEM_FN_NAME (i960base,divo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
368 |
|
|
{
|
369 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
370 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
371 |
|
|
int UNUSED written = 0;
|
372 |
|
|
IADDR UNUSED pc = abuf->addr;
|
373 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
374 |
|
|
|
375 |
|
|
{
|
376 |
|
|
SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1));
|
377 |
|
|
* FLD (i_dst) = opval;
|
378 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
379 |
|
|
}
|
380 |
|
|
|
381 |
|
|
return vpc;
|
382 |
|
|
#undef FLD
|
383 |
|
|
}
|
384 |
|
|
|
385 |
|
|
/* divo1: divo $lit1, $src2, $dst */
|
386 |
|
|
|
387 |
|
|
static SEM_PC
|
388 |
|
|
SEM_FN_NAME (i960base,divo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
389 |
|
|
{
|
390 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
391 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
392 |
|
|
int UNUSED written = 0;
|
393 |
|
|
IADDR UNUSED pc = abuf->addr;
|
394 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
395 |
|
|
|
396 |
|
|
{
|
397 |
|
|
SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1));
|
398 |
|
|
* FLD (i_dst) = opval;
|
399 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
400 |
|
|
}
|
401 |
|
|
|
402 |
|
|
return vpc;
|
403 |
|
|
#undef FLD
|
404 |
|
|
}
|
405 |
|
|
|
406 |
|
|
/* divo2: divo $src1, $lit2, $dst */
|
407 |
|
|
|
408 |
|
|
static SEM_PC
|
409 |
|
|
SEM_FN_NAME (i960base,divo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
410 |
|
|
{
|
411 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
412 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
413 |
|
|
int UNUSED written = 0;
|
414 |
|
|
IADDR UNUSED pc = abuf->addr;
|
415 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
416 |
|
|
|
417 |
|
|
{
|
418 |
|
|
SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1));
|
419 |
|
|
* FLD (i_dst) = opval;
|
420 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
421 |
|
|
}
|
422 |
|
|
|
423 |
|
|
return vpc;
|
424 |
|
|
#undef FLD
|
425 |
|
|
}
|
426 |
|
|
|
427 |
|
|
/* divo3: divo $lit1, $lit2, $dst */
|
428 |
|
|
|
429 |
|
|
static SEM_PC
|
430 |
|
|
SEM_FN_NAME (i960base,divo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
431 |
|
|
{
|
432 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
433 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
434 |
|
|
int UNUSED written = 0;
|
435 |
|
|
IADDR UNUSED pc = abuf->addr;
|
436 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
437 |
|
|
|
438 |
|
|
{
|
439 |
|
|
SI opval = UDIVSI (FLD (f_src2), FLD (f_src1));
|
440 |
|
|
* FLD (i_dst) = opval;
|
441 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
442 |
|
|
}
|
443 |
|
|
|
444 |
|
|
return vpc;
|
445 |
|
|
#undef FLD
|
446 |
|
|
}
|
447 |
|
|
|
448 |
|
|
/* remi: remi $src1, $src2, $dst */
|
449 |
|
|
|
450 |
|
|
static SEM_PC
|
451 |
|
|
SEM_FN_NAME (i960base,remi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
452 |
|
|
{
|
453 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
454 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
455 |
|
|
int UNUSED written = 0;
|
456 |
|
|
IADDR UNUSED pc = abuf->addr;
|
457 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
458 |
|
|
|
459 |
|
|
{
|
460 |
|
|
SI opval = MODSI (* FLD (i_src2), * FLD (i_src1));
|
461 |
|
|
* FLD (i_dst) = opval;
|
462 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
463 |
|
|
}
|
464 |
|
|
|
465 |
|
|
return vpc;
|
466 |
|
|
#undef FLD
|
467 |
|
|
}
|
468 |
|
|
|
469 |
|
|
/* remi1: remi $lit1, $src2, $dst */
|
470 |
|
|
|
471 |
|
|
static SEM_PC
|
472 |
|
|
SEM_FN_NAME (i960base,remi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
473 |
|
|
{
|
474 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
475 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
476 |
|
|
int UNUSED written = 0;
|
477 |
|
|
IADDR UNUSED pc = abuf->addr;
|
478 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
479 |
|
|
|
480 |
|
|
{
|
481 |
|
|
SI opval = MODSI (* FLD (i_src2), FLD (f_src1));
|
482 |
|
|
* FLD (i_dst) = opval;
|
483 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
484 |
|
|
}
|
485 |
|
|
|
486 |
|
|
return vpc;
|
487 |
|
|
#undef FLD
|
488 |
|
|
}
|
489 |
|
|
|
490 |
|
|
/* remi2: remi $src1, $lit2, $dst */
|
491 |
|
|
|
492 |
|
|
static SEM_PC
|
493 |
|
|
SEM_FN_NAME (i960base,remi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
494 |
|
|
{
|
495 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
496 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
497 |
|
|
int UNUSED written = 0;
|
498 |
|
|
IADDR UNUSED pc = abuf->addr;
|
499 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
500 |
|
|
|
501 |
|
|
{
|
502 |
|
|
SI opval = MODSI (FLD (f_src2), * FLD (i_src1));
|
503 |
|
|
* FLD (i_dst) = opval;
|
504 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
505 |
|
|
}
|
506 |
|
|
|
507 |
|
|
return vpc;
|
508 |
|
|
#undef FLD
|
509 |
|
|
}
|
510 |
|
|
|
511 |
|
|
/* remi3: remi $lit1, $lit2, $dst */
|
512 |
|
|
|
513 |
|
|
static SEM_PC
|
514 |
|
|
SEM_FN_NAME (i960base,remi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
515 |
|
|
{
|
516 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
517 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
518 |
|
|
int UNUSED written = 0;
|
519 |
|
|
IADDR UNUSED pc = abuf->addr;
|
520 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
521 |
|
|
|
522 |
|
|
{
|
523 |
|
|
SI opval = MODSI (FLD (f_src2), FLD (f_src1));
|
524 |
|
|
* FLD (i_dst) = opval;
|
525 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
526 |
|
|
}
|
527 |
|
|
|
528 |
|
|
return vpc;
|
529 |
|
|
#undef FLD
|
530 |
|
|
}
|
531 |
|
|
|
532 |
|
|
/* divi: divi $src1, $src2, $dst */
|
533 |
|
|
|
534 |
|
|
static SEM_PC
|
535 |
|
|
SEM_FN_NAME (i960base,divi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
536 |
|
|
{
|
537 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
538 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
539 |
|
|
int UNUSED written = 0;
|
540 |
|
|
IADDR UNUSED pc = abuf->addr;
|
541 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
542 |
|
|
|
543 |
|
|
{
|
544 |
|
|
SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1));
|
545 |
|
|
* FLD (i_dst) = opval;
|
546 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
547 |
|
|
}
|
548 |
|
|
|
549 |
|
|
return vpc;
|
550 |
|
|
#undef FLD
|
551 |
|
|
}
|
552 |
|
|
|
553 |
|
|
/* divi1: divi $lit1, $src2, $dst */
|
554 |
|
|
|
555 |
|
|
static SEM_PC
|
556 |
|
|
SEM_FN_NAME (i960base,divi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
557 |
|
|
{
|
558 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
559 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
560 |
|
|
int UNUSED written = 0;
|
561 |
|
|
IADDR UNUSED pc = abuf->addr;
|
562 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
563 |
|
|
|
564 |
|
|
{
|
565 |
|
|
SI opval = DIVSI (* FLD (i_src2), FLD (f_src1));
|
566 |
|
|
* FLD (i_dst) = opval;
|
567 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
568 |
|
|
}
|
569 |
|
|
|
570 |
|
|
return vpc;
|
571 |
|
|
#undef FLD
|
572 |
|
|
}
|
573 |
|
|
|
574 |
|
|
/* divi2: divi $src1, $lit2, $dst */
|
575 |
|
|
|
576 |
|
|
static SEM_PC
|
577 |
|
|
SEM_FN_NAME (i960base,divi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
578 |
|
|
{
|
579 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
580 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
581 |
|
|
int UNUSED written = 0;
|
582 |
|
|
IADDR UNUSED pc = abuf->addr;
|
583 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
584 |
|
|
|
585 |
|
|
{
|
586 |
|
|
SI opval = DIVSI (FLD (f_src2), * FLD (i_src1));
|
587 |
|
|
* FLD (i_dst) = opval;
|
588 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
589 |
|
|
}
|
590 |
|
|
|
591 |
|
|
return vpc;
|
592 |
|
|
#undef FLD
|
593 |
|
|
}
|
594 |
|
|
|
595 |
|
|
/* divi3: divi $lit1, $lit2, $dst */
|
596 |
|
|
|
597 |
|
|
static SEM_PC
|
598 |
|
|
SEM_FN_NAME (i960base,divi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
599 |
|
|
{
|
600 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
601 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
602 |
|
|
int UNUSED written = 0;
|
603 |
|
|
IADDR UNUSED pc = abuf->addr;
|
604 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
605 |
|
|
|
606 |
|
|
{
|
607 |
|
|
SI opval = DIVSI (FLD (f_src2), FLD (f_src1));
|
608 |
|
|
* FLD (i_dst) = opval;
|
609 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
610 |
|
|
}
|
611 |
|
|
|
612 |
|
|
return vpc;
|
613 |
|
|
#undef FLD
|
614 |
|
|
}
|
615 |
|
|
|
616 |
|
|
/* addo: addo $src1, $src2, $dst */
|
617 |
|
|
|
618 |
|
|
static SEM_PC
|
619 |
|
|
SEM_FN_NAME (i960base,addo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
620 |
|
|
{
|
621 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
622 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
623 |
|
|
int UNUSED written = 0;
|
624 |
|
|
IADDR UNUSED pc = abuf->addr;
|
625 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
626 |
|
|
|
627 |
|
|
{
|
628 |
|
|
SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2));
|
629 |
|
|
* FLD (i_dst) = opval;
|
630 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
631 |
|
|
}
|
632 |
|
|
|
633 |
|
|
return vpc;
|
634 |
|
|
#undef FLD
|
635 |
|
|
}
|
636 |
|
|
|
637 |
|
|
/* addo1: addo $lit1, $src2, $dst */
|
638 |
|
|
|
639 |
|
|
static SEM_PC
|
640 |
|
|
SEM_FN_NAME (i960base,addo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
641 |
|
|
{
|
642 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
643 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
644 |
|
|
int UNUSED written = 0;
|
645 |
|
|
IADDR UNUSED pc = abuf->addr;
|
646 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
647 |
|
|
|
648 |
|
|
{
|
649 |
|
|
SI opval = ADDSI (FLD (f_src1), * FLD (i_src2));
|
650 |
|
|
* FLD (i_dst) = opval;
|
651 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
652 |
|
|
}
|
653 |
|
|
|
654 |
|
|
return vpc;
|
655 |
|
|
#undef FLD
|
656 |
|
|
}
|
657 |
|
|
|
658 |
|
|
/* addo2: addo $src1, $lit2, $dst */
|
659 |
|
|
|
660 |
|
|
static SEM_PC
|
661 |
|
|
SEM_FN_NAME (i960base,addo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
662 |
|
|
{
|
663 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
664 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
665 |
|
|
int UNUSED written = 0;
|
666 |
|
|
IADDR UNUSED pc = abuf->addr;
|
667 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
668 |
|
|
|
669 |
|
|
{
|
670 |
|
|
SI opval = ADDSI (* FLD (i_src1), FLD (f_src2));
|
671 |
|
|
* FLD (i_dst) = opval;
|
672 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
673 |
|
|
}
|
674 |
|
|
|
675 |
|
|
return vpc;
|
676 |
|
|
#undef FLD
|
677 |
|
|
}
|
678 |
|
|
|
679 |
|
|
/* addo3: addo $lit1, $lit2, $dst */
|
680 |
|
|
|
681 |
|
|
static SEM_PC
|
682 |
|
|
SEM_FN_NAME (i960base,addo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
683 |
|
|
{
|
684 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
685 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
686 |
|
|
int UNUSED written = 0;
|
687 |
|
|
IADDR UNUSED pc = abuf->addr;
|
688 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
689 |
|
|
|
690 |
|
|
{
|
691 |
|
|
SI opval = ADDSI (FLD (f_src1), FLD (f_src2));
|
692 |
|
|
* FLD (i_dst) = opval;
|
693 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
694 |
|
|
}
|
695 |
|
|
|
696 |
|
|
return vpc;
|
697 |
|
|
#undef FLD
|
698 |
|
|
}
|
699 |
|
|
|
700 |
|
|
/* subo: subo $src1, $src2, $dst */
|
701 |
|
|
|
702 |
|
|
static SEM_PC
|
703 |
|
|
SEM_FN_NAME (i960base,subo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
704 |
|
|
{
|
705 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
706 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
707 |
|
|
int UNUSED written = 0;
|
708 |
|
|
IADDR UNUSED pc = abuf->addr;
|
709 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
710 |
|
|
|
711 |
|
|
{
|
712 |
|
|
SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1));
|
713 |
|
|
* FLD (i_dst) = opval;
|
714 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
715 |
|
|
}
|
716 |
|
|
|
717 |
|
|
return vpc;
|
718 |
|
|
#undef FLD
|
719 |
|
|
}
|
720 |
|
|
|
721 |
|
|
/* subo1: subo $lit1, $src2, $dst */
|
722 |
|
|
|
723 |
|
|
static SEM_PC
|
724 |
|
|
SEM_FN_NAME (i960base,subo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
725 |
|
|
{
|
726 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
727 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
728 |
|
|
int UNUSED written = 0;
|
729 |
|
|
IADDR UNUSED pc = abuf->addr;
|
730 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
731 |
|
|
|
732 |
|
|
{
|
733 |
|
|
SI opval = SUBSI (* FLD (i_src2), FLD (f_src1));
|
734 |
|
|
* FLD (i_dst) = opval;
|
735 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
736 |
|
|
}
|
737 |
|
|
|
738 |
|
|
return vpc;
|
739 |
|
|
#undef FLD
|
740 |
|
|
}
|
741 |
|
|
|
742 |
|
|
/* subo2: subo $src1, $lit2, $dst */
|
743 |
|
|
|
744 |
|
|
static SEM_PC
|
745 |
|
|
SEM_FN_NAME (i960base,subo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
746 |
|
|
{
|
747 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
748 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
749 |
|
|
int UNUSED written = 0;
|
750 |
|
|
IADDR UNUSED pc = abuf->addr;
|
751 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
752 |
|
|
|
753 |
|
|
{
|
754 |
|
|
SI opval = SUBSI (FLD (f_src2), * FLD (i_src1));
|
755 |
|
|
* FLD (i_dst) = opval;
|
756 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
757 |
|
|
}
|
758 |
|
|
|
759 |
|
|
return vpc;
|
760 |
|
|
#undef FLD
|
761 |
|
|
}
|
762 |
|
|
|
763 |
|
|
/* subo3: subo $lit1, $lit2, $dst */
|
764 |
|
|
|
765 |
|
|
static SEM_PC
|
766 |
|
|
SEM_FN_NAME (i960base,subo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
767 |
|
|
{
|
768 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
769 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
770 |
|
|
int UNUSED written = 0;
|
771 |
|
|
IADDR UNUSED pc = abuf->addr;
|
772 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
773 |
|
|
|
774 |
|
|
{
|
775 |
|
|
SI opval = SUBSI (FLD (f_src2), FLD (f_src1));
|
776 |
|
|
* FLD (i_dst) = opval;
|
777 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
778 |
|
|
}
|
779 |
|
|
|
780 |
|
|
return vpc;
|
781 |
|
|
#undef FLD
|
782 |
|
|
}
|
783 |
|
|
|
784 |
|
|
/* notbit: notbit $src1, $src2, $dst */
|
785 |
|
|
|
786 |
|
|
static SEM_PC
|
787 |
|
|
SEM_FN_NAME (i960base,notbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
788 |
|
|
{
|
789 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
790 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
791 |
|
|
int UNUSED written = 0;
|
792 |
|
|
IADDR UNUSED pc = abuf->addr;
|
793 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
794 |
|
|
|
795 |
|
|
{
|
796 |
|
|
SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2));
|
797 |
|
|
* FLD (i_dst) = opval;
|
798 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
799 |
|
|
}
|
800 |
|
|
|
801 |
|
|
return vpc;
|
802 |
|
|
#undef FLD
|
803 |
|
|
}
|
804 |
|
|
|
805 |
|
|
/* notbit1: notbit $lit1, $src2, $dst */
|
806 |
|
|
|
807 |
|
|
static SEM_PC
|
808 |
|
|
SEM_FN_NAME (i960base,notbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
809 |
|
|
{
|
810 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
811 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
812 |
|
|
int UNUSED written = 0;
|
813 |
|
|
IADDR UNUSED pc = abuf->addr;
|
814 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
815 |
|
|
|
816 |
|
|
{
|
817 |
|
|
SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2));
|
818 |
|
|
* FLD (i_dst) = opval;
|
819 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
820 |
|
|
}
|
821 |
|
|
|
822 |
|
|
return vpc;
|
823 |
|
|
#undef FLD
|
824 |
|
|
}
|
825 |
|
|
|
826 |
|
|
/* notbit2: notbit $src1, $lit2, $dst */
|
827 |
|
|
|
828 |
|
|
static SEM_PC
|
829 |
|
|
SEM_FN_NAME (i960base,notbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
830 |
|
|
{
|
831 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
832 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
833 |
|
|
int UNUSED written = 0;
|
834 |
|
|
IADDR UNUSED pc = abuf->addr;
|
835 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
836 |
|
|
|
837 |
|
|
{
|
838 |
|
|
SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2));
|
839 |
|
|
* FLD (i_dst) = opval;
|
840 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
841 |
|
|
}
|
842 |
|
|
|
843 |
|
|
return vpc;
|
844 |
|
|
#undef FLD
|
845 |
|
|
}
|
846 |
|
|
|
847 |
|
|
/* notbit3: notbit $lit1, $lit2, $dst */
|
848 |
|
|
|
849 |
|
|
static SEM_PC
|
850 |
|
|
SEM_FN_NAME (i960base,notbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
851 |
|
|
{
|
852 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
853 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
854 |
|
|
int UNUSED written = 0;
|
855 |
|
|
IADDR UNUSED pc = abuf->addr;
|
856 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
857 |
|
|
|
858 |
|
|
{
|
859 |
|
|
SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2));
|
860 |
|
|
* FLD (i_dst) = opval;
|
861 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
862 |
|
|
}
|
863 |
|
|
|
864 |
|
|
return vpc;
|
865 |
|
|
#undef FLD
|
866 |
|
|
}
|
867 |
|
|
|
868 |
|
|
/* and: and $src1, $src2, $dst */
|
869 |
|
|
|
870 |
|
|
static SEM_PC
|
871 |
|
|
SEM_FN_NAME (i960base,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
872 |
|
|
{
|
873 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
874 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
875 |
|
|
int UNUSED written = 0;
|
876 |
|
|
IADDR UNUSED pc = abuf->addr;
|
877 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
878 |
|
|
|
879 |
|
|
{
|
880 |
|
|
SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2));
|
881 |
|
|
* FLD (i_dst) = opval;
|
882 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
883 |
|
|
}
|
884 |
|
|
|
885 |
|
|
return vpc;
|
886 |
|
|
#undef FLD
|
887 |
|
|
}
|
888 |
|
|
|
889 |
|
|
/* and1: and $lit1, $src2, $dst */
|
890 |
|
|
|
891 |
|
|
static SEM_PC
|
892 |
|
|
SEM_FN_NAME (i960base,and1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
893 |
|
|
{
|
894 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
895 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
896 |
|
|
int UNUSED written = 0;
|
897 |
|
|
IADDR UNUSED pc = abuf->addr;
|
898 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
899 |
|
|
|
900 |
|
|
{
|
901 |
|
|
SI opval = ANDSI (FLD (f_src1), * FLD (i_src2));
|
902 |
|
|
* FLD (i_dst) = opval;
|
903 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
904 |
|
|
}
|
905 |
|
|
|
906 |
|
|
return vpc;
|
907 |
|
|
#undef FLD
|
908 |
|
|
}
|
909 |
|
|
|
910 |
|
|
/* and2: and $src1, $lit2, $dst */
|
911 |
|
|
|
912 |
|
|
static SEM_PC
|
913 |
|
|
SEM_FN_NAME (i960base,and2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
914 |
|
|
{
|
915 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
916 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
917 |
|
|
int UNUSED written = 0;
|
918 |
|
|
IADDR UNUSED pc = abuf->addr;
|
919 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
920 |
|
|
|
921 |
|
|
{
|
922 |
|
|
SI opval = ANDSI (* FLD (i_src1), FLD (f_src2));
|
923 |
|
|
* FLD (i_dst) = opval;
|
924 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
925 |
|
|
}
|
926 |
|
|
|
927 |
|
|
return vpc;
|
928 |
|
|
#undef FLD
|
929 |
|
|
}
|
930 |
|
|
|
931 |
|
|
/* and3: and $lit1, $lit2, $dst */
|
932 |
|
|
|
933 |
|
|
static SEM_PC
|
934 |
|
|
SEM_FN_NAME (i960base,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
935 |
|
|
{
|
936 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
937 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
938 |
|
|
int UNUSED written = 0;
|
939 |
|
|
IADDR UNUSED pc = abuf->addr;
|
940 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
941 |
|
|
|
942 |
|
|
{
|
943 |
|
|
SI opval = ANDSI (FLD (f_src1), FLD (f_src2));
|
944 |
|
|
* FLD (i_dst) = opval;
|
945 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
946 |
|
|
}
|
947 |
|
|
|
948 |
|
|
return vpc;
|
949 |
|
|
#undef FLD
|
950 |
|
|
}
|
951 |
|
|
|
952 |
|
|
/* andnot: andnot $src1, $src2, $dst */
|
953 |
|
|
|
954 |
|
|
static SEM_PC
|
955 |
|
|
SEM_FN_NAME (i960base,andnot) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
956 |
|
|
{
|
957 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
958 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
959 |
|
|
int UNUSED written = 0;
|
960 |
|
|
IADDR UNUSED pc = abuf->addr;
|
961 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
962 |
|
|
|
963 |
|
|
{
|
964 |
|
|
SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1)));
|
965 |
|
|
* FLD (i_dst) = opval;
|
966 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
967 |
|
|
}
|
968 |
|
|
|
969 |
|
|
return vpc;
|
970 |
|
|
#undef FLD
|
971 |
|
|
}
|
972 |
|
|
|
973 |
|
|
/* andnot1: andnot $lit1, $src2, $dst */
|
974 |
|
|
|
975 |
|
|
static SEM_PC
|
976 |
|
|
SEM_FN_NAME (i960base,andnot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
977 |
|
|
{
|
978 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
979 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
980 |
|
|
int UNUSED written = 0;
|
981 |
|
|
IADDR UNUSED pc = abuf->addr;
|
982 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
983 |
|
|
|
984 |
|
|
{
|
985 |
|
|
SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1)));
|
986 |
|
|
* FLD (i_dst) = opval;
|
987 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
988 |
|
|
}
|
989 |
|
|
|
990 |
|
|
return vpc;
|
991 |
|
|
#undef FLD
|
992 |
|
|
}
|
993 |
|
|
|
994 |
|
|
/* andnot2: andnot $src1, $lit2, $dst */
|
995 |
|
|
|
996 |
|
|
static SEM_PC
|
997 |
|
|
SEM_FN_NAME (i960base,andnot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
998 |
|
|
{
|
999 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1000 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1001 |
|
|
int UNUSED written = 0;
|
1002 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1003 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1004 |
|
|
|
1005 |
|
|
{
|
1006 |
|
|
SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1)));
|
1007 |
|
|
* FLD (i_dst) = opval;
|
1008 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1009 |
|
|
}
|
1010 |
|
|
|
1011 |
|
|
return vpc;
|
1012 |
|
|
#undef FLD
|
1013 |
|
|
}
|
1014 |
|
|
|
1015 |
|
|
/* andnot3: andnot $lit1, $lit2, $dst */
|
1016 |
|
|
|
1017 |
|
|
static SEM_PC
|
1018 |
|
|
SEM_FN_NAME (i960base,andnot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1019 |
|
|
{
|
1020 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1021 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1022 |
|
|
int UNUSED written = 0;
|
1023 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1024 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1025 |
|
|
|
1026 |
|
|
{
|
1027 |
|
|
SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1)));
|
1028 |
|
|
* FLD (i_dst) = opval;
|
1029 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1030 |
|
|
}
|
1031 |
|
|
|
1032 |
|
|
return vpc;
|
1033 |
|
|
#undef FLD
|
1034 |
|
|
}
|
1035 |
|
|
|
1036 |
|
|
/* setbit: setbit $src1, $src2, $dst */
|
1037 |
|
|
|
1038 |
|
|
static SEM_PC
|
1039 |
|
|
SEM_FN_NAME (i960base,setbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1040 |
|
|
{
|
1041 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1042 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1043 |
|
|
int UNUSED written = 0;
|
1044 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1045 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1046 |
|
|
|
1047 |
|
|
{
|
1048 |
|
|
SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2));
|
1049 |
|
|
* FLD (i_dst) = opval;
|
1050 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1051 |
|
|
}
|
1052 |
|
|
|
1053 |
|
|
return vpc;
|
1054 |
|
|
#undef FLD
|
1055 |
|
|
}
|
1056 |
|
|
|
1057 |
|
|
/* setbit1: setbit $lit1, $src2, $dst */
|
1058 |
|
|
|
1059 |
|
|
static SEM_PC
|
1060 |
|
|
SEM_FN_NAME (i960base,setbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1061 |
|
|
{
|
1062 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1063 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1064 |
|
|
int UNUSED written = 0;
|
1065 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1066 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1067 |
|
|
|
1068 |
|
|
{
|
1069 |
|
|
SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2));
|
1070 |
|
|
* FLD (i_dst) = opval;
|
1071 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1072 |
|
|
}
|
1073 |
|
|
|
1074 |
|
|
return vpc;
|
1075 |
|
|
#undef FLD
|
1076 |
|
|
}
|
1077 |
|
|
|
1078 |
|
|
/* setbit2: setbit $src1, $lit2, $dst */
|
1079 |
|
|
|
1080 |
|
|
static SEM_PC
|
1081 |
|
|
SEM_FN_NAME (i960base,setbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1082 |
|
|
{
|
1083 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1084 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1085 |
|
|
int UNUSED written = 0;
|
1086 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1087 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1088 |
|
|
|
1089 |
|
|
{
|
1090 |
|
|
SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2));
|
1091 |
|
|
* FLD (i_dst) = opval;
|
1092 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1093 |
|
|
}
|
1094 |
|
|
|
1095 |
|
|
return vpc;
|
1096 |
|
|
#undef FLD
|
1097 |
|
|
}
|
1098 |
|
|
|
1099 |
|
|
/* setbit3: setbit $lit1, $lit2, $dst */
|
1100 |
|
|
|
1101 |
|
|
static SEM_PC
|
1102 |
|
|
SEM_FN_NAME (i960base,setbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1103 |
|
|
{
|
1104 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1105 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1106 |
|
|
int UNUSED written = 0;
|
1107 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1108 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1109 |
|
|
|
1110 |
|
|
{
|
1111 |
|
|
SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2));
|
1112 |
|
|
* FLD (i_dst) = opval;
|
1113 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1114 |
|
|
}
|
1115 |
|
|
|
1116 |
|
|
return vpc;
|
1117 |
|
|
#undef FLD
|
1118 |
|
|
}
|
1119 |
|
|
|
1120 |
|
|
/* notand: notand $src1, $src2, $dst */
|
1121 |
|
|
|
1122 |
|
|
static SEM_PC
|
1123 |
|
|
SEM_FN_NAME (i960base,notand) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1124 |
|
|
{
|
1125 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1126 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1127 |
|
|
int UNUSED written = 0;
|
1128 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1129 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1130 |
|
|
|
1131 |
|
|
{
|
1132 |
|
|
SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1));
|
1133 |
|
|
* FLD (i_dst) = opval;
|
1134 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1135 |
|
|
}
|
1136 |
|
|
|
1137 |
|
|
return vpc;
|
1138 |
|
|
#undef FLD
|
1139 |
|
|
}
|
1140 |
|
|
|
1141 |
|
|
/* notand1: notand $lit1, $src2, $dst */
|
1142 |
|
|
|
1143 |
|
|
static SEM_PC
|
1144 |
|
|
SEM_FN_NAME (i960base,notand1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1145 |
|
|
{
|
1146 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1147 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1148 |
|
|
int UNUSED written = 0;
|
1149 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1150 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1151 |
|
|
|
1152 |
|
|
{
|
1153 |
|
|
SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1));
|
1154 |
|
|
* FLD (i_dst) = opval;
|
1155 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1156 |
|
|
}
|
1157 |
|
|
|
1158 |
|
|
return vpc;
|
1159 |
|
|
#undef FLD
|
1160 |
|
|
}
|
1161 |
|
|
|
1162 |
|
|
/* notand2: notand $src1, $lit2, $dst */
|
1163 |
|
|
|
1164 |
|
|
static SEM_PC
|
1165 |
|
|
SEM_FN_NAME (i960base,notand2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1166 |
|
|
{
|
1167 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1168 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1169 |
|
|
int UNUSED written = 0;
|
1170 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1171 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1172 |
|
|
|
1173 |
|
|
{
|
1174 |
|
|
SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1));
|
1175 |
|
|
* FLD (i_dst) = opval;
|
1176 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1177 |
|
|
}
|
1178 |
|
|
|
1179 |
|
|
return vpc;
|
1180 |
|
|
#undef FLD
|
1181 |
|
|
}
|
1182 |
|
|
|
1183 |
|
|
/* notand3: notand $lit1, $lit2, $dst */
|
1184 |
|
|
|
1185 |
|
|
static SEM_PC
|
1186 |
|
|
SEM_FN_NAME (i960base,notand3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1187 |
|
|
{
|
1188 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1189 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1190 |
|
|
int UNUSED written = 0;
|
1191 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1192 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1193 |
|
|
|
1194 |
|
|
{
|
1195 |
|
|
SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1));
|
1196 |
|
|
* FLD (i_dst) = opval;
|
1197 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1198 |
|
|
}
|
1199 |
|
|
|
1200 |
|
|
return vpc;
|
1201 |
|
|
#undef FLD
|
1202 |
|
|
}
|
1203 |
|
|
|
1204 |
|
|
/* xor: xor $src1, $src2, $dst */
|
1205 |
|
|
|
1206 |
|
|
static SEM_PC
|
1207 |
|
|
SEM_FN_NAME (i960base,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1208 |
|
|
{
|
1209 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1210 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1211 |
|
|
int UNUSED written = 0;
|
1212 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1213 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1214 |
|
|
|
1215 |
|
|
{
|
1216 |
|
|
SI opval = XORSI (* FLD (i_src1), * FLD (i_src2));
|
1217 |
|
|
* FLD (i_dst) = opval;
|
1218 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1219 |
|
|
}
|
1220 |
|
|
|
1221 |
|
|
return vpc;
|
1222 |
|
|
#undef FLD
|
1223 |
|
|
}
|
1224 |
|
|
|
1225 |
|
|
/* xor1: xor $lit1, $src2, $dst */
|
1226 |
|
|
|
1227 |
|
|
static SEM_PC
|
1228 |
|
|
SEM_FN_NAME (i960base,xor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1229 |
|
|
{
|
1230 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1231 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1232 |
|
|
int UNUSED written = 0;
|
1233 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1234 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1235 |
|
|
|
1236 |
|
|
{
|
1237 |
|
|
SI opval = XORSI (FLD (f_src1), * FLD (i_src2));
|
1238 |
|
|
* FLD (i_dst) = opval;
|
1239 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1240 |
|
|
}
|
1241 |
|
|
|
1242 |
|
|
return vpc;
|
1243 |
|
|
#undef FLD
|
1244 |
|
|
}
|
1245 |
|
|
|
1246 |
|
|
/* xor2: xor $src1, $lit2, $dst */
|
1247 |
|
|
|
1248 |
|
|
static SEM_PC
|
1249 |
|
|
SEM_FN_NAME (i960base,xor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1250 |
|
|
{
|
1251 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1252 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1253 |
|
|
int UNUSED written = 0;
|
1254 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1255 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1256 |
|
|
|
1257 |
|
|
{
|
1258 |
|
|
SI opval = XORSI (* FLD (i_src1), FLD (f_src2));
|
1259 |
|
|
* FLD (i_dst) = opval;
|
1260 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1261 |
|
|
}
|
1262 |
|
|
|
1263 |
|
|
return vpc;
|
1264 |
|
|
#undef FLD
|
1265 |
|
|
}
|
1266 |
|
|
|
1267 |
|
|
/* xor3: xor $lit1, $lit2, $dst */
|
1268 |
|
|
|
1269 |
|
|
static SEM_PC
|
1270 |
|
|
SEM_FN_NAME (i960base,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1271 |
|
|
{
|
1272 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1273 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1274 |
|
|
int UNUSED written = 0;
|
1275 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1276 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1277 |
|
|
|
1278 |
|
|
{
|
1279 |
|
|
SI opval = XORSI (FLD (f_src1), FLD (f_src2));
|
1280 |
|
|
* FLD (i_dst) = opval;
|
1281 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1282 |
|
|
}
|
1283 |
|
|
|
1284 |
|
|
return vpc;
|
1285 |
|
|
#undef FLD
|
1286 |
|
|
}
|
1287 |
|
|
|
1288 |
|
|
/* or: or $src1, $src2, $dst */
|
1289 |
|
|
|
1290 |
|
|
static SEM_PC
|
1291 |
|
|
SEM_FN_NAME (i960base,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1292 |
|
|
{
|
1293 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1294 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1295 |
|
|
int UNUSED written = 0;
|
1296 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1297 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1298 |
|
|
|
1299 |
|
|
{
|
1300 |
|
|
SI opval = ORSI (* FLD (i_src1), * FLD (i_src2));
|
1301 |
|
|
* FLD (i_dst) = opval;
|
1302 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1303 |
|
|
}
|
1304 |
|
|
|
1305 |
|
|
return vpc;
|
1306 |
|
|
#undef FLD
|
1307 |
|
|
}
|
1308 |
|
|
|
1309 |
|
|
/* or1: or $lit1, $src2, $dst */
|
1310 |
|
|
|
1311 |
|
|
static SEM_PC
|
1312 |
|
|
SEM_FN_NAME (i960base,or1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1313 |
|
|
{
|
1314 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1315 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1316 |
|
|
int UNUSED written = 0;
|
1317 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1318 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1319 |
|
|
|
1320 |
|
|
{
|
1321 |
|
|
SI opval = ORSI (FLD (f_src1), * FLD (i_src2));
|
1322 |
|
|
* FLD (i_dst) = opval;
|
1323 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1324 |
|
|
}
|
1325 |
|
|
|
1326 |
|
|
return vpc;
|
1327 |
|
|
#undef FLD
|
1328 |
|
|
}
|
1329 |
|
|
|
1330 |
|
|
/* or2: or $src1, $lit2, $dst */
|
1331 |
|
|
|
1332 |
|
|
static SEM_PC
|
1333 |
|
|
SEM_FN_NAME (i960base,or2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1334 |
|
|
{
|
1335 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1336 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1337 |
|
|
int UNUSED written = 0;
|
1338 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1339 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1340 |
|
|
|
1341 |
|
|
{
|
1342 |
|
|
SI opval = ORSI (* FLD (i_src1), FLD (f_src2));
|
1343 |
|
|
* FLD (i_dst) = opval;
|
1344 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1345 |
|
|
}
|
1346 |
|
|
|
1347 |
|
|
return vpc;
|
1348 |
|
|
#undef FLD
|
1349 |
|
|
}
|
1350 |
|
|
|
1351 |
|
|
/* or3: or $lit1, $lit2, $dst */
|
1352 |
|
|
|
1353 |
|
|
static SEM_PC
|
1354 |
|
|
SEM_FN_NAME (i960base,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1355 |
|
|
{
|
1356 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1357 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1358 |
|
|
int UNUSED written = 0;
|
1359 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1360 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1361 |
|
|
|
1362 |
|
|
{
|
1363 |
|
|
SI opval = ORSI (FLD (f_src1), FLD (f_src2));
|
1364 |
|
|
* FLD (i_dst) = opval;
|
1365 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1366 |
|
|
}
|
1367 |
|
|
|
1368 |
|
|
return vpc;
|
1369 |
|
|
#undef FLD
|
1370 |
|
|
}
|
1371 |
|
|
|
1372 |
|
|
/* nor: nor $src1, $src2, $dst */
|
1373 |
|
|
|
1374 |
|
|
static SEM_PC
|
1375 |
|
|
SEM_FN_NAME (i960base,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1376 |
|
|
{
|
1377 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1378 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1379 |
|
|
int UNUSED written = 0;
|
1380 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1381 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1382 |
|
|
|
1383 |
|
|
{
|
1384 |
|
|
SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1)));
|
1385 |
|
|
* FLD (i_dst) = opval;
|
1386 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1387 |
|
|
}
|
1388 |
|
|
|
1389 |
|
|
return vpc;
|
1390 |
|
|
#undef FLD
|
1391 |
|
|
}
|
1392 |
|
|
|
1393 |
|
|
/* nor1: nor $lit1, $src2, $dst */
|
1394 |
|
|
|
1395 |
|
|
static SEM_PC
|
1396 |
|
|
SEM_FN_NAME (i960base,nor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1397 |
|
|
{
|
1398 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1399 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1400 |
|
|
int UNUSED written = 0;
|
1401 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1402 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1403 |
|
|
|
1404 |
|
|
{
|
1405 |
|
|
SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1)));
|
1406 |
|
|
* FLD (i_dst) = opval;
|
1407 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1408 |
|
|
}
|
1409 |
|
|
|
1410 |
|
|
return vpc;
|
1411 |
|
|
#undef FLD
|
1412 |
|
|
}
|
1413 |
|
|
|
1414 |
|
|
/* nor2: nor $src1, $lit2, $dst */
|
1415 |
|
|
|
1416 |
|
|
static SEM_PC
|
1417 |
|
|
SEM_FN_NAME (i960base,nor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1418 |
|
|
{
|
1419 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1420 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1421 |
|
|
int UNUSED written = 0;
|
1422 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1423 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1424 |
|
|
|
1425 |
|
|
{
|
1426 |
|
|
SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1)));
|
1427 |
|
|
* FLD (i_dst) = opval;
|
1428 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1429 |
|
|
}
|
1430 |
|
|
|
1431 |
|
|
return vpc;
|
1432 |
|
|
#undef FLD
|
1433 |
|
|
}
|
1434 |
|
|
|
1435 |
|
|
/* nor3: nor $lit1, $lit2, $dst */
|
1436 |
|
|
|
1437 |
|
|
static SEM_PC
|
1438 |
|
|
SEM_FN_NAME (i960base,nor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1439 |
|
|
{
|
1440 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1441 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1442 |
|
|
int UNUSED written = 0;
|
1443 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1444 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1445 |
|
|
|
1446 |
|
|
{
|
1447 |
|
|
SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1)));
|
1448 |
|
|
* FLD (i_dst) = opval;
|
1449 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1450 |
|
|
}
|
1451 |
|
|
|
1452 |
|
|
return vpc;
|
1453 |
|
|
#undef FLD
|
1454 |
|
|
}
|
1455 |
|
|
|
1456 |
|
|
/* xnor: xnor $src1, $src2, $dst */
|
1457 |
|
|
|
1458 |
|
|
static SEM_PC
|
1459 |
|
|
SEM_FN_NAME (i960base,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1460 |
|
|
{
|
1461 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1462 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1463 |
|
|
int UNUSED written = 0;
|
1464 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1465 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1466 |
|
|
|
1467 |
|
|
{
|
1468 |
|
|
SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2)));
|
1469 |
|
|
* FLD (i_dst) = opval;
|
1470 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1471 |
|
|
}
|
1472 |
|
|
|
1473 |
|
|
return vpc;
|
1474 |
|
|
#undef FLD
|
1475 |
|
|
}
|
1476 |
|
|
|
1477 |
|
|
/* xnor1: xnor $lit1, $src2, $dst */
|
1478 |
|
|
|
1479 |
|
|
static SEM_PC
|
1480 |
|
|
SEM_FN_NAME (i960base,xnor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1481 |
|
|
{
|
1482 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1483 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1484 |
|
|
int UNUSED written = 0;
|
1485 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1486 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1487 |
|
|
|
1488 |
|
|
{
|
1489 |
|
|
SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2)));
|
1490 |
|
|
* FLD (i_dst) = opval;
|
1491 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1492 |
|
|
}
|
1493 |
|
|
|
1494 |
|
|
return vpc;
|
1495 |
|
|
#undef FLD
|
1496 |
|
|
}
|
1497 |
|
|
|
1498 |
|
|
/* xnor2: xnor $src1, $lit2, $dst */
|
1499 |
|
|
|
1500 |
|
|
static SEM_PC
|
1501 |
|
|
SEM_FN_NAME (i960base,xnor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1502 |
|
|
{
|
1503 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1504 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1505 |
|
|
int UNUSED written = 0;
|
1506 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1507 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1508 |
|
|
|
1509 |
|
|
{
|
1510 |
|
|
SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2)));
|
1511 |
|
|
* FLD (i_dst) = opval;
|
1512 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1513 |
|
|
}
|
1514 |
|
|
|
1515 |
|
|
return vpc;
|
1516 |
|
|
#undef FLD
|
1517 |
|
|
}
|
1518 |
|
|
|
1519 |
|
|
/* xnor3: xnor $lit1, $lit2, $dst */
|
1520 |
|
|
|
1521 |
|
|
static SEM_PC
|
1522 |
|
|
SEM_FN_NAME (i960base,xnor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1523 |
|
|
{
|
1524 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1525 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1526 |
|
|
int UNUSED written = 0;
|
1527 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1528 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1529 |
|
|
|
1530 |
|
|
{
|
1531 |
|
|
SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2)));
|
1532 |
|
|
* FLD (i_dst) = opval;
|
1533 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1534 |
|
|
}
|
1535 |
|
|
|
1536 |
|
|
return vpc;
|
1537 |
|
|
#undef FLD
|
1538 |
|
|
}
|
1539 |
|
|
|
1540 |
|
|
/* not: not $src1, $src2, $dst */
|
1541 |
|
|
|
1542 |
|
|
static SEM_PC
|
1543 |
|
|
SEM_FN_NAME (i960base,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1544 |
|
|
{
|
1545 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1546 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1547 |
|
|
int UNUSED written = 0;
|
1548 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1549 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1550 |
|
|
|
1551 |
|
|
{
|
1552 |
|
|
SI opval = INVSI (* FLD (i_src1));
|
1553 |
|
|
* FLD (i_dst) = opval;
|
1554 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1555 |
|
|
}
|
1556 |
|
|
|
1557 |
|
|
return vpc;
|
1558 |
|
|
#undef FLD
|
1559 |
|
|
}
|
1560 |
|
|
|
1561 |
|
|
/* not1: not $lit1, $src2, $dst */
|
1562 |
|
|
|
1563 |
|
|
static SEM_PC
|
1564 |
|
|
SEM_FN_NAME (i960base,not1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1565 |
|
|
{
|
1566 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1567 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1568 |
|
|
int UNUSED written = 0;
|
1569 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1570 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1571 |
|
|
|
1572 |
|
|
{
|
1573 |
|
|
SI opval = INVSI (FLD (f_src1));
|
1574 |
|
|
* FLD (i_dst) = opval;
|
1575 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1576 |
|
|
}
|
1577 |
|
|
|
1578 |
|
|
return vpc;
|
1579 |
|
|
#undef FLD
|
1580 |
|
|
}
|
1581 |
|
|
|
1582 |
|
|
/* not2: not $src1, $lit2, $dst */
|
1583 |
|
|
|
1584 |
|
|
static SEM_PC
|
1585 |
|
|
SEM_FN_NAME (i960base,not2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1586 |
|
|
{
|
1587 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1588 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1589 |
|
|
int UNUSED written = 0;
|
1590 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1591 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1592 |
|
|
|
1593 |
|
|
{
|
1594 |
|
|
SI opval = INVSI (* FLD (i_src1));
|
1595 |
|
|
* FLD (i_dst) = opval;
|
1596 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1597 |
|
|
}
|
1598 |
|
|
|
1599 |
|
|
return vpc;
|
1600 |
|
|
#undef FLD
|
1601 |
|
|
}
|
1602 |
|
|
|
1603 |
|
|
/* not3: not $lit1, $lit2, $dst */
|
1604 |
|
|
|
1605 |
|
|
static SEM_PC
|
1606 |
|
|
SEM_FN_NAME (i960base,not3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1607 |
|
|
{
|
1608 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1609 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1610 |
|
|
int UNUSED written = 0;
|
1611 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1612 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1613 |
|
|
|
1614 |
|
|
{
|
1615 |
|
|
SI opval = INVSI (FLD (f_src1));
|
1616 |
|
|
* FLD (i_dst) = opval;
|
1617 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1618 |
|
|
}
|
1619 |
|
|
|
1620 |
|
|
return vpc;
|
1621 |
|
|
#undef FLD
|
1622 |
|
|
}
|
1623 |
|
|
|
1624 |
|
|
/* ornot: ornot $src1, $src2, $dst */
|
1625 |
|
|
|
1626 |
|
|
static SEM_PC
|
1627 |
|
|
SEM_FN_NAME (i960base,ornot) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1628 |
|
|
{
|
1629 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1630 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1631 |
|
|
int UNUSED written = 0;
|
1632 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1633 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1634 |
|
|
|
1635 |
|
|
{
|
1636 |
|
|
SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1)));
|
1637 |
|
|
* FLD (i_dst) = opval;
|
1638 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1639 |
|
|
}
|
1640 |
|
|
|
1641 |
|
|
return vpc;
|
1642 |
|
|
#undef FLD
|
1643 |
|
|
}
|
1644 |
|
|
|
1645 |
|
|
/* ornot1: ornot $lit1, $src2, $dst */
|
1646 |
|
|
|
1647 |
|
|
static SEM_PC
|
1648 |
|
|
SEM_FN_NAME (i960base,ornot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1649 |
|
|
{
|
1650 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1651 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1652 |
|
|
int UNUSED written = 0;
|
1653 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1654 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1655 |
|
|
|
1656 |
|
|
{
|
1657 |
|
|
SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1)));
|
1658 |
|
|
* FLD (i_dst) = opval;
|
1659 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1660 |
|
|
}
|
1661 |
|
|
|
1662 |
|
|
return vpc;
|
1663 |
|
|
#undef FLD
|
1664 |
|
|
}
|
1665 |
|
|
|
1666 |
|
|
/* ornot2: ornot $src1, $lit2, $dst */
|
1667 |
|
|
|
1668 |
|
|
static SEM_PC
|
1669 |
|
|
SEM_FN_NAME (i960base,ornot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1670 |
|
|
{
|
1671 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1672 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1673 |
|
|
int UNUSED written = 0;
|
1674 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1675 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1676 |
|
|
|
1677 |
|
|
{
|
1678 |
|
|
SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1)));
|
1679 |
|
|
* FLD (i_dst) = opval;
|
1680 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1681 |
|
|
}
|
1682 |
|
|
|
1683 |
|
|
return vpc;
|
1684 |
|
|
#undef FLD
|
1685 |
|
|
}
|
1686 |
|
|
|
1687 |
|
|
/* ornot3: ornot $lit1, $lit2, $dst */
|
1688 |
|
|
|
1689 |
|
|
static SEM_PC
|
1690 |
|
|
SEM_FN_NAME (i960base,ornot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1691 |
|
|
{
|
1692 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1693 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1694 |
|
|
int UNUSED written = 0;
|
1695 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1696 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1697 |
|
|
|
1698 |
|
|
{
|
1699 |
|
|
SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1)));
|
1700 |
|
|
* FLD (i_dst) = opval;
|
1701 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1702 |
|
|
}
|
1703 |
|
|
|
1704 |
|
|
return vpc;
|
1705 |
|
|
#undef FLD
|
1706 |
|
|
}
|
1707 |
|
|
|
1708 |
|
|
/* clrbit: clrbit $src1, $src2, $dst */
|
1709 |
|
|
|
1710 |
|
|
static SEM_PC
|
1711 |
|
|
SEM_FN_NAME (i960base,clrbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1712 |
|
|
{
|
1713 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1714 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1715 |
|
|
int UNUSED written = 0;
|
1716 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1717 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1718 |
|
|
|
1719 |
|
|
{
|
1720 |
|
|
SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2));
|
1721 |
|
|
* FLD (i_dst) = opval;
|
1722 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1723 |
|
|
}
|
1724 |
|
|
|
1725 |
|
|
return vpc;
|
1726 |
|
|
#undef FLD
|
1727 |
|
|
}
|
1728 |
|
|
|
1729 |
|
|
/* clrbit1: clrbit $lit1, $src2, $dst */
|
1730 |
|
|
|
1731 |
|
|
static SEM_PC
|
1732 |
|
|
SEM_FN_NAME (i960base,clrbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1733 |
|
|
{
|
1734 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1735 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1736 |
|
|
int UNUSED written = 0;
|
1737 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1738 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1739 |
|
|
|
1740 |
|
|
{
|
1741 |
|
|
SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2));
|
1742 |
|
|
* FLD (i_dst) = opval;
|
1743 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1744 |
|
|
}
|
1745 |
|
|
|
1746 |
|
|
return vpc;
|
1747 |
|
|
#undef FLD
|
1748 |
|
|
}
|
1749 |
|
|
|
1750 |
|
|
/* clrbit2: clrbit $src1, $lit2, $dst */
|
1751 |
|
|
|
1752 |
|
|
static SEM_PC
|
1753 |
|
|
SEM_FN_NAME (i960base,clrbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1754 |
|
|
{
|
1755 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1756 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1757 |
|
|
int UNUSED written = 0;
|
1758 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1759 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1760 |
|
|
|
1761 |
|
|
{
|
1762 |
|
|
SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2));
|
1763 |
|
|
* FLD (i_dst) = opval;
|
1764 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1765 |
|
|
}
|
1766 |
|
|
|
1767 |
|
|
return vpc;
|
1768 |
|
|
#undef FLD
|
1769 |
|
|
}
|
1770 |
|
|
|
1771 |
|
|
/* clrbit3: clrbit $lit1, $lit2, $dst */
|
1772 |
|
|
|
1773 |
|
|
static SEM_PC
|
1774 |
|
|
SEM_FN_NAME (i960base,clrbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1775 |
|
|
{
|
1776 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1777 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1778 |
|
|
int UNUSED written = 0;
|
1779 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1780 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1781 |
|
|
|
1782 |
|
|
{
|
1783 |
|
|
SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2));
|
1784 |
|
|
* FLD (i_dst) = opval;
|
1785 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1786 |
|
|
}
|
1787 |
|
|
|
1788 |
|
|
return vpc;
|
1789 |
|
|
#undef FLD
|
1790 |
|
|
}
|
1791 |
|
|
|
1792 |
|
|
/* shlo: shlo $src1, $src2, $dst */
|
1793 |
|
|
|
1794 |
|
|
static SEM_PC
|
1795 |
|
|
SEM_FN_NAME (i960base,shlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1796 |
|
|
{
|
1797 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1798 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1799 |
|
|
int UNUSED written = 0;
|
1800 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1801 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1802 |
|
|
|
1803 |
|
|
{
|
1804 |
|
|
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1)));
|
1805 |
|
|
* FLD (i_dst) = opval;
|
1806 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1807 |
|
|
}
|
1808 |
|
|
|
1809 |
|
|
return vpc;
|
1810 |
|
|
#undef FLD
|
1811 |
|
|
}
|
1812 |
|
|
|
1813 |
|
|
/* shlo1: shlo $lit1, $src2, $dst */
|
1814 |
|
|
|
1815 |
|
|
static SEM_PC
|
1816 |
|
|
SEM_FN_NAME (i960base,shlo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1817 |
|
|
{
|
1818 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1819 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1820 |
|
|
int UNUSED written = 0;
|
1821 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1822 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1823 |
|
|
|
1824 |
|
|
{
|
1825 |
|
|
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1)));
|
1826 |
|
|
* FLD (i_dst) = opval;
|
1827 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1828 |
|
|
}
|
1829 |
|
|
|
1830 |
|
|
return vpc;
|
1831 |
|
|
#undef FLD
|
1832 |
|
|
}
|
1833 |
|
|
|
1834 |
|
|
/* shlo2: shlo $src1, $lit2, $dst */
|
1835 |
|
|
|
1836 |
|
|
static SEM_PC
|
1837 |
|
|
SEM_FN_NAME (i960base,shlo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1838 |
|
|
{
|
1839 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1840 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1841 |
|
|
int UNUSED written = 0;
|
1842 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1843 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1844 |
|
|
|
1845 |
|
|
{
|
1846 |
|
|
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1)));
|
1847 |
|
|
* FLD (i_dst) = opval;
|
1848 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1849 |
|
|
}
|
1850 |
|
|
|
1851 |
|
|
return vpc;
|
1852 |
|
|
#undef FLD
|
1853 |
|
|
}
|
1854 |
|
|
|
1855 |
|
|
/* shlo3: shlo $lit1, $lit2, $dst */
|
1856 |
|
|
|
1857 |
|
|
static SEM_PC
|
1858 |
|
|
SEM_FN_NAME (i960base,shlo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1859 |
|
|
{
|
1860 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1861 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1862 |
|
|
int UNUSED written = 0;
|
1863 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1864 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1865 |
|
|
|
1866 |
|
|
{
|
1867 |
|
|
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1)));
|
1868 |
|
|
* FLD (i_dst) = opval;
|
1869 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1870 |
|
|
}
|
1871 |
|
|
|
1872 |
|
|
return vpc;
|
1873 |
|
|
#undef FLD
|
1874 |
|
|
}
|
1875 |
|
|
|
1876 |
|
|
/* shro: shro $src1, $src2, $dst */
|
1877 |
|
|
|
1878 |
|
|
static SEM_PC
|
1879 |
|
|
SEM_FN_NAME (i960base,shro) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1880 |
|
|
{
|
1881 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1882 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1883 |
|
|
int UNUSED written = 0;
|
1884 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1885 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1886 |
|
|
|
1887 |
|
|
{
|
1888 |
|
|
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1)));
|
1889 |
|
|
* FLD (i_dst) = opval;
|
1890 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1891 |
|
|
}
|
1892 |
|
|
|
1893 |
|
|
return vpc;
|
1894 |
|
|
#undef FLD
|
1895 |
|
|
}
|
1896 |
|
|
|
1897 |
|
|
/* shro1: shro $lit1, $src2, $dst */
|
1898 |
|
|
|
1899 |
|
|
static SEM_PC
|
1900 |
|
|
SEM_FN_NAME (i960base,shro1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1901 |
|
|
{
|
1902 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1903 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1904 |
|
|
int UNUSED written = 0;
|
1905 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1906 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1907 |
|
|
|
1908 |
|
|
{
|
1909 |
|
|
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1)));
|
1910 |
|
|
* FLD (i_dst) = opval;
|
1911 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1912 |
|
|
}
|
1913 |
|
|
|
1914 |
|
|
return vpc;
|
1915 |
|
|
#undef FLD
|
1916 |
|
|
}
|
1917 |
|
|
|
1918 |
|
|
/* shro2: shro $src1, $lit2, $dst */
|
1919 |
|
|
|
1920 |
|
|
static SEM_PC
|
1921 |
|
|
SEM_FN_NAME (i960base,shro2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1922 |
|
|
{
|
1923 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
1924 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1925 |
|
|
int UNUSED written = 0;
|
1926 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1927 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1928 |
|
|
|
1929 |
|
|
{
|
1930 |
|
|
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1)));
|
1931 |
|
|
* FLD (i_dst) = opval;
|
1932 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1933 |
|
|
}
|
1934 |
|
|
|
1935 |
|
|
return vpc;
|
1936 |
|
|
#undef FLD
|
1937 |
|
|
}
|
1938 |
|
|
|
1939 |
|
|
/* shro3: shro $lit1, $lit2, $dst */
|
1940 |
|
|
|
1941 |
|
|
static SEM_PC
|
1942 |
|
|
SEM_FN_NAME (i960base,shro3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1943 |
|
|
{
|
1944 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
1945 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1946 |
|
|
int UNUSED written = 0;
|
1947 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1948 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1949 |
|
|
|
1950 |
|
|
{
|
1951 |
|
|
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1)));
|
1952 |
|
|
* FLD (i_dst) = opval;
|
1953 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1954 |
|
|
}
|
1955 |
|
|
|
1956 |
|
|
return vpc;
|
1957 |
|
|
#undef FLD
|
1958 |
|
|
}
|
1959 |
|
|
|
1960 |
|
|
/* shli: shli $src1, $src2, $dst */
|
1961 |
|
|
|
1962 |
|
|
static SEM_PC
|
1963 |
|
|
SEM_FN_NAME (i960base,shli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1964 |
|
|
{
|
1965 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
1966 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1967 |
|
|
int UNUSED written = 0;
|
1968 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1969 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1970 |
|
|
|
1971 |
|
|
{
|
1972 |
|
|
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1)));
|
1973 |
|
|
* FLD (i_dst) = opval;
|
1974 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1975 |
|
|
}
|
1976 |
|
|
|
1977 |
|
|
return vpc;
|
1978 |
|
|
#undef FLD
|
1979 |
|
|
}
|
1980 |
|
|
|
1981 |
|
|
/* shli1: shli $lit1, $src2, $dst */
|
1982 |
|
|
|
1983 |
|
|
static SEM_PC
|
1984 |
|
|
SEM_FN_NAME (i960base,shli1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
1985 |
|
|
{
|
1986 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
1987 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
1988 |
|
|
int UNUSED written = 0;
|
1989 |
|
|
IADDR UNUSED pc = abuf->addr;
|
1990 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
1991 |
|
|
|
1992 |
|
|
{
|
1993 |
|
|
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1)));
|
1994 |
|
|
* FLD (i_dst) = opval;
|
1995 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
1996 |
|
|
}
|
1997 |
|
|
|
1998 |
|
|
return vpc;
|
1999 |
|
|
#undef FLD
|
2000 |
|
|
}
|
2001 |
|
|
|
2002 |
|
|
/* shli2: shli $src1, $lit2, $dst */
|
2003 |
|
|
|
2004 |
|
|
static SEM_PC
|
2005 |
|
|
SEM_FN_NAME (i960base,shli2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2006 |
|
|
{
|
2007 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
2008 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2009 |
|
|
int UNUSED written = 0;
|
2010 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2011 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2012 |
|
|
|
2013 |
|
|
{
|
2014 |
|
|
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1)));
|
2015 |
|
|
* FLD (i_dst) = opval;
|
2016 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2017 |
|
|
}
|
2018 |
|
|
|
2019 |
|
|
return vpc;
|
2020 |
|
|
#undef FLD
|
2021 |
|
|
}
|
2022 |
|
|
|
2023 |
|
|
/* shli3: shli $lit1, $lit2, $dst */
|
2024 |
|
|
|
2025 |
|
|
static SEM_PC
|
2026 |
|
|
SEM_FN_NAME (i960base,shli3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2027 |
|
|
{
|
2028 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
2029 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2030 |
|
|
int UNUSED written = 0;
|
2031 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2032 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2033 |
|
|
|
2034 |
|
|
{
|
2035 |
|
|
SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1)));
|
2036 |
|
|
* FLD (i_dst) = opval;
|
2037 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2038 |
|
|
}
|
2039 |
|
|
|
2040 |
|
|
return vpc;
|
2041 |
|
|
#undef FLD
|
2042 |
|
|
}
|
2043 |
|
|
|
2044 |
|
|
/* shri: shri $src1, $src2, $dst */
|
2045 |
|
|
|
2046 |
|
|
static SEM_PC
|
2047 |
|
|
SEM_FN_NAME (i960base,shri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2048 |
|
|
{
|
2049 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
2050 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2051 |
|
|
int UNUSED written = 0;
|
2052 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2053 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2054 |
|
|
|
2055 |
|
|
{
|
2056 |
|
|
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1)));
|
2057 |
|
|
* FLD (i_dst) = opval;
|
2058 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2059 |
|
|
}
|
2060 |
|
|
|
2061 |
|
|
return vpc;
|
2062 |
|
|
#undef FLD
|
2063 |
|
|
}
|
2064 |
|
|
|
2065 |
|
|
/* shri1: shri $lit1, $src2, $dst */
|
2066 |
|
|
|
2067 |
|
|
static SEM_PC
|
2068 |
|
|
SEM_FN_NAME (i960base,shri1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2069 |
|
|
{
|
2070 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
2071 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2072 |
|
|
int UNUSED written = 0;
|
2073 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2074 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2075 |
|
|
|
2076 |
|
|
{
|
2077 |
|
|
SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1)));
|
2078 |
|
|
* FLD (i_dst) = opval;
|
2079 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2080 |
|
|
}
|
2081 |
|
|
|
2082 |
|
|
return vpc;
|
2083 |
|
|
#undef FLD
|
2084 |
|
|
}
|
2085 |
|
|
|
2086 |
|
|
/* shri2: shri $src1, $lit2, $dst */
|
2087 |
|
|
|
2088 |
|
|
static SEM_PC
|
2089 |
|
|
SEM_FN_NAME (i960base,shri2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2090 |
|
|
{
|
2091 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
2092 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2093 |
|
|
int UNUSED written = 0;
|
2094 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2095 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2096 |
|
|
|
2097 |
|
|
{
|
2098 |
|
|
SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1)));
|
2099 |
|
|
* FLD (i_dst) = opval;
|
2100 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2101 |
|
|
}
|
2102 |
|
|
|
2103 |
|
|
return vpc;
|
2104 |
|
|
#undef FLD
|
2105 |
|
|
}
|
2106 |
|
|
|
2107 |
|
|
/* shri3: shri $lit1, $lit2, $dst */
|
2108 |
|
|
|
2109 |
|
|
static SEM_PC
|
2110 |
|
|
SEM_FN_NAME (i960base,shri3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2111 |
|
|
{
|
2112 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
2113 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2114 |
|
|
int UNUSED written = 0;
|
2115 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2116 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2117 |
|
|
|
2118 |
|
|
{
|
2119 |
|
|
SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1)));
|
2120 |
|
|
* FLD (i_dst) = opval;
|
2121 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2122 |
|
|
}
|
2123 |
|
|
|
2124 |
|
|
return vpc;
|
2125 |
|
|
#undef FLD
|
2126 |
|
|
}
|
2127 |
|
|
|
2128 |
|
|
/* emul: emul $src1, $src2, $dst */
|
2129 |
|
|
|
2130 |
|
|
static SEM_PC
|
2131 |
|
|
SEM_FN_NAME (i960base,emul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2132 |
|
|
{
|
2133 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
2134 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2135 |
|
|
int UNUSED written = 0;
|
2136 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2137 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2138 |
|
|
|
2139 |
|
|
{
|
2140 |
|
|
DI tmp_temp;
|
2141 |
|
|
SI tmp_dregno;
|
2142 |
|
|
tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2)));
|
2143 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2144 |
|
|
{
|
2145 |
|
|
SI opval = TRUNCDISI (tmp_temp);
|
2146 |
|
|
* FLD (i_dst) = opval;
|
2147 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2148 |
|
|
}
|
2149 |
|
|
{
|
2150 |
|
|
SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
|
2151 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2152 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2153 |
|
|
}
|
2154 |
|
|
}
|
2155 |
|
|
|
2156 |
|
|
return vpc;
|
2157 |
|
|
#undef FLD
|
2158 |
|
|
}
|
2159 |
|
|
|
2160 |
|
|
/* emul1: emul $lit1, $src2, $dst */
|
2161 |
|
|
|
2162 |
|
|
static SEM_PC
|
2163 |
|
|
SEM_FN_NAME (i960base,emul1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2164 |
|
|
{
|
2165 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
2166 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2167 |
|
|
int UNUSED written = 0;
|
2168 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2169 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2170 |
|
|
|
2171 |
|
|
{
|
2172 |
|
|
DI tmp_temp;
|
2173 |
|
|
SI tmp_dregno;
|
2174 |
|
|
tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2)));
|
2175 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2176 |
|
|
{
|
2177 |
|
|
SI opval = TRUNCDISI (tmp_temp);
|
2178 |
|
|
* FLD (i_dst) = opval;
|
2179 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2180 |
|
|
}
|
2181 |
|
|
{
|
2182 |
|
|
SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
|
2183 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2184 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2185 |
|
|
}
|
2186 |
|
|
}
|
2187 |
|
|
|
2188 |
|
|
return vpc;
|
2189 |
|
|
#undef FLD
|
2190 |
|
|
}
|
2191 |
|
|
|
2192 |
|
|
/* emul2: emul $src1, $lit2, $dst */
|
2193 |
|
|
|
2194 |
|
|
static SEM_PC
|
2195 |
|
|
SEM_FN_NAME (i960base,emul2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2196 |
|
|
{
|
2197 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
2198 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2199 |
|
|
int UNUSED written = 0;
|
2200 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2201 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2202 |
|
|
|
2203 |
|
|
{
|
2204 |
|
|
DI tmp_temp;
|
2205 |
|
|
SI tmp_dregno;
|
2206 |
|
|
tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2)));
|
2207 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2208 |
|
|
{
|
2209 |
|
|
SI opval = TRUNCDISI (tmp_temp);
|
2210 |
|
|
* FLD (i_dst) = opval;
|
2211 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2212 |
|
|
}
|
2213 |
|
|
{
|
2214 |
|
|
SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
|
2215 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2216 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2217 |
|
|
}
|
2218 |
|
|
}
|
2219 |
|
|
|
2220 |
|
|
return vpc;
|
2221 |
|
|
#undef FLD
|
2222 |
|
|
}
|
2223 |
|
|
|
2224 |
|
|
/* emul3: emul $lit1, $lit2, $dst */
|
2225 |
|
|
|
2226 |
|
|
static SEM_PC
|
2227 |
|
|
SEM_FN_NAME (i960base,emul3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2228 |
|
|
{
|
2229 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
2230 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2231 |
|
|
int UNUSED written = 0;
|
2232 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2233 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2234 |
|
|
|
2235 |
|
|
{
|
2236 |
|
|
DI tmp_temp;
|
2237 |
|
|
SI tmp_dregno;
|
2238 |
|
|
tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2)));
|
2239 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2240 |
|
|
{
|
2241 |
|
|
SI opval = TRUNCDISI (tmp_temp);
|
2242 |
|
|
* FLD (i_dst) = opval;
|
2243 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2244 |
|
|
}
|
2245 |
|
|
{
|
2246 |
|
|
SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
|
2247 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2248 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2249 |
|
|
}
|
2250 |
|
|
}
|
2251 |
|
|
|
2252 |
|
|
return vpc;
|
2253 |
|
|
#undef FLD
|
2254 |
|
|
}
|
2255 |
|
|
|
2256 |
|
|
/* mov: mov $src1, $dst */
|
2257 |
|
|
|
2258 |
|
|
static SEM_PC
|
2259 |
|
|
SEM_FN_NAME (i960base,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2260 |
|
|
{
|
2261 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
2262 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2263 |
|
|
int UNUSED written = 0;
|
2264 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2265 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2266 |
|
|
|
2267 |
|
|
{
|
2268 |
|
|
SI opval = * FLD (i_src1);
|
2269 |
|
|
* FLD (i_dst) = opval;
|
2270 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2271 |
|
|
}
|
2272 |
|
|
|
2273 |
|
|
return vpc;
|
2274 |
|
|
#undef FLD
|
2275 |
|
|
}
|
2276 |
|
|
|
2277 |
|
|
/* mov1: mov $lit1, $dst */
|
2278 |
|
|
|
2279 |
|
|
static SEM_PC
|
2280 |
|
|
SEM_FN_NAME (i960base,mov1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2281 |
|
|
{
|
2282 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
2283 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2284 |
|
|
int UNUSED written = 0;
|
2285 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2286 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2287 |
|
|
|
2288 |
|
|
{
|
2289 |
|
|
SI opval = FLD (f_src1);
|
2290 |
|
|
* FLD (i_dst) = opval;
|
2291 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2292 |
|
|
}
|
2293 |
|
|
|
2294 |
|
|
return vpc;
|
2295 |
|
|
#undef FLD
|
2296 |
|
|
}
|
2297 |
|
|
|
2298 |
|
|
/* movl: movl $src1, $dst */
|
2299 |
|
|
|
2300 |
|
|
static SEM_PC
|
2301 |
|
|
SEM_FN_NAME (i960base,movl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2302 |
|
|
{
|
2303 |
|
|
#define FLD(f) abuf->fields.sfmt_movq.f
|
2304 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2305 |
|
|
int UNUSED written = 0;
|
2306 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2307 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2308 |
|
|
|
2309 |
|
|
{
|
2310 |
|
|
SI tmp_dregno;
|
2311 |
|
|
SI tmp_sregno;
|
2312 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2313 |
|
|
tmp_sregno = FLD (f_src1);
|
2314 |
|
|
{
|
2315 |
|
|
SI opval = * FLD (i_src1);
|
2316 |
|
|
* FLD (i_dst) = opval;
|
2317 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2318 |
|
|
}
|
2319 |
|
|
{
|
2320 |
|
|
SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
|
2321 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2322 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2323 |
|
|
}
|
2324 |
|
|
}
|
2325 |
|
|
|
2326 |
|
|
return vpc;
|
2327 |
|
|
#undef FLD
|
2328 |
|
|
}
|
2329 |
|
|
|
2330 |
|
|
/* movl1: movl $lit1, $dst */
|
2331 |
|
|
|
2332 |
|
|
static SEM_PC
|
2333 |
|
|
SEM_FN_NAME (i960base,movl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2334 |
|
|
{
|
2335 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
2336 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2337 |
|
|
int UNUSED written = 0;
|
2338 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2339 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2340 |
|
|
|
2341 |
|
|
{
|
2342 |
|
|
SI tmp_dregno;
|
2343 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2344 |
|
|
{
|
2345 |
|
|
SI opval = FLD (f_src1);
|
2346 |
|
|
* FLD (i_dst) = opval;
|
2347 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2348 |
|
|
}
|
2349 |
|
|
{
|
2350 |
|
|
SI opval = 0;
|
2351 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2352 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2353 |
|
|
}
|
2354 |
|
|
}
|
2355 |
|
|
|
2356 |
|
|
return vpc;
|
2357 |
|
|
#undef FLD
|
2358 |
|
|
}
|
2359 |
|
|
|
2360 |
|
|
/* movt: movt $src1, $dst */
|
2361 |
|
|
|
2362 |
|
|
static SEM_PC
|
2363 |
|
|
SEM_FN_NAME (i960base,movt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2364 |
|
|
{
|
2365 |
|
|
#define FLD(f) abuf->fields.sfmt_movq.f
|
2366 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2367 |
|
|
int UNUSED written = 0;
|
2368 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2369 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2370 |
|
|
|
2371 |
|
|
{
|
2372 |
|
|
SI tmp_dregno;
|
2373 |
|
|
SI tmp_sregno;
|
2374 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2375 |
|
|
tmp_sregno = FLD (f_src1);
|
2376 |
|
|
{
|
2377 |
|
|
SI opval = * FLD (i_src1);
|
2378 |
|
|
* FLD (i_dst) = opval;
|
2379 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2380 |
|
|
}
|
2381 |
|
|
{
|
2382 |
|
|
SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
|
2383 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2384 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2385 |
|
|
}
|
2386 |
|
|
{
|
2387 |
|
|
SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]);
|
2388 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
2389 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
2390 |
|
|
}
|
2391 |
|
|
}
|
2392 |
|
|
|
2393 |
|
|
return vpc;
|
2394 |
|
|
#undef FLD
|
2395 |
|
|
}
|
2396 |
|
|
|
2397 |
|
|
/* movt1: movt $lit1, $dst */
|
2398 |
|
|
|
2399 |
|
|
static SEM_PC
|
2400 |
|
|
SEM_FN_NAME (i960base,movt1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2401 |
|
|
{
|
2402 |
|
|
#define FLD(f) abuf->fields.sfmt_movq.f
|
2403 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2404 |
|
|
int UNUSED written = 0;
|
2405 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2406 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2407 |
|
|
|
2408 |
|
|
{
|
2409 |
|
|
SI tmp_dregno;
|
2410 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2411 |
|
|
{
|
2412 |
|
|
SI opval = FLD (f_src1);
|
2413 |
|
|
* FLD (i_dst) = opval;
|
2414 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2415 |
|
|
}
|
2416 |
|
|
{
|
2417 |
|
|
SI opval = 0;
|
2418 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2419 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2420 |
|
|
}
|
2421 |
|
|
{
|
2422 |
|
|
SI opval = 0;
|
2423 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
2424 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
2425 |
|
|
}
|
2426 |
|
|
}
|
2427 |
|
|
|
2428 |
|
|
return vpc;
|
2429 |
|
|
#undef FLD
|
2430 |
|
|
}
|
2431 |
|
|
|
2432 |
|
|
/* movq: movq $src1, $dst */
|
2433 |
|
|
|
2434 |
|
|
static SEM_PC
|
2435 |
|
|
SEM_FN_NAME (i960base,movq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2436 |
|
|
{
|
2437 |
|
|
#define FLD(f) abuf->fields.sfmt_movq.f
|
2438 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2439 |
|
|
int UNUSED written = 0;
|
2440 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2441 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2442 |
|
|
|
2443 |
|
|
{
|
2444 |
|
|
SI tmp_dregno;
|
2445 |
|
|
SI tmp_sregno;
|
2446 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2447 |
|
|
tmp_sregno = FLD (f_src1);
|
2448 |
|
|
{
|
2449 |
|
|
SI opval = * FLD (i_src1);
|
2450 |
|
|
* FLD (i_dst) = opval;
|
2451 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2452 |
|
|
}
|
2453 |
|
|
{
|
2454 |
|
|
SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
|
2455 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2456 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2457 |
|
|
}
|
2458 |
|
|
{
|
2459 |
|
|
SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]);
|
2460 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
2461 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
2462 |
|
|
}
|
2463 |
|
|
{
|
2464 |
|
|
SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]);
|
2465 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
2466 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
2467 |
|
|
}
|
2468 |
|
|
}
|
2469 |
|
|
|
2470 |
|
|
return vpc;
|
2471 |
|
|
#undef FLD
|
2472 |
|
|
}
|
2473 |
|
|
|
2474 |
|
|
/* movq1: movq $lit1, $dst */
|
2475 |
|
|
|
2476 |
|
|
static SEM_PC
|
2477 |
|
|
SEM_FN_NAME (i960base,movq1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2478 |
|
|
{
|
2479 |
|
|
#define FLD(f) abuf->fields.sfmt_movq.f
|
2480 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2481 |
|
|
int UNUSED written = 0;
|
2482 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2483 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2484 |
|
|
|
2485 |
|
|
{
|
2486 |
|
|
SI tmp_dregno;
|
2487 |
|
|
tmp_dregno = FLD (f_srcdst);
|
2488 |
|
|
{
|
2489 |
|
|
SI opval = FLD (f_src1);
|
2490 |
|
|
* FLD (i_dst) = opval;
|
2491 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2492 |
|
|
}
|
2493 |
|
|
{
|
2494 |
|
|
SI opval = 0;
|
2495 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
2496 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
2497 |
|
|
}
|
2498 |
|
|
{
|
2499 |
|
|
SI opval = 0;
|
2500 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
2501 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
2502 |
|
|
}
|
2503 |
|
|
{
|
2504 |
|
|
SI opval = 0;
|
2505 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
2506 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
2507 |
|
|
}
|
2508 |
|
|
}
|
2509 |
|
|
|
2510 |
|
|
return vpc;
|
2511 |
|
|
#undef FLD
|
2512 |
|
|
}
|
2513 |
|
|
|
2514 |
|
|
/* modpc: modpc $src1, $src2, $dst */
|
2515 |
|
|
|
2516 |
|
|
static SEM_PC
|
2517 |
|
|
SEM_FN_NAME (i960base,modpc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2518 |
|
|
{
|
2519 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
2520 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2521 |
|
|
int UNUSED written = 0;
|
2522 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2523 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2524 |
|
|
|
2525 |
|
|
{
|
2526 |
|
|
SI opval = * FLD (i_src2);
|
2527 |
|
|
* FLD (i_dst) = opval;
|
2528 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2529 |
|
|
}
|
2530 |
|
|
|
2531 |
|
|
return vpc;
|
2532 |
|
|
#undef FLD
|
2533 |
|
|
}
|
2534 |
|
|
|
2535 |
|
|
/* modac: modac $src1, $src2, $dst */
|
2536 |
|
|
|
2537 |
|
|
static SEM_PC
|
2538 |
|
|
SEM_FN_NAME (i960base,modac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2539 |
|
|
{
|
2540 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
2541 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2542 |
|
|
int UNUSED written = 0;
|
2543 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2544 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2545 |
|
|
|
2546 |
|
|
{
|
2547 |
|
|
SI opval = * FLD (i_src2);
|
2548 |
|
|
* FLD (i_dst) = opval;
|
2549 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2550 |
|
|
}
|
2551 |
|
|
|
2552 |
|
|
return vpc;
|
2553 |
|
|
#undef FLD
|
2554 |
|
|
}
|
2555 |
|
|
|
2556 |
|
|
/* lda-offset: lda $offset, $dst */
|
2557 |
|
|
|
2558 |
|
|
static SEM_PC
|
2559 |
|
|
SEM_FN_NAME (i960base,lda_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2560 |
|
|
{
|
2561 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2562 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2563 |
|
|
int UNUSED written = 0;
|
2564 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2565 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2566 |
|
|
|
2567 |
|
|
{
|
2568 |
|
|
SI opval = FLD (f_offset);
|
2569 |
|
|
* FLD (i_dst) = opval;
|
2570 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2571 |
|
|
}
|
2572 |
|
|
|
2573 |
|
|
return vpc;
|
2574 |
|
|
#undef FLD
|
2575 |
|
|
}
|
2576 |
|
|
|
2577 |
|
|
/* lda-indirect-offset: lda $offset($abase), $dst */
|
2578 |
|
|
|
2579 |
|
|
static SEM_PC
|
2580 |
|
|
SEM_FN_NAME (i960base,lda_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2581 |
|
|
{
|
2582 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2583 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2584 |
|
|
int UNUSED written = 0;
|
2585 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2586 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2587 |
|
|
|
2588 |
|
|
{
|
2589 |
|
|
SI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
|
2590 |
|
|
* FLD (i_dst) = opval;
|
2591 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2592 |
|
|
}
|
2593 |
|
|
|
2594 |
|
|
return vpc;
|
2595 |
|
|
#undef FLD
|
2596 |
|
|
}
|
2597 |
|
|
|
2598 |
|
|
/* lda-indirect: lda ($abase), $dst */
|
2599 |
|
|
|
2600 |
|
|
static SEM_PC
|
2601 |
|
|
SEM_FN_NAME (i960base,lda_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2602 |
|
|
{
|
2603 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2604 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2605 |
|
|
int UNUSED written = 0;
|
2606 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2607 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2608 |
|
|
|
2609 |
|
|
{
|
2610 |
|
|
SI opval = * FLD (i_abase);
|
2611 |
|
|
* FLD (i_dst) = opval;
|
2612 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2613 |
|
|
}
|
2614 |
|
|
|
2615 |
|
|
return vpc;
|
2616 |
|
|
#undef FLD
|
2617 |
|
|
}
|
2618 |
|
|
|
2619 |
|
|
/* lda-indirect-index: lda ($abase)[$index*S$scale], $dst */
|
2620 |
|
|
|
2621 |
|
|
static SEM_PC
|
2622 |
|
|
SEM_FN_NAME (i960base,lda_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2623 |
|
|
{
|
2624 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2625 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2626 |
|
|
int UNUSED written = 0;
|
2627 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2628 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2629 |
|
|
|
2630 |
|
|
{
|
2631 |
|
|
SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
2632 |
|
|
* FLD (i_dst) = opval;
|
2633 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2634 |
|
|
}
|
2635 |
|
|
|
2636 |
|
|
return vpc;
|
2637 |
|
|
#undef FLD
|
2638 |
|
|
}
|
2639 |
|
|
|
2640 |
|
|
/* lda-disp: lda $optdisp, $dst */
|
2641 |
|
|
|
2642 |
|
|
static SEM_PC
|
2643 |
|
|
SEM_FN_NAME (i960base,lda_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2644 |
|
|
{
|
2645 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2646 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2647 |
|
|
int UNUSED written = 0;
|
2648 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2649 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2650 |
|
|
|
2651 |
|
|
{
|
2652 |
|
|
SI opval = FLD (f_optdisp);
|
2653 |
|
|
* FLD (i_dst) = opval;
|
2654 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2655 |
|
|
}
|
2656 |
|
|
|
2657 |
|
|
return vpc;
|
2658 |
|
|
#undef FLD
|
2659 |
|
|
}
|
2660 |
|
|
|
2661 |
|
|
/* lda-indirect-disp: lda $optdisp($abase), $dst */
|
2662 |
|
|
|
2663 |
|
|
static SEM_PC
|
2664 |
|
|
SEM_FN_NAME (i960base,lda_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2665 |
|
|
{
|
2666 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2667 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2668 |
|
|
int UNUSED written = 0;
|
2669 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2670 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2671 |
|
|
|
2672 |
|
|
{
|
2673 |
|
|
SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase));
|
2674 |
|
|
* FLD (i_dst) = opval;
|
2675 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2676 |
|
|
}
|
2677 |
|
|
|
2678 |
|
|
return vpc;
|
2679 |
|
|
#undef FLD
|
2680 |
|
|
}
|
2681 |
|
|
|
2682 |
|
|
/* lda-index-disp: lda $optdisp[$index*S$scale], $dst */
|
2683 |
|
|
|
2684 |
|
|
static SEM_PC
|
2685 |
|
|
SEM_FN_NAME (i960base,lda_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2686 |
|
|
{
|
2687 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2688 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2689 |
|
|
int UNUSED written = 0;
|
2690 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2691 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2692 |
|
|
|
2693 |
|
|
{
|
2694 |
|
|
SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
2695 |
|
|
* FLD (i_dst) = opval;
|
2696 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2697 |
|
|
}
|
2698 |
|
|
|
2699 |
|
|
return vpc;
|
2700 |
|
|
#undef FLD
|
2701 |
|
|
}
|
2702 |
|
|
|
2703 |
|
|
/* lda-indirect-index-disp: lda $optdisp($abase)[$index*S$scale], $dst */
|
2704 |
|
|
|
2705 |
|
|
static SEM_PC
|
2706 |
|
|
SEM_FN_NAME (i960base,lda_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2707 |
|
|
{
|
2708 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2709 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2710 |
|
|
int UNUSED written = 0;
|
2711 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2712 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2713 |
|
|
|
2714 |
|
|
{
|
2715 |
|
|
SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
2716 |
|
|
* FLD (i_dst) = opval;
|
2717 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2718 |
|
|
}
|
2719 |
|
|
|
2720 |
|
|
return vpc;
|
2721 |
|
|
#undef FLD
|
2722 |
|
|
}
|
2723 |
|
|
|
2724 |
|
|
/* ld-offset: ld $offset, $dst */
|
2725 |
|
|
|
2726 |
|
|
static SEM_PC
|
2727 |
|
|
SEM_FN_NAME (i960base,ld_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2728 |
|
|
{
|
2729 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2730 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2731 |
|
|
int UNUSED written = 0;
|
2732 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2733 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2734 |
|
|
|
2735 |
|
|
{
|
2736 |
|
|
SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset));
|
2737 |
|
|
* FLD (i_dst) = opval;
|
2738 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2739 |
|
|
}
|
2740 |
|
|
|
2741 |
|
|
return vpc;
|
2742 |
|
|
#undef FLD
|
2743 |
|
|
}
|
2744 |
|
|
|
2745 |
|
|
/* ld-indirect-offset: ld $offset($abase), $dst */
|
2746 |
|
|
|
2747 |
|
|
static SEM_PC
|
2748 |
|
|
SEM_FN_NAME (i960base,ld_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2749 |
|
|
{
|
2750 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2751 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2752 |
|
|
int UNUSED written = 0;
|
2753 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2754 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2755 |
|
|
|
2756 |
|
|
{
|
2757 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
|
2758 |
|
|
* FLD (i_dst) = opval;
|
2759 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2760 |
|
|
}
|
2761 |
|
|
|
2762 |
|
|
return vpc;
|
2763 |
|
|
#undef FLD
|
2764 |
|
|
}
|
2765 |
|
|
|
2766 |
|
|
/* ld-indirect: ld ($abase), $dst */
|
2767 |
|
|
|
2768 |
|
|
static SEM_PC
|
2769 |
|
|
SEM_FN_NAME (i960base,ld_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2770 |
|
|
{
|
2771 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2772 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2773 |
|
|
int UNUSED written = 0;
|
2774 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2775 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2776 |
|
|
|
2777 |
|
|
{
|
2778 |
|
|
SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase));
|
2779 |
|
|
* FLD (i_dst) = opval;
|
2780 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2781 |
|
|
}
|
2782 |
|
|
|
2783 |
|
|
return vpc;
|
2784 |
|
|
#undef FLD
|
2785 |
|
|
}
|
2786 |
|
|
|
2787 |
|
|
/* ld-indirect-index: ld ($abase)[$index*S$scale], $dst */
|
2788 |
|
|
|
2789 |
|
|
static SEM_PC
|
2790 |
|
|
SEM_FN_NAME (i960base,ld_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2791 |
|
|
{
|
2792 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2793 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2794 |
|
|
int UNUSED written = 0;
|
2795 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2796 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2797 |
|
|
|
2798 |
|
|
{
|
2799 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
2800 |
|
|
* FLD (i_dst) = opval;
|
2801 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2802 |
|
|
}
|
2803 |
|
|
|
2804 |
|
|
return vpc;
|
2805 |
|
|
#undef FLD
|
2806 |
|
|
}
|
2807 |
|
|
|
2808 |
|
|
/* ld-disp: ld $optdisp, $dst */
|
2809 |
|
|
|
2810 |
|
|
static SEM_PC
|
2811 |
|
|
SEM_FN_NAME (i960base,ld_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2812 |
|
|
{
|
2813 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2814 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2815 |
|
|
int UNUSED written = 0;
|
2816 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2817 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2818 |
|
|
|
2819 |
|
|
{
|
2820 |
|
|
SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp));
|
2821 |
|
|
* FLD (i_dst) = opval;
|
2822 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2823 |
|
|
}
|
2824 |
|
|
|
2825 |
|
|
return vpc;
|
2826 |
|
|
#undef FLD
|
2827 |
|
|
}
|
2828 |
|
|
|
2829 |
|
|
/* ld-indirect-disp: ld $optdisp($abase), $dst */
|
2830 |
|
|
|
2831 |
|
|
static SEM_PC
|
2832 |
|
|
SEM_FN_NAME (i960base,ld_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2833 |
|
|
{
|
2834 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2835 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2836 |
|
|
int UNUSED written = 0;
|
2837 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2838 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2839 |
|
|
|
2840 |
|
|
{
|
2841 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
|
2842 |
|
|
* FLD (i_dst) = opval;
|
2843 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2844 |
|
|
}
|
2845 |
|
|
|
2846 |
|
|
return vpc;
|
2847 |
|
|
#undef FLD
|
2848 |
|
|
}
|
2849 |
|
|
|
2850 |
|
|
/* ld-index-disp: ld $optdisp[$index*S$scale], $dst */
|
2851 |
|
|
|
2852 |
|
|
static SEM_PC
|
2853 |
|
|
SEM_FN_NAME (i960base,ld_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2854 |
|
|
{
|
2855 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2856 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2857 |
|
|
int UNUSED written = 0;
|
2858 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2859 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2860 |
|
|
|
2861 |
|
|
{
|
2862 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
2863 |
|
|
* FLD (i_dst) = opval;
|
2864 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2865 |
|
|
}
|
2866 |
|
|
|
2867 |
|
|
return vpc;
|
2868 |
|
|
#undef FLD
|
2869 |
|
|
}
|
2870 |
|
|
|
2871 |
|
|
/* ld-indirect-index-disp: ld $optdisp($abase)[$index*S$scale], $dst */
|
2872 |
|
|
|
2873 |
|
|
static SEM_PC
|
2874 |
|
|
SEM_FN_NAME (i960base,ld_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2875 |
|
|
{
|
2876 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2877 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2878 |
|
|
int UNUSED written = 0;
|
2879 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2880 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2881 |
|
|
|
2882 |
|
|
{
|
2883 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
|
2884 |
|
|
* FLD (i_dst) = opval;
|
2885 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2886 |
|
|
}
|
2887 |
|
|
|
2888 |
|
|
return vpc;
|
2889 |
|
|
#undef FLD
|
2890 |
|
|
}
|
2891 |
|
|
|
2892 |
|
|
/* ldob-offset: ldob $offset, $dst */
|
2893 |
|
|
|
2894 |
|
|
static SEM_PC
|
2895 |
|
|
SEM_FN_NAME (i960base,ldob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2896 |
|
|
{
|
2897 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2898 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2899 |
|
|
int UNUSED written = 0;
|
2900 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2901 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2902 |
|
|
|
2903 |
|
|
{
|
2904 |
|
|
SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset));
|
2905 |
|
|
* FLD (i_dst) = opval;
|
2906 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2907 |
|
|
}
|
2908 |
|
|
|
2909 |
|
|
return vpc;
|
2910 |
|
|
#undef FLD
|
2911 |
|
|
}
|
2912 |
|
|
|
2913 |
|
|
/* ldob-indirect-offset: ldob $offset($abase), $dst */
|
2914 |
|
|
|
2915 |
|
|
static SEM_PC
|
2916 |
|
|
SEM_FN_NAME (i960base,ldob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2917 |
|
|
{
|
2918 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2919 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2920 |
|
|
int UNUSED written = 0;
|
2921 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2922 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2923 |
|
|
|
2924 |
|
|
{
|
2925 |
|
|
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
|
2926 |
|
|
* FLD (i_dst) = opval;
|
2927 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2928 |
|
|
}
|
2929 |
|
|
|
2930 |
|
|
return vpc;
|
2931 |
|
|
#undef FLD
|
2932 |
|
|
}
|
2933 |
|
|
|
2934 |
|
|
/* ldob-indirect: ldob ($abase), $dst */
|
2935 |
|
|
|
2936 |
|
|
static SEM_PC
|
2937 |
|
|
SEM_FN_NAME (i960base,ldob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2938 |
|
|
{
|
2939 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
2940 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2941 |
|
|
int UNUSED written = 0;
|
2942 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2943 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2944 |
|
|
|
2945 |
|
|
{
|
2946 |
|
|
SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase));
|
2947 |
|
|
* FLD (i_dst) = opval;
|
2948 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2949 |
|
|
}
|
2950 |
|
|
|
2951 |
|
|
return vpc;
|
2952 |
|
|
#undef FLD
|
2953 |
|
|
}
|
2954 |
|
|
|
2955 |
|
|
/* ldob-indirect-index: ldob ($abase)[$index*S$scale], $dst */
|
2956 |
|
|
|
2957 |
|
|
static SEM_PC
|
2958 |
|
|
SEM_FN_NAME (i960base,ldob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2959 |
|
|
{
|
2960 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2961 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2962 |
|
|
int UNUSED written = 0;
|
2963 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2964 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
2965 |
|
|
|
2966 |
|
|
{
|
2967 |
|
|
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
2968 |
|
|
* FLD (i_dst) = opval;
|
2969 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2970 |
|
|
}
|
2971 |
|
|
|
2972 |
|
|
return vpc;
|
2973 |
|
|
#undef FLD
|
2974 |
|
|
}
|
2975 |
|
|
|
2976 |
|
|
/* ldob-disp: ldob $optdisp, $dst */
|
2977 |
|
|
|
2978 |
|
|
static SEM_PC
|
2979 |
|
|
SEM_FN_NAME (i960base,ldob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
2980 |
|
|
{
|
2981 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
2982 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
2983 |
|
|
int UNUSED written = 0;
|
2984 |
|
|
IADDR UNUSED pc = abuf->addr;
|
2985 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
2986 |
|
|
|
2987 |
|
|
{
|
2988 |
|
|
SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp));
|
2989 |
|
|
* FLD (i_dst) = opval;
|
2990 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
2991 |
|
|
}
|
2992 |
|
|
|
2993 |
|
|
return vpc;
|
2994 |
|
|
#undef FLD
|
2995 |
|
|
}
|
2996 |
|
|
|
2997 |
|
|
/* ldob-indirect-disp: ldob $optdisp($abase), $dst */
|
2998 |
|
|
|
2999 |
|
|
static SEM_PC
|
3000 |
|
|
SEM_FN_NAME (i960base,ldob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3001 |
|
|
{
|
3002 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3003 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3004 |
|
|
int UNUSED written = 0;
|
3005 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3006 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3007 |
|
|
|
3008 |
|
|
{
|
3009 |
|
|
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
|
3010 |
|
|
* FLD (i_dst) = opval;
|
3011 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3012 |
|
|
}
|
3013 |
|
|
|
3014 |
|
|
return vpc;
|
3015 |
|
|
#undef FLD
|
3016 |
|
|
}
|
3017 |
|
|
|
3018 |
|
|
/* ldob-index-disp: ldob $optdisp[$index*S$scale], $dst */
|
3019 |
|
|
|
3020 |
|
|
static SEM_PC
|
3021 |
|
|
SEM_FN_NAME (i960base,ldob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3022 |
|
|
{
|
3023 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3024 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3025 |
|
|
int UNUSED written = 0;
|
3026 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3027 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3028 |
|
|
|
3029 |
|
|
{
|
3030 |
|
|
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
3031 |
|
|
* FLD (i_dst) = opval;
|
3032 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3033 |
|
|
}
|
3034 |
|
|
|
3035 |
|
|
return vpc;
|
3036 |
|
|
#undef FLD
|
3037 |
|
|
}
|
3038 |
|
|
|
3039 |
|
|
/* ldob-indirect-index-disp: ldob $optdisp($abase)[$index*S$scale], $dst */
|
3040 |
|
|
|
3041 |
|
|
static SEM_PC
|
3042 |
|
|
SEM_FN_NAME (i960base,ldob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3043 |
|
|
{
|
3044 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3045 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3046 |
|
|
int UNUSED written = 0;
|
3047 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3048 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3049 |
|
|
|
3050 |
|
|
{
|
3051 |
|
|
SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
|
3052 |
|
|
* FLD (i_dst) = opval;
|
3053 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3054 |
|
|
}
|
3055 |
|
|
|
3056 |
|
|
return vpc;
|
3057 |
|
|
#undef FLD
|
3058 |
|
|
}
|
3059 |
|
|
|
3060 |
|
|
/* ldos-offset: ldos $offset, $dst */
|
3061 |
|
|
|
3062 |
|
|
static SEM_PC
|
3063 |
|
|
SEM_FN_NAME (i960base,ldos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3064 |
|
|
{
|
3065 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3066 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3067 |
|
|
int UNUSED written = 0;
|
3068 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3069 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3070 |
|
|
|
3071 |
|
|
{
|
3072 |
|
|
SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset));
|
3073 |
|
|
* FLD (i_dst) = opval;
|
3074 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3075 |
|
|
}
|
3076 |
|
|
|
3077 |
|
|
return vpc;
|
3078 |
|
|
#undef FLD
|
3079 |
|
|
}
|
3080 |
|
|
|
3081 |
|
|
/* ldos-indirect-offset: ldos $offset($abase), $dst */
|
3082 |
|
|
|
3083 |
|
|
static SEM_PC
|
3084 |
|
|
SEM_FN_NAME (i960base,ldos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3085 |
|
|
{
|
3086 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3087 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3088 |
|
|
int UNUSED written = 0;
|
3089 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3090 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3091 |
|
|
|
3092 |
|
|
{
|
3093 |
|
|
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
|
3094 |
|
|
* FLD (i_dst) = opval;
|
3095 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3096 |
|
|
}
|
3097 |
|
|
|
3098 |
|
|
return vpc;
|
3099 |
|
|
#undef FLD
|
3100 |
|
|
}
|
3101 |
|
|
|
3102 |
|
|
/* ldos-indirect: ldos ($abase), $dst */
|
3103 |
|
|
|
3104 |
|
|
static SEM_PC
|
3105 |
|
|
SEM_FN_NAME (i960base,ldos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3106 |
|
|
{
|
3107 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3108 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3109 |
|
|
int UNUSED written = 0;
|
3110 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3111 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3112 |
|
|
|
3113 |
|
|
{
|
3114 |
|
|
SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase));
|
3115 |
|
|
* FLD (i_dst) = opval;
|
3116 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3117 |
|
|
}
|
3118 |
|
|
|
3119 |
|
|
return vpc;
|
3120 |
|
|
#undef FLD
|
3121 |
|
|
}
|
3122 |
|
|
|
3123 |
|
|
/* ldos-indirect-index: ldos ($abase)[$index*S$scale], $dst */
|
3124 |
|
|
|
3125 |
|
|
static SEM_PC
|
3126 |
|
|
SEM_FN_NAME (i960base,ldos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3127 |
|
|
{
|
3128 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3129 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3130 |
|
|
int UNUSED written = 0;
|
3131 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3132 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3133 |
|
|
|
3134 |
|
|
{
|
3135 |
|
|
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
3136 |
|
|
* FLD (i_dst) = opval;
|
3137 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3138 |
|
|
}
|
3139 |
|
|
|
3140 |
|
|
return vpc;
|
3141 |
|
|
#undef FLD
|
3142 |
|
|
}
|
3143 |
|
|
|
3144 |
|
|
/* ldos-disp: ldos $optdisp, $dst */
|
3145 |
|
|
|
3146 |
|
|
static SEM_PC
|
3147 |
|
|
SEM_FN_NAME (i960base,ldos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3148 |
|
|
{
|
3149 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3150 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3151 |
|
|
int UNUSED written = 0;
|
3152 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3153 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3154 |
|
|
|
3155 |
|
|
{
|
3156 |
|
|
SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp));
|
3157 |
|
|
* FLD (i_dst) = opval;
|
3158 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3159 |
|
|
}
|
3160 |
|
|
|
3161 |
|
|
return vpc;
|
3162 |
|
|
#undef FLD
|
3163 |
|
|
}
|
3164 |
|
|
|
3165 |
|
|
/* ldos-indirect-disp: ldos $optdisp($abase), $dst */
|
3166 |
|
|
|
3167 |
|
|
static SEM_PC
|
3168 |
|
|
SEM_FN_NAME (i960base,ldos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3169 |
|
|
{
|
3170 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3171 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3172 |
|
|
int UNUSED written = 0;
|
3173 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3174 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3175 |
|
|
|
3176 |
|
|
{
|
3177 |
|
|
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
|
3178 |
|
|
* FLD (i_dst) = opval;
|
3179 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3180 |
|
|
}
|
3181 |
|
|
|
3182 |
|
|
return vpc;
|
3183 |
|
|
#undef FLD
|
3184 |
|
|
}
|
3185 |
|
|
|
3186 |
|
|
/* ldos-index-disp: ldos $optdisp[$index*S$scale], $dst */
|
3187 |
|
|
|
3188 |
|
|
static SEM_PC
|
3189 |
|
|
SEM_FN_NAME (i960base,ldos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3190 |
|
|
{
|
3191 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3192 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3193 |
|
|
int UNUSED written = 0;
|
3194 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3195 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3196 |
|
|
|
3197 |
|
|
{
|
3198 |
|
|
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
3199 |
|
|
* FLD (i_dst) = opval;
|
3200 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3201 |
|
|
}
|
3202 |
|
|
|
3203 |
|
|
return vpc;
|
3204 |
|
|
#undef FLD
|
3205 |
|
|
}
|
3206 |
|
|
|
3207 |
|
|
/* ldos-indirect-index-disp: ldos $optdisp($abase)[$index*S$scale], $dst */
|
3208 |
|
|
|
3209 |
|
|
static SEM_PC
|
3210 |
|
|
SEM_FN_NAME (i960base,ldos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3211 |
|
|
{
|
3212 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3213 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3214 |
|
|
int UNUSED written = 0;
|
3215 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3216 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3217 |
|
|
|
3218 |
|
|
{
|
3219 |
|
|
SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
|
3220 |
|
|
* FLD (i_dst) = opval;
|
3221 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3222 |
|
|
}
|
3223 |
|
|
|
3224 |
|
|
return vpc;
|
3225 |
|
|
#undef FLD
|
3226 |
|
|
}
|
3227 |
|
|
|
3228 |
|
|
/* ldib-offset: ldib $offset, $dst */
|
3229 |
|
|
|
3230 |
|
|
static SEM_PC
|
3231 |
|
|
SEM_FN_NAME (i960base,ldib_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3232 |
|
|
{
|
3233 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3234 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3235 |
|
|
int UNUSED written = 0;
|
3236 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3237 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3238 |
|
|
|
3239 |
|
|
{
|
3240 |
|
|
SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset));
|
3241 |
|
|
* FLD (i_dst) = opval;
|
3242 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3243 |
|
|
}
|
3244 |
|
|
|
3245 |
|
|
return vpc;
|
3246 |
|
|
#undef FLD
|
3247 |
|
|
}
|
3248 |
|
|
|
3249 |
|
|
/* ldib-indirect-offset: ldib $offset($abase), $dst */
|
3250 |
|
|
|
3251 |
|
|
static SEM_PC
|
3252 |
|
|
SEM_FN_NAME (i960base,ldib_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3253 |
|
|
{
|
3254 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3255 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3256 |
|
|
int UNUSED written = 0;
|
3257 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3258 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3259 |
|
|
|
3260 |
|
|
{
|
3261 |
|
|
SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
|
3262 |
|
|
* FLD (i_dst) = opval;
|
3263 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3264 |
|
|
}
|
3265 |
|
|
|
3266 |
|
|
return vpc;
|
3267 |
|
|
#undef FLD
|
3268 |
|
|
}
|
3269 |
|
|
|
3270 |
|
|
/* ldib-indirect: ldib ($abase), $dst */
|
3271 |
|
|
|
3272 |
|
|
static SEM_PC
|
3273 |
|
|
SEM_FN_NAME (i960base,ldib_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3274 |
|
|
{
|
3275 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3276 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3277 |
|
|
int UNUSED written = 0;
|
3278 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3279 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3280 |
|
|
|
3281 |
|
|
{
|
3282 |
|
|
SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase));
|
3283 |
|
|
* FLD (i_dst) = opval;
|
3284 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3285 |
|
|
}
|
3286 |
|
|
|
3287 |
|
|
return vpc;
|
3288 |
|
|
#undef FLD
|
3289 |
|
|
}
|
3290 |
|
|
|
3291 |
|
|
/* ldib-indirect-index: ldib ($abase)[$index*S$scale], $dst */
|
3292 |
|
|
|
3293 |
|
|
static SEM_PC
|
3294 |
|
|
SEM_FN_NAME (i960base,ldib_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3295 |
|
|
{
|
3296 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3297 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3298 |
|
|
int UNUSED written = 0;
|
3299 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3300 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3301 |
|
|
|
3302 |
|
|
{
|
3303 |
|
|
SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
3304 |
|
|
* FLD (i_dst) = opval;
|
3305 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3306 |
|
|
}
|
3307 |
|
|
|
3308 |
|
|
return vpc;
|
3309 |
|
|
#undef FLD
|
3310 |
|
|
}
|
3311 |
|
|
|
3312 |
|
|
/* ldib-disp: ldib $optdisp, $dst */
|
3313 |
|
|
|
3314 |
|
|
static SEM_PC
|
3315 |
|
|
SEM_FN_NAME (i960base,ldib_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3316 |
|
|
{
|
3317 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3318 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3319 |
|
|
int UNUSED written = 0;
|
3320 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3321 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3322 |
|
|
|
3323 |
|
|
{
|
3324 |
|
|
SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp));
|
3325 |
|
|
* FLD (i_dst) = opval;
|
3326 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3327 |
|
|
}
|
3328 |
|
|
|
3329 |
|
|
return vpc;
|
3330 |
|
|
#undef FLD
|
3331 |
|
|
}
|
3332 |
|
|
|
3333 |
|
|
/* ldib-indirect-disp: ldib $optdisp($abase), $dst */
|
3334 |
|
|
|
3335 |
|
|
static SEM_PC
|
3336 |
|
|
SEM_FN_NAME (i960base,ldib_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3337 |
|
|
{
|
3338 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3339 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3340 |
|
|
int UNUSED written = 0;
|
3341 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3342 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3343 |
|
|
|
3344 |
|
|
{
|
3345 |
|
|
SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
|
3346 |
|
|
* FLD (i_dst) = opval;
|
3347 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3348 |
|
|
}
|
3349 |
|
|
|
3350 |
|
|
return vpc;
|
3351 |
|
|
#undef FLD
|
3352 |
|
|
}
|
3353 |
|
|
|
3354 |
|
|
/* ldib-index-disp: ldib $optdisp[$index*S$scale], $dst */
|
3355 |
|
|
|
3356 |
|
|
static SEM_PC
|
3357 |
|
|
SEM_FN_NAME (i960base,ldib_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3358 |
|
|
{
|
3359 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3360 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3361 |
|
|
int UNUSED written = 0;
|
3362 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3363 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3364 |
|
|
|
3365 |
|
|
{
|
3366 |
|
|
SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
3367 |
|
|
* FLD (i_dst) = opval;
|
3368 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3369 |
|
|
}
|
3370 |
|
|
|
3371 |
|
|
return vpc;
|
3372 |
|
|
#undef FLD
|
3373 |
|
|
}
|
3374 |
|
|
|
3375 |
|
|
/* ldib-indirect-index-disp: ldib $optdisp($abase)[$index*S$scale], $dst */
|
3376 |
|
|
|
3377 |
|
|
static SEM_PC
|
3378 |
|
|
SEM_FN_NAME (i960base,ldib_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3379 |
|
|
{
|
3380 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3381 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3382 |
|
|
int UNUSED written = 0;
|
3383 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3384 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3385 |
|
|
|
3386 |
|
|
{
|
3387 |
|
|
SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
|
3388 |
|
|
* FLD (i_dst) = opval;
|
3389 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3390 |
|
|
}
|
3391 |
|
|
|
3392 |
|
|
return vpc;
|
3393 |
|
|
#undef FLD
|
3394 |
|
|
}
|
3395 |
|
|
|
3396 |
|
|
/* ldis-offset: ldis $offset, $dst */
|
3397 |
|
|
|
3398 |
|
|
static SEM_PC
|
3399 |
|
|
SEM_FN_NAME (i960base,ldis_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3400 |
|
|
{
|
3401 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3402 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3403 |
|
|
int UNUSED written = 0;
|
3404 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3405 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3406 |
|
|
|
3407 |
|
|
{
|
3408 |
|
|
SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset));
|
3409 |
|
|
* FLD (i_dst) = opval;
|
3410 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3411 |
|
|
}
|
3412 |
|
|
|
3413 |
|
|
return vpc;
|
3414 |
|
|
#undef FLD
|
3415 |
|
|
}
|
3416 |
|
|
|
3417 |
|
|
/* ldis-indirect-offset: ldis $offset($abase), $dst */
|
3418 |
|
|
|
3419 |
|
|
static SEM_PC
|
3420 |
|
|
SEM_FN_NAME (i960base,ldis_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3421 |
|
|
{
|
3422 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3423 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3424 |
|
|
int UNUSED written = 0;
|
3425 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3426 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3427 |
|
|
|
3428 |
|
|
{
|
3429 |
|
|
SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
|
3430 |
|
|
* FLD (i_dst) = opval;
|
3431 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3432 |
|
|
}
|
3433 |
|
|
|
3434 |
|
|
return vpc;
|
3435 |
|
|
#undef FLD
|
3436 |
|
|
}
|
3437 |
|
|
|
3438 |
|
|
/* ldis-indirect: ldis ($abase), $dst */
|
3439 |
|
|
|
3440 |
|
|
static SEM_PC
|
3441 |
|
|
SEM_FN_NAME (i960base,ldis_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3442 |
|
|
{
|
3443 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3444 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3445 |
|
|
int UNUSED written = 0;
|
3446 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3447 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3448 |
|
|
|
3449 |
|
|
{
|
3450 |
|
|
SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase));
|
3451 |
|
|
* FLD (i_dst) = opval;
|
3452 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3453 |
|
|
}
|
3454 |
|
|
|
3455 |
|
|
return vpc;
|
3456 |
|
|
#undef FLD
|
3457 |
|
|
}
|
3458 |
|
|
|
3459 |
|
|
/* ldis-indirect-index: ldis ($abase)[$index*S$scale], $dst */
|
3460 |
|
|
|
3461 |
|
|
static SEM_PC
|
3462 |
|
|
SEM_FN_NAME (i960base,ldis_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3463 |
|
|
{
|
3464 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3465 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3466 |
|
|
int UNUSED written = 0;
|
3467 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3468 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3469 |
|
|
|
3470 |
|
|
{
|
3471 |
|
|
SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
3472 |
|
|
* FLD (i_dst) = opval;
|
3473 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3474 |
|
|
}
|
3475 |
|
|
|
3476 |
|
|
return vpc;
|
3477 |
|
|
#undef FLD
|
3478 |
|
|
}
|
3479 |
|
|
|
3480 |
|
|
/* ldis-disp: ldis $optdisp, $dst */
|
3481 |
|
|
|
3482 |
|
|
static SEM_PC
|
3483 |
|
|
SEM_FN_NAME (i960base,ldis_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3484 |
|
|
{
|
3485 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3486 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3487 |
|
|
int UNUSED written = 0;
|
3488 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3489 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3490 |
|
|
|
3491 |
|
|
{
|
3492 |
|
|
SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp));
|
3493 |
|
|
* FLD (i_dst) = opval;
|
3494 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3495 |
|
|
}
|
3496 |
|
|
|
3497 |
|
|
return vpc;
|
3498 |
|
|
#undef FLD
|
3499 |
|
|
}
|
3500 |
|
|
|
3501 |
|
|
/* ldis-indirect-disp: ldis $optdisp($abase), $dst */
|
3502 |
|
|
|
3503 |
|
|
static SEM_PC
|
3504 |
|
|
SEM_FN_NAME (i960base,ldis_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3505 |
|
|
{
|
3506 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3507 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3508 |
|
|
int UNUSED written = 0;
|
3509 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3510 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3511 |
|
|
|
3512 |
|
|
{
|
3513 |
|
|
SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
|
3514 |
|
|
* FLD (i_dst) = opval;
|
3515 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3516 |
|
|
}
|
3517 |
|
|
|
3518 |
|
|
return vpc;
|
3519 |
|
|
#undef FLD
|
3520 |
|
|
}
|
3521 |
|
|
|
3522 |
|
|
/* ldis-index-disp: ldis $optdisp[$index*S$scale], $dst */
|
3523 |
|
|
|
3524 |
|
|
static SEM_PC
|
3525 |
|
|
SEM_FN_NAME (i960base,ldis_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3526 |
|
|
{
|
3527 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3528 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3529 |
|
|
int UNUSED written = 0;
|
3530 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3531 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3532 |
|
|
|
3533 |
|
|
{
|
3534 |
|
|
SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
3535 |
|
|
* FLD (i_dst) = opval;
|
3536 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3537 |
|
|
}
|
3538 |
|
|
|
3539 |
|
|
return vpc;
|
3540 |
|
|
#undef FLD
|
3541 |
|
|
}
|
3542 |
|
|
|
3543 |
|
|
/* ldis-indirect-index-disp: ldis $optdisp($abase)[$index*S$scale], $dst */
|
3544 |
|
|
|
3545 |
|
|
static SEM_PC
|
3546 |
|
|
SEM_FN_NAME (i960base,ldis_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3547 |
|
|
{
|
3548 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3549 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3550 |
|
|
int UNUSED written = 0;
|
3551 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3552 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3553 |
|
|
|
3554 |
|
|
{
|
3555 |
|
|
SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
|
3556 |
|
|
* FLD (i_dst) = opval;
|
3557 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3558 |
|
|
}
|
3559 |
|
|
|
3560 |
|
|
return vpc;
|
3561 |
|
|
#undef FLD
|
3562 |
|
|
}
|
3563 |
|
|
|
3564 |
|
|
/* ldl-offset: ldl $offset, $dst */
|
3565 |
|
|
|
3566 |
|
|
static SEM_PC
|
3567 |
|
|
SEM_FN_NAME (i960base,ldl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3568 |
|
|
{
|
3569 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3570 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3571 |
|
|
int UNUSED written = 0;
|
3572 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3573 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3574 |
|
|
|
3575 |
|
|
{
|
3576 |
|
|
SI tmp_temp;
|
3577 |
|
|
SI tmp_dregno;
|
3578 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3579 |
|
|
tmp_temp = FLD (f_offset);
|
3580 |
|
|
{
|
3581 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3582 |
|
|
* FLD (i_dst) = opval;
|
3583 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3584 |
|
|
}
|
3585 |
|
|
{
|
3586 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3587 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3588 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3589 |
|
|
}
|
3590 |
|
|
}
|
3591 |
|
|
|
3592 |
|
|
return vpc;
|
3593 |
|
|
#undef FLD
|
3594 |
|
|
}
|
3595 |
|
|
|
3596 |
|
|
/* ldl-indirect-offset: ldl $offset($abase), $dst */
|
3597 |
|
|
|
3598 |
|
|
static SEM_PC
|
3599 |
|
|
SEM_FN_NAME (i960base,ldl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3600 |
|
|
{
|
3601 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3602 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3603 |
|
|
int UNUSED written = 0;
|
3604 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3605 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3606 |
|
|
|
3607 |
|
|
{
|
3608 |
|
|
SI tmp_temp;
|
3609 |
|
|
SI tmp_dregno;
|
3610 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3611 |
|
|
tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
|
3612 |
|
|
{
|
3613 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3614 |
|
|
* FLD (i_dst) = opval;
|
3615 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3616 |
|
|
}
|
3617 |
|
|
{
|
3618 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3619 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3620 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3621 |
|
|
}
|
3622 |
|
|
}
|
3623 |
|
|
|
3624 |
|
|
return vpc;
|
3625 |
|
|
#undef FLD
|
3626 |
|
|
}
|
3627 |
|
|
|
3628 |
|
|
/* ldl-indirect: ldl ($abase), $dst */
|
3629 |
|
|
|
3630 |
|
|
static SEM_PC
|
3631 |
|
|
SEM_FN_NAME (i960base,ldl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3632 |
|
|
{
|
3633 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3634 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3635 |
|
|
int UNUSED written = 0;
|
3636 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3637 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3638 |
|
|
|
3639 |
|
|
{
|
3640 |
|
|
SI tmp_temp;
|
3641 |
|
|
SI tmp_dregno;
|
3642 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3643 |
|
|
tmp_temp = * FLD (i_abase);
|
3644 |
|
|
{
|
3645 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3646 |
|
|
* FLD (i_dst) = opval;
|
3647 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3648 |
|
|
}
|
3649 |
|
|
{
|
3650 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3651 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3652 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3653 |
|
|
}
|
3654 |
|
|
}
|
3655 |
|
|
|
3656 |
|
|
return vpc;
|
3657 |
|
|
#undef FLD
|
3658 |
|
|
}
|
3659 |
|
|
|
3660 |
|
|
/* ldl-indirect-index: ldl ($abase)[$index*S$scale], $dst */
|
3661 |
|
|
|
3662 |
|
|
static SEM_PC
|
3663 |
|
|
SEM_FN_NAME (i960base,ldl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3664 |
|
|
{
|
3665 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3666 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3667 |
|
|
int UNUSED written = 0;
|
3668 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3669 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3670 |
|
|
|
3671 |
|
|
{
|
3672 |
|
|
SI tmp_temp;
|
3673 |
|
|
SI tmp_dregno;
|
3674 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3675 |
|
|
tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
3676 |
|
|
{
|
3677 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3678 |
|
|
* FLD (i_dst) = opval;
|
3679 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3680 |
|
|
}
|
3681 |
|
|
{
|
3682 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3683 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3684 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3685 |
|
|
}
|
3686 |
|
|
}
|
3687 |
|
|
|
3688 |
|
|
return vpc;
|
3689 |
|
|
#undef FLD
|
3690 |
|
|
}
|
3691 |
|
|
|
3692 |
|
|
/* ldl-disp: ldl $optdisp, $dst */
|
3693 |
|
|
|
3694 |
|
|
static SEM_PC
|
3695 |
|
|
SEM_FN_NAME (i960base,ldl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3696 |
|
|
{
|
3697 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3698 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3699 |
|
|
int UNUSED written = 0;
|
3700 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3701 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3702 |
|
|
|
3703 |
|
|
{
|
3704 |
|
|
SI tmp_temp;
|
3705 |
|
|
SI tmp_dregno;
|
3706 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3707 |
|
|
tmp_temp = FLD (f_optdisp);
|
3708 |
|
|
{
|
3709 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3710 |
|
|
* FLD (i_dst) = opval;
|
3711 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3712 |
|
|
}
|
3713 |
|
|
{
|
3714 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3715 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3716 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3717 |
|
|
}
|
3718 |
|
|
}
|
3719 |
|
|
|
3720 |
|
|
return vpc;
|
3721 |
|
|
#undef FLD
|
3722 |
|
|
}
|
3723 |
|
|
|
3724 |
|
|
/* ldl-indirect-disp: ldl $optdisp($abase), $dst */
|
3725 |
|
|
|
3726 |
|
|
static SEM_PC
|
3727 |
|
|
SEM_FN_NAME (i960base,ldl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3728 |
|
|
{
|
3729 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3730 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3731 |
|
|
int UNUSED written = 0;
|
3732 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3733 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3734 |
|
|
|
3735 |
|
|
{
|
3736 |
|
|
SI tmp_temp;
|
3737 |
|
|
SI tmp_dregno;
|
3738 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3739 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
|
3740 |
|
|
{
|
3741 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3742 |
|
|
* FLD (i_dst) = opval;
|
3743 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3744 |
|
|
}
|
3745 |
|
|
{
|
3746 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3747 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3748 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3749 |
|
|
}
|
3750 |
|
|
}
|
3751 |
|
|
|
3752 |
|
|
return vpc;
|
3753 |
|
|
#undef FLD
|
3754 |
|
|
}
|
3755 |
|
|
|
3756 |
|
|
/* ldl-index-disp: ldl $optdisp[$index*S$scale], $dst */
|
3757 |
|
|
|
3758 |
|
|
static SEM_PC
|
3759 |
|
|
SEM_FN_NAME (i960base,ldl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3760 |
|
|
{
|
3761 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3762 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3763 |
|
|
int UNUSED written = 0;
|
3764 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3765 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3766 |
|
|
|
3767 |
|
|
{
|
3768 |
|
|
SI tmp_temp;
|
3769 |
|
|
SI tmp_dregno;
|
3770 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3771 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
3772 |
|
|
{
|
3773 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3774 |
|
|
* FLD (i_dst) = opval;
|
3775 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3776 |
|
|
}
|
3777 |
|
|
{
|
3778 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3779 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3780 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3781 |
|
|
}
|
3782 |
|
|
}
|
3783 |
|
|
|
3784 |
|
|
return vpc;
|
3785 |
|
|
#undef FLD
|
3786 |
|
|
}
|
3787 |
|
|
|
3788 |
|
|
/* ldl-indirect-index-disp: ldl $optdisp($abase)[$index*S$scale], $dst */
|
3789 |
|
|
|
3790 |
|
|
static SEM_PC
|
3791 |
|
|
SEM_FN_NAME (i960base,ldl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3792 |
|
|
{
|
3793 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3794 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3795 |
|
|
int UNUSED written = 0;
|
3796 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3797 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3798 |
|
|
|
3799 |
|
|
{
|
3800 |
|
|
SI tmp_temp;
|
3801 |
|
|
SI tmp_dregno;
|
3802 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3803 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
3804 |
|
|
{
|
3805 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3806 |
|
|
* FLD (i_dst) = opval;
|
3807 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3808 |
|
|
}
|
3809 |
|
|
{
|
3810 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3811 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3812 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3813 |
|
|
}
|
3814 |
|
|
}
|
3815 |
|
|
|
3816 |
|
|
return vpc;
|
3817 |
|
|
#undef FLD
|
3818 |
|
|
}
|
3819 |
|
|
|
3820 |
|
|
/* ldt-offset: ldt $offset, $dst */
|
3821 |
|
|
|
3822 |
|
|
static SEM_PC
|
3823 |
|
|
SEM_FN_NAME (i960base,ldt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3824 |
|
|
{
|
3825 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3826 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3827 |
|
|
int UNUSED written = 0;
|
3828 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3829 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3830 |
|
|
|
3831 |
|
|
{
|
3832 |
|
|
SI tmp_temp;
|
3833 |
|
|
SI tmp_dregno;
|
3834 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3835 |
|
|
tmp_temp = FLD (f_offset);
|
3836 |
|
|
{
|
3837 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3838 |
|
|
* FLD (i_dst) = opval;
|
3839 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3840 |
|
|
}
|
3841 |
|
|
{
|
3842 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3843 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3844 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3845 |
|
|
}
|
3846 |
|
|
{
|
3847 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
3848 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
3849 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
3850 |
|
|
}
|
3851 |
|
|
}
|
3852 |
|
|
|
3853 |
|
|
return vpc;
|
3854 |
|
|
#undef FLD
|
3855 |
|
|
}
|
3856 |
|
|
|
3857 |
|
|
/* ldt-indirect-offset: ldt $offset($abase), $dst */
|
3858 |
|
|
|
3859 |
|
|
static SEM_PC
|
3860 |
|
|
SEM_FN_NAME (i960base,ldt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3861 |
|
|
{
|
3862 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3863 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3864 |
|
|
int UNUSED written = 0;
|
3865 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3866 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3867 |
|
|
|
3868 |
|
|
{
|
3869 |
|
|
SI tmp_temp;
|
3870 |
|
|
SI tmp_dregno;
|
3871 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3872 |
|
|
tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
|
3873 |
|
|
{
|
3874 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3875 |
|
|
* FLD (i_dst) = opval;
|
3876 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3877 |
|
|
}
|
3878 |
|
|
{
|
3879 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3880 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3881 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3882 |
|
|
}
|
3883 |
|
|
{
|
3884 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
3885 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
3886 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
3887 |
|
|
}
|
3888 |
|
|
}
|
3889 |
|
|
|
3890 |
|
|
return vpc;
|
3891 |
|
|
#undef FLD
|
3892 |
|
|
}
|
3893 |
|
|
|
3894 |
|
|
/* ldt-indirect: ldt ($abase), $dst */
|
3895 |
|
|
|
3896 |
|
|
static SEM_PC
|
3897 |
|
|
SEM_FN_NAME (i960base,ldt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3898 |
|
|
{
|
3899 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
3900 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3901 |
|
|
int UNUSED written = 0;
|
3902 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3903 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3904 |
|
|
|
3905 |
|
|
{
|
3906 |
|
|
SI tmp_temp;
|
3907 |
|
|
SI tmp_dregno;
|
3908 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3909 |
|
|
tmp_temp = * FLD (i_abase);
|
3910 |
|
|
{
|
3911 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3912 |
|
|
* FLD (i_dst) = opval;
|
3913 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3914 |
|
|
}
|
3915 |
|
|
{
|
3916 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3917 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3918 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3919 |
|
|
}
|
3920 |
|
|
{
|
3921 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
3922 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
3923 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
3924 |
|
|
}
|
3925 |
|
|
}
|
3926 |
|
|
|
3927 |
|
|
return vpc;
|
3928 |
|
|
#undef FLD
|
3929 |
|
|
}
|
3930 |
|
|
|
3931 |
|
|
/* ldt-indirect-index: ldt ($abase)[$index*S$scale], $dst */
|
3932 |
|
|
|
3933 |
|
|
static SEM_PC
|
3934 |
|
|
SEM_FN_NAME (i960base,ldt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3935 |
|
|
{
|
3936 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3937 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3938 |
|
|
int UNUSED written = 0;
|
3939 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3940 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
3941 |
|
|
|
3942 |
|
|
{
|
3943 |
|
|
SI tmp_temp;
|
3944 |
|
|
SI tmp_dregno;
|
3945 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3946 |
|
|
tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
3947 |
|
|
{
|
3948 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3949 |
|
|
* FLD (i_dst) = opval;
|
3950 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3951 |
|
|
}
|
3952 |
|
|
{
|
3953 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3954 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3955 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3956 |
|
|
}
|
3957 |
|
|
{
|
3958 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
3959 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
3960 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
3961 |
|
|
}
|
3962 |
|
|
}
|
3963 |
|
|
|
3964 |
|
|
return vpc;
|
3965 |
|
|
#undef FLD
|
3966 |
|
|
}
|
3967 |
|
|
|
3968 |
|
|
/* ldt-disp: ldt $optdisp, $dst */
|
3969 |
|
|
|
3970 |
|
|
static SEM_PC
|
3971 |
|
|
SEM_FN_NAME (i960base,ldt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
3972 |
|
|
{
|
3973 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
3974 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
3975 |
|
|
int UNUSED written = 0;
|
3976 |
|
|
IADDR UNUSED pc = abuf->addr;
|
3977 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
3978 |
|
|
|
3979 |
|
|
{
|
3980 |
|
|
SI tmp_temp;
|
3981 |
|
|
SI tmp_dregno;
|
3982 |
|
|
tmp_dregno = FLD (f_srcdst);
|
3983 |
|
|
tmp_temp = FLD (f_optdisp);
|
3984 |
|
|
{
|
3985 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
3986 |
|
|
* FLD (i_dst) = opval;
|
3987 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
3988 |
|
|
}
|
3989 |
|
|
{
|
3990 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
3991 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
3992 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
3993 |
|
|
}
|
3994 |
|
|
{
|
3995 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
3996 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
3997 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
3998 |
|
|
}
|
3999 |
|
|
}
|
4000 |
|
|
|
4001 |
|
|
return vpc;
|
4002 |
|
|
#undef FLD
|
4003 |
|
|
}
|
4004 |
|
|
|
4005 |
|
|
/* ldt-indirect-disp: ldt $optdisp($abase), $dst */
|
4006 |
|
|
|
4007 |
|
|
static SEM_PC
|
4008 |
|
|
SEM_FN_NAME (i960base,ldt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4009 |
|
|
{
|
4010 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
4011 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4012 |
|
|
int UNUSED written = 0;
|
4013 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4014 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4015 |
|
|
|
4016 |
|
|
{
|
4017 |
|
|
SI tmp_temp;
|
4018 |
|
|
SI tmp_dregno;
|
4019 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4020 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
|
4021 |
|
|
{
|
4022 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4023 |
|
|
* FLD (i_dst) = opval;
|
4024 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4025 |
|
|
}
|
4026 |
|
|
{
|
4027 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4028 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4029 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4030 |
|
|
}
|
4031 |
|
|
{
|
4032 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4033 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4034 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4035 |
|
|
}
|
4036 |
|
|
}
|
4037 |
|
|
|
4038 |
|
|
return vpc;
|
4039 |
|
|
#undef FLD
|
4040 |
|
|
}
|
4041 |
|
|
|
4042 |
|
|
/* ldt-index-disp: ldt $optdisp[$index*S$scale], $dst */
|
4043 |
|
|
|
4044 |
|
|
static SEM_PC
|
4045 |
|
|
SEM_FN_NAME (i960base,ldt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4046 |
|
|
{
|
4047 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
4048 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4049 |
|
|
int UNUSED written = 0;
|
4050 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4051 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4052 |
|
|
|
4053 |
|
|
{
|
4054 |
|
|
SI tmp_temp;
|
4055 |
|
|
SI tmp_dregno;
|
4056 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4057 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
4058 |
|
|
{
|
4059 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4060 |
|
|
* FLD (i_dst) = opval;
|
4061 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4062 |
|
|
}
|
4063 |
|
|
{
|
4064 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4065 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4066 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4067 |
|
|
}
|
4068 |
|
|
{
|
4069 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4070 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4071 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4072 |
|
|
}
|
4073 |
|
|
}
|
4074 |
|
|
|
4075 |
|
|
return vpc;
|
4076 |
|
|
#undef FLD
|
4077 |
|
|
}
|
4078 |
|
|
|
4079 |
|
|
/* ldt-indirect-index-disp: ldt $optdisp($abase)[$index*S$scale], $dst */
|
4080 |
|
|
|
4081 |
|
|
static SEM_PC
|
4082 |
|
|
SEM_FN_NAME (i960base,ldt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4083 |
|
|
{
|
4084 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
4085 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4086 |
|
|
int UNUSED written = 0;
|
4087 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4088 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4089 |
|
|
|
4090 |
|
|
{
|
4091 |
|
|
SI tmp_temp;
|
4092 |
|
|
SI tmp_dregno;
|
4093 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4094 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
4095 |
|
|
{
|
4096 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4097 |
|
|
* FLD (i_dst) = opval;
|
4098 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4099 |
|
|
}
|
4100 |
|
|
{
|
4101 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4102 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4103 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4104 |
|
|
}
|
4105 |
|
|
{
|
4106 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4107 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4108 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4109 |
|
|
}
|
4110 |
|
|
}
|
4111 |
|
|
|
4112 |
|
|
return vpc;
|
4113 |
|
|
#undef FLD
|
4114 |
|
|
}
|
4115 |
|
|
|
4116 |
|
|
/* ldq-offset: ldq $offset, $dst */
|
4117 |
|
|
|
4118 |
|
|
static SEM_PC
|
4119 |
|
|
SEM_FN_NAME (i960base,ldq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4120 |
|
|
{
|
4121 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
4122 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4123 |
|
|
int UNUSED written = 0;
|
4124 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4125 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4126 |
|
|
|
4127 |
|
|
{
|
4128 |
|
|
SI tmp_temp;
|
4129 |
|
|
SI tmp_dregno;
|
4130 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4131 |
|
|
tmp_temp = FLD (f_offset);
|
4132 |
|
|
{
|
4133 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4134 |
|
|
* FLD (i_dst) = opval;
|
4135 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4136 |
|
|
}
|
4137 |
|
|
{
|
4138 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4139 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4140 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4141 |
|
|
}
|
4142 |
|
|
{
|
4143 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4144 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4145 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4146 |
|
|
}
|
4147 |
|
|
{
|
4148 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
|
4149 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
4150 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
4151 |
|
|
}
|
4152 |
|
|
}
|
4153 |
|
|
|
4154 |
|
|
return vpc;
|
4155 |
|
|
#undef FLD
|
4156 |
|
|
}
|
4157 |
|
|
|
4158 |
|
|
/* ldq-indirect-offset: ldq $offset($abase), $dst */
|
4159 |
|
|
|
4160 |
|
|
static SEM_PC
|
4161 |
|
|
SEM_FN_NAME (i960base,ldq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4162 |
|
|
{
|
4163 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
4164 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4165 |
|
|
int UNUSED written = 0;
|
4166 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4167 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4168 |
|
|
|
4169 |
|
|
{
|
4170 |
|
|
SI tmp_temp;
|
4171 |
|
|
SI tmp_dregno;
|
4172 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4173 |
|
|
tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
|
4174 |
|
|
{
|
4175 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4176 |
|
|
* FLD (i_dst) = opval;
|
4177 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4178 |
|
|
}
|
4179 |
|
|
{
|
4180 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4181 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4182 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4183 |
|
|
}
|
4184 |
|
|
{
|
4185 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4186 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4187 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4188 |
|
|
}
|
4189 |
|
|
{
|
4190 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
|
4191 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
4192 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
4193 |
|
|
}
|
4194 |
|
|
}
|
4195 |
|
|
|
4196 |
|
|
return vpc;
|
4197 |
|
|
#undef FLD
|
4198 |
|
|
}
|
4199 |
|
|
|
4200 |
|
|
/* ldq-indirect: ldq ($abase), $dst */
|
4201 |
|
|
|
4202 |
|
|
static SEM_PC
|
4203 |
|
|
SEM_FN_NAME (i960base,ldq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4204 |
|
|
{
|
4205 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
|
4206 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4207 |
|
|
int UNUSED written = 0;
|
4208 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4209 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4210 |
|
|
|
4211 |
|
|
{
|
4212 |
|
|
SI tmp_temp;
|
4213 |
|
|
SI tmp_dregno;
|
4214 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4215 |
|
|
tmp_temp = * FLD (i_abase);
|
4216 |
|
|
{
|
4217 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4218 |
|
|
* FLD (i_dst) = opval;
|
4219 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4220 |
|
|
}
|
4221 |
|
|
{
|
4222 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4223 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4224 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4225 |
|
|
}
|
4226 |
|
|
{
|
4227 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4228 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4229 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4230 |
|
|
}
|
4231 |
|
|
{
|
4232 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
|
4233 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
4234 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
4235 |
|
|
}
|
4236 |
|
|
}
|
4237 |
|
|
|
4238 |
|
|
return vpc;
|
4239 |
|
|
#undef FLD
|
4240 |
|
|
}
|
4241 |
|
|
|
4242 |
|
|
/* ldq-indirect-index: ldq ($abase)[$index*S$scale], $dst */
|
4243 |
|
|
|
4244 |
|
|
static SEM_PC
|
4245 |
|
|
SEM_FN_NAME (i960base,ldq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4246 |
|
|
{
|
4247 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
4248 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4249 |
|
|
int UNUSED written = 0;
|
4250 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4251 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4252 |
|
|
|
4253 |
|
|
{
|
4254 |
|
|
SI tmp_temp;
|
4255 |
|
|
SI tmp_dregno;
|
4256 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4257 |
|
|
tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
4258 |
|
|
{
|
4259 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4260 |
|
|
* FLD (i_dst) = opval;
|
4261 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4262 |
|
|
}
|
4263 |
|
|
{
|
4264 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4265 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4266 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4267 |
|
|
}
|
4268 |
|
|
{
|
4269 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4270 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4271 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4272 |
|
|
}
|
4273 |
|
|
{
|
4274 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
|
4275 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
4276 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
4277 |
|
|
}
|
4278 |
|
|
}
|
4279 |
|
|
|
4280 |
|
|
return vpc;
|
4281 |
|
|
#undef FLD
|
4282 |
|
|
}
|
4283 |
|
|
|
4284 |
|
|
/* ldq-disp: ldq $optdisp, $dst */
|
4285 |
|
|
|
4286 |
|
|
static SEM_PC
|
4287 |
|
|
SEM_FN_NAME (i960base,ldq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4288 |
|
|
{
|
4289 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
4290 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4291 |
|
|
int UNUSED written = 0;
|
4292 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4293 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4294 |
|
|
|
4295 |
|
|
{
|
4296 |
|
|
SI tmp_temp;
|
4297 |
|
|
SI tmp_dregno;
|
4298 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4299 |
|
|
tmp_temp = FLD (f_optdisp);
|
4300 |
|
|
{
|
4301 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4302 |
|
|
* FLD (i_dst) = opval;
|
4303 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4304 |
|
|
}
|
4305 |
|
|
{
|
4306 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4307 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4308 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4309 |
|
|
}
|
4310 |
|
|
{
|
4311 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4312 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4313 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4314 |
|
|
}
|
4315 |
|
|
{
|
4316 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
|
4317 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
4318 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
4319 |
|
|
}
|
4320 |
|
|
}
|
4321 |
|
|
|
4322 |
|
|
return vpc;
|
4323 |
|
|
#undef FLD
|
4324 |
|
|
}
|
4325 |
|
|
|
4326 |
|
|
/* ldq-indirect-disp: ldq $optdisp($abase), $dst */
|
4327 |
|
|
|
4328 |
|
|
static SEM_PC
|
4329 |
|
|
SEM_FN_NAME (i960base,ldq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4330 |
|
|
{
|
4331 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
4332 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4333 |
|
|
int UNUSED written = 0;
|
4334 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4335 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4336 |
|
|
|
4337 |
|
|
{
|
4338 |
|
|
SI tmp_temp;
|
4339 |
|
|
SI tmp_dregno;
|
4340 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4341 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
|
4342 |
|
|
{
|
4343 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4344 |
|
|
* FLD (i_dst) = opval;
|
4345 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4346 |
|
|
}
|
4347 |
|
|
{
|
4348 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4349 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4350 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4351 |
|
|
}
|
4352 |
|
|
{
|
4353 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4354 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4355 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4356 |
|
|
}
|
4357 |
|
|
{
|
4358 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
|
4359 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
4360 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
4361 |
|
|
}
|
4362 |
|
|
}
|
4363 |
|
|
|
4364 |
|
|
return vpc;
|
4365 |
|
|
#undef FLD
|
4366 |
|
|
}
|
4367 |
|
|
|
4368 |
|
|
/* ldq-index-disp: ldq $optdisp[$index*S$scale], $dst */
|
4369 |
|
|
|
4370 |
|
|
static SEM_PC
|
4371 |
|
|
SEM_FN_NAME (i960base,ldq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4372 |
|
|
{
|
4373 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
4374 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4375 |
|
|
int UNUSED written = 0;
|
4376 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4377 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4378 |
|
|
|
4379 |
|
|
{
|
4380 |
|
|
SI tmp_temp;
|
4381 |
|
|
SI tmp_dregno;
|
4382 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4383 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
4384 |
|
|
{
|
4385 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4386 |
|
|
* FLD (i_dst) = opval;
|
4387 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4388 |
|
|
}
|
4389 |
|
|
{
|
4390 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4391 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4392 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4393 |
|
|
}
|
4394 |
|
|
{
|
4395 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4396 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4397 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4398 |
|
|
}
|
4399 |
|
|
{
|
4400 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
|
4401 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
4402 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
4403 |
|
|
}
|
4404 |
|
|
}
|
4405 |
|
|
|
4406 |
|
|
return vpc;
|
4407 |
|
|
#undef FLD
|
4408 |
|
|
}
|
4409 |
|
|
|
4410 |
|
|
/* ldq-indirect-index-disp: ldq $optdisp($abase)[$index*S$scale], $dst */
|
4411 |
|
|
|
4412 |
|
|
static SEM_PC
|
4413 |
|
|
SEM_FN_NAME (i960base,ldq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4414 |
|
|
{
|
4415 |
|
|
#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
|
4416 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4417 |
|
|
int UNUSED written = 0;
|
4418 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4419 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4420 |
|
|
|
4421 |
|
|
{
|
4422 |
|
|
SI tmp_temp;
|
4423 |
|
|
SI tmp_dregno;
|
4424 |
|
|
tmp_dregno = FLD (f_srcdst);
|
4425 |
|
|
tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
|
4426 |
|
|
{
|
4427 |
|
|
SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
|
4428 |
|
|
* FLD (i_dst) = opval;
|
4429 |
|
|
TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
|
4430 |
|
|
}
|
4431 |
|
|
{
|
4432 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
|
4433 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
|
4434 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
|
4435 |
|
|
}
|
4436 |
|
|
{
|
4437 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
|
4438 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
|
4439 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
|
4440 |
|
|
}
|
4441 |
|
|
{
|
4442 |
|
|
SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
|
4443 |
|
|
CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
|
4444 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
|
4445 |
|
|
}
|
4446 |
|
|
}
|
4447 |
|
|
|
4448 |
|
|
return vpc;
|
4449 |
|
|
#undef FLD
|
4450 |
|
|
}
|
4451 |
|
|
|
4452 |
|
|
/* st-offset: st $st_src, $offset */
|
4453 |
|
|
|
4454 |
|
|
static SEM_PC
|
4455 |
|
|
SEM_FN_NAME (i960base,st_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4456 |
|
|
{
|
4457 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4458 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4459 |
|
|
int UNUSED written = 0;
|
4460 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4461 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4462 |
|
|
|
4463 |
|
|
{
|
4464 |
|
|
SI opval = * FLD (i_st_src);
|
4465 |
|
|
SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
|
4466 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4467 |
|
|
}
|
4468 |
|
|
|
4469 |
|
|
return vpc;
|
4470 |
|
|
#undef FLD
|
4471 |
|
|
}
|
4472 |
|
|
|
4473 |
|
|
/* st-indirect-offset: st $st_src, $offset($abase) */
|
4474 |
|
|
|
4475 |
|
|
static SEM_PC
|
4476 |
|
|
SEM_FN_NAME (i960base,st_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4477 |
|
|
{
|
4478 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4479 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4480 |
|
|
int UNUSED written = 0;
|
4481 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4482 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4483 |
|
|
|
4484 |
|
|
{
|
4485 |
|
|
SI opval = * FLD (i_st_src);
|
4486 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
|
4487 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4488 |
|
|
}
|
4489 |
|
|
|
4490 |
|
|
return vpc;
|
4491 |
|
|
#undef FLD
|
4492 |
|
|
}
|
4493 |
|
|
|
4494 |
|
|
/* st-indirect: st $st_src, ($abase) */
|
4495 |
|
|
|
4496 |
|
|
static SEM_PC
|
4497 |
|
|
SEM_FN_NAME (i960base,st_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4498 |
|
|
{
|
4499 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4500 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4501 |
|
|
int UNUSED written = 0;
|
4502 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4503 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4504 |
|
|
|
4505 |
|
|
{
|
4506 |
|
|
SI opval = * FLD (i_st_src);
|
4507 |
|
|
SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
|
4508 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4509 |
|
|
}
|
4510 |
|
|
|
4511 |
|
|
return vpc;
|
4512 |
|
|
#undef FLD
|
4513 |
|
|
}
|
4514 |
|
|
|
4515 |
|
|
/* st-indirect-index: st $st_src, ($abase)[$index*S$scale] */
|
4516 |
|
|
|
4517 |
|
|
static SEM_PC
|
4518 |
|
|
SEM_FN_NAME (i960base,st_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4519 |
|
|
{
|
4520 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4521 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4522 |
|
|
int UNUSED written = 0;
|
4523 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4524 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4525 |
|
|
|
4526 |
|
|
{
|
4527 |
|
|
SI opval = * FLD (i_st_src);
|
4528 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
4529 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4530 |
|
|
}
|
4531 |
|
|
|
4532 |
|
|
return vpc;
|
4533 |
|
|
#undef FLD
|
4534 |
|
|
}
|
4535 |
|
|
|
4536 |
|
|
/* st-disp: st $st_src, $optdisp */
|
4537 |
|
|
|
4538 |
|
|
static SEM_PC
|
4539 |
|
|
SEM_FN_NAME (i960base,st_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4540 |
|
|
{
|
4541 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4542 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4543 |
|
|
int UNUSED written = 0;
|
4544 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4545 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4546 |
|
|
|
4547 |
|
|
{
|
4548 |
|
|
SI opval = * FLD (i_st_src);
|
4549 |
|
|
SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
|
4550 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4551 |
|
|
}
|
4552 |
|
|
|
4553 |
|
|
return vpc;
|
4554 |
|
|
#undef FLD
|
4555 |
|
|
}
|
4556 |
|
|
|
4557 |
|
|
/* st-indirect-disp: st $st_src, $optdisp($abase) */
|
4558 |
|
|
|
4559 |
|
|
static SEM_PC
|
4560 |
|
|
SEM_FN_NAME (i960base,st_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4561 |
|
|
{
|
4562 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4563 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4564 |
|
|
int UNUSED written = 0;
|
4565 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4566 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4567 |
|
|
|
4568 |
|
|
{
|
4569 |
|
|
SI opval = * FLD (i_st_src);
|
4570 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
|
4571 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4572 |
|
|
}
|
4573 |
|
|
|
4574 |
|
|
return vpc;
|
4575 |
|
|
#undef FLD
|
4576 |
|
|
}
|
4577 |
|
|
|
4578 |
|
|
/* st-index-disp: st $st_src, $optdisp[$index*S$scale */
|
4579 |
|
|
|
4580 |
|
|
static SEM_PC
|
4581 |
|
|
SEM_FN_NAME (i960base,st_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4582 |
|
|
{
|
4583 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4584 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4585 |
|
|
int UNUSED written = 0;
|
4586 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4587 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4588 |
|
|
|
4589 |
|
|
{
|
4590 |
|
|
SI opval = * FLD (i_st_src);
|
4591 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
4592 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4593 |
|
|
}
|
4594 |
|
|
|
4595 |
|
|
return vpc;
|
4596 |
|
|
#undef FLD
|
4597 |
|
|
}
|
4598 |
|
|
|
4599 |
|
|
/* st-indirect-index-disp: st $st_src, $optdisp($abase)[$index*S$scale] */
|
4600 |
|
|
|
4601 |
|
|
static SEM_PC
|
4602 |
|
|
SEM_FN_NAME (i960base,st_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4603 |
|
|
{
|
4604 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4605 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4606 |
|
|
int UNUSED written = 0;
|
4607 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4608 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4609 |
|
|
|
4610 |
|
|
{
|
4611 |
|
|
SI opval = * FLD (i_st_src);
|
4612 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
|
4613 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4614 |
|
|
}
|
4615 |
|
|
|
4616 |
|
|
return vpc;
|
4617 |
|
|
#undef FLD
|
4618 |
|
|
}
|
4619 |
|
|
|
4620 |
|
|
/* stob-offset: stob $st_src, $offset */
|
4621 |
|
|
|
4622 |
|
|
static SEM_PC
|
4623 |
|
|
SEM_FN_NAME (i960base,stob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4624 |
|
|
{
|
4625 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4626 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4627 |
|
|
int UNUSED written = 0;
|
4628 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4629 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4630 |
|
|
|
4631 |
|
|
{
|
4632 |
|
|
QI opval = * FLD (i_st_src);
|
4633 |
|
|
SETMEMQI (current_cpu, pc, FLD (f_offset), opval);
|
4634 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4635 |
|
|
}
|
4636 |
|
|
|
4637 |
|
|
return vpc;
|
4638 |
|
|
#undef FLD
|
4639 |
|
|
}
|
4640 |
|
|
|
4641 |
|
|
/* stob-indirect-offset: stob $st_src, $offset($abase) */
|
4642 |
|
|
|
4643 |
|
|
static SEM_PC
|
4644 |
|
|
SEM_FN_NAME (i960base,stob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4645 |
|
|
{
|
4646 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4647 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4648 |
|
|
int UNUSED written = 0;
|
4649 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4650 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4651 |
|
|
|
4652 |
|
|
{
|
4653 |
|
|
QI opval = * FLD (i_st_src);
|
4654 |
|
|
SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
|
4655 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4656 |
|
|
}
|
4657 |
|
|
|
4658 |
|
|
return vpc;
|
4659 |
|
|
#undef FLD
|
4660 |
|
|
}
|
4661 |
|
|
|
4662 |
|
|
/* stob-indirect: stob $st_src, ($abase) */
|
4663 |
|
|
|
4664 |
|
|
static SEM_PC
|
4665 |
|
|
SEM_FN_NAME (i960base,stob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4666 |
|
|
{
|
4667 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4668 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4669 |
|
|
int UNUSED written = 0;
|
4670 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4671 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4672 |
|
|
|
4673 |
|
|
{
|
4674 |
|
|
QI opval = * FLD (i_st_src);
|
4675 |
|
|
SETMEMQI (current_cpu, pc, * FLD (i_abase), opval);
|
4676 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4677 |
|
|
}
|
4678 |
|
|
|
4679 |
|
|
return vpc;
|
4680 |
|
|
#undef FLD
|
4681 |
|
|
}
|
4682 |
|
|
|
4683 |
|
|
/* stob-indirect-index: stob $st_src, ($abase)[$index*S$scale] */
|
4684 |
|
|
|
4685 |
|
|
static SEM_PC
|
4686 |
|
|
SEM_FN_NAME (i960base,stob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4687 |
|
|
{
|
4688 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4689 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4690 |
|
|
int UNUSED written = 0;
|
4691 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4692 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4693 |
|
|
|
4694 |
|
|
{
|
4695 |
|
|
QI opval = * FLD (i_st_src);
|
4696 |
|
|
SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
4697 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4698 |
|
|
}
|
4699 |
|
|
|
4700 |
|
|
return vpc;
|
4701 |
|
|
#undef FLD
|
4702 |
|
|
}
|
4703 |
|
|
|
4704 |
|
|
/* stob-disp: stob $st_src, $optdisp */
|
4705 |
|
|
|
4706 |
|
|
static SEM_PC
|
4707 |
|
|
SEM_FN_NAME (i960base,stob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4708 |
|
|
{
|
4709 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4710 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4711 |
|
|
int UNUSED written = 0;
|
4712 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4713 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4714 |
|
|
|
4715 |
|
|
{
|
4716 |
|
|
QI opval = * FLD (i_st_src);
|
4717 |
|
|
SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval);
|
4718 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4719 |
|
|
}
|
4720 |
|
|
|
4721 |
|
|
return vpc;
|
4722 |
|
|
#undef FLD
|
4723 |
|
|
}
|
4724 |
|
|
|
4725 |
|
|
/* stob-indirect-disp: stob $st_src, $optdisp($abase) */
|
4726 |
|
|
|
4727 |
|
|
static SEM_PC
|
4728 |
|
|
SEM_FN_NAME (i960base,stob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4729 |
|
|
{
|
4730 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4731 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4732 |
|
|
int UNUSED written = 0;
|
4733 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4734 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4735 |
|
|
|
4736 |
|
|
{
|
4737 |
|
|
QI opval = * FLD (i_st_src);
|
4738 |
|
|
SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
|
4739 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4740 |
|
|
}
|
4741 |
|
|
|
4742 |
|
|
return vpc;
|
4743 |
|
|
#undef FLD
|
4744 |
|
|
}
|
4745 |
|
|
|
4746 |
|
|
/* stob-index-disp: stob $st_src, $optdisp[$index*S$scale */
|
4747 |
|
|
|
4748 |
|
|
static SEM_PC
|
4749 |
|
|
SEM_FN_NAME (i960base,stob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4750 |
|
|
{
|
4751 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4752 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4753 |
|
|
int UNUSED written = 0;
|
4754 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4755 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4756 |
|
|
|
4757 |
|
|
{
|
4758 |
|
|
QI opval = * FLD (i_st_src);
|
4759 |
|
|
SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
4760 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4761 |
|
|
}
|
4762 |
|
|
|
4763 |
|
|
return vpc;
|
4764 |
|
|
#undef FLD
|
4765 |
|
|
}
|
4766 |
|
|
|
4767 |
|
|
/* stob-indirect-index-disp: stob $st_src, $optdisp($abase)[$index*S$scale] */
|
4768 |
|
|
|
4769 |
|
|
static SEM_PC
|
4770 |
|
|
SEM_FN_NAME (i960base,stob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4771 |
|
|
{
|
4772 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4773 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4774 |
|
|
int UNUSED written = 0;
|
4775 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4776 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4777 |
|
|
|
4778 |
|
|
{
|
4779 |
|
|
QI opval = * FLD (i_st_src);
|
4780 |
|
|
SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
|
4781 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4782 |
|
|
}
|
4783 |
|
|
|
4784 |
|
|
return vpc;
|
4785 |
|
|
#undef FLD
|
4786 |
|
|
}
|
4787 |
|
|
|
4788 |
|
|
/* stos-offset: stos $st_src, $offset */
|
4789 |
|
|
|
4790 |
|
|
static SEM_PC
|
4791 |
|
|
SEM_FN_NAME (i960base,stos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4792 |
|
|
{
|
4793 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4794 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4795 |
|
|
int UNUSED written = 0;
|
4796 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4797 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4798 |
|
|
|
4799 |
|
|
{
|
4800 |
|
|
HI opval = * FLD (i_st_src);
|
4801 |
|
|
SETMEMHI (current_cpu, pc, FLD (f_offset), opval);
|
4802 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4803 |
|
|
}
|
4804 |
|
|
|
4805 |
|
|
return vpc;
|
4806 |
|
|
#undef FLD
|
4807 |
|
|
}
|
4808 |
|
|
|
4809 |
|
|
/* stos-indirect-offset: stos $st_src, $offset($abase) */
|
4810 |
|
|
|
4811 |
|
|
static SEM_PC
|
4812 |
|
|
SEM_FN_NAME (i960base,stos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4813 |
|
|
{
|
4814 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4815 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4816 |
|
|
int UNUSED written = 0;
|
4817 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4818 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4819 |
|
|
|
4820 |
|
|
{
|
4821 |
|
|
HI opval = * FLD (i_st_src);
|
4822 |
|
|
SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
|
4823 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4824 |
|
|
}
|
4825 |
|
|
|
4826 |
|
|
return vpc;
|
4827 |
|
|
#undef FLD
|
4828 |
|
|
}
|
4829 |
|
|
|
4830 |
|
|
/* stos-indirect: stos $st_src, ($abase) */
|
4831 |
|
|
|
4832 |
|
|
static SEM_PC
|
4833 |
|
|
SEM_FN_NAME (i960base,stos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4834 |
|
|
{
|
4835 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4836 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4837 |
|
|
int UNUSED written = 0;
|
4838 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4839 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4840 |
|
|
|
4841 |
|
|
{
|
4842 |
|
|
HI opval = * FLD (i_st_src);
|
4843 |
|
|
SETMEMHI (current_cpu, pc, * FLD (i_abase), opval);
|
4844 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4845 |
|
|
}
|
4846 |
|
|
|
4847 |
|
|
return vpc;
|
4848 |
|
|
#undef FLD
|
4849 |
|
|
}
|
4850 |
|
|
|
4851 |
|
|
/* stos-indirect-index: stos $st_src, ($abase)[$index*S$scale] */
|
4852 |
|
|
|
4853 |
|
|
static SEM_PC
|
4854 |
|
|
SEM_FN_NAME (i960base,stos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4855 |
|
|
{
|
4856 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4857 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4858 |
|
|
int UNUSED written = 0;
|
4859 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4860 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4861 |
|
|
|
4862 |
|
|
{
|
4863 |
|
|
HI opval = * FLD (i_st_src);
|
4864 |
|
|
SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
4865 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4866 |
|
|
}
|
4867 |
|
|
|
4868 |
|
|
return vpc;
|
4869 |
|
|
#undef FLD
|
4870 |
|
|
}
|
4871 |
|
|
|
4872 |
|
|
/* stos-disp: stos $st_src, $optdisp */
|
4873 |
|
|
|
4874 |
|
|
static SEM_PC
|
4875 |
|
|
SEM_FN_NAME (i960base,stos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4876 |
|
|
{
|
4877 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4878 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4879 |
|
|
int UNUSED written = 0;
|
4880 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4881 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4882 |
|
|
|
4883 |
|
|
{
|
4884 |
|
|
HI opval = * FLD (i_st_src);
|
4885 |
|
|
SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval);
|
4886 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4887 |
|
|
}
|
4888 |
|
|
|
4889 |
|
|
return vpc;
|
4890 |
|
|
#undef FLD
|
4891 |
|
|
}
|
4892 |
|
|
|
4893 |
|
|
/* stos-indirect-disp: stos $st_src, $optdisp($abase) */
|
4894 |
|
|
|
4895 |
|
|
static SEM_PC
|
4896 |
|
|
SEM_FN_NAME (i960base,stos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4897 |
|
|
{
|
4898 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4899 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4900 |
|
|
int UNUSED written = 0;
|
4901 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4902 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4903 |
|
|
|
4904 |
|
|
{
|
4905 |
|
|
HI opval = * FLD (i_st_src);
|
4906 |
|
|
SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
|
4907 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4908 |
|
|
}
|
4909 |
|
|
|
4910 |
|
|
return vpc;
|
4911 |
|
|
#undef FLD
|
4912 |
|
|
}
|
4913 |
|
|
|
4914 |
|
|
/* stos-index-disp: stos $st_src, $optdisp[$index*S$scale */
|
4915 |
|
|
|
4916 |
|
|
static SEM_PC
|
4917 |
|
|
SEM_FN_NAME (i960base,stos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4918 |
|
|
{
|
4919 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4920 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4921 |
|
|
int UNUSED written = 0;
|
4922 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4923 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4924 |
|
|
|
4925 |
|
|
{
|
4926 |
|
|
HI opval = * FLD (i_st_src);
|
4927 |
|
|
SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
4928 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4929 |
|
|
}
|
4930 |
|
|
|
4931 |
|
|
return vpc;
|
4932 |
|
|
#undef FLD
|
4933 |
|
|
}
|
4934 |
|
|
|
4935 |
|
|
/* stos-indirect-index-disp: stos $st_src, $optdisp($abase)[$index*S$scale] */
|
4936 |
|
|
|
4937 |
|
|
static SEM_PC
|
4938 |
|
|
SEM_FN_NAME (i960base,stos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4939 |
|
|
{
|
4940 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
4941 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4942 |
|
|
int UNUSED written = 0;
|
4943 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4944 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
4945 |
|
|
|
4946 |
|
|
{
|
4947 |
|
|
HI opval = * FLD (i_st_src);
|
4948 |
|
|
SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
|
4949 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4950 |
|
|
}
|
4951 |
|
|
|
4952 |
|
|
return vpc;
|
4953 |
|
|
#undef FLD
|
4954 |
|
|
}
|
4955 |
|
|
|
4956 |
|
|
/* stl-offset: stl $st_src, $offset */
|
4957 |
|
|
|
4958 |
|
|
static SEM_PC
|
4959 |
|
|
SEM_FN_NAME (i960base,stl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4960 |
|
|
{
|
4961 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4962 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4963 |
|
|
int UNUSED written = 0;
|
4964 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4965 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4966 |
|
|
|
4967 |
|
|
{
|
4968 |
|
|
SI tmp_sregno;
|
4969 |
|
|
tmp_sregno = FLD (f_srcdst);
|
4970 |
|
|
{
|
4971 |
|
|
SI opval = * FLD (i_st_src);
|
4972 |
|
|
SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
|
4973 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4974 |
|
|
}
|
4975 |
|
|
{
|
4976 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
4977 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
|
4978 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
4979 |
|
|
}
|
4980 |
|
|
}
|
4981 |
|
|
|
4982 |
|
|
return vpc;
|
4983 |
|
|
#undef FLD
|
4984 |
|
|
}
|
4985 |
|
|
|
4986 |
|
|
/* stl-indirect-offset: stl $st_src, $offset($abase) */
|
4987 |
|
|
|
4988 |
|
|
static SEM_PC
|
4989 |
|
|
SEM_FN_NAME (i960base,stl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
4990 |
|
|
{
|
4991 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
4992 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
4993 |
|
|
int UNUSED written = 0;
|
4994 |
|
|
IADDR UNUSED pc = abuf->addr;
|
4995 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
4996 |
|
|
|
4997 |
|
|
{
|
4998 |
|
|
SI tmp_sregno;
|
4999 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5000 |
|
|
{
|
5001 |
|
|
SI opval = * FLD (i_st_src);
|
5002 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
|
5003 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5004 |
|
|
}
|
5005 |
|
|
{
|
5006 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5007 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
|
5008 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5009 |
|
|
}
|
5010 |
|
|
}
|
5011 |
|
|
|
5012 |
|
|
return vpc;
|
5013 |
|
|
#undef FLD
|
5014 |
|
|
}
|
5015 |
|
|
|
5016 |
|
|
/* stl-indirect: stl $st_src, ($abase) */
|
5017 |
|
|
|
5018 |
|
|
static SEM_PC
|
5019 |
|
|
SEM_FN_NAME (i960base,stl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5020 |
|
|
{
|
5021 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
5022 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5023 |
|
|
int UNUSED written = 0;
|
5024 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5025 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5026 |
|
|
|
5027 |
|
|
{
|
5028 |
|
|
SI tmp_sregno;
|
5029 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5030 |
|
|
{
|
5031 |
|
|
SI opval = * FLD (i_st_src);
|
5032 |
|
|
SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
|
5033 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5034 |
|
|
}
|
5035 |
|
|
{
|
5036 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5037 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
|
5038 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5039 |
|
|
}
|
5040 |
|
|
}
|
5041 |
|
|
|
5042 |
|
|
return vpc;
|
5043 |
|
|
#undef FLD
|
5044 |
|
|
}
|
5045 |
|
|
|
5046 |
|
|
/* stl-indirect-index: stl $st_src, ($abase)[$index*S$scale] */
|
5047 |
|
|
|
5048 |
|
|
static SEM_PC
|
5049 |
|
|
SEM_FN_NAME (i960base,stl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5050 |
|
|
{
|
5051 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5052 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5053 |
|
|
int UNUSED written = 0;
|
5054 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5055 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5056 |
|
|
|
5057 |
|
|
{
|
5058 |
|
|
SI tmp_sregno;
|
5059 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5060 |
|
|
{
|
5061 |
|
|
SI opval = * FLD (i_st_src);
|
5062 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
5063 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5064 |
|
|
}
|
5065 |
|
|
{
|
5066 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5067 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
|
5068 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5069 |
|
|
}
|
5070 |
|
|
}
|
5071 |
|
|
|
5072 |
|
|
return vpc;
|
5073 |
|
|
#undef FLD
|
5074 |
|
|
}
|
5075 |
|
|
|
5076 |
|
|
/* stl-disp: stl $st_src, $optdisp */
|
5077 |
|
|
|
5078 |
|
|
static SEM_PC
|
5079 |
|
|
SEM_FN_NAME (i960base,stl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5080 |
|
|
{
|
5081 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5082 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5083 |
|
|
int UNUSED written = 0;
|
5084 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5085 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5086 |
|
|
|
5087 |
|
|
{
|
5088 |
|
|
SI tmp_sregno;
|
5089 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5090 |
|
|
{
|
5091 |
|
|
SI opval = * FLD (i_st_src);
|
5092 |
|
|
SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
|
5093 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5094 |
|
|
}
|
5095 |
|
|
{
|
5096 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5097 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
|
5098 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5099 |
|
|
}
|
5100 |
|
|
}
|
5101 |
|
|
|
5102 |
|
|
return vpc;
|
5103 |
|
|
#undef FLD
|
5104 |
|
|
}
|
5105 |
|
|
|
5106 |
|
|
/* stl-indirect-disp: stl $st_src, $optdisp($abase) */
|
5107 |
|
|
|
5108 |
|
|
static SEM_PC
|
5109 |
|
|
SEM_FN_NAME (i960base,stl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5110 |
|
|
{
|
5111 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5112 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5113 |
|
|
int UNUSED written = 0;
|
5114 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5115 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5116 |
|
|
|
5117 |
|
|
{
|
5118 |
|
|
SI tmp_sregno;
|
5119 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5120 |
|
|
{
|
5121 |
|
|
SI opval = * FLD (i_st_src);
|
5122 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
|
5123 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5124 |
|
|
}
|
5125 |
|
|
{
|
5126 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5127 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
|
5128 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5129 |
|
|
}
|
5130 |
|
|
}
|
5131 |
|
|
|
5132 |
|
|
return vpc;
|
5133 |
|
|
#undef FLD
|
5134 |
|
|
}
|
5135 |
|
|
|
5136 |
|
|
/* stl-index-disp: stl $st_src, $optdisp[$index*S$scale */
|
5137 |
|
|
|
5138 |
|
|
static SEM_PC
|
5139 |
|
|
SEM_FN_NAME (i960base,stl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5140 |
|
|
{
|
5141 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5142 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5143 |
|
|
int UNUSED written = 0;
|
5144 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5145 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5146 |
|
|
|
5147 |
|
|
{
|
5148 |
|
|
SI tmp_sregno;
|
5149 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5150 |
|
|
{
|
5151 |
|
|
SI opval = * FLD (i_st_src);
|
5152 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
5153 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5154 |
|
|
}
|
5155 |
|
|
{
|
5156 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5157 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
|
5158 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5159 |
|
|
}
|
5160 |
|
|
}
|
5161 |
|
|
|
5162 |
|
|
return vpc;
|
5163 |
|
|
#undef FLD
|
5164 |
|
|
}
|
5165 |
|
|
|
5166 |
|
|
/* stl-indirect-index-disp: stl $st_src, $optdisp($abase)[$index*S$scale] */
|
5167 |
|
|
|
5168 |
|
|
static SEM_PC
|
5169 |
|
|
SEM_FN_NAME (i960base,stl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5170 |
|
|
{
|
5171 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5172 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5173 |
|
|
int UNUSED written = 0;
|
5174 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5175 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5176 |
|
|
|
5177 |
|
|
{
|
5178 |
|
|
SI tmp_sregno;
|
5179 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5180 |
|
|
{
|
5181 |
|
|
SI opval = * FLD (i_st_src);
|
5182 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
|
5183 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5184 |
|
|
}
|
5185 |
|
|
{
|
5186 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5187 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
|
5188 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5189 |
|
|
}
|
5190 |
|
|
}
|
5191 |
|
|
|
5192 |
|
|
return vpc;
|
5193 |
|
|
#undef FLD
|
5194 |
|
|
}
|
5195 |
|
|
|
5196 |
|
|
/* stt-offset: stt $st_src, $offset */
|
5197 |
|
|
|
5198 |
|
|
static SEM_PC
|
5199 |
|
|
SEM_FN_NAME (i960base,stt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5200 |
|
|
{
|
5201 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
5202 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5203 |
|
|
int UNUSED written = 0;
|
5204 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5205 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5206 |
|
|
|
5207 |
|
|
{
|
5208 |
|
|
SI tmp_sregno;
|
5209 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5210 |
|
|
{
|
5211 |
|
|
SI opval = * FLD (i_st_src);
|
5212 |
|
|
SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
|
5213 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5214 |
|
|
}
|
5215 |
|
|
{
|
5216 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5217 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
|
5218 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5219 |
|
|
}
|
5220 |
|
|
{
|
5221 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5222 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval);
|
5223 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5224 |
|
|
}
|
5225 |
|
|
}
|
5226 |
|
|
|
5227 |
|
|
return vpc;
|
5228 |
|
|
#undef FLD
|
5229 |
|
|
}
|
5230 |
|
|
|
5231 |
|
|
/* stt-indirect-offset: stt $st_src, $offset($abase) */
|
5232 |
|
|
|
5233 |
|
|
static SEM_PC
|
5234 |
|
|
SEM_FN_NAME (i960base,stt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5235 |
|
|
{
|
5236 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
5237 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5238 |
|
|
int UNUSED written = 0;
|
5239 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5240 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5241 |
|
|
|
5242 |
|
|
{
|
5243 |
|
|
SI tmp_sregno;
|
5244 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5245 |
|
|
{
|
5246 |
|
|
SI opval = * FLD (i_st_src);
|
5247 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
|
5248 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5249 |
|
|
}
|
5250 |
|
|
{
|
5251 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5252 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
|
5253 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5254 |
|
|
}
|
5255 |
|
|
{
|
5256 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5257 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval);
|
5258 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5259 |
|
|
}
|
5260 |
|
|
}
|
5261 |
|
|
|
5262 |
|
|
return vpc;
|
5263 |
|
|
#undef FLD
|
5264 |
|
|
}
|
5265 |
|
|
|
5266 |
|
|
/* stt-indirect: stt $st_src, ($abase) */
|
5267 |
|
|
|
5268 |
|
|
static SEM_PC
|
5269 |
|
|
SEM_FN_NAME (i960base,stt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5270 |
|
|
{
|
5271 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
5272 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5273 |
|
|
int UNUSED written = 0;
|
5274 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5275 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5276 |
|
|
|
5277 |
|
|
{
|
5278 |
|
|
SI tmp_sregno;
|
5279 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5280 |
|
|
{
|
5281 |
|
|
SI opval = * FLD (i_st_src);
|
5282 |
|
|
SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
|
5283 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5284 |
|
|
}
|
5285 |
|
|
{
|
5286 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5287 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
|
5288 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5289 |
|
|
}
|
5290 |
|
|
{
|
5291 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5292 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval);
|
5293 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5294 |
|
|
}
|
5295 |
|
|
}
|
5296 |
|
|
|
5297 |
|
|
return vpc;
|
5298 |
|
|
#undef FLD
|
5299 |
|
|
}
|
5300 |
|
|
|
5301 |
|
|
/* stt-indirect-index: stt $st_src, ($abase)[$index*S$scale] */
|
5302 |
|
|
|
5303 |
|
|
static SEM_PC
|
5304 |
|
|
SEM_FN_NAME (i960base,stt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5305 |
|
|
{
|
5306 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5307 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5308 |
|
|
int UNUSED written = 0;
|
5309 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5310 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5311 |
|
|
|
5312 |
|
|
{
|
5313 |
|
|
SI tmp_sregno;
|
5314 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5315 |
|
|
{
|
5316 |
|
|
SI opval = * FLD (i_st_src);
|
5317 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
5318 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5319 |
|
|
}
|
5320 |
|
|
{
|
5321 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5322 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
|
5323 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5324 |
|
|
}
|
5325 |
|
|
{
|
5326 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5327 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
|
5328 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5329 |
|
|
}
|
5330 |
|
|
}
|
5331 |
|
|
|
5332 |
|
|
return vpc;
|
5333 |
|
|
#undef FLD
|
5334 |
|
|
}
|
5335 |
|
|
|
5336 |
|
|
/* stt-disp: stt $st_src, $optdisp */
|
5337 |
|
|
|
5338 |
|
|
static SEM_PC
|
5339 |
|
|
SEM_FN_NAME (i960base,stt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5340 |
|
|
{
|
5341 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5342 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5343 |
|
|
int UNUSED written = 0;
|
5344 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5345 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5346 |
|
|
|
5347 |
|
|
{
|
5348 |
|
|
SI tmp_sregno;
|
5349 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5350 |
|
|
{
|
5351 |
|
|
SI opval = * FLD (i_st_src);
|
5352 |
|
|
SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
|
5353 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5354 |
|
|
}
|
5355 |
|
|
{
|
5356 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5357 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
|
5358 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5359 |
|
|
}
|
5360 |
|
|
{
|
5361 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5362 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval);
|
5363 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5364 |
|
|
}
|
5365 |
|
|
}
|
5366 |
|
|
|
5367 |
|
|
return vpc;
|
5368 |
|
|
#undef FLD
|
5369 |
|
|
}
|
5370 |
|
|
|
5371 |
|
|
/* stt-indirect-disp: stt $st_src, $optdisp($abase) */
|
5372 |
|
|
|
5373 |
|
|
static SEM_PC
|
5374 |
|
|
SEM_FN_NAME (i960base,stt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5375 |
|
|
{
|
5376 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5377 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5378 |
|
|
int UNUSED written = 0;
|
5379 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5380 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5381 |
|
|
|
5382 |
|
|
{
|
5383 |
|
|
SI tmp_sregno;
|
5384 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5385 |
|
|
{
|
5386 |
|
|
SI opval = * FLD (i_st_src);
|
5387 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
|
5388 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5389 |
|
|
}
|
5390 |
|
|
{
|
5391 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5392 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
|
5393 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5394 |
|
|
}
|
5395 |
|
|
{
|
5396 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5397 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval);
|
5398 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5399 |
|
|
}
|
5400 |
|
|
}
|
5401 |
|
|
|
5402 |
|
|
return vpc;
|
5403 |
|
|
#undef FLD
|
5404 |
|
|
}
|
5405 |
|
|
|
5406 |
|
|
/* stt-index-disp: stt $st_src, $optdisp[$index*S$scale */
|
5407 |
|
|
|
5408 |
|
|
static SEM_PC
|
5409 |
|
|
SEM_FN_NAME (i960base,stt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5410 |
|
|
{
|
5411 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5412 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5413 |
|
|
int UNUSED written = 0;
|
5414 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5415 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5416 |
|
|
|
5417 |
|
|
{
|
5418 |
|
|
SI tmp_sregno;
|
5419 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5420 |
|
|
{
|
5421 |
|
|
SI opval = * FLD (i_st_src);
|
5422 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
5423 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5424 |
|
|
}
|
5425 |
|
|
{
|
5426 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5427 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
|
5428 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5429 |
|
|
}
|
5430 |
|
|
{
|
5431 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5432 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
|
5433 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5434 |
|
|
}
|
5435 |
|
|
}
|
5436 |
|
|
|
5437 |
|
|
return vpc;
|
5438 |
|
|
#undef FLD
|
5439 |
|
|
}
|
5440 |
|
|
|
5441 |
|
|
/* stt-indirect-index-disp: stt $st_src, $optdisp($abase)[$index*S$scale] */
|
5442 |
|
|
|
5443 |
|
|
static SEM_PC
|
5444 |
|
|
SEM_FN_NAME (i960base,stt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5445 |
|
|
{
|
5446 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5447 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5448 |
|
|
int UNUSED written = 0;
|
5449 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5450 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5451 |
|
|
|
5452 |
|
|
{
|
5453 |
|
|
SI tmp_sregno;
|
5454 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5455 |
|
|
{
|
5456 |
|
|
SI opval = * FLD (i_st_src);
|
5457 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
|
5458 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5459 |
|
|
}
|
5460 |
|
|
{
|
5461 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5462 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
|
5463 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5464 |
|
|
}
|
5465 |
|
|
{
|
5466 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5467 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval);
|
5468 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5469 |
|
|
}
|
5470 |
|
|
}
|
5471 |
|
|
|
5472 |
|
|
return vpc;
|
5473 |
|
|
#undef FLD
|
5474 |
|
|
}
|
5475 |
|
|
|
5476 |
|
|
/* stq-offset: stq $st_src, $offset */
|
5477 |
|
|
|
5478 |
|
|
static SEM_PC
|
5479 |
|
|
SEM_FN_NAME (i960base,stq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5480 |
|
|
{
|
5481 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
5482 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5483 |
|
|
int UNUSED written = 0;
|
5484 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5485 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5486 |
|
|
|
5487 |
|
|
{
|
5488 |
|
|
SI tmp_sregno;
|
5489 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5490 |
|
|
{
|
5491 |
|
|
SI opval = * FLD (i_st_src);
|
5492 |
|
|
SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
|
5493 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5494 |
|
|
}
|
5495 |
|
|
{
|
5496 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5497 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
|
5498 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5499 |
|
|
}
|
5500 |
|
|
{
|
5501 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5502 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval);
|
5503 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5504 |
|
|
}
|
5505 |
|
|
{
|
5506 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
|
5507 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval);
|
5508 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5509 |
|
|
}
|
5510 |
|
|
}
|
5511 |
|
|
|
5512 |
|
|
return vpc;
|
5513 |
|
|
#undef FLD
|
5514 |
|
|
}
|
5515 |
|
|
|
5516 |
|
|
/* stq-indirect-offset: stq $st_src, $offset($abase) */
|
5517 |
|
|
|
5518 |
|
|
static SEM_PC
|
5519 |
|
|
SEM_FN_NAME (i960base,stq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5520 |
|
|
{
|
5521 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
5522 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5523 |
|
|
int UNUSED written = 0;
|
5524 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5525 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5526 |
|
|
|
5527 |
|
|
{
|
5528 |
|
|
SI tmp_sregno;
|
5529 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5530 |
|
|
{
|
5531 |
|
|
SI opval = * FLD (i_st_src);
|
5532 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
|
5533 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5534 |
|
|
}
|
5535 |
|
|
{
|
5536 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5537 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
|
5538 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5539 |
|
|
}
|
5540 |
|
|
{
|
5541 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5542 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval);
|
5543 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5544 |
|
|
}
|
5545 |
|
|
{
|
5546 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
|
5547 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval);
|
5548 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5549 |
|
|
}
|
5550 |
|
|
}
|
5551 |
|
|
|
5552 |
|
|
return vpc;
|
5553 |
|
|
#undef FLD
|
5554 |
|
|
}
|
5555 |
|
|
|
5556 |
|
|
/* stq-indirect: stq $st_src, ($abase) */
|
5557 |
|
|
|
5558 |
|
|
static SEM_PC
|
5559 |
|
|
SEM_FN_NAME (i960base,stq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5560 |
|
|
{
|
5561 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
5562 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5563 |
|
|
int UNUSED written = 0;
|
5564 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5565 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5566 |
|
|
|
5567 |
|
|
{
|
5568 |
|
|
SI tmp_sregno;
|
5569 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5570 |
|
|
{
|
5571 |
|
|
SI opval = * FLD (i_st_src);
|
5572 |
|
|
SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
|
5573 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5574 |
|
|
}
|
5575 |
|
|
{
|
5576 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5577 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
|
5578 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5579 |
|
|
}
|
5580 |
|
|
{
|
5581 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5582 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval);
|
5583 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5584 |
|
|
}
|
5585 |
|
|
{
|
5586 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
|
5587 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval);
|
5588 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5589 |
|
|
}
|
5590 |
|
|
}
|
5591 |
|
|
|
5592 |
|
|
return vpc;
|
5593 |
|
|
#undef FLD
|
5594 |
|
|
}
|
5595 |
|
|
|
5596 |
|
|
/* stq-indirect-index: stq $st_src, ($abase)[$index*S$scale] */
|
5597 |
|
|
|
5598 |
|
|
static SEM_PC
|
5599 |
|
|
SEM_FN_NAME (i960base,stq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5600 |
|
|
{
|
5601 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5602 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5603 |
|
|
int UNUSED written = 0;
|
5604 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5605 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5606 |
|
|
|
5607 |
|
|
{
|
5608 |
|
|
SI tmp_sregno;
|
5609 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5610 |
|
|
{
|
5611 |
|
|
SI opval = * FLD (i_st_src);
|
5612 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
5613 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5614 |
|
|
}
|
5615 |
|
|
{
|
5616 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5617 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
|
5618 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5619 |
|
|
}
|
5620 |
|
|
{
|
5621 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5622 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
|
5623 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5624 |
|
|
}
|
5625 |
|
|
{
|
5626 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
|
5627 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval);
|
5628 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5629 |
|
|
}
|
5630 |
|
|
}
|
5631 |
|
|
|
5632 |
|
|
return vpc;
|
5633 |
|
|
#undef FLD
|
5634 |
|
|
}
|
5635 |
|
|
|
5636 |
|
|
/* stq-disp: stq $st_src, $optdisp */
|
5637 |
|
|
|
5638 |
|
|
static SEM_PC
|
5639 |
|
|
SEM_FN_NAME (i960base,stq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5640 |
|
|
{
|
5641 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5642 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5643 |
|
|
int UNUSED written = 0;
|
5644 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5645 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5646 |
|
|
|
5647 |
|
|
{
|
5648 |
|
|
SI tmp_sregno;
|
5649 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5650 |
|
|
{
|
5651 |
|
|
SI opval = * FLD (i_st_src);
|
5652 |
|
|
SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
|
5653 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5654 |
|
|
}
|
5655 |
|
|
{
|
5656 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5657 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
|
5658 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5659 |
|
|
}
|
5660 |
|
|
{
|
5661 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5662 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval);
|
5663 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5664 |
|
|
}
|
5665 |
|
|
{
|
5666 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
|
5667 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval);
|
5668 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5669 |
|
|
}
|
5670 |
|
|
}
|
5671 |
|
|
|
5672 |
|
|
return vpc;
|
5673 |
|
|
#undef FLD
|
5674 |
|
|
}
|
5675 |
|
|
|
5676 |
|
|
/* stq-indirect-disp: stq $st_src, $optdisp($abase) */
|
5677 |
|
|
|
5678 |
|
|
static SEM_PC
|
5679 |
|
|
SEM_FN_NAME (i960base,stq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5680 |
|
|
{
|
5681 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5682 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5683 |
|
|
int UNUSED written = 0;
|
5684 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5685 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5686 |
|
|
|
5687 |
|
|
{
|
5688 |
|
|
SI tmp_sregno;
|
5689 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5690 |
|
|
{
|
5691 |
|
|
SI opval = * FLD (i_st_src);
|
5692 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
|
5693 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5694 |
|
|
}
|
5695 |
|
|
{
|
5696 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5697 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
|
5698 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5699 |
|
|
}
|
5700 |
|
|
{
|
5701 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5702 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval);
|
5703 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5704 |
|
|
}
|
5705 |
|
|
{
|
5706 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
|
5707 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval);
|
5708 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5709 |
|
|
}
|
5710 |
|
|
}
|
5711 |
|
|
|
5712 |
|
|
return vpc;
|
5713 |
|
|
#undef FLD
|
5714 |
|
|
}
|
5715 |
|
|
|
5716 |
|
|
/* stq-index-disp: stq $st_src, $optdisp[$index*S$scale */
|
5717 |
|
|
|
5718 |
|
|
static SEM_PC
|
5719 |
|
|
SEM_FN_NAME (i960base,stq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5720 |
|
|
{
|
5721 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5722 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5723 |
|
|
int UNUSED written = 0;
|
5724 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5725 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5726 |
|
|
|
5727 |
|
|
{
|
5728 |
|
|
SI tmp_sregno;
|
5729 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5730 |
|
|
{
|
5731 |
|
|
SI opval = * FLD (i_st_src);
|
5732 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
|
5733 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5734 |
|
|
}
|
5735 |
|
|
{
|
5736 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5737 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
|
5738 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5739 |
|
|
}
|
5740 |
|
|
{
|
5741 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5742 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
|
5743 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5744 |
|
|
}
|
5745 |
|
|
{
|
5746 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
|
5747 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval);
|
5748 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5749 |
|
|
}
|
5750 |
|
|
}
|
5751 |
|
|
|
5752 |
|
|
return vpc;
|
5753 |
|
|
#undef FLD
|
5754 |
|
|
}
|
5755 |
|
|
|
5756 |
|
|
/* stq-indirect-index-disp: stq $st_src, $optdisp($abase)[$index*S$scale] */
|
5757 |
|
|
|
5758 |
|
|
static SEM_PC
|
5759 |
|
|
SEM_FN_NAME (i960base,stq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5760 |
|
|
{
|
5761 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
5762 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5763 |
|
|
int UNUSED written = 0;
|
5764 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5765 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
5766 |
|
|
|
5767 |
|
|
{
|
5768 |
|
|
SI tmp_sregno;
|
5769 |
|
|
tmp_sregno = FLD (f_srcdst);
|
5770 |
|
|
{
|
5771 |
|
|
SI opval = * FLD (i_st_src);
|
5772 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
|
5773 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5774 |
|
|
}
|
5775 |
|
|
{
|
5776 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
|
5777 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
|
5778 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5779 |
|
|
}
|
5780 |
|
|
{
|
5781 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
|
5782 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval);
|
5783 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5784 |
|
|
}
|
5785 |
|
|
{
|
5786 |
|
|
SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
|
5787 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval);
|
5788 |
|
|
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
|
5789 |
|
|
}
|
5790 |
|
|
}
|
5791 |
|
|
|
5792 |
|
|
return vpc;
|
5793 |
|
|
#undef FLD
|
5794 |
|
|
}
|
5795 |
|
|
|
5796 |
|
|
/* cmpobe-reg: cmpobe $br_src1, $br_src2, $br_disp */
|
5797 |
|
|
|
5798 |
|
|
static SEM_PC
|
5799 |
|
|
SEM_FN_NAME (i960base,cmpobe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5800 |
|
|
{
|
5801 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
5802 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5803 |
|
|
int UNUSED written = 0;
|
5804 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5805 |
|
|
SEM_BRANCH_INIT
|
5806 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5807 |
|
|
|
5808 |
|
|
if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
5809 |
|
|
{
|
5810 |
|
|
USI opval = FLD (i_br_disp);
|
5811 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
5812 |
|
|
written |= (1 << 3);
|
5813 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
5814 |
|
|
}
|
5815 |
|
|
}
|
5816 |
|
|
|
5817 |
|
|
abuf->written = written;
|
5818 |
|
|
SEM_BRANCH_FINI (vpc);
|
5819 |
|
|
return vpc;
|
5820 |
|
|
#undef FLD
|
5821 |
|
|
}
|
5822 |
|
|
|
5823 |
|
|
/* cmpobe-lit: cmpobe $br_lit1, $br_src2, $br_disp */
|
5824 |
|
|
|
5825 |
|
|
static SEM_PC
|
5826 |
|
|
SEM_FN_NAME (i960base,cmpobe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5827 |
|
|
{
|
5828 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
5829 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5830 |
|
|
int UNUSED written = 0;
|
5831 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5832 |
|
|
SEM_BRANCH_INIT
|
5833 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5834 |
|
|
|
5835 |
|
|
if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
5836 |
|
|
{
|
5837 |
|
|
USI opval = FLD (i_br_disp);
|
5838 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
5839 |
|
|
written |= (1 << 3);
|
5840 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
5841 |
|
|
}
|
5842 |
|
|
}
|
5843 |
|
|
|
5844 |
|
|
abuf->written = written;
|
5845 |
|
|
SEM_BRANCH_FINI (vpc);
|
5846 |
|
|
return vpc;
|
5847 |
|
|
#undef FLD
|
5848 |
|
|
}
|
5849 |
|
|
|
5850 |
|
|
/* cmpobne-reg: cmpobne $br_src1, $br_src2, $br_disp */
|
5851 |
|
|
|
5852 |
|
|
static SEM_PC
|
5853 |
|
|
SEM_FN_NAME (i960base,cmpobne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5854 |
|
|
{
|
5855 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
5856 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5857 |
|
|
int UNUSED written = 0;
|
5858 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5859 |
|
|
SEM_BRANCH_INIT
|
5860 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5861 |
|
|
|
5862 |
|
|
if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
5863 |
|
|
{
|
5864 |
|
|
USI opval = FLD (i_br_disp);
|
5865 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
5866 |
|
|
written |= (1 << 3);
|
5867 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
5868 |
|
|
}
|
5869 |
|
|
}
|
5870 |
|
|
|
5871 |
|
|
abuf->written = written;
|
5872 |
|
|
SEM_BRANCH_FINI (vpc);
|
5873 |
|
|
return vpc;
|
5874 |
|
|
#undef FLD
|
5875 |
|
|
}
|
5876 |
|
|
|
5877 |
|
|
/* cmpobne-lit: cmpobne $br_lit1, $br_src2, $br_disp */
|
5878 |
|
|
|
5879 |
|
|
static SEM_PC
|
5880 |
|
|
SEM_FN_NAME (i960base,cmpobne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5881 |
|
|
{
|
5882 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
5883 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5884 |
|
|
int UNUSED written = 0;
|
5885 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5886 |
|
|
SEM_BRANCH_INIT
|
5887 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5888 |
|
|
|
5889 |
|
|
if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
5890 |
|
|
{
|
5891 |
|
|
USI opval = FLD (i_br_disp);
|
5892 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
5893 |
|
|
written |= (1 << 3);
|
5894 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
5895 |
|
|
}
|
5896 |
|
|
}
|
5897 |
|
|
|
5898 |
|
|
abuf->written = written;
|
5899 |
|
|
SEM_BRANCH_FINI (vpc);
|
5900 |
|
|
return vpc;
|
5901 |
|
|
#undef FLD
|
5902 |
|
|
}
|
5903 |
|
|
|
5904 |
|
|
/* cmpobl-reg: cmpobl $br_src1, $br_src2, $br_disp */
|
5905 |
|
|
|
5906 |
|
|
static SEM_PC
|
5907 |
|
|
SEM_FN_NAME (i960base,cmpobl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5908 |
|
|
{
|
5909 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
5910 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5911 |
|
|
int UNUSED written = 0;
|
5912 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5913 |
|
|
SEM_BRANCH_INIT
|
5914 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5915 |
|
|
|
5916 |
|
|
if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
5917 |
|
|
{
|
5918 |
|
|
USI opval = FLD (i_br_disp);
|
5919 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
5920 |
|
|
written |= (1 << 3);
|
5921 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
5922 |
|
|
}
|
5923 |
|
|
}
|
5924 |
|
|
|
5925 |
|
|
abuf->written = written;
|
5926 |
|
|
SEM_BRANCH_FINI (vpc);
|
5927 |
|
|
return vpc;
|
5928 |
|
|
#undef FLD
|
5929 |
|
|
}
|
5930 |
|
|
|
5931 |
|
|
/* cmpobl-lit: cmpobl $br_lit1, $br_src2, $br_disp */
|
5932 |
|
|
|
5933 |
|
|
static SEM_PC
|
5934 |
|
|
SEM_FN_NAME (i960base,cmpobl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5935 |
|
|
{
|
5936 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
5937 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5938 |
|
|
int UNUSED written = 0;
|
5939 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5940 |
|
|
SEM_BRANCH_INIT
|
5941 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5942 |
|
|
|
5943 |
|
|
if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
5944 |
|
|
{
|
5945 |
|
|
USI opval = FLD (i_br_disp);
|
5946 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
5947 |
|
|
written |= (1 << 3);
|
5948 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
5949 |
|
|
}
|
5950 |
|
|
}
|
5951 |
|
|
|
5952 |
|
|
abuf->written = written;
|
5953 |
|
|
SEM_BRANCH_FINI (vpc);
|
5954 |
|
|
return vpc;
|
5955 |
|
|
#undef FLD
|
5956 |
|
|
}
|
5957 |
|
|
|
5958 |
|
|
/* cmpoble-reg: cmpoble $br_src1, $br_src2, $br_disp */
|
5959 |
|
|
|
5960 |
|
|
static SEM_PC
|
5961 |
|
|
SEM_FN_NAME (i960base,cmpoble_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5962 |
|
|
{
|
5963 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
5964 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5965 |
|
|
int UNUSED written = 0;
|
5966 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5967 |
|
|
SEM_BRANCH_INIT
|
5968 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5969 |
|
|
|
5970 |
|
|
if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
5971 |
|
|
{
|
5972 |
|
|
USI opval = FLD (i_br_disp);
|
5973 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
5974 |
|
|
written |= (1 << 3);
|
5975 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
5976 |
|
|
}
|
5977 |
|
|
}
|
5978 |
|
|
|
5979 |
|
|
abuf->written = written;
|
5980 |
|
|
SEM_BRANCH_FINI (vpc);
|
5981 |
|
|
return vpc;
|
5982 |
|
|
#undef FLD
|
5983 |
|
|
}
|
5984 |
|
|
|
5985 |
|
|
/* cmpoble-lit: cmpoble $br_lit1, $br_src2, $br_disp */
|
5986 |
|
|
|
5987 |
|
|
static SEM_PC
|
5988 |
|
|
SEM_FN_NAME (i960base,cmpoble_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
5989 |
|
|
{
|
5990 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
5991 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
5992 |
|
|
int UNUSED written = 0;
|
5993 |
|
|
IADDR UNUSED pc = abuf->addr;
|
5994 |
|
|
SEM_BRANCH_INIT
|
5995 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
5996 |
|
|
|
5997 |
|
|
if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
5998 |
|
|
{
|
5999 |
|
|
USI opval = FLD (i_br_disp);
|
6000 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6001 |
|
|
written |= (1 << 3);
|
6002 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6003 |
|
|
}
|
6004 |
|
|
}
|
6005 |
|
|
|
6006 |
|
|
abuf->written = written;
|
6007 |
|
|
SEM_BRANCH_FINI (vpc);
|
6008 |
|
|
return vpc;
|
6009 |
|
|
#undef FLD
|
6010 |
|
|
}
|
6011 |
|
|
|
6012 |
|
|
/* cmpobg-reg: cmpobg $br_src1, $br_src2, $br_disp */
|
6013 |
|
|
|
6014 |
|
|
static SEM_PC
|
6015 |
|
|
SEM_FN_NAME (i960base,cmpobg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6016 |
|
|
{
|
6017 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6018 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6019 |
|
|
int UNUSED written = 0;
|
6020 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6021 |
|
|
SEM_BRANCH_INIT
|
6022 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6023 |
|
|
|
6024 |
|
|
if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
6025 |
|
|
{
|
6026 |
|
|
USI opval = FLD (i_br_disp);
|
6027 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6028 |
|
|
written |= (1 << 3);
|
6029 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6030 |
|
|
}
|
6031 |
|
|
}
|
6032 |
|
|
|
6033 |
|
|
abuf->written = written;
|
6034 |
|
|
SEM_BRANCH_FINI (vpc);
|
6035 |
|
|
return vpc;
|
6036 |
|
|
#undef FLD
|
6037 |
|
|
}
|
6038 |
|
|
|
6039 |
|
|
/* cmpobg-lit: cmpobg $br_lit1, $br_src2, $br_disp */
|
6040 |
|
|
|
6041 |
|
|
static SEM_PC
|
6042 |
|
|
SEM_FN_NAME (i960base,cmpobg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6043 |
|
|
{
|
6044 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6045 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6046 |
|
|
int UNUSED written = 0;
|
6047 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6048 |
|
|
SEM_BRANCH_INIT
|
6049 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6050 |
|
|
|
6051 |
|
|
if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
6052 |
|
|
{
|
6053 |
|
|
USI opval = FLD (i_br_disp);
|
6054 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6055 |
|
|
written |= (1 << 3);
|
6056 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6057 |
|
|
}
|
6058 |
|
|
}
|
6059 |
|
|
|
6060 |
|
|
abuf->written = written;
|
6061 |
|
|
SEM_BRANCH_FINI (vpc);
|
6062 |
|
|
return vpc;
|
6063 |
|
|
#undef FLD
|
6064 |
|
|
}
|
6065 |
|
|
|
6066 |
|
|
/* cmpobge-reg: cmpobge $br_src1, $br_src2, $br_disp */
|
6067 |
|
|
|
6068 |
|
|
static SEM_PC
|
6069 |
|
|
SEM_FN_NAME (i960base,cmpobge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6070 |
|
|
{
|
6071 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6072 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6073 |
|
|
int UNUSED written = 0;
|
6074 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6075 |
|
|
SEM_BRANCH_INIT
|
6076 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6077 |
|
|
|
6078 |
|
|
if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
6079 |
|
|
{
|
6080 |
|
|
USI opval = FLD (i_br_disp);
|
6081 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6082 |
|
|
written |= (1 << 3);
|
6083 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6084 |
|
|
}
|
6085 |
|
|
}
|
6086 |
|
|
|
6087 |
|
|
abuf->written = written;
|
6088 |
|
|
SEM_BRANCH_FINI (vpc);
|
6089 |
|
|
return vpc;
|
6090 |
|
|
#undef FLD
|
6091 |
|
|
}
|
6092 |
|
|
|
6093 |
|
|
/* cmpobge-lit: cmpobge $br_lit1, $br_src2, $br_disp */
|
6094 |
|
|
|
6095 |
|
|
static SEM_PC
|
6096 |
|
|
SEM_FN_NAME (i960base,cmpobge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6097 |
|
|
{
|
6098 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6099 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6100 |
|
|
int UNUSED written = 0;
|
6101 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6102 |
|
|
SEM_BRANCH_INIT
|
6103 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6104 |
|
|
|
6105 |
|
|
if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
6106 |
|
|
{
|
6107 |
|
|
USI opval = FLD (i_br_disp);
|
6108 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6109 |
|
|
written |= (1 << 3);
|
6110 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6111 |
|
|
}
|
6112 |
|
|
}
|
6113 |
|
|
|
6114 |
|
|
abuf->written = written;
|
6115 |
|
|
SEM_BRANCH_FINI (vpc);
|
6116 |
|
|
return vpc;
|
6117 |
|
|
#undef FLD
|
6118 |
|
|
}
|
6119 |
|
|
|
6120 |
|
|
/* cmpibe-reg: cmpibe $br_src1, $br_src2, $br_disp */
|
6121 |
|
|
|
6122 |
|
|
static SEM_PC
|
6123 |
|
|
SEM_FN_NAME (i960base,cmpibe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6124 |
|
|
{
|
6125 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6126 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6127 |
|
|
int UNUSED written = 0;
|
6128 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6129 |
|
|
SEM_BRANCH_INIT
|
6130 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6131 |
|
|
|
6132 |
|
|
if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
6133 |
|
|
{
|
6134 |
|
|
USI opval = FLD (i_br_disp);
|
6135 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6136 |
|
|
written |= (1 << 3);
|
6137 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6138 |
|
|
}
|
6139 |
|
|
}
|
6140 |
|
|
|
6141 |
|
|
abuf->written = written;
|
6142 |
|
|
SEM_BRANCH_FINI (vpc);
|
6143 |
|
|
return vpc;
|
6144 |
|
|
#undef FLD
|
6145 |
|
|
}
|
6146 |
|
|
|
6147 |
|
|
/* cmpibe-lit: cmpibe $br_lit1, $br_src2, $br_disp */
|
6148 |
|
|
|
6149 |
|
|
static SEM_PC
|
6150 |
|
|
SEM_FN_NAME (i960base,cmpibe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6151 |
|
|
{
|
6152 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6153 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6154 |
|
|
int UNUSED written = 0;
|
6155 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6156 |
|
|
SEM_BRANCH_INIT
|
6157 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6158 |
|
|
|
6159 |
|
|
if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
6160 |
|
|
{
|
6161 |
|
|
USI opval = FLD (i_br_disp);
|
6162 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6163 |
|
|
written |= (1 << 3);
|
6164 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6165 |
|
|
}
|
6166 |
|
|
}
|
6167 |
|
|
|
6168 |
|
|
abuf->written = written;
|
6169 |
|
|
SEM_BRANCH_FINI (vpc);
|
6170 |
|
|
return vpc;
|
6171 |
|
|
#undef FLD
|
6172 |
|
|
}
|
6173 |
|
|
|
6174 |
|
|
/* cmpibne-reg: cmpibne $br_src1, $br_src2, $br_disp */
|
6175 |
|
|
|
6176 |
|
|
static SEM_PC
|
6177 |
|
|
SEM_FN_NAME (i960base,cmpibne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6178 |
|
|
{
|
6179 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6180 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6181 |
|
|
int UNUSED written = 0;
|
6182 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6183 |
|
|
SEM_BRANCH_INIT
|
6184 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6185 |
|
|
|
6186 |
|
|
if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
6187 |
|
|
{
|
6188 |
|
|
USI opval = FLD (i_br_disp);
|
6189 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6190 |
|
|
written |= (1 << 3);
|
6191 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6192 |
|
|
}
|
6193 |
|
|
}
|
6194 |
|
|
|
6195 |
|
|
abuf->written = written;
|
6196 |
|
|
SEM_BRANCH_FINI (vpc);
|
6197 |
|
|
return vpc;
|
6198 |
|
|
#undef FLD
|
6199 |
|
|
}
|
6200 |
|
|
|
6201 |
|
|
/* cmpibne-lit: cmpibne $br_lit1, $br_src2, $br_disp */
|
6202 |
|
|
|
6203 |
|
|
static SEM_PC
|
6204 |
|
|
SEM_FN_NAME (i960base,cmpibne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6205 |
|
|
{
|
6206 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6207 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6208 |
|
|
int UNUSED written = 0;
|
6209 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6210 |
|
|
SEM_BRANCH_INIT
|
6211 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6212 |
|
|
|
6213 |
|
|
if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
6214 |
|
|
{
|
6215 |
|
|
USI opval = FLD (i_br_disp);
|
6216 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6217 |
|
|
written |= (1 << 3);
|
6218 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6219 |
|
|
}
|
6220 |
|
|
}
|
6221 |
|
|
|
6222 |
|
|
abuf->written = written;
|
6223 |
|
|
SEM_BRANCH_FINI (vpc);
|
6224 |
|
|
return vpc;
|
6225 |
|
|
#undef FLD
|
6226 |
|
|
}
|
6227 |
|
|
|
6228 |
|
|
/* cmpibl-reg: cmpibl $br_src1, $br_src2, $br_disp */
|
6229 |
|
|
|
6230 |
|
|
static SEM_PC
|
6231 |
|
|
SEM_FN_NAME (i960base,cmpibl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6232 |
|
|
{
|
6233 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6234 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6235 |
|
|
int UNUSED written = 0;
|
6236 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6237 |
|
|
SEM_BRANCH_INIT
|
6238 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6239 |
|
|
|
6240 |
|
|
if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
6241 |
|
|
{
|
6242 |
|
|
USI opval = FLD (i_br_disp);
|
6243 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6244 |
|
|
written |= (1 << 3);
|
6245 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6246 |
|
|
}
|
6247 |
|
|
}
|
6248 |
|
|
|
6249 |
|
|
abuf->written = written;
|
6250 |
|
|
SEM_BRANCH_FINI (vpc);
|
6251 |
|
|
return vpc;
|
6252 |
|
|
#undef FLD
|
6253 |
|
|
}
|
6254 |
|
|
|
6255 |
|
|
/* cmpibl-lit: cmpibl $br_lit1, $br_src2, $br_disp */
|
6256 |
|
|
|
6257 |
|
|
static SEM_PC
|
6258 |
|
|
SEM_FN_NAME (i960base,cmpibl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6259 |
|
|
{
|
6260 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6261 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6262 |
|
|
int UNUSED written = 0;
|
6263 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6264 |
|
|
SEM_BRANCH_INIT
|
6265 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6266 |
|
|
|
6267 |
|
|
if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
6268 |
|
|
{
|
6269 |
|
|
USI opval = FLD (i_br_disp);
|
6270 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6271 |
|
|
written |= (1 << 3);
|
6272 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6273 |
|
|
}
|
6274 |
|
|
}
|
6275 |
|
|
|
6276 |
|
|
abuf->written = written;
|
6277 |
|
|
SEM_BRANCH_FINI (vpc);
|
6278 |
|
|
return vpc;
|
6279 |
|
|
#undef FLD
|
6280 |
|
|
}
|
6281 |
|
|
|
6282 |
|
|
/* cmpible-reg: cmpible $br_src1, $br_src2, $br_disp */
|
6283 |
|
|
|
6284 |
|
|
static SEM_PC
|
6285 |
|
|
SEM_FN_NAME (i960base,cmpible_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6286 |
|
|
{
|
6287 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6288 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6289 |
|
|
int UNUSED written = 0;
|
6290 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6291 |
|
|
SEM_BRANCH_INIT
|
6292 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6293 |
|
|
|
6294 |
|
|
if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
6295 |
|
|
{
|
6296 |
|
|
USI opval = FLD (i_br_disp);
|
6297 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6298 |
|
|
written |= (1 << 3);
|
6299 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6300 |
|
|
}
|
6301 |
|
|
}
|
6302 |
|
|
|
6303 |
|
|
abuf->written = written;
|
6304 |
|
|
SEM_BRANCH_FINI (vpc);
|
6305 |
|
|
return vpc;
|
6306 |
|
|
#undef FLD
|
6307 |
|
|
}
|
6308 |
|
|
|
6309 |
|
|
/* cmpible-lit: cmpible $br_lit1, $br_src2, $br_disp */
|
6310 |
|
|
|
6311 |
|
|
static SEM_PC
|
6312 |
|
|
SEM_FN_NAME (i960base,cmpible_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6313 |
|
|
{
|
6314 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6315 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6316 |
|
|
int UNUSED written = 0;
|
6317 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6318 |
|
|
SEM_BRANCH_INIT
|
6319 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6320 |
|
|
|
6321 |
|
|
if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
6322 |
|
|
{
|
6323 |
|
|
USI opval = FLD (i_br_disp);
|
6324 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6325 |
|
|
written |= (1 << 3);
|
6326 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6327 |
|
|
}
|
6328 |
|
|
}
|
6329 |
|
|
|
6330 |
|
|
abuf->written = written;
|
6331 |
|
|
SEM_BRANCH_FINI (vpc);
|
6332 |
|
|
return vpc;
|
6333 |
|
|
#undef FLD
|
6334 |
|
|
}
|
6335 |
|
|
|
6336 |
|
|
/* cmpibg-reg: cmpibg $br_src1, $br_src2, $br_disp */
|
6337 |
|
|
|
6338 |
|
|
static SEM_PC
|
6339 |
|
|
SEM_FN_NAME (i960base,cmpibg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6340 |
|
|
{
|
6341 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6342 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6343 |
|
|
int UNUSED written = 0;
|
6344 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6345 |
|
|
SEM_BRANCH_INIT
|
6346 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6347 |
|
|
|
6348 |
|
|
if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
6349 |
|
|
{
|
6350 |
|
|
USI opval = FLD (i_br_disp);
|
6351 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6352 |
|
|
written |= (1 << 3);
|
6353 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6354 |
|
|
}
|
6355 |
|
|
}
|
6356 |
|
|
|
6357 |
|
|
abuf->written = written;
|
6358 |
|
|
SEM_BRANCH_FINI (vpc);
|
6359 |
|
|
return vpc;
|
6360 |
|
|
#undef FLD
|
6361 |
|
|
}
|
6362 |
|
|
|
6363 |
|
|
/* cmpibg-lit: cmpibg $br_lit1, $br_src2, $br_disp */
|
6364 |
|
|
|
6365 |
|
|
static SEM_PC
|
6366 |
|
|
SEM_FN_NAME (i960base,cmpibg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6367 |
|
|
{
|
6368 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6369 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6370 |
|
|
int UNUSED written = 0;
|
6371 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6372 |
|
|
SEM_BRANCH_INIT
|
6373 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6374 |
|
|
|
6375 |
|
|
if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
6376 |
|
|
{
|
6377 |
|
|
USI opval = FLD (i_br_disp);
|
6378 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6379 |
|
|
written |= (1 << 3);
|
6380 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6381 |
|
|
}
|
6382 |
|
|
}
|
6383 |
|
|
|
6384 |
|
|
abuf->written = written;
|
6385 |
|
|
SEM_BRANCH_FINI (vpc);
|
6386 |
|
|
return vpc;
|
6387 |
|
|
#undef FLD
|
6388 |
|
|
}
|
6389 |
|
|
|
6390 |
|
|
/* cmpibge-reg: cmpibge $br_src1, $br_src2, $br_disp */
|
6391 |
|
|
|
6392 |
|
|
static SEM_PC
|
6393 |
|
|
SEM_FN_NAME (i960base,cmpibge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6394 |
|
|
{
|
6395 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6396 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6397 |
|
|
int UNUSED written = 0;
|
6398 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6399 |
|
|
SEM_BRANCH_INIT
|
6400 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6401 |
|
|
|
6402 |
|
|
if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
|
6403 |
|
|
{
|
6404 |
|
|
USI opval = FLD (i_br_disp);
|
6405 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6406 |
|
|
written |= (1 << 3);
|
6407 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6408 |
|
|
}
|
6409 |
|
|
}
|
6410 |
|
|
|
6411 |
|
|
abuf->written = written;
|
6412 |
|
|
SEM_BRANCH_FINI (vpc);
|
6413 |
|
|
return vpc;
|
6414 |
|
|
#undef FLD
|
6415 |
|
|
}
|
6416 |
|
|
|
6417 |
|
|
/* cmpibge-lit: cmpibge $br_lit1, $br_src2, $br_disp */
|
6418 |
|
|
|
6419 |
|
|
static SEM_PC
|
6420 |
|
|
SEM_FN_NAME (i960base,cmpibge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6421 |
|
|
{
|
6422 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6423 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6424 |
|
|
int UNUSED written = 0;
|
6425 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6426 |
|
|
SEM_BRANCH_INIT
|
6427 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6428 |
|
|
|
6429 |
|
|
if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
|
6430 |
|
|
{
|
6431 |
|
|
USI opval = FLD (i_br_disp);
|
6432 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6433 |
|
|
written |= (1 << 3);
|
6434 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6435 |
|
|
}
|
6436 |
|
|
}
|
6437 |
|
|
|
6438 |
|
|
abuf->written = written;
|
6439 |
|
|
SEM_BRANCH_FINI (vpc);
|
6440 |
|
|
return vpc;
|
6441 |
|
|
#undef FLD
|
6442 |
|
|
}
|
6443 |
|
|
|
6444 |
|
|
/* bbc-reg: bbc $br_src1, $br_src2, $br_disp */
|
6445 |
|
|
|
6446 |
|
|
static SEM_PC
|
6447 |
|
|
SEM_FN_NAME (i960base,bbc_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6448 |
|
|
{
|
6449 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6450 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6451 |
|
|
int UNUSED written = 0;
|
6452 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6453 |
|
|
SEM_BRANCH_INIT
|
6454 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6455 |
|
|
|
6456 |
|
|
if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
|
6457 |
|
|
{
|
6458 |
|
|
USI opval = FLD (i_br_disp);
|
6459 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6460 |
|
|
written |= (1 << 3);
|
6461 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6462 |
|
|
}
|
6463 |
|
|
}
|
6464 |
|
|
|
6465 |
|
|
abuf->written = written;
|
6466 |
|
|
SEM_BRANCH_FINI (vpc);
|
6467 |
|
|
return vpc;
|
6468 |
|
|
#undef FLD
|
6469 |
|
|
}
|
6470 |
|
|
|
6471 |
|
|
/* bbc-lit: bbc $br_lit1, $br_src2, $br_disp */
|
6472 |
|
|
|
6473 |
|
|
static SEM_PC
|
6474 |
|
|
SEM_FN_NAME (i960base,bbc_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6475 |
|
|
{
|
6476 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6477 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6478 |
|
|
int UNUSED written = 0;
|
6479 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6480 |
|
|
SEM_BRANCH_INIT
|
6481 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6482 |
|
|
|
6483 |
|
|
if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
|
6484 |
|
|
{
|
6485 |
|
|
USI opval = FLD (i_br_disp);
|
6486 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6487 |
|
|
written |= (1 << 3);
|
6488 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6489 |
|
|
}
|
6490 |
|
|
}
|
6491 |
|
|
|
6492 |
|
|
abuf->written = written;
|
6493 |
|
|
SEM_BRANCH_FINI (vpc);
|
6494 |
|
|
return vpc;
|
6495 |
|
|
#undef FLD
|
6496 |
|
|
}
|
6497 |
|
|
|
6498 |
|
|
/* bbs-reg: bbs $br_src1, $br_src2, $br_disp */
|
6499 |
|
|
|
6500 |
|
|
static SEM_PC
|
6501 |
|
|
SEM_FN_NAME (i960base,bbs_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6502 |
|
|
{
|
6503 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
|
6504 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6505 |
|
|
int UNUSED written = 0;
|
6506 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6507 |
|
|
SEM_BRANCH_INIT
|
6508 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6509 |
|
|
|
6510 |
|
|
if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
|
6511 |
|
|
{
|
6512 |
|
|
USI opval = FLD (i_br_disp);
|
6513 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6514 |
|
|
written |= (1 << 3);
|
6515 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6516 |
|
|
}
|
6517 |
|
|
}
|
6518 |
|
|
|
6519 |
|
|
abuf->written = written;
|
6520 |
|
|
SEM_BRANCH_FINI (vpc);
|
6521 |
|
|
return vpc;
|
6522 |
|
|
#undef FLD
|
6523 |
|
|
}
|
6524 |
|
|
|
6525 |
|
|
/* bbs-lit: bbs $br_lit1, $br_src2, $br_disp */
|
6526 |
|
|
|
6527 |
|
|
static SEM_PC
|
6528 |
|
|
SEM_FN_NAME (i960base,bbs_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6529 |
|
|
{
|
6530 |
|
|
#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
|
6531 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6532 |
|
|
int UNUSED written = 0;
|
6533 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6534 |
|
|
SEM_BRANCH_INIT
|
6535 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6536 |
|
|
|
6537 |
|
|
if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
|
6538 |
|
|
{
|
6539 |
|
|
USI opval = FLD (i_br_disp);
|
6540 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6541 |
|
|
written |= (1 << 3);
|
6542 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6543 |
|
|
}
|
6544 |
|
|
}
|
6545 |
|
|
|
6546 |
|
|
abuf->written = written;
|
6547 |
|
|
SEM_BRANCH_FINI (vpc);
|
6548 |
|
|
return vpc;
|
6549 |
|
|
#undef FLD
|
6550 |
|
|
}
|
6551 |
|
|
|
6552 |
|
|
/* cmpi: cmpi $src1, $src2 */
|
6553 |
|
|
|
6554 |
|
|
static SEM_PC
|
6555 |
|
|
SEM_FN_NAME (i960base,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6556 |
|
|
{
|
6557 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
6558 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6559 |
|
|
int UNUSED written = 0;
|
6560 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6561 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6562 |
|
|
|
6563 |
|
|
{
|
6564 |
|
|
SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1);
|
6565 |
|
|
CPU (h_cc) = opval;
|
6566 |
|
|
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
|
6567 |
|
|
}
|
6568 |
|
|
|
6569 |
|
|
return vpc;
|
6570 |
|
|
#undef FLD
|
6571 |
|
|
}
|
6572 |
|
|
|
6573 |
|
|
/* cmpi1: cmpi $lit1, $src2 */
|
6574 |
|
|
|
6575 |
|
|
static SEM_PC
|
6576 |
|
|
SEM_FN_NAME (i960base,cmpi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6577 |
|
|
{
|
6578 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
6579 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6580 |
|
|
int UNUSED written = 0;
|
6581 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6582 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6583 |
|
|
|
6584 |
|
|
{
|
6585 |
|
|
SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1);
|
6586 |
|
|
CPU (h_cc) = opval;
|
6587 |
|
|
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
|
6588 |
|
|
}
|
6589 |
|
|
|
6590 |
|
|
return vpc;
|
6591 |
|
|
#undef FLD
|
6592 |
|
|
}
|
6593 |
|
|
|
6594 |
|
|
/* cmpi2: cmpi $src1, $lit2 */
|
6595 |
|
|
|
6596 |
|
|
static SEM_PC
|
6597 |
|
|
SEM_FN_NAME (i960base,cmpi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6598 |
|
|
{
|
6599 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
6600 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6601 |
|
|
int UNUSED written = 0;
|
6602 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6603 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6604 |
|
|
|
6605 |
|
|
{
|
6606 |
|
|
SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1);
|
6607 |
|
|
CPU (h_cc) = opval;
|
6608 |
|
|
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
|
6609 |
|
|
}
|
6610 |
|
|
|
6611 |
|
|
return vpc;
|
6612 |
|
|
#undef FLD
|
6613 |
|
|
}
|
6614 |
|
|
|
6615 |
|
|
/* cmpi3: cmpi $lit1, $lit2 */
|
6616 |
|
|
|
6617 |
|
|
static SEM_PC
|
6618 |
|
|
SEM_FN_NAME (i960base,cmpi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6619 |
|
|
{
|
6620 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
6621 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6622 |
|
|
int UNUSED written = 0;
|
6623 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6624 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6625 |
|
|
|
6626 |
|
|
{
|
6627 |
|
|
SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1);
|
6628 |
|
|
CPU (h_cc) = opval;
|
6629 |
|
|
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
|
6630 |
|
|
}
|
6631 |
|
|
|
6632 |
|
|
return vpc;
|
6633 |
|
|
#undef FLD
|
6634 |
|
|
}
|
6635 |
|
|
|
6636 |
|
|
/* cmpo: cmpo $src1, $src2 */
|
6637 |
|
|
|
6638 |
|
|
static SEM_PC
|
6639 |
|
|
SEM_FN_NAME (i960base,cmpo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6640 |
|
|
{
|
6641 |
|
|
#define FLD(f) abuf->fields.sfmt_emul.f
|
6642 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6643 |
|
|
int UNUSED written = 0;
|
6644 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6645 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6646 |
|
|
|
6647 |
|
|
{
|
6648 |
|
|
SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1);
|
6649 |
|
|
CPU (h_cc) = opval;
|
6650 |
|
|
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
|
6651 |
|
|
}
|
6652 |
|
|
|
6653 |
|
|
return vpc;
|
6654 |
|
|
#undef FLD
|
6655 |
|
|
}
|
6656 |
|
|
|
6657 |
|
|
/* cmpo1: cmpo $lit1, $src2 */
|
6658 |
|
|
|
6659 |
|
|
static SEM_PC
|
6660 |
|
|
SEM_FN_NAME (i960base,cmpo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6661 |
|
|
{
|
6662 |
|
|
#define FLD(f) abuf->fields.sfmt_emul1.f
|
6663 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6664 |
|
|
int UNUSED written = 0;
|
6665 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6666 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6667 |
|
|
|
6668 |
|
|
{
|
6669 |
|
|
SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1);
|
6670 |
|
|
CPU (h_cc) = opval;
|
6671 |
|
|
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
|
6672 |
|
|
}
|
6673 |
|
|
|
6674 |
|
|
return vpc;
|
6675 |
|
|
#undef FLD
|
6676 |
|
|
}
|
6677 |
|
|
|
6678 |
|
|
/* cmpo2: cmpo $src1, $lit2 */
|
6679 |
|
|
|
6680 |
|
|
static SEM_PC
|
6681 |
|
|
SEM_FN_NAME (i960base,cmpo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6682 |
|
|
{
|
6683 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
6684 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6685 |
|
|
int UNUSED written = 0;
|
6686 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6687 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6688 |
|
|
|
6689 |
|
|
{
|
6690 |
|
|
SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1);
|
6691 |
|
|
CPU (h_cc) = opval;
|
6692 |
|
|
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
|
6693 |
|
|
}
|
6694 |
|
|
|
6695 |
|
|
return vpc;
|
6696 |
|
|
#undef FLD
|
6697 |
|
|
}
|
6698 |
|
|
|
6699 |
|
|
/* cmpo3: cmpo $lit1, $lit2 */
|
6700 |
|
|
|
6701 |
|
|
static SEM_PC
|
6702 |
|
|
SEM_FN_NAME (i960base,cmpo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6703 |
|
|
{
|
6704 |
|
|
#define FLD(f) abuf->fields.sfmt_emul3.f
|
6705 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6706 |
|
|
int UNUSED written = 0;
|
6707 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6708 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6709 |
|
|
|
6710 |
|
|
{
|
6711 |
|
|
SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1);
|
6712 |
|
|
CPU (h_cc) = opval;
|
6713 |
|
|
TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
|
6714 |
|
|
}
|
6715 |
|
|
|
6716 |
|
|
return vpc;
|
6717 |
|
|
#undef FLD
|
6718 |
|
|
}
|
6719 |
|
|
|
6720 |
|
|
/* testno-reg: testno $br_src1 */
|
6721 |
|
|
|
6722 |
|
|
static SEM_PC
|
6723 |
|
|
SEM_FN_NAME (i960base,testno_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6724 |
|
|
{
|
6725 |
|
|
#define FLD(f) abuf->fields.sfmt_testno_reg.f
|
6726 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6727 |
|
|
int UNUSED written = 0;
|
6728 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6729 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6730 |
|
|
|
6731 |
|
|
{
|
6732 |
|
|
SI opval = EQSI (CPU (h_cc), 0);
|
6733 |
|
|
* FLD (i_br_src1) = opval;
|
6734 |
|
|
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
|
6735 |
|
|
}
|
6736 |
|
|
|
6737 |
|
|
return vpc;
|
6738 |
|
|
#undef FLD
|
6739 |
|
|
}
|
6740 |
|
|
|
6741 |
|
|
/* testg-reg: testg $br_src1 */
|
6742 |
|
|
|
6743 |
|
|
static SEM_PC
|
6744 |
|
|
SEM_FN_NAME (i960base,testg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6745 |
|
|
{
|
6746 |
|
|
#define FLD(f) abuf->fields.sfmt_testno_reg.f
|
6747 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6748 |
|
|
int UNUSED written = 0;
|
6749 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6750 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6751 |
|
|
|
6752 |
|
|
{
|
6753 |
|
|
SI opval = NESI (ANDSI (CPU (h_cc), 1), 0);
|
6754 |
|
|
* FLD (i_br_src1) = opval;
|
6755 |
|
|
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
|
6756 |
|
|
}
|
6757 |
|
|
|
6758 |
|
|
return vpc;
|
6759 |
|
|
#undef FLD
|
6760 |
|
|
}
|
6761 |
|
|
|
6762 |
|
|
/* teste-reg: teste $br_src1 */
|
6763 |
|
|
|
6764 |
|
|
static SEM_PC
|
6765 |
|
|
SEM_FN_NAME (i960base,teste_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6766 |
|
|
{
|
6767 |
|
|
#define FLD(f) abuf->fields.sfmt_testno_reg.f
|
6768 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6769 |
|
|
int UNUSED written = 0;
|
6770 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6771 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6772 |
|
|
|
6773 |
|
|
{
|
6774 |
|
|
SI opval = NESI (ANDSI (CPU (h_cc), 2), 0);
|
6775 |
|
|
* FLD (i_br_src1) = opval;
|
6776 |
|
|
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
|
6777 |
|
|
}
|
6778 |
|
|
|
6779 |
|
|
return vpc;
|
6780 |
|
|
#undef FLD
|
6781 |
|
|
}
|
6782 |
|
|
|
6783 |
|
|
/* testge-reg: testge $br_src1 */
|
6784 |
|
|
|
6785 |
|
|
static SEM_PC
|
6786 |
|
|
SEM_FN_NAME (i960base,testge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6787 |
|
|
{
|
6788 |
|
|
#define FLD(f) abuf->fields.sfmt_testno_reg.f
|
6789 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6790 |
|
|
int UNUSED written = 0;
|
6791 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6792 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6793 |
|
|
|
6794 |
|
|
{
|
6795 |
|
|
SI opval = NESI (ANDSI (CPU (h_cc), 3), 0);
|
6796 |
|
|
* FLD (i_br_src1) = opval;
|
6797 |
|
|
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
|
6798 |
|
|
}
|
6799 |
|
|
|
6800 |
|
|
return vpc;
|
6801 |
|
|
#undef FLD
|
6802 |
|
|
}
|
6803 |
|
|
|
6804 |
|
|
/* testl-reg: testl $br_src1 */
|
6805 |
|
|
|
6806 |
|
|
static SEM_PC
|
6807 |
|
|
SEM_FN_NAME (i960base,testl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6808 |
|
|
{
|
6809 |
|
|
#define FLD(f) abuf->fields.sfmt_testno_reg.f
|
6810 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6811 |
|
|
int UNUSED written = 0;
|
6812 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6813 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6814 |
|
|
|
6815 |
|
|
{
|
6816 |
|
|
SI opval = NESI (ANDSI (CPU (h_cc), 4), 0);
|
6817 |
|
|
* FLD (i_br_src1) = opval;
|
6818 |
|
|
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
|
6819 |
|
|
}
|
6820 |
|
|
|
6821 |
|
|
return vpc;
|
6822 |
|
|
#undef FLD
|
6823 |
|
|
}
|
6824 |
|
|
|
6825 |
|
|
/* testne-reg: testne $br_src1 */
|
6826 |
|
|
|
6827 |
|
|
static SEM_PC
|
6828 |
|
|
SEM_FN_NAME (i960base,testne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6829 |
|
|
{
|
6830 |
|
|
#define FLD(f) abuf->fields.sfmt_testno_reg.f
|
6831 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6832 |
|
|
int UNUSED written = 0;
|
6833 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6834 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6835 |
|
|
|
6836 |
|
|
{
|
6837 |
|
|
SI opval = NESI (ANDSI (CPU (h_cc), 5), 0);
|
6838 |
|
|
* FLD (i_br_src1) = opval;
|
6839 |
|
|
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
|
6840 |
|
|
}
|
6841 |
|
|
|
6842 |
|
|
return vpc;
|
6843 |
|
|
#undef FLD
|
6844 |
|
|
}
|
6845 |
|
|
|
6846 |
|
|
/* testle-reg: testle $br_src1 */
|
6847 |
|
|
|
6848 |
|
|
static SEM_PC
|
6849 |
|
|
SEM_FN_NAME (i960base,testle_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6850 |
|
|
{
|
6851 |
|
|
#define FLD(f) abuf->fields.sfmt_testno_reg.f
|
6852 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6853 |
|
|
int UNUSED written = 0;
|
6854 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6855 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6856 |
|
|
|
6857 |
|
|
{
|
6858 |
|
|
SI opval = NESI (ANDSI (CPU (h_cc), 6), 0);
|
6859 |
|
|
* FLD (i_br_src1) = opval;
|
6860 |
|
|
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
|
6861 |
|
|
}
|
6862 |
|
|
|
6863 |
|
|
return vpc;
|
6864 |
|
|
#undef FLD
|
6865 |
|
|
}
|
6866 |
|
|
|
6867 |
|
|
/* testo-reg: testo $br_src1 */
|
6868 |
|
|
|
6869 |
|
|
static SEM_PC
|
6870 |
|
|
SEM_FN_NAME (i960base,testo_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6871 |
|
|
{
|
6872 |
|
|
#define FLD(f) abuf->fields.sfmt_testno_reg.f
|
6873 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6874 |
|
|
int UNUSED written = 0;
|
6875 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6876 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6877 |
|
|
|
6878 |
|
|
{
|
6879 |
|
|
SI opval = NESI (ANDSI (CPU (h_cc), 7), 0);
|
6880 |
|
|
* FLD (i_br_src1) = opval;
|
6881 |
|
|
TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
|
6882 |
|
|
}
|
6883 |
|
|
|
6884 |
|
|
return vpc;
|
6885 |
|
|
#undef FLD
|
6886 |
|
|
}
|
6887 |
|
|
|
6888 |
|
|
/* bno: bno $ctrl_disp */
|
6889 |
|
|
|
6890 |
|
|
static SEM_PC
|
6891 |
|
|
SEM_FN_NAME (i960base,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6892 |
|
|
{
|
6893 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
6894 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6895 |
|
|
int UNUSED written = 0;
|
6896 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6897 |
|
|
SEM_BRANCH_INIT
|
6898 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6899 |
|
|
|
6900 |
|
|
if (EQSI (CPU (h_cc), 0)) {
|
6901 |
|
|
{
|
6902 |
|
|
USI opval = FLD (i_ctrl_disp);
|
6903 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6904 |
|
|
written |= (1 << 2);
|
6905 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6906 |
|
|
}
|
6907 |
|
|
}
|
6908 |
|
|
|
6909 |
|
|
abuf->written = written;
|
6910 |
|
|
SEM_BRANCH_FINI (vpc);
|
6911 |
|
|
return vpc;
|
6912 |
|
|
#undef FLD
|
6913 |
|
|
}
|
6914 |
|
|
|
6915 |
|
|
/* bg: bg $ctrl_disp */
|
6916 |
|
|
|
6917 |
|
|
static SEM_PC
|
6918 |
|
|
SEM_FN_NAME (i960base,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6919 |
|
|
{
|
6920 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
6921 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6922 |
|
|
int UNUSED written = 0;
|
6923 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6924 |
|
|
SEM_BRANCH_INIT
|
6925 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6926 |
|
|
|
6927 |
|
|
if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
|
6928 |
|
|
{
|
6929 |
|
|
USI opval = FLD (i_ctrl_disp);
|
6930 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6931 |
|
|
written |= (1 << 2);
|
6932 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6933 |
|
|
}
|
6934 |
|
|
}
|
6935 |
|
|
|
6936 |
|
|
abuf->written = written;
|
6937 |
|
|
SEM_BRANCH_FINI (vpc);
|
6938 |
|
|
return vpc;
|
6939 |
|
|
#undef FLD
|
6940 |
|
|
}
|
6941 |
|
|
|
6942 |
|
|
/* be: be $ctrl_disp */
|
6943 |
|
|
|
6944 |
|
|
static SEM_PC
|
6945 |
|
|
SEM_FN_NAME (i960base,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6946 |
|
|
{
|
6947 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
6948 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6949 |
|
|
int UNUSED written = 0;
|
6950 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6951 |
|
|
SEM_BRANCH_INIT
|
6952 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6953 |
|
|
|
6954 |
|
|
if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
|
6955 |
|
|
{
|
6956 |
|
|
USI opval = FLD (i_ctrl_disp);
|
6957 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6958 |
|
|
written |= (1 << 2);
|
6959 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6960 |
|
|
}
|
6961 |
|
|
}
|
6962 |
|
|
|
6963 |
|
|
abuf->written = written;
|
6964 |
|
|
SEM_BRANCH_FINI (vpc);
|
6965 |
|
|
return vpc;
|
6966 |
|
|
#undef FLD
|
6967 |
|
|
}
|
6968 |
|
|
|
6969 |
|
|
/* bge: bge $ctrl_disp */
|
6970 |
|
|
|
6971 |
|
|
static SEM_PC
|
6972 |
|
|
SEM_FN_NAME (i960base,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
6973 |
|
|
{
|
6974 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
6975 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
6976 |
|
|
int UNUSED written = 0;
|
6977 |
|
|
IADDR UNUSED pc = abuf->addr;
|
6978 |
|
|
SEM_BRANCH_INIT
|
6979 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
6980 |
|
|
|
6981 |
|
|
if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
|
6982 |
|
|
{
|
6983 |
|
|
USI opval = FLD (i_ctrl_disp);
|
6984 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
6985 |
|
|
written |= (1 << 2);
|
6986 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
6987 |
|
|
}
|
6988 |
|
|
}
|
6989 |
|
|
|
6990 |
|
|
abuf->written = written;
|
6991 |
|
|
SEM_BRANCH_FINI (vpc);
|
6992 |
|
|
return vpc;
|
6993 |
|
|
#undef FLD
|
6994 |
|
|
}
|
6995 |
|
|
|
6996 |
|
|
/* bl: bl $ctrl_disp */
|
6997 |
|
|
|
6998 |
|
|
static SEM_PC
|
6999 |
|
|
SEM_FN_NAME (i960base,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7000 |
|
|
{
|
7001 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
7002 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7003 |
|
|
int UNUSED written = 0;
|
7004 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7005 |
|
|
SEM_BRANCH_INIT
|
7006 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7007 |
|
|
|
7008 |
|
|
if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
|
7009 |
|
|
{
|
7010 |
|
|
USI opval = FLD (i_ctrl_disp);
|
7011 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
7012 |
|
|
written |= (1 << 2);
|
7013 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7014 |
|
|
}
|
7015 |
|
|
}
|
7016 |
|
|
|
7017 |
|
|
abuf->written = written;
|
7018 |
|
|
SEM_BRANCH_FINI (vpc);
|
7019 |
|
|
return vpc;
|
7020 |
|
|
#undef FLD
|
7021 |
|
|
}
|
7022 |
|
|
|
7023 |
|
|
/* bne: bne $ctrl_disp */
|
7024 |
|
|
|
7025 |
|
|
static SEM_PC
|
7026 |
|
|
SEM_FN_NAME (i960base,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7027 |
|
|
{
|
7028 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
7029 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7030 |
|
|
int UNUSED written = 0;
|
7031 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7032 |
|
|
SEM_BRANCH_INIT
|
7033 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7034 |
|
|
|
7035 |
|
|
if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
|
7036 |
|
|
{
|
7037 |
|
|
USI opval = FLD (i_ctrl_disp);
|
7038 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
7039 |
|
|
written |= (1 << 2);
|
7040 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7041 |
|
|
}
|
7042 |
|
|
}
|
7043 |
|
|
|
7044 |
|
|
abuf->written = written;
|
7045 |
|
|
SEM_BRANCH_FINI (vpc);
|
7046 |
|
|
return vpc;
|
7047 |
|
|
#undef FLD
|
7048 |
|
|
}
|
7049 |
|
|
|
7050 |
|
|
/* ble: ble $ctrl_disp */
|
7051 |
|
|
|
7052 |
|
|
static SEM_PC
|
7053 |
|
|
SEM_FN_NAME (i960base,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7054 |
|
|
{
|
7055 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
7056 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7057 |
|
|
int UNUSED written = 0;
|
7058 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7059 |
|
|
SEM_BRANCH_INIT
|
7060 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7061 |
|
|
|
7062 |
|
|
if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
|
7063 |
|
|
{
|
7064 |
|
|
USI opval = FLD (i_ctrl_disp);
|
7065 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
7066 |
|
|
written |= (1 << 2);
|
7067 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7068 |
|
|
}
|
7069 |
|
|
}
|
7070 |
|
|
|
7071 |
|
|
abuf->written = written;
|
7072 |
|
|
SEM_BRANCH_FINI (vpc);
|
7073 |
|
|
return vpc;
|
7074 |
|
|
#undef FLD
|
7075 |
|
|
}
|
7076 |
|
|
|
7077 |
|
|
/* bo: bo $ctrl_disp */
|
7078 |
|
|
|
7079 |
|
|
static SEM_PC
|
7080 |
|
|
SEM_FN_NAME (i960base,bo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7081 |
|
|
{
|
7082 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
7083 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7084 |
|
|
int UNUSED written = 0;
|
7085 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7086 |
|
|
SEM_BRANCH_INIT
|
7087 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7088 |
|
|
|
7089 |
|
|
if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
|
7090 |
|
|
{
|
7091 |
|
|
USI opval = FLD (i_ctrl_disp);
|
7092 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
7093 |
|
|
written |= (1 << 2);
|
7094 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7095 |
|
|
}
|
7096 |
|
|
}
|
7097 |
|
|
|
7098 |
|
|
abuf->written = written;
|
7099 |
|
|
SEM_BRANCH_FINI (vpc);
|
7100 |
|
|
return vpc;
|
7101 |
|
|
#undef FLD
|
7102 |
|
|
}
|
7103 |
|
|
|
7104 |
|
|
/* b: b $ctrl_disp */
|
7105 |
|
|
|
7106 |
|
|
static SEM_PC
|
7107 |
|
|
SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7108 |
|
|
{
|
7109 |
|
|
#define FLD(f) abuf->fields.sfmt_bno.f
|
7110 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7111 |
|
|
int UNUSED written = 0;
|
7112 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7113 |
|
|
SEM_BRANCH_INIT
|
7114 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7115 |
|
|
|
7116 |
|
|
{
|
7117 |
|
|
USI opval = FLD (i_ctrl_disp);
|
7118 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
7119 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7120 |
|
|
}
|
7121 |
|
|
|
7122 |
|
|
SEM_BRANCH_FINI (vpc);
|
7123 |
|
|
return vpc;
|
7124 |
|
|
#undef FLD
|
7125 |
|
|
}
|
7126 |
|
|
|
7127 |
|
|
/* bx-indirect-offset: bx $offset($abase) */
|
7128 |
|
|
|
7129 |
|
|
static SEM_PC
|
7130 |
|
|
SEM_FN_NAME (i960base,bx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7131 |
|
|
{
|
7132 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
7133 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7134 |
|
|
int UNUSED written = 0;
|
7135 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7136 |
|
|
SEM_BRANCH_INIT
|
7137 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7138 |
|
|
|
7139 |
|
|
{
|
7140 |
|
|
USI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
|
7141 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7142 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7143 |
|
|
}
|
7144 |
|
|
|
7145 |
|
|
SEM_BRANCH_FINI (vpc);
|
7146 |
|
|
return vpc;
|
7147 |
|
|
#undef FLD
|
7148 |
|
|
}
|
7149 |
|
|
|
7150 |
|
|
/* bx-indirect: bx ($abase) */
|
7151 |
|
|
|
7152 |
|
|
static SEM_PC
|
7153 |
|
|
SEM_FN_NAME (i960base,bx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7154 |
|
|
{
|
7155 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
|
7156 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7157 |
|
|
int UNUSED written = 0;
|
7158 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7159 |
|
|
SEM_BRANCH_INIT
|
7160 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7161 |
|
|
|
7162 |
|
|
{
|
7163 |
|
|
USI opval = * FLD (i_abase);
|
7164 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7165 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7166 |
|
|
}
|
7167 |
|
|
|
7168 |
|
|
SEM_BRANCH_FINI (vpc);
|
7169 |
|
|
return vpc;
|
7170 |
|
|
#undef FLD
|
7171 |
|
|
}
|
7172 |
|
|
|
7173 |
|
|
/* bx-indirect-index: bx ($abase)[$index*S$scale] */
|
7174 |
|
|
|
7175 |
|
|
static SEM_PC
|
7176 |
|
|
SEM_FN_NAME (i960base,bx_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7177 |
|
|
{
|
7178 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
7179 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7180 |
|
|
int UNUSED written = 0;
|
7181 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7182 |
|
|
SEM_BRANCH_INIT
|
7183 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7184 |
|
|
|
7185 |
|
|
{
|
7186 |
|
|
USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
|
7187 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7188 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7189 |
|
|
}
|
7190 |
|
|
|
7191 |
|
|
SEM_BRANCH_FINI (vpc);
|
7192 |
|
|
return vpc;
|
7193 |
|
|
#undef FLD
|
7194 |
|
|
}
|
7195 |
|
|
|
7196 |
|
|
/* bx-disp: bx $optdisp */
|
7197 |
|
|
|
7198 |
|
|
static SEM_PC
|
7199 |
|
|
SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7200 |
|
|
{
|
7201 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
7202 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7203 |
|
|
int UNUSED written = 0;
|
7204 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7205 |
|
|
SEM_BRANCH_INIT
|
7206 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
7207 |
|
|
|
7208 |
|
|
{
|
7209 |
|
|
USI opval = FLD (f_optdisp);
|
7210 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
7211 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7212 |
|
|
}
|
7213 |
|
|
|
7214 |
|
|
SEM_BRANCH_FINI (vpc);
|
7215 |
|
|
return vpc;
|
7216 |
|
|
#undef FLD
|
7217 |
|
|
}
|
7218 |
|
|
|
7219 |
|
|
/* bx-indirect-disp: bx $optdisp($abase) */
|
7220 |
|
|
|
7221 |
|
|
static SEM_PC
|
7222 |
|
|
SEM_FN_NAME (i960base,bx_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7223 |
|
|
{
|
7224 |
|
|
#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
|
7225 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7226 |
|
|
int UNUSED written = 0;
|
7227 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7228 |
|
|
SEM_BRANCH_INIT
|
7229 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
7230 |
|
|
|
7231 |
|
|
{
|
7232 |
|
|
USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase));
|
7233 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7234 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7235 |
|
|
}
|
7236 |
|
|
|
7237 |
|
|
SEM_BRANCH_FINI (vpc);
|
7238 |
|
|
return vpc;
|
7239 |
|
|
#undef FLD
|
7240 |
|
|
}
|
7241 |
|
|
|
7242 |
|
|
/* callx-disp: callx $optdisp */
|
7243 |
|
|
|
7244 |
|
|
static SEM_PC
|
7245 |
|
|
SEM_FN_NAME (i960base,callx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7246 |
|
|
{
|
7247 |
|
|
#define FLD(f) abuf->fields.sfmt_callx_disp.f
|
7248 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7249 |
|
|
int UNUSED written = 0;
|
7250 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7251 |
|
|
SEM_BRANCH_INIT
|
7252 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
|
7253 |
|
|
|
7254 |
|
|
{
|
7255 |
|
|
SI tmp_temp;
|
7256 |
|
|
tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
|
7257 |
|
|
{
|
7258 |
|
|
SI opval = ADDSI (pc, 8);
|
7259 |
|
|
CPU (h_gr[((UINT) 2)]) = opval;
|
7260 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
|
7261 |
|
|
}
|
7262 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
|
7263 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
|
7264 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
|
7265 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
|
7266 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
|
7267 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
|
7268 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
|
7269 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
|
7270 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
|
7271 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
|
7272 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
|
7273 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
|
7274 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
|
7275 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
|
7276 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
|
7277 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
|
7278 |
|
|
{
|
7279 |
|
|
USI opval = FLD (f_optdisp);
|
7280 |
|
|
SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
|
7281 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7282 |
|
|
}
|
7283 |
|
|
CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
|
7284 |
|
|
CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
|
7285 |
|
|
CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
|
7286 |
|
|
CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
|
7287 |
|
|
CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
|
7288 |
|
|
CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
|
7289 |
|
|
CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
|
7290 |
|
|
CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
|
7291 |
|
|
CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
|
7292 |
|
|
CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
|
7293 |
|
|
CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
|
7294 |
|
|
CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
|
7295 |
|
|
CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
|
7296 |
|
|
CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
|
7297 |
|
|
CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
|
7298 |
|
|
CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
|
7299 |
|
|
{
|
7300 |
|
|
SI opval = CPU (h_gr[((UINT) 31)]);
|
7301 |
|
|
CPU (h_gr[((UINT) 0)]) = opval;
|
7302 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
|
7303 |
|
|
}
|
7304 |
|
|
{
|
7305 |
|
|
SI opval = tmp_temp;
|
7306 |
|
|
CPU (h_gr[((UINT) 31)]) = opval;
|
7307 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
|
7308 |
|
|
}
|
7309 |
|
|
{
|
7310 |
|
|
SI opval = ADDSI (tmp_temp, 64);
|
7311 |
|
|
CPU (h_gr[((UINT) 1)]) = opval;
|
7312 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
|
7313 |
|
|
}
|
7314 |
|
|
}
|
7315 |
|
|
|
7316 |
|
|
SEM_BRANCH_FINI (vpc);
|
7317 |
|
|
return vpc;
|
7318 |
|
|
#undef FLD
|
7319 |
|
|
}
|
7320 |
|
|
|
7321 |
|
|
/* callx-indirect: callx ($abase) */
|
7322 |
|
|
|
7323 |
|
|
static SEM_PC
|
7324 |
|
|
SEM_FN_NAME (i960base,callx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7325 |
|
|
{
|
7326 |
|
|
#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
|
7327 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7328 |
|
|
int UNUSED written = 0;
|
7329 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7330 |
|
|
SEM_BRANCH_INIT
|
7331 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7332 |
|
|
|
7333 |
|
|
{
|
7334 |
|
|
SI tmp_temp;
|
7335 |
|
|
tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
|
7336 |
|
|
{
|
7337 |
|
|
SI opval = ADDSI (pc, 4);
|
7338 |
|
|
CPU (h_gr[((UINT) 2)]) = opval;
|
7339 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
|
7340 |
|
|
}
|
7341 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
|
7342 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
|
7343 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
|
7344 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
|
7345 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
|
7346 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
|
7347 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
|
7348 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
|
7349 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
|
7350 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
|
7351 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
|
7352 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
|
7353 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
|
7354 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
|
7355 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
|
7356 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
|
7357 |
|
|
{
|
7358 |
|
|
USI opval = * FLD (i_abase);
|
7359 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7360 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7361 |
|
|
}
|
7362 |
|
|
CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
|
7363 |
|
|
CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
|
7364 |
|
|
CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
|
7365 |
|
|
CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
|
7366 |
|
|
CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
|
7367 |
|
|
CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
|
7368 |
|
|
CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
|
7369 |
|
|
CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
|
7370 |
|
|
CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
|
7371 |
|
|
CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
|
7372 |
|
|
CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
|
7373 |
|
|
CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
|
7374 |
|
|
CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
|
7375 |
|
|
CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
|
7376 |
|
|
CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
|
7377 |
|
|
CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
|
7378 |
|
|
{
|
7379 |
|
|
SI opval = CPU (h_gr[((UINT) 31)]);
|
7380 |
|
|
CPU (h_gr[((UINT) 0)]) = opval;
|
7381 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
|
7382 |
|
|
}
|
7383 |
|
|
{
|
7384 |
|
|
SI opval = tmp_temp;
|
7385 |
|
|
CPU (h_gr[((UINT) 31)]) = opval;
|
7386 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
|
7387 |
|
|
}
|
7388 |
|
|
{
|
7389 |
|
|
SI opval = ADDSI (tmp_temp, 64);
|
7390 |
|
|
CPU (h_gr[((UINT) 1)]) = opval;
|
7391 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
|
7392 |
|
|
}
|
7393 |
|
|
}
|
7394 |
|
|
|
7395 |
|
|
SEM_BRANCH_FINI (vpc);
|
7396 |
|
|
return vpc;
|
7397 |
|
|
#undef FLD
|
7398 |
|
|
}
|
7399 |
|
|
|
7400 |
|
|
/* callx-indirect-offset: callx $offset($abase) */
|
7401 |
|
|
|
7402 |
|
|
static SEM_PC
|
7403 |
|
|
SEM_FN_NAME (i960base,callx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7404 |
|
|
{
|
7405 |
|
|
#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
|
7406 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7407 |
|
|
int UNUSED written = 0;
|
7408 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7409 |
|
|
SEM_BRANCH_INIT
|
7410 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7411 |
|
|
|
7412 |
|
|
{
|
7413 |
|
|
SI tmp_temp;
|
7414 |
|
|
tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
|
7415 |
|
|
{
|
7416 |
|
|
SI opval = ADDSI (pc, 4);
|
7417 |
|
|
CPU (h_gr[((UINT) 2)]) = opval;
|
7418 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
|
7419 |
|
|
}
|
7420 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
|
7421 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
|
7422 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
|
7423 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
|
7424 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
|
7425 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
|
7426 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
|
7427 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
|
7428 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
|
7429 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
|
7430 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
|
7431 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
|
7432 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
|
7433 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
|
7434 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
|
7435 |
|
|
SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
|
7436 |
|
|
{
|
7437 |
|
|
USI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
|
7438 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7439 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7440 |
|
|
}
|
7441 |
|
|
CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
|
7442 |
|
|
CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
|
7443 |
|
|
CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
|
7444 |
|
|
CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
|
7445 |
|
|
CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
|
7446 |
|
|
CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
|
7447 |
|
|
CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
|
7448 |
|
|
CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
|
7449 |
|
|
CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
|
7450 |
|
|
CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
|
7451 |
|
|
CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
|
7452 |
|
|
CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
|
7453 |
|
|
CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
|
7454 |
|
|
CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
|
7455 |
|
|
CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
|
7456 |
|
|
CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
|
7457 |
|
|
{
|
7458 |
|
|
SI opval = CPU (h_gr[((UINT) 31)]);
|
7459 |
|
|
CPU (h_gr[((UINT) 0)]) = opval;
|
7460 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
|
7461 |
|
|
}
|
7462 |
|
|
{
|
7463 |
|
|
SI opval = tmp_temp;
|
7464 |
|
|
CPU (h_gr[((UINT) 31)]) = opval;
|
7465 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
|
7466 |
|
|
}
|
7467 |
|
|
{
|
7468 |
|
|
SI opval = ADDSI (tmp_temp, 64);
|
7469 |
|
|
CPU (h_gr[((UINT) 1)]) = opval;
|
7470 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
|
7471 |
|
|
}
|
7472 |
|
|
}
|
7473 |
|
|
|
7474 |
|
|
SEM_BRANCH_FINI (vpc);
|
7475 |
|
|
return vpc;
|
7476 |
|
|
#undef FLD
|
7477 |
|
|
}
|
7478 |
|
|
|
7479 |
|
|
/* ret: ret */
|
7480 |
|
|
|
7481 |
|
|
static SEM_PC
|
7482 |
|
|
SEM_FN_NAME (i960base,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7483 |
|
|
{
|
7484 |
|
|
#define FLD(f) abuf->fields.sfmt_callx_disp.f
|
7485 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7486 |
|
|
int UNUSED written = 0;
|
7487 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7488 |
|
|
SEM_BRANCH_INIT
|
7489 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7490 |
|
|
|
7491 |
|
|
{
|
7492 |
|
|
{
|
7493 |
|
|
SI opval = CPU (h_gr[((UINT) 0)]);
|
7494 |
|
|
CPU (h_gr[((UINT) 31)]) = opval;
|
7495 |
|
|
TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
|
7496 |
|
|
}
|
7497 |
|
|
CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0));
|
7498 |
|
|
CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4));
|
7499 |
|
|
CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8));
|
7500 |
|
|
CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12));
|
7501 |
|
|
CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16));
|
7502 |
|
|
CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20));
|
7503 |
|
|
CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24));
|
7504 |
|
|
CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28));
|
7505 |
|
|
CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32));
|
7506 |
|
|
CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36));
|
7507 |
|
|
CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40));
|
7508 |
|
|
CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44));
|
7509 |
|
|
CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48));
|
7510 |
|
|
CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52));
|
7511 |
|
|
CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56));
|
7512 |
|
|
CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60));
|
7513 |
|
|
{
|
7514 |
|
|
USI opval = CPU (h_gr[((UINT) 2)]);
|
7515 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7516 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7517 |
|
|
}
|
7518 |
|
|
}
|
7519 |
|
|
|
7520 |
|
|
SEM_BRANCH_FINI (vpc);
|
7521 |
|
|
return vpc;
|
7522 |
|
|
#undef FLD
|
7523 |
|
|
}
|
7524 |
|
|
|
7525 |
|
|
/* calls: calls $src1 */
|
7526 |
|
|
|
7527 |
|
|
static SEM_PC
|
7528 |
|
|
SEM_FN_NAME (i960base,calls) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7529 |
|
|
{
|
7530 |
|
|
#define FLD(f) abuf->fields.sfmt_emul2.f
|
7531 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7532 |
|
|
int UNUSED written = 0;
|
7533 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7534 |
|
|
SEM_BRANCH_INIT
|
7535 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7536 |
|
|
|
7537 |
|
|
{
|
7538 |
|
|
SI opval = i960_trap (current_cpu, pc, * FLD (i_src1));
|
7539 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7540 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7541 |
|
|
}
|
7542 |
|
|
|
7543 |
|
|
SEM_BRANCH_FINI (vpc);
|
7544 |
|
|
return vpc;
|
7545 |
|
|
#undef FLD
|
7546 |
|
|
}
|
7547 |
|
|
|
7548 |
|
|
/* fmark: fmark */
|
7549 |
|
|
|
7550 |
|
|
static SEM_PC
|
7551 |
|
|
SEM_FN_NAME (i960base,fmark) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7552 |
|
|
{
|
7553 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
7554 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7555 |
|
|
int UNUSED written = 0;
|
7556 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7557 |
|
|
SEM_BRANCH_INIT
|
7558 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7559 |
|
|
|
7560 |
|
|
{
|
7561 |
|
|
SI opval = i960_breakpoint (current_cpu, pc);
|
7562 |
|
|
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
|
7563 |
|
|
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
|
7564 |
|
|
}
|
7565 |
|
|
|
7566 |
|
|
SEM_BRANCH_FINI (vpc);
|
7567 |
|
|
return vpc;
|
7568 |
|
|
#undef FLD
|
7569 |
|
|
}
|
7570 |
|
|
|
7571 |
|
|
/* flushreg: flushreg */
|
7572 |
|
|
|
7573 |
|
|
static SEM_PC
|
7574 |
|
|
SEM_FN_NAME (i960base,flushreg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
7575 |
|
|
{
|
7576 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
7577 |
|
|
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
7578 |
|
|
int UNUSED written = 0;
|
7579 |
|
|
IADDR UNUSED pc = abuf->addr;
|
7580 |
|
|
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
7581 |
|
|
|
7582 |
|
|
((void) 0); /*nop*/
|
7583 |
|
|
|
7584 |
|
|
return vpc;
|
7585 |
|
|
#undef FLD
|
7586 |
|
|
}
|
7587 |
|
|
|
7588 |
|
|
/* Table of all semantic fns. */
|
7589 |
|
|
|
7590 |
|
|
static const struct sem_fn_desc sem_fns[] = {
|
7591 |
|
|
{ I960BASE_INSN_X_INVALID, SEM_FN_NAME (i960base,x_invalid) },
|
7592 |
|
|
{ I960BASE_INSN_X_AFTER, SEM_FN_NAME (i960base,x_after) },
|
7593 |
|
|
{ I960BASE_INSN_X_BEFORE, SEM_FN_NAME (i960base,x_before) },
|
7594 |
|
|
{ I960BASE_INSN_X_CTI_CHAIN, SEM_FN_NAME (i960base,x_cti_chain) },
|
7595 |
|
|
{ I960BASE_INSN_X_CHAIN, SEM_FN_NAME (i960base,x_chain) },
|
7596 |
|
|
{ I960BASE_INSN_X_BEGIN, SEM_FN_NAME (i960base,x_begin) },
|
7597 |
|
|
{ I960BASE_INSN_MULO, SEM_FN_NAME (i960base,mulo) },
|
7598 |
|
|
{ I960BASE_INSN_MULO1, SEM_FN_NAME (i960base,mulo1) },
|
7599 |
|
|
{ I960BASE_INSN_MULO2, SEM_FN_NAME (i960base,mulo2) },
|
7600 |
|
|
{ I960BASE_INSN_MULO3, SEM_FN_NAME (i960base,mulo3) },
|
7601 |
|
|
{ I960BASE_INSN_REMO, SEM_FN_NAME (i960base,remo) },
|
7602 |
|
|
{ I960BASE_INSN_REMO1, SEM_FN_NAME (i960base,remo1) },
|
7603 |
|
|
{ I960BASE_INSN_REMO2, SEM_FN_NAME (i960base,remo2) },
|
7604 |
|
|
{ I960BASE_INSN_REMO3, SEM_FN_NAME (i960base,remo3) },
|
7605 |
|
|
{ I960BASE_INSN_DIVO, SEM_FN_NAME (i960base,divo) },
|
7606 |
|
|
{ I960BASE_INSN_DIVO1, SEM_FN_NAME (i960base,divo1) },
|
7607 |
|
|
{ I960BASE_INSN_DIVO2, SEM_FN_NAME (i960base,divo2) },
|
7608 |
|
|
{ I960BASE_INSN_DIVO3, SEM_FN_NAME (i960base,divo3) },
|
7609 |
|
|
{ I960BASE_INSN_REMI, SEM_FN_NAME (i960base,remi) },
|
7610 |
|
|
{ I960BASE_INSN_REMI1, SEM_FN_NAME (i960base,remi1) },
|
7611 |
|
|
{ I960BASE_INSN_REMI2, SEM_FN_NAME (i960base,remi2) },
|
7612 |
|
|
{ I960BASE_INSN_REMI3, SEM_FN_NAME (i960base,remi3) },
|
7613 |
|
|
{ I960BASE_INSN_DIVI, SEM_FN_NAME (i960base,divi) },
|
7614 |
|
|
{ I960BASE_INSN_DIVI1, SEM_FN_NAME (i960base,divi1) },
|
7615 |
|
|
{ I960BASE_INSN_DIVI2, SEM_FN_NAME (i960base,divi2) },
|
7616 |
|
|
{ I960BASE_INSN_DIVI3, SEM_FN_NAME (i960base,divi3) },
|
7617 |
|
|
{ I960BASE_INSN_ADDO, SEM_FN_NAME (i960base,addo) },
|
7618 |
|
|
{ I960BASE_INSN_ADDO1, SEM_FN_NAME (i960base,addo1) },
|
7619 |
|
|
{ I960BASE_INSN_ADDO2, SEM_FN_NAME (i960base,addo2) },
|
7620 |
|
|
{ I960BASE_INSN_ADDO3, SEM_FN_NAME (i960base,addo3) },
|
7621 |
|
|
{ I960BASE_INSN_SUBO, SEM_FN_NAME (i960base,subo) },
|
7622 |
|
|
{ I960BASE_INSN_SUBO1, SEM_FN_NAME (i960base,subo1) },
|
7623 |
|
|
{ I960BASE_INSN_SUBO2, SEM_FN_NAME (i960base,subo2) },
|
7624 |
|
|
{ I960BASE_INSN_SUBO3, SEM_FN_NAME (i960base,subo3) },
|
7625 |
|
|
{ I960BASE_INSN_NOTBIT, SEM_FN_NAME (i960base,notbit) },
|
7626 |
|
|
{ I960BASE_INSN_NOTBIT1, SEM_FN_NAME (i960base,notbit1) },
|
7627 |
|
|
{ I960BASE_INSN_NOTBIT2, SEM_FN_NAME (i960base,notbit2) },
|
7628 |
|
|
{ I960BASE_INSN_NOTBIT3, SEM_FN_NAME (i960base,notbit3) },
|
7629 |
|
|
{ I960BASE_INSN_AND, SEM_FN_NAME (i960base,and) },
|
7630 |
|
|
{ I960BASE_INSN_AND1, SEM_FN_NAME (i960base,and1) },
|
7631 |
|
|
{ I960BASE_INSN_AND2, SEM_FN_NAME (i960base,and2) },
|
7632 |
|
|
{ I960BASE_INSN_AND3, SEM_FN_NAME (i960base,and3) },
|
7633 |
|
|
{ I960BASE_INSN_ANDNOT, SEM_FN_NAME (i960base,andnot) },
|
7634 |
|
|
{ I960BASE_INSN_ANDNOT1, SEM_FN_NAME (i960base,andnot1) },
|
7635 |
|
|
{ I960BASE_INSN_ANDNOT2, SEM_FN_NAME (i960base,andnot2) },
|
7636 |
|
|
{ I960BASE_INSN_ANDNOT3, SEM_FN_NAME (i960base,andnot3) },
|
7637 |
|
|
{ I960BASE_INSN_SETBIT, SEM_FN_NAME (i960base,setbit) },
|
7638 |
|
|
{ I960BASE_INSN_SETBIT1, SEM_FN_NAME (i960base,setbit1) },
|
7639 |
|
|
{ I960BASE_INSN_SETBIT2, SEM_FN_NAME (i960base,setbit2) },
|
7640 |
|
|
{ I960BASE_INSN_SETBIT3, SEM_FN_NAME (i960base,setbit3) },
|
7641 |
|
|
{ I960BASE_INSN_NOTAND, SEM_FN_NAME (i960base,notand) },
|
7642 |
|
|
{ I960BASE_INSN_NOTAND1, SEM_FN_NAME (i960base,notand1) },
|
7643 |
|
|
{ I960BASE_INSN_NOTAND2, SEM_FN_NAME (i960base,notand2) },
|
7644 |
|
|
{ I960BASE_INSN_NOTAND3, SEM_FN_NAME (i960base,notand3) },
|
7645 |
|
|
{ I960BASE_INSN_XOR, SEM_FN_NAME (i960base,xor) },
|
7646 |
|
|
{ I960BASE_INSN_XOR1, SEM_FN_NAME (i960base,xor1) },
|
7647 |
|
|
{ I960BASE_INSN_XOR2, SEM_FN_NAME (i960base,xor2) },
|
7648 |
|
|
{ I960BASE_INSN_XOR3, SEM_FN_NAME (i960base,xor3) },
|
7649 |
|
|
{ I960BASE_INSN_OR, SEM_FN_NAME (i960base,or) },
|
7650 |
|
|
{ I960BASE_INSN_OR1, SEM_FN_NAME (i960base,or1) },
|
7651 |
|
|
{ I960BASE_INSN_OR2, SEM_FN_NAME (i960base,or2) },
|
7652 |
|
|
{ I960BASE_INSN_OR3, SEM_FN_NAME (i960base,or3) },
|
7653 |
|
|
{ I960BASE_INSN_NOR, SEM_FN_NAME (i960base,nor) },
|
7654 |
|
|
{ I960BASE_INSN_NOR1, SEM_FN_NAME (i960base,nor1) },
|
7655 |
|
|
{ I960BASE_INSN_NOR2, SEM_FN_NAME (i960base,nor2) },
|
7656 |
|
|
{ I960BASE_INSN_NOR3, SEM_FN_NAME (i960base,nor3) },
|
7657 |
|
|
{ I960BASE_INSN_XNOR, SEM_FN_NAME (i960base,xnor) },
|
7658 |
|
|
{ I960BASE_INSN_XNOR1, SEM_FN_NAME (i960base,xnor1) },
|
7659 |
|
|
{ I960BASE_INSN_XNOR2, SEM_FN_NAME (i960base,xnor2) },
|
7660 |
|
|
{ I960BASE_INSN_XNOR3, SEM_FN_NAME (i960base,xnor3) },
|
7661 |
|
|
{ I960BASE_INSN_NOT, SEM_FN_NAME (i960base,not) },
|
7662 |
|
|
{ I960BASE_INSN_NOT1, SEM_FN_NAME (i960base,not1) },
|
7663 |
|
|
{ I960BASE_INSN_NOT2, SEM_FN_NAME (i960base,not2) },
|
7664 |
|
|
{ I960BASE_INSN_NOT3, SEM_FN_NAME (i960base,not3) },
|
7665 |
|
|
{ I960BASE_INSN_ORNOT, SEM_FN_NAME (i960base,ornot) },
|
7666 |
|
|
{ I960BASE_INSN_ORNOT1, SEM_FN_NAME (i960base,ornot1) },
|
7667 |
|
|
{ I960BASE_INSN_ORNOT2, SEM_FN_NAME (i960base,ornot2) },
|
7668 |
|
|
{ I960BASE_INSN_ORNOT3, SEM_FN_NAME (i960base,ornot3) },
|
7669 |
|
|
{ I960BASE_INSN_CLRBIT, SEM_FN_NAME (i960base,clrbit) },
|
7670 |
|
|
{ I960BASE_INSN_CLRBIT1, SEM_FN_NAME (i960base,clrbit1) },
|
7671 |
|
|
{ I960BASE_INSN_CLRBIT2, SEM_FN_NAME (i960base,clrbit2) },
|
7672 |
|
|
{ I960BASE_INSN_CLRBIT3, SEM_FN_NAME (i960base,clrbit3) },
|
7673 |
|
|
{ I960BASE_INSN_SHLO, SEM_FN_NAME (i960base,shlo) },
|
7674 |
|
|
{ I960BASE_INSN_SHLO1, SEM_FN_NAME (i960base,shlo1) },
|
7675 |
|
|
{ I960BASE_INSN_SHLO2, SEM_FN_NAME (i960base,shlo2) },
|
7676 |
|
|
{ I960BASE_INSN_SHLO3, SEM_FN_NAME (i960base,shlo3) },
|
7677 |
|
|
{ I960BASE_INSN_SHRO, SEM_FN_NAME (i960base,shro) },
|
7678 |
|
|
{ I960BASE_INSN_SHRO1, SEM_FN_NAME (i960base,shro1) },
|
7679 |
|
|
{ I960BASE_INSN_SHRO2, SEM_FN_NAME (i960base,shro2) },
|
7680 |
|
|
{ I960BASE_INSN_SHRO3, SEM_FN_NAME (i960base,shro3) },
|
7681 |
|
|
{ I960BASE_INSN_SHLI, SEM_FN_NAME (i960base,shli) },
|
7682 |
|
|
{ I960BASE_INSN_SHLI1, SEM_FN_NAME (i960base,shli1) },
|
7683 |
|
|
{ I960BASE_INSN_SHLI2, SEM_FN_NAME (i960base,shli2) },
|
7684 |
|
|
{ I960BASE_INSN_SHLI3, SEM_FN_NAME (i960base,shli3) },
|
7685 |
|
|
{ I960BASE_INSN_SHRI, SEM_FN_NAME (i960base,shri) },
|
7686 |
|
|
{ I960BASE_INSN_SHRI1, SEM_FN_NAME (i960base,shri1) },
|
7687 |
|
|
{ I960BASE_INSN_SHRI2, SEM_FN_NAME (i960base,shri2) },
|
7688 |
|
|
{ I960BASE_INSN_SHRI3, SEM_FN_NAME (i960base,shri3) },
|
7689 |
|
|
{ I960BASE_INSN_EMUL, SEM_FN_NAME (i960base,emul) },
|
7690 |
|
|
{ I960BASE_INSN_EMUL1, SEM_FN_NAME (i960base,emul1) },
|
7691 |
|
|
{ I960BASE_INSN_EMUL2, SEM_FN_NAME (i960base,emul2) },
|
7692 |
|
|
{ I960BASE_INSN_EMUL3, SEM_FN_NAME (i960base,emul3) },
|
7693 |
|
|
{ I960BASE_INSN_MOV, SEM_FN_NAME (i960base,mov) },
|
7694 |
|
|
{ I960BASE_INSN_MOV1, SEM_FN_NAME (i960base,mov1) },
|
7695 |
|
|
{ I960BASE_INSN_MOVL, SEM_FN_NAME (i960base,movl) },
|
7696 |
|
|
{ I960BASE_INSN_MOVL1, SEM_FN_NAME (i960base,movl1) },
|
7697 |
|
|
{ I960BASE_INSN_MOVT, SEM_FN_NAME (i960base,movt) },
|
7698 |
|
|
{ I960BASE_INSN_MOVT1, SEM_FN_NAME (i960base,movt1) },
|
7699 |
|
|
{ I960BASE_INSN_MOVQ, SEM_FN_NAME (i960base,movq) },
|
7700 |
|
|
{ I960BASE_INSN_MOVQ1, SEM_FN_NAME (i960base,movq1) },
|
7701 |
|
|
{ I960BASE_INSN_MODPC, SEM_FN_NAME (i960base,modpc) },
|
7702 |
|
|
{ I960BASE_INSN_MODAC, SEM_FN_NAME (i960base,modac) },
|
7703 |
|
|
{ I960BASE_INSN_LDA_OFFSET, SEM_FN_NAME (i960base,lda_offset) },
|
7704 |
|
|
{ I960BASE_INSN_LDA_INDIRECT_OFFSET, SEM_FN_NAME (i960base,lda_indirect_offset) },
|
7705 |
|
|
{ I960BASE_INSN_LDA_INDIRECT, SEM_FN_NAME (i960base,lda_indirect) },
|
7706 |
|
|
{ I960BASE_INSN_LDA_INDIRECT_INDEX, SEM_FN_NAME (i960base,lda_indirect_index) },
|
7707 |
|
|
{ I960BASE_INSN_LDA_DISP, SEM_FN_NAME (i960base,lda_disp) },
|
7708 |
|
|
{ I960BASE_INSN_LDA_INDIRECT_DISP, SEM_FN_NAME (i960base,lda_indirect_disp) },
|
7709 |
|
|
{ I960BASE_INSN_LDA_INDEX_DISP, SEM_FN_NAME (i960base,lda_index_disp) },
|
7710 |
|
|
{ I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,lda_indirect_index_disp) },
|
7711 |
|
|
{ I960BASE_INSN_LD_OFFSET, SEM_FN_NAME (i960base,ld_offset) },
|
7712 |
|
|
{ I960BASE_INSN_LD_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ld_indirect_offset) },
|
7713 |
|
|
{ I960BASE_INSN_LD_INDIRECT, SEM_FN_NAME (i960base,ld_indirect) },
|
7714 |
|
|
{ I960BASE_INSN_LD_INDIRECT_INDEX, SEM_FN_NAME (i960base,ld_indirect_index) },
|
7715 |
|
|
{ I960BASE_INSN_LD_DISP, SEM_FN_NAME (i960base,ld_disp) },
|
7716 |
|
|
{ I960BASE_INSN_LD_INDIRECT_DISP, SEM_FN_NAME (i960base,ld_indirect_disp) },
|
7717 |
|
|
{ I960BASE_INSN_LD_INDEX_DISP, SEM_FN_NAME (i960base,ld_index_disp) },
|
7718 |
|
|
{ I960BASE_INSN_LD_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ld_indirect_index_disp) },
|
7719 |
|
|
{ I960BASE_INSN_LDOB_OFFSET, SEM_FN_NAME (i960base,ldob_offset) },
|
7720 |
|
|
{ I960BASE_INSN_LDOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldob_indirect_offset) },
|
7721 |
|
|
{ I960BASE_INSN_LDOB_INDIRECT, SEM_FN_NAME (i960base,ldob_indirect) },
|
7722 |
|
|
{ I960BASE_INSN_LDOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldob_indirect_index) },
|
7723 |
|
|
{ I960BASE_INSN_LDOB_DISP, SEM_FN_NAME (i960base,ldob_disp) },
|
7724 |
|
|
{ I960BASE_INSN_LDOB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldob_indirect_disp) },
|
7725 |
|
|
{ I960BASE_INSN_LDOB_INDEX_DISP, SEM_FN_NAME (i960base,ldob_index_disp) },
|
7726 |
|
|
{ I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldob_indirect_index_disp) },
|
7727 |
|
|
{ I960BASE_INSN_LDOS_OFFSET, SEM_FN_NAME (i960base,ldos_offset) },
|
7728 |
|
|
{ I960BASE_INSN_LDOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldos_indirect_offset) },
|
7729 |
|
|
{ I960BASE_INSN_LDOS_INDIRECT, SEM_FN_NAME (i960base,ldos_indirect) },
|
7730 |
|
|
{ I960BASE_INSN_LDOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldos_indirect_index) },
|
7731 |
|
|
{ I960BASE_INSN_LDOS_DISP, SEM_FN_NAME (i960base,ldos_disp) },
|
7732 |
|
|
{ I960BASE_INSN_LDOS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldos_indirect_disp) },
|
7733 |
|
|
{ I960BASE_INSN_LDOS_INDEX_DISP, SEM_FN_NAME (i960base,ldos_index_disp) },
|
7734 |
|
|
{ I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldos_indirect_index_disp) },
|
7735 |
|
|
{ I960BASE_INSN_LDIB_OFFSET, SEM_FN_NAME (i960base,ldib_offset) },
|
7736 |
|
|
{ I960BASE_INSN_LDIB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldib_indirect_offset) },
|
7737 |
|
|
{ I960BASE_INSN_LDIB_INDIRECT, SEM_FN_NAME (i960base,ldib_indirect) },
|
7738 |
|
|
{ I960BASE_INSN_LDIB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldib_indirect_index) },
|
7739 |
|
|
{ I960BASE_INSN_LDIB_DISP, SEM_FN_NAME (i960base,ldib_disp) },
|
7740 |
|
|
{ I960BASE_INSN_LDIB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldib_indirect_disp) },
|
7741 |
|
|
{ I960BASE_INSN_LDIB_INDEX_DISP, SEM_FN_NAME (i960base,ldib_index_disp) },
|
7742 |
|
|
{ I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldib_indirect_index_disp) },
|
7743 |
|
|
{ I960BASE_INSN_LDIS_OFFSET, SEM_FN_NAME (i960base,ldis_offset) },
|
7744 |
|
|
{ I960BASE_INSN_LDIS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldis_indirect_offset) },
|
7745 |
|
|
{ I960BASE_INSN_LDIS_INDIRECT, SEM_FN_NAME (i960base,ldis_indirect) },
|
7746 |
|
|
{ I960BASE_INSN_LDIS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldis_indirect_index) },
|
7747 |
|
|
{ I960BASE_INSN_LDIS_DISP, SEM_FN_NAME (i960base,ldis_disp) },
|
7748 |
|
|
{ I960BASE_INSN_LDIS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldis_indirect_disp) },
|
7749 |
|
|
{ I960BASE_INSN_LDIS_INDEX_DISP, SEM_FN_NAME (i960base,ldis_index_disp) },
|
7750 |
|
|
{ I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldis_indirect_index_disp) },
|
7751 |
|
|
{ I960BASE_INSN_LDL_OFFSET, SEM_FN_NAME (i960base,ldl_offset) },
|
7752 |
|
|
{ I960BASE_INSN_LDL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldl_indirect_offset) },
|
7753 |
|
|
{ I960BASE_INSN_LDL_INDIRECT, SEM_FN_NAME (i960base,ldl_indirect) },
|
7754 |
|
|
{ I960BASE_INSN_LDL_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldl_indirect_index) },
|
7755 |
|
|
{ I960BASE_INSN_LDL_DISP, SEM_FN_NAME (i960base,ldl_disp) },
|
7756 |
|
|
{ I960BASE_INSN_LDL_INDIRECT_DISP, SEM_FN_NAME (i960base,ldl_indirect_disp) },
|
7757 |
|
|
{ I960BASE_INSN_LDL_INDEX_DISP, SEM_FN_NAME (i960base,ldl_index_disp) },
|
7758 |
|
|
{ I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldl_indirect_index_disp) },
|
7759 |
|
|
{ I960BASE_INSN_LDT_OFFSET, SEM_FN_NAME (i960base,ldt_offset) },
|
7760 |
|
|
{ I960BASE_INSN_LDT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldt_indirect_offset) },
|
7761 |
|
|
{ I960BASE_INSN_LDT_INDIRECT, SEM_FN_NAME (i960base,ldt_indirect) },
|
7762 |
|
|
{ I960BASE_INSN_LDT_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldt_indirect_index) },
|
7763 |
|
|
{ I960BASE_INSN_LDT_DISP, SEM_FN_NAME (i960base,ldt_disp) },
|
7764 |
|
|
{ I960BASE_INSN_LDT_INDIRECT_DISP, SEM_FN_NAME (i960base,ldt_indirect_disp) },
|
7765 |
|
|
{ I960BASE_INSN_LDT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_index_disp) },
|
7766 |
|
|
{ I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_indirect_index_disp) },
|
7767 |
|
|
{ I960BASE_INSN_LDQ_OFFSET, SEM_FN_NAME (i960base,ldq_offset) },
|
7768 |
|
|
{ I960BASE_INSN_LDQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldq_indirect_offset) },
|
7769 |
|
|
{ I960BASE_INSN_LDQ_INDIRECT, SEM_FN_NAME (i960base,ldq_indirect) },
|
7770 |
|
|
{ I960BASE_INSN_LDQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldq_indirect_index) },
|
7771 |
|
|
{ I960BASE_INSN_LDQ_DISP, SEM_FN_NAME (i960base,ldq_disp) },
|
7772 |
|
|
{ I960BASE_INSN_LDQ_INDIRECT_DISP, SEM_FN_NAME (i960base,ldq_indirect_disp) },
|
7773 |
|
|
{ I960BASE_INSN_LDQ_INDEX_DISP, SEM_FN_NAME (i960base,ldq_index_disp) },
|
7774 |
|
|
{ I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldq_indirect_index_disp) },
|
7775 |
|
|
{ I960BASE_INSN_ST_OFFSET, SEM_FN_NAME (i960base,st_offset) },
|
7776 |
|
|
{ I960BASE_INSN_ST_INDIRECT_OFFSET, SEM_FN_NAME (i960base,st_indirect_offset) },
|
7777 |
|
|
{ I960BASE_INSN_ST_INDIRECT, SEM_FN_NAME (i960base,st_indirect) },
|
7778 |
|
|
{ I960BASE_INSN_ST_INDIRECT_INDEX, SEM_FN_NAME (i960base,st_indirect_index) },
|
7779 |
|
|
{ I960BASE_INSN_ST_DISP, SEM_FN_NAME (i960base,st_disp) },
|
7780 |
|
|
{ I960BASE_INSN_ST_INDIRECT_DISP, SEM_FN_NAME (i960base,st_indirect_disp) },
|
7781 |
|
|
{ I960BASE_INSN_ST_INDEX_DISP, SEM_FN_NAME (i960base,st_index_disp) },
|
7782 |
|
|
{ I960BASE_INSN_ST_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,st_indirect_index_disp) },
|
7783 |
|
|
{ I960BASE_INSN_STOB_OFFSET, SEM_FN_NAME (i960base,stob_offset) },
|
7784 |
|
|
{ I960BASE_INSN_STOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stob_indirect_offset) },
|
7785 |
|
|
{ I960BASE_INSN_STOB_INDIRECT, SEM_FN_NAME (i960base,stob_indirect) },
|
7786 |
|
|
{ I960BASE_INSN_STOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,stob_indirect_index) },
|
7787 |
|
|
{ I960BASE_INSN_STOB_DISP, SEM_FN_NAME (i960base,stob_disp) },
|
7788 |
|
|
{ I960BASE_INSN_STOB_INDIRECT_DISP, SEM_FN_NAME (i960base,stob_indirect_disp) },
|
7789 |
|
|
{ I960BASE_INSN_STOB_INDEX_DISP, SEM_FN_NAME (i960base,stob_index_disp) },
|
7790 |
|
|
{ I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stob_indirect_index_disp) },
|
7791 |
|
|
{ I960BASE_INSN_STOS_OFFSET, SEM_FN_NAME (i960base,stos_offset) },
|
7792 |
|
|
{ I960BASE_INSN_STOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stos_indirect_offset) },
|
7793 |
|
|
{ I960BASE_INSN_STOS_INDIRECT, SEM_FN_NAME (i960base,stos_indirect) },
|
7794 |
|
|
{ I960BASE_INSN_STOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,stos_indirect_index) },
|
7795 |
|
|
{ I960BASE_INSN_STOS_DISP, SEM_FN_NAME (i960base,stos_disp) },
|
7796 |
|
|
{ I960BASE_INSN_STOS_INDIRECT_DISP, SEM_FN_NAME (i960base,stos_indirect_disp) },
|
7797 |
|
|
{ I960BASE_INSN_STOS_INDEX_DISP, SEM_FN_NAME (i960base,stos_index_disp) },
|
7798 |
|
|
{ I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stos_indirect_index_disp) },
|
7799 |
|
|
{ I960BASE_INSN_STL_OFFSET, SEM_FN_NAME (i960base,stl_offset) },
|
7800 |
|
|
{ I960BASE_INSN_STL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stl_indirect_offset) },
|
7801 |
|
|
{ I960BASE_INSN_STL_INDIRECT, SEM_FN_NAME (i960base,stl_indirect) },
|
7802 |
|
|
{ I960BASE_INSN_STL_INDIRECT_INDEX, SEM_FN_NAME (i960base,stl_indirect_index) },
|
7803 |
|
|
{ I960BASE_INSN_STL_DISP, SEM_FN_NAME (i960base,stl_disp) },
|
7804 |
|
|
{ I960BASE_INSN_STL_INDIRECT_DISP, SEM_FN_NAME (i960base,stl_indirect_disp) },
|
7805 |
|
|
{ I960BASE_INSN_STL_INDEX_DISP, SEM_FN_NAME (i960base,stl_index_disp) },
|
7806 |
|
|
{ I960BASE_INSN_STL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stl_indirect_index_disp) },
|
7807 |
|
|
{ I960BASE_INSN_STT_OFFSET, SEM_FN_NAME (i960base,stt_offset) },
|
7808 |
|
|
{ I960BASE_INSN_STT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stt_indirect_offset) },
|
7809 |
|
|
{ I960BASE_INSN_STT_INDIRECT, SEM_FN_NAME (i960base,stt_indirect) },
|
7810 |
|
|
{ I960BASE_INSN_STT_INDIRECT_INDEX, SEM_FN_NAME (i960base,stt_indirect_index) },
|
7811 |
|
|
{ I960BASE_INSN_STT_DISP, SEM_FN_NAME (i960base,stt_disp) },
|
7812 |
|
|
{ I960BASE_INSN_STT_INDIRECT_DISP, SEM_FN_NAME (i960base,stt_indirect_disp) },
|
7813 |
|
|
{ I960BASE_INSN_STT_INDEX_DISP, SEM_FN_NAME (i960base,stt_index_disp) },
|
7814 |
|
|
{ I960BASE_INSN_STT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stt_indirect_index_disp) },
|
7815 |
|
|
{ I960BASE_INSN_STQ_OFFSET, SEM_FN_NAME (i960base,stq_offset) },
|
7816 |
|
|
{ I960BASE_INSN_STQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stq_indirect_offset) },
|
7817 |
|
|
{ I960BASE_INSN_STQ_INDIRECT, SEM_FN_NAME (i960base,stq_indirect) },
|
7818 |
|
|
{ I960BASE_INSN_STQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,stq_indirect_index) },
|
7819 |
|
|
{ I960BASE_INSN_STQ_DISP, SEM_FN_NAME (i960base,stq_disp) },
|
7820 |
|
|
{ I960BASE_INSN_STQ_INDIRECT_DISP, SEM_FN_NAME (i960base,stq_indirect_disp) },
|
7821 |
|
|
{ I960BASE_INSN_STQ_INDEX_DISP, SEM_FN_NAME (i960base,stq_index_disp) },
|
7822 |
|
|
{ I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stq_indirect_index_disp) },
|
7823 |
|
|
{ I960BASE_INSN_CMPOBE_REG, SEM_FN_NAME (i960base,cmpobe_reg) },
|
7824 |
|
|
{ I960BASE_INSN_CMPOBE_LIT, SEM_FN_NAME (i960base,cmpobe_lit) },
|
7825 |
|
|
{ I960BASE_INSN_CMPOBNE_REG, SEM_FN_NAME (i960base,cmpobne_reg) },
|
7826 |
|
|
{ I960BASE_INSN_CMPOBNE_LIT, SEM_FN_NAME (i960base,cmpobne_lit) },
|
7827 |
|
|
{ I960BASE_INSN_CMPOBL_REG, SEM_FN_NAME (i960base,cmpobl_reg) },
|
7828 |
|
|
{ I960BASE_INSN_CMPOBL_LIT, SEM_FN_NAME (i960base,cmpobl_lit) },
|
7829 |
|
|
{ I960BASE_INSN_CMPOBLE_REG, SEM_FN_NAME (i960base,cmpoble_reg) },
|
7830 |
|
|
{ I960BASE_INSN_CMPOBLE_LIT, SEM_FN_NAME (i960base,cmpoble_lit) },
|
7831 |
|
|
{ I960BASE_INSN_CMPOBG_REG, SEM_FN_NAME (i960base,cmpobg_reg) },
|
7832 |
|
|
{ I960BASE_INSN_CMPOBG_LIT, SEM_FN_NAME (i960base,cmpobg_lit) },
|
7833 |
|
|
{ I960BASE_INSN_CMPOBGE_REG, SEM_FN_NAME (i960base,cmpobge_reg) },
|
7834 |
|
|
{ I960BASE_INSN_CMPOBGE_LIT, SEM_FN_NAME (i960base,cmpobge_lit) },
|
7835 |
|
|
{ I960BASE_INSN_CMPIBE_REG, SEM_FN_NAME (i960base,cmpibe_reg) },
|
7836 |
|
|
{ I960BASE_INSN_CMPIBE_LIT, SEM_FN_NAME (i960base,cmpibe_lit) },
|
7837 |
|
|
{ I960BASE_INSN_CMPIBNE_REG, SEM_FN_NAME (i960base,cmpibne_reg) },
|
7838 |
|
|
{ I960BASE_INSN_CMPIBNE_LIT, SEM_FN_NAME (i960base,cmpibne_lit) },
|
7839 |
|
|
{ I960BASE_INSN_CMPIBL_REG, SEM_FN_NAME (i960base,cmpibl_reg) },
|
7840 |
|
|
{ I960BASE_INSN_CMPIBL_LIT, SEM_FN_NAME (i960base,cmpibl_lit) },
|
7841 |
|
|
{ I960BASE_INSN_CMPIBLE_REG, SEM_FN_NAME (i960base,cmpible_reg) },
|
7842 |
|
|
{ I960BASE_INSN_CMPIBLE_LIT, SEM_FN_NAME (i960base,cmpible_lit) },
|
7843 |
|
|
{ I960BASE_INSN_CMPIBG_REG, SEM_FN_NAME (i960base,cmpibg_reg) },
|
7844 |
|
|
{ I960BASE_INSN_CMPIBG_LIT, SEM_FN_NAME (i960base,cmpibg_lit) },
|
7845 |
|
|
{ I960BASE_INSN_CMPIBGE_REG, SEM_FN_NAME (i960base,cmpibge_reg) },
|
7846 |
|
|
{ I960BASE_INSN_CMPIBGE_LIT, SEM_FN_NAME (i960base,cmpibge_lit) },
|
7847 |
|
|
{ I960BASE_INSN_BBC_REG, SEM_FN_NAME (i960base,bbc_reg) },
|
7848 |
|
|
{ I960BASE_INSN_BBC_LIT, SEM_FN_NAME (i960base,bbc_lit) },
|
7849 |
|
|
{ I960BASE_INSN_BBS_REG, SEM_FN_NAME (i960base,bbs_reg) },
|
7850 |
|
|
{ I960BASE_INSN_BBS_LIT, SEM_FN_NAME (i960base,bbs_lit) },
|
7851 |
|
|
{ I960BASE_INSN_CMPI, SEM_FN_NAME (i960base,cmpi) },
|
7852 |
|
|
{ I960BASE_INSN_CMPI1, SEM_FN_NAME (i960base,cmpi1) },
|
7853 |
|
|
{ I960BASE_INSN_CMPI2, SEM_FN_NAME (i960base,cmpi2) },
|
7854 |
|
|
{ I960BASE_INSN_CMPI3, SEM_FN_NAME (i960base,cmpi3) },
|
7855 |
|
|
{ I960BASE_INSN_CMPO, SEM_FN_NAME (i960base,cmpo) },
|
7856 |
|
|
{ I960BASE_INSN_CMPO1, SEM_FN_NAME (i960base,cmpo1) },
|
7857 |
|
|
{ I960BASE_INSN_CMPO2, SEM_FN_NAME (i960base,cmpo2) },
|
7858 |
|
|
{ I960BASE_INSN_CMPO3, SEM_FN_NAME (i960base,cmpo3) },
|
7859 |
|
|
{ I960BASE_INSN_TESTNO_REG, SEM_FN_NAME (i960base,testno_reg) },
|
7860 |
|
|
{ I960BASE_INSN_TESTG_REG, SEM_FN_NAME (i960base,testg_reg) },
|
7861 |
|
|
{ I960BASE_INSN_TESTE_REG, SEM_FN_NAME (i960base,teste_reg) },
|
7862 |
|
|
{ I960BASE_INSN_TESTGE_REG, SEM_FN_NAME (i960base,testge_reg) },
|
7863 |
|
|
{ I960BASE_INSN_TESTL_REG, SEM_FN_NAME (i960base,testl_reg) },
|
7864 |
|
|
{ I960BASE_INSN_TESTNE_REG, SEM_FN_NAME (i960base,testne_reg) },
|
7865 |
|
|
{ I960BASE_INSN_TESTLE_REG, SEM_FN_NAME (i960base,testle_reg) },
|
7866 |
|
|
{ I960BASE_INSN_TESTO_REG, SEM_FN_NAME (i960base,testo_reg) },
|
7867 |
|
|
{ I960BASE_INSN_BNO, SEM_FN_NAME (i960base,bno) },
|
7868 |
|
|
{ I960BASE_INSN_BG, SEM_FN_NAME (i960base,bg) },
|
7869 |
|
|
{ I960BASE_INSN_BE, SEM_FN_NAME (i960base,be) },
|
7870 |
|
|
{ I960BASE_INSN_BGE, SEM_FN_NAME (i960base,bge) },
|
7871 |
|
|
{ I960BASE_INSN_BL, SEM_FN_NAME (i960base,bl) },
|
7872 |
|
|
{ I960BASE_INSN_BNE, SEM_FN_NAME (i960base,bne) },
|
7873 |
|
|
{ I960BASE_INSN_BLE, SEM_FN_NAME (i960base,ble) },
|
7874 |
|
|
{ I960BASE_INSN_BO, SEM_FN_NAME (i960base,bo) },
|
7875 |
|
|
{ I960BASE_INSN_B, SEM_FN_NAME (i960base,b) },
|
7876 |
|
|
{ I960BASE_INSN_BX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,bx_indirect_offset) },
|
7877 |
|
|
{ I960BASE_INSN_BX_INDIRECT, SEM_FN_NAME (i960base,bx_indirect) },
|
7878 |
|
|
{ I960BASE_INSN_BX_INDIRECT_INDEX, SEM_FN_NAME (i960base,bx_indirect_index) },
|
7879 |
|
|
{ I960BASE_INSN_BX_DISP, SEM_FN_NAME (i960base,bx_disp) },
|
7880 |
|
|
{ I960BASE_INSN_BX_INDIRECT_DISP, SEM_FN_NAME (i960base,bx_indirect_disp) },
|
7881 |
|
|
{ I960BASE_INSN_CALLX_DISP, SEM_FN_NAME (i960base,callx_disp) },
|
7882 |
|
|
{ I960BASE_INSN_CALLX_INDIRECT, SEM_FN_NAME (i960base,callx_indirect) },
|
7883 |
|
|
{ I960BASE_INSN_CALLX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,callx_indirect_offset) },
|
7884 |
|
|
{ I960BASE_INSN_RET, SEM_FN_NAME (i960base,ret) },
|
7885 |
|
|
{ I960BASE_INSN_CALLS, SEM_FN_NAME (i960base,calls) },
|
7886 |
|
|
{ I960BASE_INSN_FMARK, SEM_FN_NAME (i960base,fmark) },
|
7887 |
|
|
{ I960BASE_INSN_FLUSHREG, SEM_FN_NAME (i960base,flushreg) },
|
7888 |
|
|
{ 0, 0 }
|
7889 |
|
|
};
|
7890 |
|
|
|
7891 |
|
|
/* Add the semantic fns to IDESC_TABLE. */
|
7892 |
|
|
|
7893 |
|
|
void
|
7894 |
|
|
SEM_FN_NAME (i960base,init_idesc_table) (SIM_CPU *current_cpu)
|
7895 |
|
|
{
|
7896 |
|
|
IDESC *idesc_table = CPU_IDESC (current_cpu);
|
7897 |
|
|
const struct sem_fn_desc *sf;
|
7898 |
|
|
int mach_num = MACH_NUM (CPU_MACH (current_cpu));
|
7899 |
|
|
|
7900 |
|
|
for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
|
7901 |
|
|
{
|
7902 |
|
|
const CGEN_INSN *insn = idesc_table[sf->index].idata;
|
7903 |
|
|
int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
|
7904 |
|
|
|| CGEN_INSN_MACH_HAS_P (insn, mach_num));
|
7905 |
|
|
#if FAST_P
|
7906 |
|
|
if (valid_p)
|
7907 |
|
|
idesc_table[sf->index].sem_fast = sf->fn;
|
7908 |
|
|
else
|
7909 |
|
|
idesc_table[sf->index].sem_fast = SEM_FN_NAME (i960base,x_invalid);
|
7910 |
|
|
#else
|
7911 |
|
|
if (valid_p)
|
7912 |
|
|
idesc_table[sf->index].sem_full = sf->fn;
|
7913 |
|
|
else
|
7914 |
|
|
idesc_table[sf->index].sem_full = SEM_FN_NAME (i960base,x_invalid);
|
7915 |
|
|
#endif
|
7916 |
|
|
}
|
7917 |
|
|
}
|
7918 |
|
|
|