OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [gdb-5.3/] [sim/] [igen/] [gen-semantics.h] - Blame information for rev 1773

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1181 sfurman
/* The IGEN simulator generator for GDB, the GNU Debugger.
2
 
3
   Copyright 2002 Free Software Foundation, Inc.
4
 
5
   Contributed by Andrew Cagney.
6
 
7
   This file is part of GDB.
8
 
9
   This program is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 2 of the License, or
12
   (at your option) any later version.
13
 
14
   This program is distributed in the hope that it will be useful,
15
   but WITHOUT ANY WARRANTY; without even the implied warranty of
16
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17
   GNU General Public License for more details.
18
 
19
   You should have received a copy of the GNU General Public License
20
   along with this program; if not, write to the Free Software
21
   Foundation, Inc., 59 Temple Place - Suite 330,
22
   Boston, MA 02111-1307, USA.  */
23
 
24
 
25
/* Creates the files semantics.[hc].
26
 
27
   The generated file semantics contains functions that implement the
28
   operations required to model a single target processor instruction.
29
 
30
   Several different variations on the semantics file can be created:
31
 
32
        o       uncached
33
 
34
                No instruction cache exists.  The semantic function
35
                needs to generate any required values locally.
36
 
37
        o       cached - separate cracker and semantic
38
 
39
                Two independant functions are created.  Firstly the
40
                function that cracks an instruction entering it into a
41
                cache and secondly the semantic function propper that
42
                uses the cache.
43
 
44
        o       cached - semantic + cracking semantic
45
 
46
                The function that cracks the instruction and enters
47
                all values into the cache also contains a copy of the
48
                semantic code (avoiding the need to call both the
49
                cracker and the semantic function when there is a
50
                cache miss).
51
 
52
   For each of these general forms, several refinements can occure:
53
 
54
        o       do/don't duplicate/expand semantic functions
55
 
56
                As a consequence of decoding an instruction, the
57
                decoder, as part of its table may have effectivly made
58
                certain of the variable fields in an instruction
59
                constant. Separate functions for each of the
60
                alternative values for what would have been treated as
61
                a variable part can be created.
62
 
63
        o       use cache struct directly.
64
 
65
                When a cracking cache is present, the semantic
66
                functions can be generated to either hold intermediate
67
                cache values in local variables or always refer to the
68
                contents of the cache directly. */
69
 
70
 
71
 
72
 
73
 
74
 
75
extern void print_semantic_declaration
76
  (lf *file,
77
   insn_entry * insn,
78
   opcode_bits *bits, insn_opcodes *opcodes, int nr_prefetched_words);
79
 
80
extern void print_semantic_definition
81
  (lf *file,
82
   insn_entry * insn,
83
   opcode_bits *bits,
84
   insn_opcodes *opcodes, cache_entry *cache_rules, int nr_prefetched_words);
85
 
86
 
87
typedef enum
88
{
89
  invalid_illegal,
90
  invalid_fp_unavailable,
91
  invalid_wrong_slot,
92
}
93
invalid_type;
94
 
95
extern void print_idecode_invalid
96
  (lf *file, const char *result, invalid_type type);
97
 
98
extern void print_semantic_body
99
  (lf *file,
100
   insn_entry * instruction,
101
   opcode_bits *expanded_bits, insn_opcodes *opcodes);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.