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[/] [or1k/] [trunk/] [gen_or1k_isa/] [sources/] [opcode/] [or32.c] - Blame information for rev 1452

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1 133 markom 
/* Table of opcodes for the OpenRISC 1000 ISA.
2 
   Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
3 
   Contributed by Damjan Lampret (lampret@opencores.org).
4 
 
5 717 markom 
This file is part of gen_or1k_isa, or1ksim, GDB and GAS.
6 133 markom 
 
7 
This program is free software; you can redistribute it and/or modify
8 
it under the terms of the GNU General Public License as published by
9 
the Free Software Foundation; either version 2 of the License, or
10 
(at your option) any later version.
11 
 
12 
This program is distributed in the hope that it will be useful,
13 
but WITHOUT ANY WARRANTY; without even the implied warranty of
14 
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 
GNU General Public License for more details.
16 
 
17 
You should have received a copy of the GNU General Public License
18 
along with this program; if not, write to the Free Software
19 
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
20 
 
21 1114 lampret 
/*
22 
 * $Log: not supported by cvs2svn $
23 1452 nogj 
 * Revision 1.43  2005/03/31 16:01:59  nogj
24 
 * Reclasify l.trap and l.sys to be an exception instruction
25 
 *
26 1440 nogj 
 * Revision 1.42  2005/03/16 12:25:56  nogj
27 
 * Fix the parameters to the l.ff1/l.maci instructions
28 
 *
29 1384 nogj 
 * Revision 1.41  2005/02/09 17:41:03  nogj
30 
 * Mark a simulated cpu address as such, by introducing the new oraddr_t type
31 
 *
32 1350 nogj 
 * Revision 1.40  2005/01/27 14:14:13  nogj
33 
 * Remove the global op structure
34 
 *
35 1346 nogj 
 * Revision 1.39  2005/01/27 13:35:40  nogj
36 
 *  * Fix generate.c to produce a execgen.c with less warnings.
37 
 *  * Fix the --enable-simple configure option.
38 
 *
39 1342 nogj 
 * Revision 1.38  2005/01/27 13:15:50  nogj
40 
 * Mark wich operand is the destination operand in the architechture definition
41 
 *
42 1341 nogj 
 * Revision 1.37  2005/01/11 15:41:58  andreje
43 
 * l.ff1 instruction added
44 
 *
45 1338 andreje 
 * Revision 1.36  2004/07/22 20:17:23  phoenix
46 
 * removed includes
47 
 *
48 1309 phoenix 
 * Revision 1.35  2004/07/19 23:07:37  phoenix
49 
 * Gyorgy Jeney: extensive cleanup
50 
 *
51 1308 phoenix 
 * Revision 1.34  2004/06/27 22:56:48  lampret
52 
 * Updated instruction set descriptions. Changed FP instructions encoding.
53 
 *
54 1295 lampret 
 * Revision 1.33  2004/05/09 19:52:31  lampret
55 
 * Changed desciption of the l.cust5 insns
56 
 *
57 1285 lampret 
 * Revision 1.31  2003/07/01 19:34:49  csanchez
58 
 * Added support for l.addc instruction.
59 
 *
60 1169 csanchez 
 * Revision 1.30  2003/01/28 03:49:24  lampret
61 
 * Added cvs log keywords
62 
 *
63 1114 lampret 
 */
64 
 
65 133 markom 
#include <string.h>
66 
#include <stdio.h>
67 
#include <stdlib.h>
68 371 markom 
#include <ctype.h>
69 133 markom 
 
70 371 markom 
 
71 138 markom 
#ifdef HAVE_CONFIG_H
72 
# include "config.h"
73 
#endif
74 1342 nogj 
#ifdef HAS_EXECUTION
75 1350 nogj 
# ifdef HAVE_INTTYPES_H
76 
#  include <inttypes.h> /* ...but to get arch.h we need uint{8,16,32}_t... */
77 
# endif
78 
# include "port.h"
79 
# include "arch.h" /* ...but to get abstract.h, we need oraddr_t... */
80 
# include "abstract.h" /* To get struct iqueue_entry... */
81 1342 nogj 
#endif
82 133 markom 
#include "opcode/or32.h"
83 
 
84 
/* **INDENT-OFF** */
85 
 
86 1342 nogj 
/* We treat all letters the same in encode/decode routines so
87 
   we need to assign some characteristics to them like signess etc.*/
88 133 markom 
CONST struct or32_letter or32_letters[] =
89 
{
90 
{ 'A', NUM_UNSIGNED },
91 
{ 'B', NUM_UNSIGNED },
92 
{ 'D', NUM_UNSIGNED },
93 
{ 'I', NUM_SIGNED },
94 
{ 'K', NUM_UNSIGNED },
95 
{ 'L', NUM_UNSIGNED },
96 
{ 'N', NUM_SIGNED },
97 
{ '0', NUM_UNSIGNED },
98 
{ '\0', 0 }     /* dummy entry */
99 
};
100 
 
101 
/* Opcode encoding:
102 
   machine[31:30]: first two bits of opcode
103 
                   00 - neither of source operands is GPR
104 
                   01 - second source operand is GPR (rB)
105 
                   10 - first source operand is GPR (rA)
106 
                   11 - both source operands are GPRs (rA and rB)
107 
   machine[29:26]: next four bits of opcode
108 
   machine[25:00]: instruction operands (specific to individual instruction)
109 
 
110 
  Recommendation: irrelevant instruction bits should be set with a value of
111 
  bits in same positions of instruction preceding current instruction in the
112 
  code (when assembling).
113 
*/
114 
 
115 1341 nogj 
#ifdef HAS_EXECUTION
116 
# if SIMPLE_EXECUTION
117 
#  define EFN &l_none
118 
#  define EF(func) &(func)
119 
#  define EFI &l_invalid
120 1452 nogj 
# elif COMPLEX_EXECUTION
121 1341 nogj 
#  define EFN "l_none"
122 
#  define EFI "l_invalid"
123 
#  ifdef __GNUC__
124 
#   define EF(func) #func
125 
#  else
126 
#   define EF(func) "func"
127 
#  endif
128 1452 nogj 
# else /* DYNAMIC_EXECUTION */
129 
#  define EFN &l_none
130 
#  define EF(func) &(gen_ ##func)
131 
#  define EFI &gen_l_invalid
132 
# endif
133 1341 nogj 
#else /* HAS_EXECUTION */
134 
# define EFN &l_none
135 
# define EF(func) EFN
136 
# define EFI EFN
137 133 markom 
#endif /* HAS_EXECUTION */
138 
 
139 
CONST struct or32_opcode or32_opcodes[] =
140 
{
141 
 
142 1346 nogj 
{ "l.j",       "N",            "00 0x0  NNNNN NNNNN NNNN NNNN NNNN NNNN",
143 
  EF(l_j), OR32_IF_DELAY, it_jump },
144 
{ "l.jal",     "N",            "00 0x1  NNNNN NNNNN NNNN NNNN NNNN NNNN",
145 
  EF(l_jal), OR32_IF_DELAY, it_jump },
146 
{ "l.bnf",     "N",            "00 0x3  NNNNN NNNNN NNNN NNNN NNNN NNNN",
147 
  EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG, it_branch },
148 
{ "l.bf",      "N",            "00 0x4  NNNNN NNNNN NNNN NNNN NNNN NNNN",
149 
  EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG, it_branch },
150 
{ "l.nop",     "K",            "00 0x5  01--- ----- KKKK KKKK KKKK KKKK",
151 
  EF(l_nop), 0, it_nop },
152 
{ "l.movhi",   "rD,K",         "00 0x6  DDDDD ----0 KKKK KKKK KKKK KKKK",
153 
  EF(l_movhi), 0, it_movimm },
154 
{ "l.macrc",   "rD",           "00 0x6  DDDDD ----1 0000 0000 0000 0000",
155 
  EF(l_macrc), 0, it_mac },
156 
{ "l.sys",     "K",            "00 0x8  00000 00000 KKKK KKKK KKKK KKKK",
157 1440 nogj 
  EF(l_sys), 0, it_exception },
158 1346 nogj 
{ "l.trap",    "K",            "00 0x8  01000 00000 KKKK KKKK KKKK KKKK",
159 1440 nogj 
  EF(l_trap), 0, it_exception },
160 1346 nogj 
{ "l.msync",   "",             "00 0x8  10000 00000 0000 0000 0000 0000", EFN,
161 
  0, it_unknown },
162 
{ "l.psync",   "",             "00 0x8  10100 00000 0000 0000 0000 0000", EFN,
163 
  0, it_unknown },
164 
{ "l.csync",   "",             "00 0x8  11000 00000 0000 0000 0000 0000", EFN,
165 
  0, it_unknown },
166 
{ "l.rfe",     "",             "00 0x9  ----- ----- ---- ---- ---- ----",
167 
  EF(l_rfe), OR32_IF_DELAY, it_exception },
168 
{ "lv.all_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0,
169 
  it_unknown },
170 
{ "lv.all_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0,
171 
  it_unknown },
172 
{ "lv.all_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0,
173 
  it_unknown },
174 
{ "lv.all_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0,
175 
  it_unknown },
176 
{ "lv.all_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0,
177 
  it_unknown },
178 
{ "lv.all_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0,
179 
  it_unknown },
180 
{ "lv.all_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0,
181 
  it_unknown },
182 
{ "lv.all_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0,
183 
  it_unknown },
184 
{ "lv.all_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0,
185 
  it_unknown },
186 
{ "lv.all_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0,
187 
  it_unknown },
188 
{ "lv.all_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0,
189 
  it_unknown },
190 
{ "lv.all_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0,
191 
  it_unknown },
192 
{ "lv.any_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0,
193 
  it_unknown },
194 
{ "lv.any_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0,
195 
  it_unknown },
196 
{ "lv.any_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0,
197 
  it_unknown },
198 
{ "lv.any_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0,
199 
  it_unknown },
200 
{ "lv.any_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0,
201 
  it_unknown },
202 
{ "lv.any_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0,
203 
  it_unknown },
204 
{ "lv.any_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0,
205 
  it_unknown },
206 
{ "lv.any_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0,
207 
  it_unknown },
208 
{ "lv.any_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0,
209 
  it_unknown },
210 
{ "lv.any_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0,
211 
  it_unknown },
212 
{ "lv.any_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0,
213 
  it_unknown },
214 
{ "lv.any_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0,
215 
  it_unknown },
216 
{ "lv.add.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0,
217 
  it_unknown },
218 
{ "lv.add.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0,
219 
  it_unknown },
220 
{ "lv.adds.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0,
221 
  it_unknown },
222 
{ "lv.adds.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0,
223 
  it_unknown },
224 
{ "lv.addu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0,
225 
  it_unknown },
226 
{ "lv.addu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0,
227 
  it_unknown },
228 
{ "lv.addus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0,
229 
  it_unknown },
230 
{ "lv.addus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0,
231 
  it_unknown },
232 
{ "lv.and",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0,
233 
  it_unknown },
234 
{ "lv.avg.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0,
235 
  it_unknown },
236 
{ "lv.avg.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0,
237 
  it_unknown },
238 
{ "lv.cmp_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0,
239 
  it_unknown },
240 
{ "lv.cmp_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0,
241 
  it_unknown },
242 
{ "lv.cmp_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0,
243 
  it_unknown },
244 
{ "lv.cmp_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0,
245 
  it_unknown },
246 
{ "lv.cmp_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0,
247 
  it_unknown },
248 
{ "lv.cmp_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0,
249 
  it_unknown },
250 
{ "lv.cmp_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0,
251 
  it_unknown },
252 
{ "lv.cmp_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0,
253 
  it_unknown },
254 
{ "lv.cmp_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0,
255 
  it_unknown },
256 
{ "lv.cmp_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0,
257 
  it_unknown },
258 
{ "lv.cmp_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0,
259 
  it_unknown },
260 
{ "lv.cmp_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0,
261 
  it_unknown },
262 
{ "lv.madds.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0,
263 
  it_unknown },
264 
{ "lv.max.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0,
265 
  it_unknown },
266 
{ "lv.max.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0,
267 
  it_unknown },
268 
{ "lv.merge.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0,
269 
  it_unknown },
270 
{ "lv.merge.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0,
271 
  it_unknown },
272 
{ "lv.min.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0,
273 
  it_unknown },
274 
{ "lv.min.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0,
275 
  it_unknown },
276 
{ "lv.msubs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0,
277 
  it_unknown },
278 
{ "lv.muls.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0,
279 
  it_unknown },
280 
{ "lv.nand",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0,
281 
  it_unknown },
282 
{ "lv.nor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0,
283 
  it_unknown },
284 
{ "lv.or",     "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0,
285 
  it_unknown },
286 
{ "lv.pack.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0,
287 
  it_unknown },
288 
{ "lv.pack.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0,
289 
  it_unknown },
290 
{ "lv.packs.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0,
291 
  it_unknown },
292 
{ "lv.packs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0,
293 
  it_unknown },
294 
{ "lv.packus.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0,
295 
  it_unknown },
296 
{ "lv.packus.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0,
297 
  it_unknown },
298 
{ "lv.perm.n", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0,
299 
  it_unknown },
300 
{ "lv.rl.b",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0,
301 
  it_unknown },
302 
{ "lv.rl.h",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0,
303 
  it_unknown },
304 
{ "lv.sll.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0,
305 
  it_unknown },
306 
{ "lv.sll.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0,
307 
  it_unknown },
308 
{ "lv.sll",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0,
309 
  it_unknown },
310 
{ "lv.srl.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0,
311 
  it_unknown },
312 
{ "lv.srl.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0,
313 
  it_unknown },
314 
{ "lv.sra.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0,
315 
  it_unknown },
316 
{ "lv.sra.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0,
317 
  it_unknown },
318 
{ "lv.srl",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0,
319 
  it_unknown },
320 
{ "lv.sub.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0,
321 
  it_unknown },
322 
{ "lv.sub.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0,
323 
  it_unknown },
324 
{ "lv.subs.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0,
325 
  it_unknown },
326 
{ "lv.subs.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0,
327 
  it_unknown },
328 
{ "lv.subu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0,
329 
  it_unknown },
330 
{ "lv.subu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0,
331 
  it_unknown },
332 
{ "lv.subus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0,
333 
  it_unknown },
334 
{ "lv.subus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0,
335 
  it_unknown },
336 
{ "lv.unpack.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0,
337 
  it_unknown },
338 
{ "lv.unpack.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0,
339 
  it_unknown },
340 
{ "lv.xor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0,
341 
  it_unknown },
342 
{ "lv.cust1",  "",             "00 0xA  ----- ----- ---- ---- 0xC ----", EFI, 0,
343 
  it_unknown },
344 
{ "lv.cust2",  "",             "00 0xA  ----- ----- ---- ---- 0xD ----", EFI, 0,
345 
  it_unknown },
346 
{ "lv.cust3",  "",             "00 0xA  ----- ----- ---- ---- 0xE ----", EFI, 0,
347 
  it_unknown },
348 
{ "lv.cust4",  "",             "00 0xA  ----- ----- ---- ---- 0xF ----", EFI, 0,
349 
  it_unknown },
350 676 markom 
 
351 1346 nogj 
{ "l.jr",      "rB",           "01 0x1  ----- ----- BBBB B--- ---- ----",
352 
  EF(l_jr), OR32_IF_DELAY, it_jump },
353 
{ "l.jalr",    "rB",           "01 0x2  ----- ----- BBBB B--- ---- ----",
354 
  EF(l_jalr), OR32_IF_DELAY, it_jump },
355 1384 nogj 
{ "l.maci",    "rA,I",         "01 0x3  IIIII ----- AAAA AIII IIII IIII",
356 1346 nogj 
  EF(l_mac), 0, it_mac },
357 
{ "l.cust1",   "",             "01 0xC  ----- ----- ---- ---- ---- ----",
358 
  EF(l_cust1), 0, it_unknown },
359 
{ "l.cust2",   "",             "01 0xD  ----- ----- ---- ---- ---- ----",
360 
  EF(l_cust2), 0, it_unknown },
361 
{ "l.cust3",   "",             "01 0xE  ----- ----- ---- ---- ---- ----",
362 
  EF(l_cust3), 0, it_unknown },
363 
{ "l.cust4",   "",             "01 0xF  ----- ----- ---- ---- ---- ----",
364 
  EF(l_cust4), 0, it_unknown },
365 133 markom 
 
366 1346 nogj 
{ "l.ld",      "rD,I(rA)",     "10 0x0  DDDDD AAAAA IIII IIII IIII IIII", EFI,
367 
  0, it_load },
368 
{ "l.lwz",     "rD,I(rA)",     "10 0x1  DDDDD AAAAA IIII IIII IIII IIII",
369 
  EF(l_lwz), 0, it_load },
370 
{ "l.lws",     "rD,I(rA)",     "10 0x2  DDDDD AAAAA IIII IIII IIII IIII", EFI,
371 
  0, it_load },
372 
{ "l.lbz",     "rD,I(rA)",     "10 0x3  DDDDD AAAAA IIII IIII IIII IIII",
373 
  EF(l_lbz), 0, it_load },
374 
{ "l.lbs",     "rD,I(rA)",     "10 0x4  DDDDD AAAAA IIII IIII IIII IIII",
375 
  EF(l_lbs), 0, it_load },
376 
{ "l.lhz",     "rD,I(rA)",     "10 0x5  DDDDD AAAAA IIII IIII IIII IIII",
377 
  EF(l_lhz), 0, it_load },
378 
{ "l.lhs",     "rD,I(rA)",     "10 0x6  DDDDD AAAAA IIII IIII IIII IIII",
379 
  EF(l_lhs), 0, it_load },
380 133 markom 
 
381 1346 nogj 
{ "l.addi",    "rD,rA,I",      "10 0x7  DDDDD AAAAA IIII IIII IIII IIII",
382 
  EF(l_add), OR32_W_FLAG, it_arith },
383 
{ "l.addic",   "rD,rA,I",      "10 0x8  DDDDD AAAAA IIII IIII IIII IIII", EFI,
384 
  0, it_arith },
385 
{ "l.andi",    "rD,rA,K",      "10 0x9  DDDDD AAAAA KKKK KKKK KKKK KKKK",
386 
  EF(l_and), OR32_W_FLAG, it_arith },
387 
{ "l.ori",     "rD,rA,K",      "10 0xA  DDDDD AAAAA KKKK KKKK KKKK KKKK",
388 
  EF(l_or), 0, it_arith },
389 
{ "l.xori",    "rD,rA,I",      "10 0xB  DDDDD AAAAA IIII IIII IIII IIII",
390 
  EF(l_xor), 0, it_arith },
391 
{ "l.muli",    "rD,rA,I",      "10 0xC  DDDDD AAAAA IIII IIII IIII IIII",
392 
  EF(l_mul), 0, it_arith },
393 
{ "l.mfspr",   "rD,rA,K",      "10 0xD  DDDDD AAAAA KKKK KKKK KKKK KKKK",
394 
  EF(l_mfspr), 0, it_move },
395 
{ "l.slli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 00LL LLLL",
396 
  EF(l_sll), 0, it_shift },
397 
{ "l.srli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 01LL LLLL",
398 
  EF(l_srl), 0, it_shift },
399 
{ "l.srai",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 10LL LLLL",
400 
  EF(l_sra), 0, it_shift },
401 
{ "l.rori",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 11LL LLLL", EFI,
402 
  0, it_shift },
403 133 markom 
 
404 1346 nogj 
{ "l.sfeqi",   "rA,I",         "10 0xF  00000 AAAAA IIII IIII IIII IIII",
405 
  EF(l_sfeq), OR32_W_FLAG, it_compare },
406 
{ "l.sfnei",   "rA,I",         "10 0xF  00001 AAAAA IIII IIII IIII IIII",
407 
  EF(l_sfne), OR32_W_FLAG, it_compare },
408 
{ "l.sfgtui",  "rA,I",         "10 0xF  00010 AAAAA IIII IIII IIII IIII",
409 
  EF(l_sfgtu), OR32_W_FLAG, it_compare },
410 
{ "l.sfgeui",  "rA,I",         "10 0xF  00011 AAAAA IIII IIII IIII IIII",
411 
  EF(l_sfgeu), OR32_W_FLAG, it_compare },
412 
{ "l.sfltui",  "rA,I",         "10 0xF  00100 AAAAA IIII IIII IIII IIII",
413 
  EF(l_sfltu), OR32_W_FLAG, it_compare },
414 
{ "l.sfleui",  "rA,I",         "10 0xF  00101 AAAAA IIII IIII IIII IIII",
415 
  EF(l_sfleu), OR32_W_FLAG, it_compare },
416 
{ "l.sfgtsi",  "rA,I",         "10 0xF  01010 AAAAA IIII IIII IIII IIII",
417 
  EF(l_sfgts), OR32_W_FLAG, it_compare },
418 
{ "l.sfgesi",  "rA,I",         "10 0xF  01011 AAAAA IIII IIII IIII IIII",
419 
  EF(l_sfges), OR32_W_FLAG, it_compare },
420 
{ "l.sfltsi",  "rA,I",         "10 0xF  01100 AAAAA IIII IIII IIII IIII",
421 
  EF(l_sflts), OR32_W_FLAG, it_compare },
422 
{ "l.sflesi",  "rA,I",         "10 0xF  01101 AAAAA IIII IIII IIII IIII",
423 
  EF(l_sfles), OR32_W_FLAG, it_compare },
424 133 markom 
 
425 1346 nogj 
{ "l.mtspr",   "rA,rB,K",      "11 0x0  KKKKK AAAAA BBBB BKKK KKKK KKKK",
426 
  EF(l_mtspr), 0, it_move },
427 
{ "l.mac",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x1",
428 
  EF(l_mac), 0, it_mac },
429 
{ "l.msb",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x2",
430 
  EF(l_msb), 0, it_mac },
431 133 markom 
 
432 1346 nogj 
{ "lf.add.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x0",
433 
  EF(lf_add_s), 0, it_float },
434 
{ "lf.sub.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x1",
435 
  EF(lf_sub_s), 0, it_float },
436 
{ "lf.mul.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x2",
437 
  EF(lf_mul_s), 0, it_float },
438 
{ "lf.div.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x3",
439 
  EF(lf_div_s), 0, it_float },
440 
{ "lf.itof.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x4",
441 
  EF(lf_itof_s), 0, it_float },
442 
{ "lf.ftoi.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x5",
443 
  EF(lf_ftoi_s), 0, it_float },
444 
{ "lf.rem.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x6",
445 
  EF(lf_rem_s), 0, it_float },
446 
{ "lf.madd.s",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x7",
447 
  EF(lf_madd_s), 0, it_float },
448 
{ "lf.sfeq.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x8",
449 
  EF(lf_sfeq_s), 0, it_float },
450 
{ "lf.sfne.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x9",
451 
  EF(lf_sfne_s), 0, it_float },
452 
{ "lf.sfgt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xA",
453 
  EF(lf_sfgt_s), 0, it_float },
454 
{ "lf.sfge.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xB",
455 
  EF(lf_sfge_s), 0, it_float },
456 
{ "lf.sflt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xC",
457 
  EF(lf_sflt_s), 0, it_float },
458 
{ "lf.sfle.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xD",
459 
  EF(lf_sfle_s), 0, it_float },
460 
{ "lf.cust1.s", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xD ----", EFI,
461 
  0, it_float },
462 133 markom 
 
463 1346 nogj 
{ "lf.add.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0,
464 
  it_float },
465 
{ "lf.sub.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0,
466 
  it_float },
467 
{ "lf.mul.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0,
468 
  it_float },
469 
{ "lf.div.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0,
470 
  it_float },
471 
{ "lf.itof.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x4", EFI, 0,
472 
  it_float },
473 
{ "lf.ftoi.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x5", EFI, 0,
474 
  it_float },
475 
{ "lf.rem.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0,
476 
  it_float },
477 
{ "lf.madd.d",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0,
478 
  it_float },
479 
{ "lf.sfeq.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0,
480 
  it_float },
481 
{ "lf.sfne.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0,
482 
  it_float },
483 
{ "lf.sfgt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0,
484 
  it_float },
485 
{ "lf.sfge.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0,
486 
  it_float },
487 
{ "lf.sflt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0,
488 
  it_float },
489 
{ "lf.sfle.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0,
490 
  it_float },
491 
{ "lf.cust1.d", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xE ----", EFI, 0,
492 
  it_float },
493 676 markom 
 
494 1346 nogj 
{ "l.sd",      "I(rD),rB",     "11 0x4  IIIII DDDDD BBBB BIII IIII IIII", EFI,
495 
  0, it_store },
496 
{ "l.sw",      "I(rD),rB",     "11 0x5  IIIII DDDDD BBBB BIII IIII IIII",
497 
  EF(l_sw), 0, it_store },
498 
{ "l.sb",      "I(rD),rB",     "11 0x6  IIIII DDDDD BBBB BIII IIII IIII",
499 
  EF(l_sb), 0, it_store },
500 
{ "l.sh",      "I(rD),rB",     "11 0x7  IIIII DDDDD BBBB BIII IIII IIII",
501 
  EF(l_sh), 0, it_store },
502 1295 lampret 
 
503 1346 nogj 
{ "l.add",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x0",
504 
  EF(l_add), OR32_W_FLAG, it_arith },
505 
{ "l.addc",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x1",
506 
  EF(l_addc), OR32_W_FLAG, it_arith },
507 
{ "l.sub",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x2",
508 
  EF(l_sub), 0, it_arith },
509 
{ "l.and",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x3",
510 
  EF(l_and), OR32_W_FLAG, it_arith },
511 
{ "l.or",      "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x4",
512 
  EF(l_or), 0, it_arith },
513 
{ "l.xor",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x5",
514 
  EF(l_xor), 0, it_arith },
515 
{ "l.mul",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x6",
516 
  EF(l_mul), 0, it_arith },
517 1295 lampret 
 
518 1346 nogj 
{ "l.sll",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 00-- 0x8",
519 
  EF(l_sll), 0, it_shift },
520 
{ "l.srl",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 01-- 0x8",
521 
  EF(l_srl), 0, it_shift },
522 
{ "l.sra",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 10-- 0x8",
523 
  EF(l_sra), 0, it_shift },
524 
{ "l.ror",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 11-- 0x8", EFI,
525 
  0, it_shift },
526 
{ "l.div",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x9",
527 
  EF(l_div), 0, it_arith },
528 
{ "l.divu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xA",
529 
  EF(l_divu), 0, it_arith },
530 
{ "l.mulu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xB", EFI,
531 
  0, it_arith },
532 
{ "l.extbs",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xC",
533 
  EF(l_extbs), 0, it_move },
534 
{ "l.exths",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xC",
535 
  EF(l_exths), 0, it_move },
536 
{ "l.extws",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xD",
537 
  EF(l_extws), 0, it_move },
538 
{ "l.extbz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 11-- 0xC",
539 
  EF(l_extbz), 0, it_move },
540 
{ "l.exthz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 10-- 0xC",
541 
  EF(l_exthz), 0, it_move },
542 
{ "l.extwz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xD",
543 
  EF(l_extwz), 0, it_move },
544 
{ "l.cmov",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xE",
545 
  EF(l_cmov), OR32_R_FLAG, it_move },
546 1384 nogj 
{ "l.ff1",     "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 ---- 0xF", EFI, 0,
547 
  it_arith },
548 133 markom 
 
549 1346 nogj 
{ "l.sfeq",    "rA,rB",        "11 0x9  00000 AAAAA BBBB B--- ---- ----",
550 
  EF(l_sfeq), OR32_W_FLAG, it_compare },
551 
{ "l.sfne",    "rA,rB",        "11 0x9  00001 AAAAA BBBB B--- ---- ----",
552 
  EF(l_sfne), OR32_W_FLAG, it_compare },
553 
{ "l.sfgtu",   "rA,rB",        "11 0x9  00010 AAAAA BBBB B--- ---- ----",
554 
  EF(l_sfgtu), OR32_W_FLAG, it_compare },
555 
{ "l.sfgeu",   "rA,rB",        "11 0x9  00011 AAAAA BBBB B--- ---- ----",
556 
  EF(l_sfgeu), OR32_W_FLAG, it_compare },
557 
{ "l.sfltu",   "rA,rB",        "11 0x9  00100 AAAAA BBBB B--- ---- ----",
558 
  EF(l_sfltu), OR32_W_FLAG, it_compare },
559 
{ "l.sfleu",   "rA,rB",        "11 0x9  00101 AAAAA BBBB B--- ---- ----",
560 
  EF(l_sfleu), OR32_W_FLAG, it_compare },
561 
{ "l.sfgts",   "rA,rB",        "11 0x9  01010 AAAAA BBBB B--- ---- ----",
562 
  EF(l_sfgts), OR32_W_FLAG, it_compare },
563 
{ "l.sfges",   "rA,rB",        "11 0x9  01011 AAAAA BBBB B--- ---- ----",
564 
  EF(l_sfges), OR32_W_FLAG, it_compare },
565 
{ "l.sflts",   "rA,rB",        "11 0x9  01100 AAAAA BBBB B--- ---- ----",
566 
  EF(l_sflts), OR32_W_FLAG, it_compare },
567 
{ "l.sfles",   "rA,rB",        "11 0x9  01101 AAAAA BBBB B--- ---- ----",
568 
  EF(l_sfles), OR32_W_FLAG, it_compare },
569 676 markom 
 
570 1346 nogj 
{ "l.cust5",   "rD,rA,rB,L,K", "11 0xC  DDDDD AAAAA BBBB BLLL LLLK KKKK", EFI,
571 
  0, it_unknown },
572 
{ "l.cust6",   "",             "11 0xD  ----- ----- ---- ---- ---- ----", EFI,
573 
  0, it_unknown },
574 
{ "l.cust7",   "",             "11 0xE  ----- ----- ---- ---- ---- ----", EFI,
575 
  0, it_unknown },
576 
{ "l.cust8",   "",             "11 0xF  ----- ----- ---- ---- ---- ----", EFI,
577 
  0, it_unknown },
578 133 markom 
 
579 221 markom 
/* This section should not be defined in or1ksim, since it contains duplicates,
580 
   which would cause machine builder to complain.  */
581 374 simons 
#ifdef HAS_CUST
582 1346 nogj 
{ "l.cust5_1",   "rD",         "11 0xC  DDDDD ----- ---- ---- ---- ----", EFI,
583 
  0, it_unknown },
584 
{ "l.cust5_2",   "rD,rA"   ,   "11 0xC  DDDDD AAAAA ---- ---- ---- ----", EFI,
585 
  0, it_unknown },
586 
{ "l.cust5_3",   "rD,rA,rB",   "11 0xC  DDDDD AAAAA BBBB B--- ---- ----", EFI,
587 
  0, it_unknown },
588 221 markom 
 
589 1346 nogj 
{ "l.cust6_1",   "rD",         "11 0xD  DDDDD ----- ---- ---- ---- ----", EFI,
590 
  0, it_unknown },
591 
{ "l.cust6_2",   "rD,rA"   ,   "11 0xD  DDDDD AAAAA ---- ---- ---- ----", EFI,
592 
  0, it_unknown },
593 
{ "l.cust6_3",   "rD,rA,rB",   "11 0xD  DDDDD AAAAA BBBB B--- ---- ----", EFI,
594 
  0, it_unknown },
595 221 markom 
 
596 1346 nogj 
{ "l.cust7_1",   "rD",         "11 0xE  DDDDD ----- ---- ---- ---- ----", EFI,
597 
  0, it_unknown },
598 
{ "l.cust7_2",   "rD,rA"   ,   "11 0xE  DDDDD AAAAA ---- ---- ---- ----", EFI,
599 
  0, it_unknown },
600 
{ "l.cust7_3",   "rD,rA,rB",   "11 0xE  DDDDD AAAAA BBBB B--- ---- ----", EFI,
601 
  0, it_unknown },
602 221 markom 
 
603 1346 nogj 
{ "l.cust8_1",   "rD",         "11 0xF  DDDDD ----- ---- ---- ---- ----", EFI,
604 
  0, it_unknown },
605 
{ "l.cust8_2",   "rD,rA"   ,   "11 0xF  DDDDD AAAAA ---- ---- ---- ----", EFI,
606 
  0, it_unknown },
607 
{ "l.cust8_3",   "rD,rA,rB",   "11 0xF  DDDDD AAAAA BBBB B--- ---- ----", EFI,
608 
  0, it_unknown },
609 221 markom 
#endif
610 
 
611 1346 nogj 
{ "", "", "", EFI, 0, 0 }  /* Dummy entry, not included in num_opcodes.  This
612 
                            * lets code examine entry i+1 without checking
613 
                            * if we've run off the end of the table.  */
614 133 markom 
};
615 
 
616 
#undef EFI
617 
#undef EFN
618 
#undef EF
619 
 
620 
/* **INDENT-ON** */
621 
 
622 371 markom 
/* Define dummy, if debug is not defined.  */
623 1341 nogj 
#ifndef HAS_DEBUG
624 
#define debug(l, fmt...) ;
625 371 markom 
#endif
626 133 markom 
 
627 371 markom 
CONST int num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1;
628 
 
629 138 markom 
/* Calculates instruction length in bytes. Always 4 for OR32. */
630 
int
631 
insn_len(int insn_index)
632 133 markom 
{
633 
  insn_index = 0; /* Just to get rid that warning.  */
634 
  return 4;
635 
}
636 
 
637 
/* Is individual insn's operand signed or unsigned? */
638 138 markom 
int
639 
letter_signed(char l)
640 133 markom 
{
641 
  CONST struct or32_letter *pletter;
642 
 
643 
  for(pletter = or32_letters; pletter->letter != '\0'; pletter++)
644 
    if (pletter->letter == l)
645 
      return pletter->sign;
646 
 
647 
  printf("letter_signed(%c): Unknown letter.\n", l);
648 
  return 0;
649 
}
650 
 
651 703 markom 
/* Simple cache for letter ranges */
652 
static int range_cache[256] = {0};
653 
 
654 133 markom 
/* Number of letters in the individual lettered operand. */
655 138 markom 
int
656 
letter_range(char l)
657 133 markom 
{
658 
  CONST struct or32_opcode *pinsn;
659 
  char *enc;
660 
  int range = 0;
661 703 markom 
 
662 
  /* Is value cached? */
663 1308 phoenix 
  if ((range = range_cache[(unsigned char)l])) return range;
664 133 markom 
 
665 138 markom 
  for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
666 
    {
667 
      if (strchr(pinsn->encoding,l))
668 
        {
669 
          for (enc = pinsn->encoding; *enc != '\0'; enc++)
670 
            if ((*enc == '0') && (*(enc+1) == 'x'))
671 
              enc += 2;
672 
            else if (*enc == l)
673 
              range++;
674 703 markom 
          return range_cache[(unsigned char)l] = range;
675 133 markom 
        }
676 
    }
677 703 markom 
 
678 133 markom 
  printf("\nABORT: letter_range(%c): Never used letter.\n", l);
679 
  exit(1);
680 
}
681 
 
682 
/* MM: Returns index of given instruction name.  */
683 138 markom 
int
684 
insn_index (char *insn)
685 
{
686 133 markom 
  int i, found = -1;
687 371 markom 
  for (i = 0; i < num_opcodes; i++)
688 138 markom 
    if (!strcmp (or32_opcodes[i].name, insn))
689 
      {
690 
        found = i;
691 
        break;
692 
      }
693 133 markom 
  return found;
694 
}
695 
 
696 717 markom 
/* Returns name of the specified instruction index */
697 
CONST char *
698 
insn_name(int index)
699 138 markom 
{
700 371 markom 
  if (index >= 0 && index < num_opcodes)
701 133 markom 
    return or32_opcodes[index].name;
702 
  else
703 
    return "???";
704 
}
705 
 
706 1342 nogj 
#if defined(HAS_EXECUTION) && SIMPLE_EXECUTION
707 717 markom 
void
708 1342 nogj 
l_none(struct iqueue_entry *current)
709 
{
710 
}
711 1452 nogj 
#elif defined(HAS_EXECUTION) && DYNAMIC_EXECUTION
712 
void
713 
l_none(struct op_queue *opq, int *param_t, orreg_t *param, int delay_slot)
714 
{
715 
}
716 1342 nogj 
#else
717 
void
718 717 markom 
l_none()
719 138 markom 
{
720 133 markom 
}
721 1342 nogj 
#endif
722 133 markom 
 
723 
/*** Finite automata for instruction decoding building code ***/
724 
 
725 1341 nogj 
/* Find symbols in encoding.  */
726 706 markom 
unsigned long
727 133 markom 
insn_extract(param_ch, enc_initial)
728 
     char param_ch;
729 
     char *enc_initial;
730 
{
731 
  char *enc;
732 
  unsigned long ret = 0;
733 
  unsigned opc_pos = 32;
734 
  for (enc = enc_initial; *enc != '\0'; )
735 
    if ((*enc == '0') && (*(enc+1) == 'x'))
736 
      {
737 
        unsigned long tmp = strtol(enc+2, NULL, 16);
738 
        opc_pos -= 4;
739 138 markom 
        if (param_ch == '0' || param_ch == '1')
740 
          {
741 
            if (param_ch == '0')
742 
              tmp = 15 - tmp;
743 
            ret |= tmp << opc_pos;
744 
          }
745 133 markom 
        enc += 3;
746 
      }
747 138 markom 
    else
748 
      {
749 
        if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha(*enc) )
750 
          {
751 
            opc_pos--;
752 
            if (param_ch == *enc)
753 
              ret |= 1 << opc_pos;
754 
          }
755 
        enc++;
756 133 markom 
      }
757 
  return ret;
758 
}
759 
 
760 138 markom 
#define MAX_AUTOMATA_SIZE (1200)
761 
#define MAX_OP_TABLE_SIZE (1200)
762 133 markom 
#define MAX_LEN           (8)
763 
 
764 
#ifndef MIN
765 
# define MIN(x,y)          ((x) < (y) ? (x) : (y))
766 
#endif
767 
 
768 
unsigned long *automata;
769 
int nuncovered;
770 
int curpass = 0;
771 
 
772 1341 nogj 
/* MM: Struct that holds runtime build information about instructions.  */
773 1342 nogj 
struct temp_insn_struct *ti;
774 138 markom 
 
775 
struct insn_op_struct *op_data, **op_start;
776 
 
777 
/* Recursive utility function used to find best match and to build automata.  */
778 
 
779 
static unsigned long *
780 
cover_insn (unsigned long *cur, int pass, unsigned int mask)
781 
{
782 133 markom 
  int best_first = 0, best_len = 0, i, last_match = -1, ninstr = 0;
783 
  unsigned long cur_mask = mask;
784 
  unsigned long *next;
785 
 
786 
  for (i = 0; i < num_opcodes; i++)
787 138 markom 
    if (ti[i].in_pass == pass)
788 
      {
789 
        cur_mask &= ti[i].insn_mask;
790 
        ninstr++;
791 
        last_match = i;
792 
      }
793 
 
794 344 markom 
  debug(8, "%08X %08X\n", mask, cur_mask);
795 138 markom 
  if (ninstr == 0)
796 
    return 0;
797 
  if (ninstr == 1)
798 
    {
799 
      /* Leaf holds instruction index. */
800 344 markom 
      debug(8, "%i>I%i %s\n", cur - automata, last_match, or32_opcodes[last_match].name);
801 138 markom 
      *cur = LEAF_FLAG | last_match;
802 
      cur++;
803 
      nuncovered--;
804 
    } else {
805 
      /* Find longest match.  */
806 
      for (i = 0; i < 32; i++)
807 
        {
808 
          int len;
809 
          for (len = best_len + 1; len < MIN(MAX_LEN, 33 - i); len++)
810 
            {
811 
              unsigned long m = (1UL << ((unsigned long)len)) - 1;
812 344 markom 
              debug(9, " (%i(%08X & %08X>>%i = %08X, %08X)",len,m, cur_mask, i, (cur_mask >> (unsigned)i), (cur_mask >> (unsigned)i) & m);
813 138 markom 
              if ((m & (cur_mask >> (unsigned)i)) == m)
814 
                {
815 
                  best_len = len;
816 
                  best_first = i;
817 344 markom 
                  debug(9, "!");
818 138 markom 
                }
819 
              else
820 
                break;
821 
            }
822 
        }
823 344 markom 
      debug(9, "\n");
824 138 markom 
      if (!best_len)
825 
        {
826 
          fprintf (stderr, "%i instructions match mask 0x%08X:\n", ninstr, mask);
827 
          for (i = 0; i < num_opcodes; i++)
828 
            if (ti[i].in_pass == pass)
829 
              fprintf (stderr, "%s ", or32_opcodes[i].name);
830 
 
831 
          fprintf (stderr, "\n");
832 
          exit (1);
833 
        }
834 344 markom 
      debug(8, "%i> #### %i << %i (%i) ####\n", cur - automata, best_len, best_first, ninstr);
835 138 markom 
      *cur = best_first;
836 
      cur++;
837 
      *cur = (1 << best_len) - 1;
838 
      cur++;
839 
      next = cur;
840 
      /* Allocate space for pointers.  */
841 
      cur += 1 << best_len;
842 
      cur_mask = (1 << (unsigned long)best_len) - 1;
843 
 
844 
      for (i = 0; i < (1 << (unsigned long)best_len); i++)
845 
        {
846 
          int j;
847 
          unsigned long *c;
848 
          curpass++;
849 
          for (j = 0; j < num_opcodes; j++)
850 
            if (ti[j].in_pass == pass
851 371 markom 
                && ((ti[j].insn >> best_first) & cur_mask) == (unsigned long) i
852 138 markom 
                && ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask)
853 
              ti[j].in_pass = curpass;
854 
 
855 344 markom 
          debug(9, "%08X %08X %i\n", mask, cur_mask, best_first);
856 138 markom 
          c = cover_insn (cur, curpass, mask & (~(cur_mask << best_first)));
857 
          if (c)
858 
            {
859 344 markom 
              debug(8, "%i> #%X -> %u\n", next - automata, i, cur - automata);
860 138 markom 
              *next = cur - automata;
861 
              cur = c;
862 
            }
863 
          else
864 
            {
865 344 markom 
              debug(8, "%i> N/A\n", next - automata);
866 138 markom 
              *next = 0;
867 
            }
868 
          next++;
869 
        }
870 133 markom 
    }
871 138 markom 
  return cur;
872 
}
873 133 markom 
 
874 138 markom 
/* Returns number of nonzero bits. */
875 
static int
876 
num_ones (unsigned long value)
877 
{
878 
  int c = 0;
879 
  while (value)
880 
    {
881 
      if (value & 1)
882 
        c++;
883 
      value >>= 1;
884 133 markom 
    }
885 138 markom 
  return c;
886 
}
887 133 markom 
 
888 138 markom 
/* Utility function, which converts parameters from or32_opcode format to more binary form.
889 
   Parameters are stored in ti struct.  */
890 
 
891 
static struct insn_op_struct *
892 
parse_params (CONST struct or32_opcode *opcode, struct insn_op_struct *cur)
893 
{
894 
  char *args = opcode->args;
895 
  int i, type;
896 1346 nogj 
  int num_cur_op = 0;;
897 138 markom 
 
898 
  i = 0;
899 
  type = 0;
900 262 markom 
  /* In case we don't have any parameters, we add dummy read from r0.  */
901 
  if (!(*args)) {
902 263 markom 
    cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
903 262 markom 
    cur->data = 0;
904 355 markom 
    debug(9, "#%08X %08X\n", cur->type, cur->data);
905 262 markom 
    cur++;
906 
    return cur;
907 
  }
908 
 
909 138 markom 
  while (*args != '\0')
910 
    {
911 
      if (*args == 'r')
912 
        {
913 
          args++;
914 
          type |= OPTYPE_REG;
915 1341 nogj 
          if(args[1] == 'D')
916 
            type |= OPTYPE_DST;
917 133 markom 
        }
918 138 markom 
      else if (isalpha (*args))
919 
        {
920 
          unsigned long arg;
921 
          arg = insn_extract(*args, opcode->encoding);
922 355 markom 
          debug(9, "%s : %08X ------\n", opcode->name, arg);
923 138 markom 
          if (letter_signed (*args))
924 
            {
925 
              type |= OPTYPE_SIG;
926 
              type |= ((num_ones (arg) - 1) << OPTYPE_SBIT_SHR) & OPTYPE_SBIT;
927 
            }
928 
 
929 1346 nogj 
          num_cur_op = 0;
930 138 markom 
          /* Split argument to sequences of consecutive ones.  */
931 
          while (arg)
932 
            {
933 
              int shr = 0;
934 
              unsigned long tmp = arg, mask = 0;
935 
              while ((tmp & 1) == 0)
936 
                {
937 
                  shr++;
938 
                  tmp >>= 1;
939 
                }
940 
              while (tmp & 1)
941 
                {
942 
                  mask++;
943 
                  tmp >>= 1;
944 
                }
945 
              cur->type = type | shr;
946 
              cur->data = mask;
947 
              arg &= ~(((1 << mask) - 1) << shr);
948 355 markom 
              debug(6, "|%08X %08X\n", cur->type, cur->data);
949 138 markom 
              cur++;
950 1346 nogj 
              num_cur_op++;
951 138 markom 
            }
952 
          args++;
953 
        }
954 
      else if (*args == '(')
955 
        {
956 
          /* Next param is displacement.  Later we will treat them as one operand.  */
957 1346 nogj 
          /* Set the OPTYPE_DIS flag on all insn_op_structs that belong to this
958 
           * operand */
959 
          while(num_cur_op > 0) {
960 
            cur[-num_cur_op].type |= type | OPTYPE_DIS;
961 
            num_cur_op--;
962 
          }
963 
          cur[-1].type |= OPTYPE_OP;
964 355 markom 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
965 138 markom 
          type = 0;
966 
          i++;
967 
          args++;
968 
        }
969 
      else if (*args == OPERAND_DELIM)
970 
        {
971 
          cur--;
972 
          cur->type = type | cur->type | OPTYPE_OP;
973 355 markom 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
974 138 markom 
          cur++;
975 
          type = 0;
976 
          i++;
977 
          args++;
978 
        }
979 
      else if (*args == '0')
980 
        {
981 
          cur->type = type;
982 
          cur->data = 0;
983 355 markom 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
984 138 markom 
          cur++;
985 
          type = 0;
986 
          i++;
987 
          args++;
988 
        }
989 
      else if (*args == ')')
990 
        args++;
991 
      else
992 
        {
993 
          fprintf (stderr, "%s : parse error in args.\n", opcode->name);
994 
          exit (1);
995 
        }
996 133 markom 
    }
997 138 markom 
  cur--;
998 
  cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST;
999 355 markom 
  debug(9, "#%08X %08X\n", cur->type, cur->data);
1000 138 markom 
  cur++;
1001 133 markom 
  return cur;
1002 
}
1003 
 
1004 138 markom 
/* Constructs new automata based on or32_opcodes array.  */
1005 
 
1006 
void
1007 
build_automata()
1008 
{
1009 371 markom 
  int i;
1010 133 markom 
  unsigned long *end;
1011 138 markom 
  struct insn_op_struct *cur;
1012 
 
1013 133 markom 
  automata = (unsigned long *) malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long));
1014 138 markom 
  ti = (struct temp_insn_struct *) malloc (sizeof (struct temp_insn_struct) * num_opcodes);
1015 133 markom 
 
1016 
  nuncovered = num_opcodes;
1017 709 markom 
 
1018 
#ifdef HAS_EXECUTION
1019 138 markom 
  printf("Building automata... ");
1020 709 markom 
#endif
1021 
 
1022 133 markom 
  /* Build temporary information about instructions.  */
1023 138 markom 
  for (i = 0; i < num_opcodes; i++)
1024 
    {
1025 
      unsigned long ones, zeros;
1026 
      char *encoding = or32_opcodes[i].encoding;
1027 
      ones  = insn_extract('1', encoding);
1028 
      zeros = insn_extract('0', encoding);
1029 
      ti[i].insn_mask = ones | zeros;
1030 
      ti[i].insn = ones;
1031 
      ti[i].in_pass = curpass = 0;
1032 344 markom 
      /*debug(9, "%s: %s %08X %08X\n", or32_opcodes[i].name,
1033 138 markom 
        or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/
1034 
    }
1035 133 markom 
 
1036 
  /* Until all are covered search for best criteria to separate them.  */
1037 138 markom 
  end = cover_insn (automata, curpass, 0xFFFFFFFF);
1038 
  if (end - automata > MAX_AUTOMATA_SIZE)
1039 
    {
1040 
      fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE.");
1041 
      exit (1);
1042 
    }
1043 709 markom 
#ifdef HAS_EXECUTION
1044 138 markom 
  printf("done, num uncovered: %i/%i.\n", nuncovered, num_opcodes);
1045 709 markom 
#endif
1046 371 markom 
 
1047 709 markom 
#ifdef HAS_EXECUTION
1048 138 markom 
  printf("Parsing operands data... ");
1049 709 markom 
#endif
1050 138 markom 
  op_data = (struct insn_op_struct *) malloc (MAX_OP_TABLE_SIZE * sizeof (struct insn_op_struct));
1051 
  op_start = (struct insn_op_struct **) malloc (num_opcodes * sizeof (struct insn_op_struct *));
1052 
  cur = op_data;
1053 
  for (i = 0; i < num_opcodes; i++)
1054 
    {
1055 
      op_start[i] = cur;
1056 
      cur = parse_params (&or32_opcodes[i], cur);
1057 
      if (cur - op_data > MAX_OP_TABLE_SIZE)
1058 
        {
1059 
          fprintf (stderr, "Operands table too small, increase MAX_OP_TABLE_SIZE.\n");
1060 
          exit (1);
1061 
        }
1062 
    }
1063 709 markom 
#ifdef HAS_EXECUTION
1064 138 markom 
  printf("done.\n");
1065 709 markom 
#endif
1066 133 markom 
}
1067 
 
1068 138 markom 
void destruct_automata ()
1069 
{
1070 
  free (ti);
1071 133 markom 
  free (automata);
1072 138 markom 
  free (op_data);
1073 
  free (op_start);
1074 133 markom 
}
1075 
 
1076 
/* Decodes instruction and returns instruction index.  */
1077 138 markom 
int insn_decode (unsigned int insn)
1078 
{
1079 133 markom 
  unsigned long *a = automata;
1080 138 markom 
  int i;
1081 
  while (!(*a & LEAF_FLAG))
1082 
    {
1083 
      unsigned int first = *a;
1084 703 markom 
      //debug(9, "%i ", a - automata);
1085 138 markom 
      a++;
1086 
      i = (insn >> first) & *a;
1087 
      a++;
1088 
      if (!*(a + i))
1089 
        { /* Invalid instruction found?  */
1090 703 markom 
          //debug(9, "XXX\n", i);
1091 138 markom 
          return -1;
1092 
        }
1093 
      a = automata + *(a + i);
1094 
    }
1095 
  i = *a & ~LEAF_FLAG;
1096 703 markom 
  //debug(9, "%i\n", i);
1097 138 markom 
  /* Final check - do we have direct match?
1098 
     (based on or32_opcodes this should be the only possibility,
1099 
     but in case of invalid/missing instruction we must perform a check)  */
1100 
  if ((ti[i].insn_mask & insn) == ti[i].insn)
1101 
    return i;
1102 
  else
1103 
    return -1;
1104 133 markom 
}
1105 371 markom 
 
1106 
static char disassembled_str[50];
1107 
char *disassembled = &disassembled_str[0];
1108 
 
1109 
/* Automagically does zero- or sign- extension and also finds correct
1110 
   sign bit position if sign extension is correct extension. Which extension
1111 
   is proper is figured out from letter description. */
1112 
 
1113 879 markom 
unsigned long
1114 371 markom 
extend_imm(unsigned long imm, char l)
1115 
{
1116 
  unsigned long mask;
1117 
  int letter_bits;
1118 
 
1119 
  /* First truncate all bits above valid range for this letter
1120 
     in case it is zero extend. */
1121 
  letter_bits = letter_range(l);
1122 
  mask = (1 << letter_bits) - 1;
1123 
  imm &= mask;
1124 
 
1125 
  /* Do sign extend if this is the right one. */
1126 
  if (letter_signed(l) && (imm >> (letter_bits - 1)))
1127 
    imm |= (~mask);
1128 
 
1129 
  return imm;
1130 
}
1131 
 
1132 879 markom 
unsigned long
1133 371 markom 
or32_extract(param_ch, enc_initial, insn)
1134 
     char param_ch;
1135 
     char *enc_initial;
1136 
     unsigned long insn;
1137 
{
1138 
  char *enc;
1139 
  unsigned long ret = 0;
1140 
  int opc_pos = 0;
1141 
  int param_pos = 0;
1142 
 
1143 
  for (enc = enc_initial; *enc != '\0'; enc++)
1144 
    if (*enc == param_ch)
1145 
      {
1146 
        if (enc - 2 >= enc_initial && (*(enc - 2) == '0') && (*(enc - 1) == 'x'))
1147 
          continue;
1148 
        else
1149 
          param_pos++;
1150 
      }
1151 
 
1152 
#if DEBUG
1153 
  printf("or32_extract: %x ", param_pos);
1154 
#endif
1155 
  opc_pos = 32;
1156 
  for (enc = enc_initial; *enc != '\0'; )
1157 
    if ((*enc == '0') && (*(enc+1) == 'x'))
1158 
      {
1159 
        opc_pos -= 4;
1160 
        if ((param_ch == '0') || (param_ch == '1'))
1161 
          {
1162 
            unsigned long tmp = strtol(enc, NULL, 16);
1163 
#if DEBUG
1164 
            printf(" enc=%s, tmp=%x ", enc, tmp);
1165 
#endif
1166 
            if (param_ch == '0')
1167 
              tmp = 15 - tmp;
1168 
            ret |= tmp << opc_pos;
1169 
          }
1170 
        enc += 3;
1171 
      }
1172 
    else if ((*enc == '0') || (*enc == '1'))
1173 
      {
1174 
        opc_pos--;
1175 
        if (param_ch == *enc)
1176 
          ret |= 1 << opc_pos;
1177 
        enc++;
1178 
      }
1179 
    else if (*enc == param_ch)
1180 
      {
1181 
        opc_pos--;
1182 
        param_pos--;
1183 
#if DEBUG
1184 
        printf("\n  ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos);
1185 
#endif
1186 
        if (islower(param_ch))
1187 
          ret -= ((insn >> opc_pos) & 0x1) << param_pos;
1188 
        else
1189 
          ret += ((insn >> opc_pos) & 0x1) << param_pos;
1190 
        enc++;
1191 
      }
1192 
    else if (isalpha(*enc))
1193 
      {
1194 
        opc_pos--;
1195 
        enc++;
1196 
      }
1197 
    else if (*enc == '-')
1198 
      {
1199 
        opc_pos--;
1200 
        enc++;
1201 
      }
1202 
    else
1203 
      enc++;
1204 
 
1205 
#if DEBUG
1206 
  printf ("ret=%x\n", ret);
1207 
#endif
1208 
  return ret;
1209 
}
1210 
 
1211 
/* Print register. Used only by print_insn. */
1212 
 
1213 703 markom 
static char *
1214 
or32_print_register (dest, param_ch, encoding, insn)
1215 
     char *dest;
1216 371 markom 
     char param_ch;
1217 
     char *encoding;
1218 
     unsigned long insn;
1219 
{
1220 
  int regnum = or32_extract(param_ch, encoding, insn);
1221 
 
1222 703 markom 
  sprintf (dest, "r%d", regnum);
1223 
  while (*dest) dest++;
1224 
  return dest;
1225 371 markom 
}
1226 
 
1227 
/* Print immediate. Used only by print_insn. */
1228 
 
1229 703 markom 
static char *
1230 
or32_print_immediate (dest, param_ch, encoding, insn)
1231 
     char *dest;
1232 371 markom 
     char param_ch;
1233 
     char *encoding;
1234 
     unsigned long insn;
1235 
{
1236 
  int imm = or32_extract (param_ch, encoding, insn);
1237 
 
1238 
  imm = extend_imm(imm, param_ch);
1239 
 
1240 
  if (letter_signed(param_ch))
1241 
    {
1242 
      if (imm < 0)
1243 703 markom 
        sprintf (dest, "%d", imm);
1244 371 markom 
      else
1245 703 markom 
        sprintf (dest, "0x%x", imm);
1246 371 markom 
    }
1247 
  else
1248 703 markom 
    sprintf (dest, "%#x", imm);
1249 
  while (*dest) dest++;
1250 
  return dest;
1251 371 markom 
}
1252 
 
1253 
/* Disassemble one instruction from insn to disassemble.
1254 
   Return the size of the instruction.  */
1255 
 
1256 
int
1257 
disassemble_insn (insn)
1258 
     unsigned long insn;
1259 
{
1260 703 markom 
  return disassemble_index (insn, insn_decode (insn));
1261 
}
1262 371 markom 
 
1263 703 markom 
/* Disassemble one instruction from insn index.
1264 
   Return the size of the instruction.  */
1265 
 
1266 
int
1267 
disassemble_index (insn, index)
1268 
     unsigned long insn;
1269 
     int index;
1270 
{
1271 
  char *dest = disassembled;
1272 371 markom 
  if (index >= 0)
1273 
    {
1274 
      struct or32_opcode const *opcode = &or32_opcodes[index];
1275 
      char *s;
1276 
 
1277 703 markom 
      strcpy (dest, opcode->name);
1278 
      while (*dest) dest++;
1279 
      *dest++ = ' ';
1280 
      *dest = 0;
1281 
 
1282 371 markom 
      for (s = opcode->args; *s != '\0'; ++s)
1283 
        {
1284 
          switch (*s)
1285 
            {
1286 
            case '\0':
1287 703 markom 
              return insn_len (insn);
1288 714 markom 
 
1289 371 markom 
            case 'r':
1290 703 markom 
              dest = or32_print_register(dest, *++s, opcode->encoding, insn);
1291 371 markom 
              break;
1292 714 markom 
 
1293 371 markom 
            default:
1294 
              if (strchr (opcode->encoding, *s))
1295 703 markom 
                dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
1296 
              else {
1297 
                *dest++ = *s;
1298 
                *dest = 0;
1299 
              }
1300 371 markom 
            }
1301 
        }
1302 
    }
1303 
  else
1304 
    {
1305 
      /* This used to be %8x for binutils.  */
1306 1308 phoenix 
      sprintf(dest, ".word 0x%08lx", insn);
1307 703 markom 
      while (*dest) dest++;
1308 371 markom 
    }
1309 
  return insn_len (insn);
1310 
}

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