1 |
14 |
lampret |
/* Information about OR1K ISA. W/o this we can't generate or1k_isa_part.tex.
|
2 |
1113 |
lampret |
*
|
3 |
|
|
* $Log: not supported by cvs2svn $
|
4 |
14 |
lampret |
*/
|
5 |
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|
6 |
|
|
struct or1k_isa {
|
7 |
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char *name;
|
8 |
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char *title;
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9 |
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char *desc;
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10 |
87 |
lampret |
char *oper32;
|
11 |
|
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char *oper64;
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12 |
14 |
lampret |
char *except;
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13 |
|
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int class;
|
14 |
87 |
lampret |
int printed;
|
15 |
14 |
lampret |
};
|
16 |
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|
17 |
87 |
lampret |
#define ORBIS32I 1
|
18 |
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#define ORBIS32II 2
|
19 |
|
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#define ORBIS64I 3
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20 |
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#define ORBIS64II 4
|
21 |
|
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#define ORFPX32I 5
|
22 |
|
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#define ORFPX32II 6
|
23 |
|
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#define ORFPX64I 7
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24 |
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#define ORFPX64II 8
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25 |
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#define ORVDX64I 9
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26 |
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#define ORVDX64II 10
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27 |
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|
28 |
14 |
lampret |
static struct or1k_isa or1k_isa_info[] =
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29 |
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{
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30 |
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|
31 |
87 |
lampret |
/*** ORBIS32 ***/
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32 |
14 |
lampret |
|
33 |
87 |
lampret |
{"l.addi", "Add Immediate Signed",
|
34 |
487 |
markom |
"The immediate value is signed-extended and added to the contents of general-purpose"
|
35 |
87 |
lampret |
"register rA to form the result. The result is placed into general-purpose"
|
36 |
|
|
"register rD.",
|
37 |
95 |
lampret |
"rD[31:0] <- rA[31:0] + exts(Immediate)\\SR[CY] <- carry\\SR[OV] <- overflow",
|
38 |
|
|
"rD[63:0] <- rA[63:0] + exts(Immediate)\\SR[CY] <- carry\\SR[OV] <- overflow",
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39 |
1108 |
lampret |
"Range Exception", ORBIS32I,},
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40 |
14 |
lampret |
|
41 |
87 |
lampret |
{"l.andi", "And with Immediate Half Word",
|
42 |
487 |
markom |
"The immediate value is zero-extended and combined with the contents "
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43 |
623 |
markom |
"of general-purpose register rA in a bit-wise logical AND operation. The "
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44 |
87 |
lampret |
"result is placed into general-purpose register rD.",
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45 |
623 |
markom |
"rD[31:0] <- rA[31:0] AND extz(Immediate)",
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46 |
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"rD[63:0] <- rA[63:0] AND extz(Immediate)",
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47 |
87 |
lampret |
"None", ORBIS32I,},
|
48 |
14 |
lampret |
|
49 |
87 |
lampret |
{"l.ori", "Or with Immediate Half Word",
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50 |
487 |
markom |
"The immediate value is zero-extended and combined with the contents "
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51 |
623 |
markom |
"of general-purpose register rA in a bit-wise logical OR operation. The "
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52 |
87 |
lampret |
"result is placed into general-purpose register rD.",
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53 |
155 |
simons |
"rD[31:0] <- rA[31:0] OR extz(Immediate)",
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54 |
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"rD[63:0] <- rA[63:0] OR extz(Immediate)",
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55 |
87 |
lampret |
"None", ORBIS32I,},
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56 |
14 |
lampret |
|
57 |
87 |
lampret |
{"l.xori", "Exclusive Or with Immediate Half Word",
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58 |
487 |
markom |
"The immediate value is zero-extended and combined with the contents of general-purpose "
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59 |
623 |
markom |
"register rA in a bit-wise logical XOR operation. The result is "
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60 |
87 |
lampret |
"placed into general-purpose register rD.",
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61 |
623 |
markom |
"rD[31:0] <- rA[31:0] XOR extz(Immediate)",
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62 |
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"rD[63:0] <- rA[63:0] XOR extz(Immediate)",
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63 |
87 |
lampret |
"None", ORBIS32I,},
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64 |
14 |
lampret |
|
65 |
87 |
lampret |
{"l.slli", "Shift Left Logical with Immediate",
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66 |
487 |
markom |
"The 6-bit immediate value specifies the number of "
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67 |
955 |
markom |
"bit positions; the contents of general-purpose register rA are shifted left, "
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68 |
487 |
markom |
"inserting zeros into the low-order bits. The result is written into general-purpose "
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69 |
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"register rD.",
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70 |
87 |
lampret |
"rD[31:L] <- rA[31-L:0]\\rD[L-1:0] <- 0",
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71 |
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"rD[63:L] <- rA[63-L:0]\\rD[L-1:0] <- 0",
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72 |
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"None", ORBIS32I,},
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73 |
14 |
lampret |
|
74 |
87 |
lampret |
{"l.srai", "Shift Right Arithmetic with Immediate",
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75 |
487 |
markom |
"The 6-bit immediate value specifies the number of "
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76 |
955 |
markom |
"bit positions; the contents of general-purpose register rA are shifted right, "
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77 |
487 |
markom |
"sign-extending the high-order bits. The result is written into "
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78 |
87 |
lampret |
"general-purpose register rD.",
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79 |
623 |
markom |
"rD[31-L:0] <- rA[31:L]\\rD[31:32-L] <- \{rA[31]\}",
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80 |
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"rD[63-L:0] <- rA[63:L]\\rD[63:64-L] <- \{rA[63]\}",
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81 |
87 |
lampret |
"None", ORBIS32I,},
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82 |
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|
83 |
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{"l.srli", "Shift Right Logical with Immediate",
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84 |
487 |
markom |
"The 6-bit immediate value specifies the number of "
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85 |
955 |
markom |
"bit positions; the contents of general-purpose register rA are shifted right, "
|
86 |
487 |
markom |
"inserting zeros into the high-order bits. The result is written into general-purpose "
|
87 |
87 |
lampret |
"register rD.",
|
88 |
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"rD[31-L:0] <- rA[31:L]\\rD[31:32-L] <- 0",
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89 |
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"rD[63-L:0] <- rA[63:L]\\rD[63:64-L] <- 0",
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90 |
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"None", ORBIS32I,},
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91 |
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92 |
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{"l.rori", "Rotate Right with Immediate",
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93 |
487 |
markom |
"The 6-bit immediate value specifies the number of "
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94 |
955 |
markom |
"bit positions; the contents of general-purpose register rA are rotated right. "
|
95 |
487 |
markom |
"The result is written into general-purpose register rD.",
|
96 |
87 |
lampret |
"rD[31-L:0] <- rA[31:L]\\rD[31:32-L] <- rA[L-1:0]",
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97 |
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"rD[63-L:0] <- rA[63:L]\\rD[63:64-L] <- rA[L-1:0]",
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98 |
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"None", ORBIS32I,},
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99 |
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100 |
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{"l.muli", "Multiply Immediate Signed",
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101 |
955 |
markom |
"The immediate value and the contents of general-purpose register rA are "
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102 |
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|
"multiplied, and the result is truncated to destination register width and placed into "
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103 |
87 |
lampret |
"general-purpose register rD.",
|
104 |
623 |
markom |
"rD[31:0] <- rA[31:0] * Immediate\\SR[OV] <- overflow\\SR[CY] <- carry",
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105 |
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"rD[63:0] <- rA[63:0] * Immediate\\SR[OV] <- overflow\\SR[CY] <- carry",
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106 |
1108 |
lampret |
"Range Exception", ORBIS32I,},
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107 |
87 |
lampret |
|
108 |
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|
{"l.exths", "Extend Half Word with Sign",
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109 |
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"Bit 15 of general-purpose register rA is placed in high-order bits of "
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110 |
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|
"general-purpose register rD. The low-order 16 bits of general-purpose register rA "
|
111 |
487 |
markom |
"are copied into the low-order 16 bits of general-purpose register rD.",
|
112 |
623 |
markom |
"rD[31:16] <- \{rA[15]\}\\rD[15:0] <- rA[15:0]",
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113 |
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"rD[63:16] <- \{rA[15]\}\\rD[15:0] <- rA[15:0]",
|
114 |
87 |
lampret |
"None", ORBIS32II,},
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115 |
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116 |
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{"l.extbs", "Extend Byte with Sign",
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117 |
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"Bit 7 of general-purpose register rA is placed in high-order bits of "
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118 |
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"general-purpose register rD. The low-order eight bits of general-purpose register rA "
|
119 |
623 |
markom |
"are copied into the low-order eight bits of general-purpose register rD.",
|
120 |
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"rD[31:8] <- \{rA[7]\}\\rD[7:0] <- rA[7:0]",
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121 |
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"rD[63:8] <- \{rA[7]\}\\rD[7:0] <- rA[7:0]",
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122 |
87 |
lampret |
"None", ORBIS32II,},
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123 |
|
|
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124 |
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{"l.extbz", "Extend Byte with Zero",
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125 |
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"Zero is placed in high-order bits of "
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126 |
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"general-purpose register rD. The low-order eight bits of general-purpose register rA "
|
127 |
487 |
markom |
"are copied into the low-order eight bits of general-purpose register rD.",
|
128 |
87 |
lampret |
"rD[31:8] <- 0\\rD[7:0] <- rA[7:0]",
|
129 |
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"rD[63:8] <- 0\\rD[7:0] <- rA[7:0]",
|
130 |
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"None", ORBIS32II,},
|
131 |
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|
|
132 |
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{"l.exthz", "Extend Half Word with Zero",
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133 |
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|
"Zero is placed in high-order bits of "
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134 |
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"general-purpose register rD. The low-order 16 bits of general-purpose register rA "
|
135 |
487 |
markom |
"are copied into the low-order 16 bits of general-purpose register rD.",
|
136 |
87 |
lampret |
"rD[31:16] <- 0\\rD[15:0] <- rA[15:0]",
|
137 |
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"rD[63:16] <- 0\\rD[15:0] <- rA[15:0]",
|
138 |
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"None", ORBIS32II,},
|
139 |
|
|
|
140 |
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|
{"l.extwz", "Extend Word with Zero",
|
141 |
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|
"Zero is placed in high-order bits of "
|
142 |
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|
"general-purpose register rD. The low-order 32 bits of general-purpose register rA "
|
143 |
487 |
markom |
"are copied into the low-order 32 bits of general-purpose register rD.",
|
144 |
87 |
lampret |
"rD[31:0] <- rA[31:0]",
|
145 |
|
|
"rD[63:32] <- 0\\rD[31:0] <- rA[31:0]",
|
146 |
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|
"None", ORBIS64II,},
|
147 |
|
|
|
148 |
|
|
{"l.extws", "Extend Word with Sign",
|
149 |
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|
"Bit 31 of general-purpose register rA is placed in high-order bits of "
|
150 |
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|
"general-purpose register rD. The low-order 32 bits of general-purpose register rA "
|
151 |
|
|
"are copied from low-order 32 bits of general-purpose register rD.",
|
152 |
|
|
"rD[31:0] <- rA[31:0]",
|
153 |
623 |
markom |
"rD[63:32] <- \{rA[31]\}\\rD[31:0] <- rA[31:0]",
|
154 |
87 |
lampret |
"None", ORBIS64II,},
|
155 |
|
|
|
156 |
109 |
lampret |
{"l.cmov", "Conditional Move",
|
157 |
623 |
markom |
"If SR[F] is set, general-purpose register rA is placed in "
|
158 |
|
|
"general-purpose register rD. If SR[F] is cleared, general-purpose register rB "
|
159 |
109 |
lampret |
"is placed in general-purpose register rD.",
|
160 |
623 |
markom |
"rD[31:0] <- SR[F] ? rA[31:0] : rB[31:0]",
|
161 |
|
|
"rD[63:0] <- SR[F] ? rA[63:0] : rB[63:0]",
|
162 |
109 |
lampret |
"None", ORBIS32II,},
|
163 |
|
|
|
164 |
155 |
simons |
{"l.trap", "Trap",
|
165 |
1108 |
lampret |
"Execution of trap instruction results in the trap exception if specified bit in SR"
|
166 |
|
|
" is set. Trap exception is a request to the operating system or to the debug facility"
|
167 |
955 |
markom |
" to execute certain debug services. Immediate value is used to select which SR bit"
|
168 |
155 |
simons |
" is tested by trap instruction.",
|
169 |
1108 |
lampret |
"if SR[K] = 1 then trap-exception()",
|
170 |
|
|
"if SR[K] = 1 then trap-exception()",
|
171 |
155 |
simons |
"Trap exception", ORBIS32II,},
|
172 |
|
|
|
173 |
109 |
lampret |
{"l.ff1", "Find First 1",
|
174 |
|
|
"Position of the first '1' bit is written into general-purpose register rD. Checking for "
|
175 |
955 |
markom |
"bit '1' starts with MSB, and counting is decremented for every zero bit. If first '1' bit is "
|
176 |
|
|
"discovered in LSB, one is written into rD. If there is no '1' bit, zero is written in rD.",
|
177 |
623 |
markom |
"rD[31:0] <- rA[31] ? 32 : rA[30] ? 31 ... rA[0] ? 1 : 0",
|
178 |
|
|
"rD[63:0] <- rA[63] ? 64 : rA[62] ? 63 ... rA[0] ? 1 : 0",
|
179 |
109 |
lampret |
"None", ORBIS32II,},
|
180 |
|
|
|
181 |
87 |
lampret |
{"l.lbs", "Load Byte and Extend with Sign",
|
182 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
183 |
|
|
"register rA. The sum represents an effective address. The byte in memory "
|
184 |
14 |
lampret |
"addressed by EA is loaded into the low-order eight bits of "
|
185 |
87 |
lampret |
"general-purpose register rD. "
|
186 |
|
|
"High-order bits of general-purpose register rD are replaced with "
|
187 |
14 |
lampret |
"bit 7 of the loaded value.",
|
188 |
1113 |
lampret |
"EA <- exts(Immediate) + rA[31:0]\\rD[7:0] <- (EA)[7:0]\\rD[31:8] <- (EA)[7]",
|
189 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\rD[7:0] <- (EA)[7:0]\\rD[63:8] <- (EA)[7]",
|
190 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
191 |
14 |
lampret |
|
192 |
87 |
lampret |
{"l.lhs", "Load Half Word and Extend with Sign",
|
193 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
194 |
|
|
"register rA. The sum represents an effective address. The half word in memory "
|
195 |
14 |
lampret |
"addressed by EA is loaded into the low-order 16 bits of "
|
196 |
87 |
lampret |
"general-purpose register rD. "
|
197 |
|
|
"High-order bits of general-purpose register rD are replaced with "
|
198 |
14 |
lampret |
"bit 15 of the loaded value.",
|
199 |
1113 |
lampret |
"EA <- exts(Immediate) + rA[31:0]\\rD[15:0] <- (EA)[15:0]\\rD[31:16] <- (EA)[15]",
|
200 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\rD[15:0] <- (EA)[15:0]\\rD[63:16] <- (EA)[15]",
|
201 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
202 |
14 |
lampret |
|
203 |
87 |
lampret |
{"l.lws", "Load Single Word and Extend with Sign",
|
204 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
205 |
|
|
"register rA. The sum represents an effective address. The single word in memory "
|
206 |
87 |
lampret |
"addressed by EA is loaded into the low-order 32 bits of "
|
207 |
|
|
"general-purpose register rD. "
|
208 |
|
|
"High-order bits of general-purpose register rD are replaced with "
|
209 |
|
|
"bit 31 of the loaded value.",
|
210 |
|
|
"EA <- exts(Immediate) + rA[31:0]\\rD[31:0] <- (EA)[31:0]",
|
211 |
1113 |
lampret |
"EA <- exts(Immediate) + rA[63:0]\\rD[31:0] <- (EA)[31:0]\\rD[63:32] <- (EA)[31]",
|
212 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
213 |
87 |
lampret |
|
214 |
|
|
{"l.lbz", "Load Byte and Extend with Zero",
|
215 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
216 |
|
|
"register rA. The sum represents an effective address. The byte in memory "
|
217 |
14 |
lampret |
"addressed by EA is loaded into the low-order eight bits of "
|
218 |
87 |
lampret |
"general-purpose register rD. "
|
219 |
|
|
"High-order bits of general-purpose register rD are replaced with "
|
220 |
14 |
lampret |
"zero.",
|
221 |
87 |
lampret |
"EA <- exts(Immediate) + rA[31:0]\\rD[7:0] <- (EA)[7:0]\\rD[31:8] <- 0",
|
222 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\rD[7:0] <- (EA)[7:0]\\rD[63:8] <- 0",
|
223 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
224 |
14 |
lampret |
|
225 |
87 |
lampret |
{"l.lhz", "Load Half Word and Extend with Zero",
|
226 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
227 |
|
|
"register rA. The sum represents an effective address. The half word in memory "
|
228 |
14 |
lampret |
"addressed by EA is loaded into the low-order 16 bits of "
|
229 |
87 |
lampret |
"general-purpose register rD. "
|
230 |
|
|
"High-order bits of general-purpose register rD are replaced with "
|
231 |
14 |
lampret |
"zero.",
|
232 |
87 |
lampret |
"EA <- exts(Immediate) + rA[31:0]\\rD[15:0] <- (EA)[15:0]\\rD[31:16] <- 0",
|
233 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\rD[15:0] <- (EA)[15:0]\\rD[63:16] <- 0",
|
234 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
235 |
14 |
lampret |
|
236 |
87 |
lampret |
{"l.lwz", "Load Single Word and Extend with Zero",
|
237 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
238 |
|
|
"register rA. The sum represents an effective address. The single word in memory "
|
239 |
87 |
lampret |
"addressed by EA is loaded into the low-order 32 bits of "
|
240 |
|
|
"general-purpose register rD. "
|
241 |
|
|
"High-order bits of general-purpose register rD are replaced with "
|
242 |
|
|
"zero.",
|
243 |
|
|
"EA <- exts(Immediate) + rA[31:0]\\rD[31:0] <- (EA)[31:0]",
|
244 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\rD[31:0] <- (EA)[31:0]\\rD[63:32] <- 0",
|
245 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
246 |
14 |
lampret |
|
247 |
87 |
lampret |
{"l.ld", "Load Double Word",
|
248 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
249 |
|
|
"register rA. The sum represents an effective address. The double word in memory "
|
250 |
87 |
lampret |
"addressed by EA is loaded into general-purpose register rD. ",
|
251 |
|
|
"N/A",
|
252 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\rD[63:0] <- (EA)[63:0]",
|
253 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS64I,},
|
254 |
14 |
lampret |
|
255 |
87 |
lampret |
{"l.sd", "Store Double Word",
|
256 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
257 |
|
|
"register rA. The sum represents an effective address. The double word in "
|
258 |
95 |
lampret |
"general-purpose register rB is stored to memory location addressed by EA. ",
|
259 |
87 |
lampret |
"N/A",
|
260 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\(EA)[63:0] <- rB[63:0]",
|
261 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS64I,},
|
262 |
14 |
lampret |
|
263 |
87 |
lampret |
{"l.sw", "Store Single Word",
|
264 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
265 |
|
|
"register rA. The sum represents an effective address. The low-order 32 bits of "
|
266 |
95 |
lampret |
"general-purpose register rB are stored to memory location addressed by EA. ",
|
267 |
87 |
lampret |
"EA <- exts(Immediate) + rA[31:0]\\(EA)[31:0] <- rB[31:0]",
|
268 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\(EA)[31:0] <- rB[31:0]",
|
269 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
270 |
14 |
lampret |
|
271 |
87 |
lampret |
{"l.sh", "Store Half Word",
|
272 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
273 |
|
|
"register rA. The sum represents an effective address. The low-order 16 bits "
|
274 |
95 |
lampret |
"of general-purpose register rB are stored to memory location addressed by EA. ",
|
275 |
87 |
lampret |
"EA <- exts(Immediate) + rA[31:0]\\(EA)[15:0] <- rB[15:0]",
|
276 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\(EA)[15:0] <- rB[15:0]",
|
277 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
278 |
14 |
lampret |
|
279 |
87 |
lampret |
{"l.sb", "Store Byte",
|
280 |
487 |
markom |
"The offset is sign-extended and added to the contents of general-purpose "
|
281 |
|
|
"register rA. The sum represents an effective address. The low-order 8 bits "
|
282 |
95 |
lampret |
"of general-purpose register rB are stored to memory location addressed by EA. ",
|
283 |
87 |
lampret |
"EA <- exts(Immediate) + rA[31:0]\\(EA)[7:0] <- rB[7:0]",
|
284 |
|
|
"EA <- exts(Immediate) + rA[63:0]\\(EA)[7:0] <- rB[7:0]",
|
285 |
623 |
markom |
"TLB miss\\Page fault\\Bus error\\Alignment", ORBIS32I,},
|
286 |
14 |
lampret |
|
287 |
87 |
lampret |
{"l.add", "Add Signed",
|
288 |
487 |
markom |
"The contents of general-purpose register rA are added to the contents "
|
289 |
87 |
lampret |
"of general-purpose register rB to form the result. The result is placed into "
|
290 |
|
|
"general-purpose register rD.",
|
291 |
95 |
lampret |
"rD[31:0] <- rA[31:0] + rB[31:0]\\SR[CY] <- carry\\SR[OV] <- overflow",
|
292 |
|
|
"rD[63:0] <- rA[63:0] + rB[63:0]\\SR[CY] <- carry\\SR[OV] <- overflow",
|
293 |
|
|
"Range Exception", ORBIS32I,},
|
294 |
14 |
lampret |
|
295 |
87 |
lampret |
{"l.addc", "Add Signed and Carry",
|
296 |
487 |
markom |
"The contents of general-purpose register rA are added to the contents "
|
297 |
87 |
lampret |
"of general-purpose register rB and carry SR[CY] to form the result. "
|
298 |
|
|
"The result is placed into general-purpose register rD.",
|
299 |
623 |
markom |
"rD[31:0] <- rA[31:0] + rB[31:0] + SR[CY]\\SR[CY] <- carry\\SR[OV] <- overflow",
|
300 |
|
|
"rD[63:0] <- rA[63:0] + rB[63:0] + SR[CY]\\SR[CY] <- carry\\SR[OV] <- overflow",
|
301 |
95 |
lampret |
"Range Exception", ORBIS32I,},
|
302 |
14 |
lampret |
|
303 |
87 |
lampret |
{"l.sub", "Subtract Signed",
|
304 |
487 |
markom |
"The contents of general-purpose register rB are subtracted from the contents "
|
305 |
87 |
lampret |
"of general-purpose register rA to form the result. The result is placed into "
|
306 |
|
|
"general-purpose register rD.",
|
307 |
95 |
lampret |
"rD[31:0] <- rA[31:0] - rB[31:0]\\SR[CY] <- carry\\SR[OV] <- overflow",
|
308 |
|
|
"rD[63:0] <- rA[63:0] - rB[63:0]\\SR[CY] <- carry\\SR[OV] <- overflow",
|
309 |
|
|
"Range Exception", ORBIS32I,},
|
310 |
14 |
lampret |
|
311 |
87 |
lampret |
{"l.sll", "Shift Left Logical",
|
312 |
|
|
"General-purpose register rB specifies the number of "
|
313 |
955 |
markom |
"bit positions; the contents of general-purpose register rA are shifted left, "
|
314 |
487 |
markom |
"inserting zeros into the low-order bits. The result is written into general-purpose "
|
315 |
87 |
lampret |
"rD.",
|
316 |
1108 |
lampret |
"rD[31:rB[5:0]] <- rA[31-rB[5:0]:0]\\rD[rB[5:0]-1:0] <- 0",
|
317 |
|
|
"rD[63:rB[5:0]] <- rA[63-rB[5:0]:0]\\rD[rB[5:0]-1:0] <- 0",
|
318 |
87 |
lampret |
"None", ORBIS32I,},
|
319 |
14 |
lampret |
|
320 |
87 |
lampret |
{"l.sra", "Shift Right Arithmetic",
|
321 |
|
|
"General-purpose register rB specifies the number of "
|
322 |
955 |
markom |
"bit positions; the contents of general-purpose register rA are shifted right, "
|
323 |
487 |
markom |
"sign-extending the high-order bits. The result is written into "
|
324 |
87 |
lampret |
"general-purpose register rD.",
|
325 |
623 |
markom |
"rD[31-rB[5:0]:0] <- rA[31:rB[5:0]]\\rD[31:32-rB[5:0]] <- \{rA[31]\}",
|
326 |
|
|
"rD[63-rB[5:0]:0] <- rA[63:rB[5:0]]\\rD[63:64-rB[5:0]] <- \{rA[63]\}",
|
327 |
87 |
lampret |
"None", ORBIS32I,},
|
328 |
14 |
lampret |
|
329 |
87 |
lampret |
{"l.srl", "Shift Right Logical",
|
330 |
|
|
"General-purpose register rB specifies the number of "
|
331 |
955 |
markom |
"bit positions; the contents of general-purpose register rA are shifted right, "
|
332 |
487 |
markom |
"inserting zeros into the high-order bits. The result is written into general-purpose "
|
333 |
87 |
lampret |
"register rD.",
|
334 |
623 |
markom |
"rD[31-rB[5:0]:0] <- rA[31:rB[5:0]]\\rD[31:32-rB[5:0]] <- 0",
|
335 |
|
|
"rD[63-rB[5:0]:0] <- rA[63:rB[5:0]]\\rD[63:64-rB[5:0]] <- 0",
|
336 |
87 |
lampret |
"None", ORBIS32I,},
|
337 |
14 |
lampret |
|
338 |
87 |
lampret |
{"l.ror", "Rotate Right",
|
339 |
|
|
"General-purpose register rB specifies the number of "
|
340 |
955 |
markom |
"bit positions; the contents of general-purpose register rA are rotated right. "
|
341 |
487 |
markom |
"The result is written into general-purpose register rD.",
|
342 |
623 |
markom |
"rD[31-rB[5:0]:0] <- rA[31:rB]\\rD[31:32-rB[5:0]] <- rA[rB[5:0]-1:0]",
|
343 |
|
|
"rD[63-rB[5:0]:0] <- rA[63:rB]\\rD[63:64-rB[5:0]] <- rA[rB[5:0]-1:0]",
|
344 |
87 |
lampret |
"None", ORBIS32II,},
|
345 |
14 |
lampret |
|
346 |
87 |
lampret |
{"l.and", "And",
|
347 |
|
|
"The contents of general-purpose register rA are combined with the contents "
|
348 |
|
|
"of general-purpose register rB in a bit-wise logical AND operation. The "
|
349 |
|
|
"result is placed into general-purpose register rD.",
|
350 |
|
|
"rD[31:0] <- rA[31:0] AND rB[31:0]",
|
351 |
|
|
"rD[63:0] <- rA[63:0] AND rB[63:0]",
|
352 |
|
|
"None", ORBIS32I,},
|
353 |
14 |
lampret |
|
354 |
87 |
lampret |
{"l.or", "Or",
|
355 |
|
|
"The contents of general-purpose register rA are combined with the contents "
|
356 |
|
|
"of general-purpose register rB in a bit-wise logical OR operation. The "
|
357 |
|
|
"result is placed into general-purpose register rD.",
|
358 |
|
|
"rD[31:0] <- rA[31:0] OR rB[31:0]",
|
359 |
|
|
"rD[63:0] <- rA[63:0] OR rB[63:0]",
|
360 |
|
|
"None", ORBIS32I,},
|
361 |
14 |
lampret |
|
362 |
87 |
lampret |
{"l.xor", "Exclusive Or",
|
363 |
|
|
"The contents of general-purpose register rA are combined with the contents "
|
364 |
|
|
"of general-purpose register rB in a bit-wise logical XOR operation. The "
|
365 |
|
|
"result is placed into general-purpose register rD.",
|
366 |
|
|
"rD[31:0] <- rA[31:0] XOR rB[31:0]",
|
367 |
|
|
"rD[63:0] <- rA[63:0] XOR rB[63:0]",
|
368 |
|
|
"None", ORBIS32I,},
|
369 |
14 |
lampret |
|
370 |
623 |
markom |
{"l.mac0", "Multiply Signed",
|
371 |
|
|
"The contents of general-purpose register rA and the contents of general-purpose "
|
372 |
955 |
markom |
"register rB are multiplied, and the result is truncated to 32 bits and stored "
|
373 |
623 |
markom |
"into the special-purpose registers MACHI and MACLO. "
|
374 |
|
|
"All operands are treated as signed integers.",
|
375 |
|
|
"temp[31:0] <- rA[31:0] * rB[31:0]\\MACHI[31:0]MACLO[31:0] <- temp[31:0]\\",
|
376 |
|
|
"temp[31:0] <- rA[63:0] * rB[63:0]\\MACHI[31:0]MACLO[31:0] <- temp[31:0]\\",
|
377 |
|
|
"None", ORBIS32II,},
|
378 |
|
|
|
379 |
|
|
{"l.maci0", "Multiply Immediate Signed",
|
380 |
955 |
markom |
"The immediate value and the contents of general-purpose register rA are "
|
381 |
|
|
"multiplied, and the result is truncated to 32 bits and stored "
|
382 |
623 |
markom |
"into the special-purpose registers MACHI and MACLO. "
|
383 |
|
|
"All operands are treated as signed integers.",
|
384 |
|
|
"temp[31:0] <- rA[31:0] * Immediate\\MACHI[31:0]MACLO[31:0] <- temp[31:0]\\",
|
385 |
|
|
"temp[31:0] <- rA[63:0] * Immediate\\MACHI[31:0]MACLO[31:0] <- temp[31:0]\\",
|
386 |
|
|
"None", ORBIS32II,},
|
387 |
|
|
|
388 |
87 |
lampret |
{"l.mac", "Multiply Signed and Accumulate",
|
389 |
|
|
"The contents of general-purpose register rA and the contents of general-purpose "
|
390 |
955 |
markom |
"register rB are multiplied, and the result is truncated to 32 bits and added "
|
391 |
87 |
lampret |
"to the special-purpose registers MACHI and MACLO. "
|
392 |
|
|
"All operands are treated as signed integers.",
|
393 |
623 |
markom |
"temp[31:0] <- rA[31:0] * rB[31:0]\\MACHI[31:0]MACLO[31:0] <- temp[31:0] + MACHI[31:0]MACLO[31:0]\\",
|
394 |
|
|
"temp[31:0] <- rA[63:0] * rB[63:0]\\MACHI[31:0]MACLO[31:0] <- temp[31:0] + MACHI[31:0]MACLO[31:0]\\",
|
395 |
87 |
lampret |
"None", ORBIS32II,},
|
396 |
|
|
|
397 |
623 |
markom |
{"l.maci", "Multiply Immediate Signed and Accumulate",
|
398 |
955 |
markom |
"The immediate value and the contents of general-purpose register rA are "
|
399 |
|
|
"multiplied, and the result is truncated to 32 bits and added "
|
400 |
623 |
markom |
"to the special-purpose registers MACHI and MACLO. "
|
401 |
|
|
"All operands are treated as signed integers.",
|
402 |
|
|
"temp[31:0] <- rA[31:0] * Immediate\\MACHI[31:0]MACLO[31:0] <- temp[31:0] + MACHI[31:0]MACLO[31:0]\\",
|
403 |
|
|
"temp[31:0] <- rA[63:0] * Immediate\\MACHI[31:0]MACLO[31:0] <- temp[31:0] + MACHI[31:0]MACLO[31:0]\\",
|
404 |
|
|
"None", ORBIS32II,},
|
405 |
|
|
|
406 |
|
|
{"l.macr", "Read And Synchronize MAC",
|
407 |
487 |
markom |
"Once all instructions in MAC pipeline are completed, the contents of MAC is stored in "
|
408 |
623 |
markom |
"general-purpose register rD.",
|
409 |
155 |
simons |
"synchronize-mac\\"
|
410 |
623 |
markom |
"rD[31:0] <- MACLO[31:0]\\",
|
411 |
|
|
"synchronize-mac\\"
|
412 |
|
|
"rD[63:0] <- MACHI[31:0]MACLO[31:0]\\",
|
413 |
155 |
simons |
"None", ORBIS32II,},
|
414 |
|
|
|
415 |
87 |
lampret |
{"l.mul", "Multiply Signed",
|
416 |
|
|
"The contents of general-purpose register rA and the contents of general-purpose "
|
417 |
955 |
markom |
"register rB are multiplied, and the result is truncated to destination register width "
|
418 |
87 |
lampret |
"and placed into general-purpose register rD. "
|
419 |
155 |
simons |
"Both operands are treated as signed integers.",
|
420 |
623 |
markom |
"rD[31:0] <- rA[31:0] * rB[31:0]\\SR[OV] <- overflow\\SR[CY] <- carry",
|
421 |
|
|
"rD[63:0] <- rA[63:0] * rB[63:0]\\SR[OV] <- overflow\\SR[CY] <- carry",
|
422 |
1108 |
lampret |
"Range Exception", ORBIS32I,},
|
423 |
87 |
lampret |
|
424 |
|
|
{"l.mulu", "Multiply Unsigned",
|
425 |
|
|
"The contents of general-purpose register rA and the contents of general-purpose "
|
426 |
955 |
markom |
"register rB are multiplied, and the result is truncated to destination register width "
|
427 |
87 |
lampret |
"and placed into general-purpose register rD. "
|
428 |
|
|
"Both operands are treated as unsigned integers.",
|
429 |
623 |
markom |
"rD[31:0] <- rA[31:0] * rB[31:0]\\SR[OV] <- overflow\\SR[CY] <- carry",
|
430 |
|
|
"rD[63:0] <- rA[63:0] * rB[63:0]\\SR[OV] <- overflow\\SR[CY] <- carry",
|
431 |
1108 |
lampret |
"Range Exception", ORBIS32I,},
|
432 |
87 |
lampret |
|
433 |
|
|
{"l.div", "Divide Signed",
|
434 |
487 |
markom |
"The content of general-purpose register rA are divided by the content of "
|
435 |
955 |
markom |
"general-purpose register rB, and the result is placed into general-purpose register "
|
436 |
623 |
markom |
"rD. Both operands are treated as signed integers. A carry "
|
437 |
14 |
lampret |
"flag is set when the divisor is zero.",
|
438 |
623 |
markom |
"rD[31:0] <- rA[31:0] / rB[31:0]\\SR[OV] <- overflow\\SR[CY] <- carry",
|
439 |
|
|
"rD[63:0] <- rA[63:0] / rB[63:0]\\SR[OV] <- overflow\\SR[CY] <- carry",
|
440 |
1108 |
lampret |
"Range Exception", ORBIS32II,},
|
441 |
14 |
lampret |
|
442 |
87 |
lampret |
{"l.divu", "Divide Unsigned",
|
443 |
487 |
markom |
"The content of general-purpose register rA are divided by the content of "
|
444 |
955 |
markom |
"general-purpose register rA, and the result is placed into general-purpose register "
|
445 |
623 |
markom |
"rD. Both operands are treated as unsigned integers. A carry "
|
446 |
14 |
lampret |
"flag is set when the divisor is zero.",
|
447 |
623 |
markom |
"rD[31:0] <- rA[31:0] / rB[31:0]\\SR[OV] <- overflow\\SR[CY] <- carry",
|
448 |
|
|
"rD[63:0] <- rA[63:0] / rB[63:0]\\SR[OV] <- overflow\\SR[CY] <- carry",
|
449 |
1108 |
lampret |
"Range Exception", ORBIS32II,},
|
450 |
14 |
lampret |
|
451 |
87 |
lampret |
{"l.sfeq", "Set Flag if Equal",
|
452 |
487 |
markom |
"The contents of general-purpose registers rA and rB "
|
453 |
|
|
"are compared. If the contents are equal, "
|
454 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
455 |
155 |
simons |
"SR[F] <- rA[31:0] == rB[31:0]",
|
456 |
|
|
"SR[F] <- rA[63:0] == rB[63:0]",
|
457 |
87 |
lampret |
"None", ORBIS32I,},
|
458 |
14 |
lampret |
|
459 |
87 |
lampret |
{"l.sfne", "Set Flag if Not Equal",
|
460 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
461 |
|
|
"rB are compared. If the contents are not equal, "
|
462 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
463 |
155 |
simons |
"SR[F] <- rA[31:0] != rB[31:0]",
|
464 |
|
|
"SR[F] <- rA[63:0] != rB[63:0]",
|
465 |
87 |
lampret |
"None", ORBIS32I,},
|
466 |
14 |
lampret |
|
467 |
87 |
lampret |
{"l.sfgts", "Set Flag if Greater Than Signed",
|
468 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
469 |
|
|
"rB are compared as signed integers. If the contents "
|
470 |
14 |
lampret |
"of the first register are greater than the contents of the second "
|
471 |
|
|
"register, "
|
472 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
473 |
155 |
simons |
"SR[F] <- rA[31:0] > rB[31:0]",
|
474 |
|
|
"SR[F] <- rA[63:0] > rB[63:0]",
|
475 |
87 |
lampret |
"None", ORBIS32I,},
|
476 |
14 |
lampret |
|
477 |
87 |
lampret |
{"l.sfges", "Set Flag if Greater or Equal Than Signed",
|
478 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
479 |
|
|
"rB are compared as signed integers. If the contents "
|
480 |
955 |
markom |
"of the first register are greater than or equal to the contents of the second "
|
481 |
14 |
lampret |
"register, "
|
482 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
483 |
155 |
simons |
"SR[F] <- rA[31:0] >= rB[31:0]",
|
484 |
|
|
"SR[F] <- rA[63:0] >= rB[63:0]",
|
485 |
87 |
lampret |
"None", ORBIS32I,},
|
486 |
14 |
lampret |
|
487 |
87 |
lampret |
{"l.sflts", "Set Flag if Less Than Signed",
|
488 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
489 |
|
|
"rB are compared as signed integers. If the contents "
|
490 |
14 |
lampret |
"of the first register are less than the contents of the second "
|
491 |
|
|
"register, "
|
492 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
493 |
155 |
simons |
"SR[F] <- rA[31:0] < rB[31:0]",
|
494 |
|
|
"SR[F] <- rA[63:0] < rB[63:0]",
|
495 |
87 |
lampret |
"None", ORBIS32I,},
|
496 |
14 |
lampret |
|
497 |
87 |
lampret |
{"l.sfles", "Set Flag if Less or Equal Than Signed",
|
498 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
499 |
|
|
"rB are compared as signed integers. If the contents "
|
500 |
955 |
markom |
"of the first register are less than or equal to the contents of the second "
|
501 |
14 |
lampret |
"register, "
|
502 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
503 |
155 |
simons |
"SR[F] <- rA[31:0] <= rB[31:0]",
|
504 |
|
|
"SR[F] <- rA[63:0] <= rB[63:0]",
|
505 |
87 |
lampret |
"None", ORBIS32I,},
|
506 |
14 |
lampret |
|
507 |
87 |
lampret |
{"l.sfgtu", "Set Flag if Greater Than Unsigned",
|
508 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
509 |
|
|
"rB are compared as unsigned integers. If the contents "
|
510 |
14 |
lampret |
"of the first register are greater than the contents of the second "
|
511 |
|
|
"register, "
|
512 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
513 |
155 |
simons |
"SR[F] <- rA[31:0] > rB[31:0]",
|
514 |
|
|
"SR[F] <- rA[63:0] > rB[63:0]",
|
515 |
87 |
lampret |
"None", ORBIS32I,},
|
516 |
14 |
lampret |
|
517 |
87 |
lampret |
{"l.sfgeu", "Set Flag if Greater or Equal Than Unsigned",
|
518 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
519 |
|
|
"rB are compared as unsigned integers. If the contents "
|
520 |
955 |
markom |
"of the first register are greater than or equal to the contents of the second "
|
521 |
14 |
lampret |
"register, "
|
522 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
523 |
155 |
simons |
"SR[F] <- rA[31:0] >= rB[31:0]",
|
524 |
|
|
"SR[F] <- rA[63:0] >= rB[63:0]",
|
525 |
87 |
lampret |
"None", ORBIS32I,},
|
526 |
14 |
lampret |
|
527 |
87 |
lampret |
{"l.sfltu", "Set Flag if Less Than Unsigned",
|
528 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
529 |
|
|
"rB are compared as unsigned integers. If the contents "
|
530 |
14 |
lampret |
"of the first register are less than the contents of the second "
|
531 |
|
|
"register, "
|
532 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
533 |
155 |
simons |
"SR[F] <- rA[31:0] < rB[31:0]",
|
534 |
|
|
"SR[F] <- rA[63:0] < rB[63:0]",
|
535 |
87 |
lampret |
"None", ORBIS32I,},
|
536 |
14 |
lampret |
|
537 |
87 |
lampret |
{"l.sfleu", "Set Flag if Less or Equal Than Unsigned",
|
538 |
487 |
markom |
"The contents of general-purpose registers rA and "
|
539 |
|
|
"rB are compared as unsigned integers. If the contents "
|
540 |
955 |
markom |
"of the first register are less than or equal to the contents of the second "
|
541 |
14 |
lampret |
"register, "
|
542 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
543 |
155 |
simons |
"SR[F] <- rA[31:0] <= rB[31:0]",
|
544 |
|
|
"SR[F] <- rA[63:0] <= rB[63:0]",
|
545 |
87 |
lampret |
"None", ORBIS32I,},
|
546 |
14 |
lampret |
|
547 |
87 |
lampret |
{"l.sfeqi", "Set Flag if Equal Immediate",
|
548 |
487 |
markom |
"The contents of general-purpose register rA and the sign-extended immediate value "
|
549 |
|
|
"are compared. If the two values are equal, "
|
550 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
551 |
155 |
simons |
"SR[F] <- rA[31:0] == exts(Immediate)",
|
552 |
|
|
"SR[F] <- rA[63:0] == exts(Immediate)",
|
553 |
87 |
lampret |
"None", ORBIS32II,},
|
554 |
14 |
lampret |
|
555 |
87 |
lampret |
{"l.sfnei", "Set Flag if Not Equal Immediate",
|
556 |
|
|
"The contents of general-purpose register rA and "
|
557 |
487 |
markom |
"the sign-extended immediate value are compared. If the two values are not equal, "
|
558 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
559 |
155 |
simons |
"SR[F] <- rA[31:0] != exts(Immediate)",
|
560 |
|
|
"SR[F] <- rA[63:0] != exts(Immediate)",
|
561 |
87 |
lampret |
"None", ORBIS32II,},
|
562 |
14 |
lampret |
|
563 |
87 |
lampret |
{"l.sfgtsi", "Set Flag if Greater Than Immediate Signed",
|
564 |
|
|
"The contents of general-purpose register rA and "
|
565 |
487 |
markom |
"the sign-extended immediate value are compared as signed integers. If the contents "
|
566 |
|
|
"of the first register are greater than the immediate value "
|
567 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
568 |
155 |
simons |
"SR[F] <- rA[31:0] > exts(Immediate)",
|
569 |
|
|
"SR[F] <- rA[63:0] > exts(Immediate)",
|
570 |
87 |
lampret |
"None", ORBIS32II,},
|
571 |
14 |
lampret |
|
572 |
87 |
lampret |
{"l.sfgesi", "Set Flag if Greater or Equal Than Immediate Signed",
|
573 |
|
|
"The contents of general-purpose register rA and "
|
574 |
487 |
markom |
"the sign-extended immediate value are compared as signed integers. If the contents "
|
575 |
|
|
"of the first register are greater than or equal to the immediate value "
|
576 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
577 |
155 |
simons |
"SR[F] <- rA[31:0] >= exts(Immediate)",
|
578 |
|
|
"SR[F] <- rA[63:0] >= exts(Immediate)",
|
579 |
87 |
lampret |
"None", ORBIS32II,},
|
580 |
14 |
lampret |
|
581 |
87 |
lampret |
{"l.sfltsi", "Set Flag if Less Than Immediate Signed",
|
582 |
|
|
"The contents of general-purpose register rA and "
|
583 |
487 |
markom |
"the sign-extended immediate value are compared as signed integers. If the contents "
|
584 |
|
|
"of the first register are less than the immediate value "
|
585 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
586 |
155 |
simons |
"SR[F] <- rA[31:0] < exts(Immediate)",
|
587 |
|
|
"SR[F] <- rA[63:0] < exts(Immediate)",
|
588 |
87 |
lampret |
"None", ORBIS32II,},
|
589 |
14 |
lampret |
|
590 |
87 |
lampret |
{"l.sflesi", "Set Flag if Less or Equal Than Immediate Signed",
|
591 |
|
|
"The contents of general-purpose register rA and "
|
592 |
487 |
markom |
"the sign-extended immediate value are compared as signed integers. If the contents "
|
593 |
|
|
"of the first register are less than or equal to the immediate value "
|
594 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
595 |
155 |
simons |
"SR[F] <- rA[31:0] <= exts(Immediate)",
|
596 |
|
|
"SR[F] <- rA[63:0] <= exts(Immediate)",
|
597 |
87 |
lampret |
"None", ORBIS32II,},
|
598 |
14 |
lampret |
|
599 |
87 |
lampret |
{"l.sfgtui", "Set Flag if Greater Than Immediate Unsigned",
|
600 |
|
|
"The contents of general-purpose register rA and "
|
601 |
487 |
markom |
"the zero-extended immediate value are compared as unsigned integers. If the contents "
|
602 |
|
|
"of the first register are greater than the immediate value "
|
603 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
604 |
155 |
simons |
"SR[F] <- rA[31:0] > extz(Immediate)",
|
605 |
|
|
"SR[F] <- rA[63:0] > extz(Immediate)",
|
606 |
87 |
lampret |
"None", ORBIS32II,},
|
607 |
14 |
lampret |
|
608 |
87 |
lampret |
{"l.sfgeui", "Set Flag if Greater or Equal Than Immediate Unsigned",
|
609 |
|
|
"The contents of general-purpose register rA and "
|
610 |
487 |
markom |
"the zero-extended immediate value are compared as unsigned integers. If the contents "
|
611 |
|
|
"of the first register are greater than or equal to the immediate value "
|
612 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
613 |
155 |
simons |
"SR[F] <- rA[31:0] >= extz(Immediate)",
|
614 |
|
|
"SR[F] <- rA[63:0] >= extz(Immediate)",
|
615 |
87 |
lampret |
"None", ORBIS32II,},
|
616 |
|
|
|
617 |
|
|
{"l.sfltui", "Set Flag if Less Than Immediate Unsigned",
|
618 |
|
|
"The contents of general-purpose register rA and "
|
619 |
487 |
markom |
"the zero-extended immediate value are compared as unsigned integers. If the contents "
|
620 |
|
|
"of the first register are less than the immediate value "
|
621 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
622 |
155 |
simons |
"SR[F] <- rA[31:0] < extz(Immediate)",
|
623 |
|
|
"SR[F] <- rA[63:0] < extz(Immediate)",
|
624 |
87 |
lampret |
"None", ORBIS32II,},
|
625 |
|
|
|
626 |
|
|
{"l.sfleui", "Set Flag if Less or Equal Than Immediate Unsigned",
|
627 |
|
|
"The contents of general-purpose register rA and "
|
628 |
487 |
markom |
"the zero-extended immediate value are compared as unsigned integers. If the contents "
|
629 |
|
|
"of the first register are less than or equal to the immediate value "
|
630 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
631 |
155 |
simons |
"SR[F] <- rA[31:0] <= extz(Immediate)",
|
632 |
|
|
"SR[F] <- rA[63:0] <= extz(Immediate)",
|
633 |
87 |
lampret |
"None", ORBIS32II,},
|
634 |
|
|
|
635 |
95 |
lampret |
{"l.mtspr", "Move To Special-Purpose Register",
|
636 |
955 |
markom |
"The contents of general-purpose register rB are moved into the special register "
|
637 |
487 |
markom |
"identified by the sum of general-purpose register rA and the immediate value.",
|
638 |
1113 |
lampret |
"spr(rA OR Immediate) <- rB[31:0]",
|
639 |
|
|
"spr(rA OR Immediate) <- rB[31:0]",
|
640 |
87 |
lampret |
"None", ORBIS32I,},
|
641 |
|
|
|
642 |
95 |
lampret |
{"l.mfspr", "Move From Special-Purpose Register",
|
643 |
955 |
markom |
"The contents of the special register are identified by the sum of general-purpose rA, and "
|
644 |
487 |
markom |
"the immediate value are moved into general-purpose register rD.",
|
645 |
1113 |
lampret |
"rD[31:0] <- spr(rA OR Immediate)",
|
646 |
|
|
"rD[63:0] <- spr(rA OR Immediate)",
|
647 |
87 |
lampret |
"None", ORBIS32I,},
|
648 |
|
|
|
649 |
|
|
{"l.nop", "No Operation",
|
650 |
955 |
markom |
"This instruction does not do anything except that it takes at least one "
|
651 |
623 |
markom |
"clock cycle to complete. It is often used to fill delay slot gaps."
|
652 |
955 |
markom |
"Immediate value can be used for simulation purposes.",
|
653 |
155 |
simons |
"\\",
|
654 |
|
|
"\\",
|
655 |
87 |
lampret |
"None", ORBIS32I,},
|
656 |
|
|
|
657 |
|
|
{"l.movhi", "Move Immediate High",
|
658 |
955 |
markom |
"The 16-bit immediate value is zero-extended, shifted left by 16 bits, and placed "
|
659 |
87 |
lampret |
"into general-purpose register rD.",
|
660 |
623 |
markom |
"rD[31:0] <- extz(Immediate) << 16",
|
661 |
|
|
"rD[63:0] <- extz(Immediate) << 16",
|
662 |
87 |
lampret |
"None", ORBIS32I,},
|
663 |
|
|
|
664 |
14 |
lampret |
{"l.bf", "Branch if Flag",
|
665 |
487 |
markom |
"The immediate value is shifted left two bits, sign-extended to "
|
666 |
1113 |
lampret |
"program counter width, and then added to the address of the branch instruction. The result "
|
667 |
623 |
markom |
"is the effective address of the branch. If the flag is set, "
|
668 |
955 |
markom |
"the program branches "
|
669 |
87 |
lampret |
"to EA with a delay of one instruction.",
|
670 |
1113 |
lampret |
"EA <- exts(Immediate << 2) + BranchInsnAddr\\PC <- EA if SR[F] set",
|
671 |
|
|
"EA <- exts(Immediate << 2) + BranchInsnAddr\\PC <- EA if SR[F] set",
|
672 |
87 |
lampret |
"None", ORBIS32I,},
|
673 |
14 |
lampret |
|
674 |
|
|
{"l.bnf", "Branch if No Flag",
|
675 |
487 |
markom |
"The immediate value is shifted left two bits, sign-extended to "
|
676 |
1113 |
lampret |
"program counter width, and then added to the address of the branch instruction. The result "
|
677 |
623 |
markom |
"is the effective address of the branch. If the flag is cleared, "
|
678 |
955 |
markom |
"the program branches "
|
679 |
87 |
lampret |
"to EA with a delay of one instruction.",
|
680 |
1113 |
lampret |
"EA <- exts(Immediate << 2) + BranchInsnAddr\\PC <- EA if SR[F] cleared",
|
681 |
|
|
"EA <- exts(Immediate << 2) + BranchInsnAddr\\PC <- EA if SR[F] cleared",
|
682 |
87 |
lampret |
"None", ORBIS32I,},
|
683 |
14 |
lampret |
|
684 |
|
|
{"l.jal", "Jump and Link",
|
685 |
487 |
markom |
"The immediate value is shifted left two bits, sign-extended to "
|
686 |
1113 |
lampret |
"program counter width, and then added to the address of the jump instruction. The result "
|
687 |
487 |
markom |
"is the effective address of the jump. The program unconditionally jumps "
|
688 |
87 |
lampret |
"to EA with a delay of one instruction. The "
|
689 |
14 |
lampret |
"address of the instruction after the delay slot is placed in the "
|
690 |
|
|
"link register. ",
|
691 |
1113 |
lampret |
"PC <- exts(Immediate << 2) + JumpInsnAddr\\LR <- DelayInsnAddr + 4",
|
692 |
|
|
"PC <- exts(Immediate << 2) + JumpInsnAddr\\LR <- DelayInsnAddr + 4",
|
693 |
87 |
lampret |
"None", ORBIS32I,},
|
694 |
14 |
lampret |
|
695 |
|
|
{"l.j", "Jump",
|
696 |
487 |
markom |
"The immediate value is shifted left two bits, sign-extended to "
|
697 |
1113 |
lampret |
"program counter width, and then added to the address of the jump instruction. The result "
|
698 |
487 |
markom |
"is the effective address of the jump. The program unconditionally jumps "
|
699 |
87 |
lampret |
"to EA with a delay of one instruction.",
|
700 |
1113 |
lampret |
"PC <- exts(Immediate << 2) + JumpInsnAddr\\LR <- DelayInsnAddr + 4",
|
701 |
|
|
"PC <- exts(Immediate << 2) + JumpInsnAddr\\LR <- DelayInsnAddr + 4",
|
702 |
87 |
lampret |
"None", ORBIS32I,},
|
703 |
14 |
lampret |
|
704 |
87 |
lampret |
{"l.jalr", "Jump and Link Register",
|
705 |
|
|
"The contents of general-purpose register rB "
|
706 |
487 |
markom |
"is the effective address of the jump. The program unconditionally jumps "
|
707 |
87 |
lampret |
"to EA with a delay of one instruction. The "
|
708 |
14 |
lampret |
"address of the instruction after the delay slot is placed in the "
|
709 |
87 |
lampret |
"link register.",
|
710 |
|
|
"PC <- rB\\LR <- DelayInsnAddr + 4",
|
711 |
|
|
"PC <- rB\\LR <- DelayInsnAddr + 4",
|
712 |
|
|
"None", ORBIS32I,},
|
713 |
14 |
lampret |
|
714 |
87 |
lampret |
{"l.jr", "Jump Register",
|
715 |
|
|
"The contents of general-purpose register rB "
|
716 |
487 |
markom |
"is the effective address of the jump. The program unconditionally jumps "
|
717 |
87 |
lampret |
"to EA with a delay of one instruction.",
|
718 |
|
|
"PC <- rB",
|
719 |
|
|
"PC <- rB",
|
720 |
|
|
"None", ORBIS32I,},
|
721 |
14 |
lampret |
|
722 |
87 |
lampret |
{"l.sys", "System Call",
|
723 |
487 |
markom |
"Execution of the system call instruction results in the system call "
|
724 |
|
|
"exception. The system calls exception is a request to the operating system "
|
725 |
1113 |
lampret |
"to provide operating system services. The immediate value can be used to "
|
726 |
|
|
"specify which system service is requested, alternatively a GPR defined by "
|
727 |
|
|
"the ABI can be used to specify system service.",
|
728 |
|
|
"system-call-exception(K)",
|
729 |
|
|
"system-call-exception(K)",
|
730 |
623 |
markom |
"System Call", ORBIS32I,},
|
731 |
14 |
lampret |
|
732 |
89 |
lampret |
{"l.msync", "Memory Syncronization",
|
733 |
487 |
markom |
"Execution of the memory synchronization instruction results in completion "
|
734 |
89 |
lampret |
"of all load/store operations before the RISC core continues.",
|
735 |
|
|
"memory-synchronization",
|
736 |
|
|
"memory-synchronization",
|
737 |
|
|
"None", ORBIS32II,},
|
738 |
|
|
|
739 |
95 |
lampret |
{"l.psync", "Pipeline Syncronization",
|
740 |
|
|
"Execution of pipeline synchronization instruction results in completion "
|
741 |
|
|
"of all instructions that were fetched before l.psync instruction. Once all "
|
742 |
|
|
"instructions are completed, instructions fetched after l.psync are flushed from the "
|
743 |
|
|
" pipeline and fetched again.",
|
744 |
|
|
"pipeline-synchronization",
|
745 |
|
|
"pipeline-synchronization",
|
746 |
|
|
"None", ORBIS32II,},
|
747 |
|
|
|
748 |
|
|
{"l.csync", "Context Syncronization",
|
749 |
|
|
"Execution of context synchronization instruction results in completion "
|
750 |
487 |
markom |
"of all operations inside the processor and a flush of the instruction pipelines. "
|
751 |
955 |
markom |
"When all operations are complete, the RISC core resumes with an empty instruction pipeline and "
|
752 |
95 |
lampret |
"fresh context in all units (MMU for example).",
|
753 |
|
|
"context-synchronization",
|
754 |
|
|
"context-synchronization",
|
755 |
|
|
"None", ORBIS32II,},
|
756 |
|
|
|
757 |
87 |
lampret |
{"l.rfe", "Return From Exception",
|
758 |
623 |
markom |
"Execution of this instruction partially restores the state of the processor prior to "
|
759 |
|
|
"the exception. This instruction does not have a delay slot.",
|
760 |
1108 |
lampret |
"PC <- EPCR\\SR <- ESR",
|
761 |
|
|
"PC <- EPCR\\SR <- ESR",
|
762 |
87 |
lampret |
"None", ORBIS32I,},
|
763 |
14 |
lampret |
|
764 |
95 |
lampret |
{"l.cust1", "Reserved for ORBIS32/64 Custom Instructions",
|
765 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
766 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but rather "
|
767 |
95 |
lampret |
"by the implementation itself.",
|
768 |
|
|
"N/A",
|
769 |
|
|
"N/A",
|
770 |
|
|
"N/A", ORBIS32II,},
|
771 |
|
|
|
772 |
|
|
{"l.cust2", "Reserved for ORBIS32/64 Custom Instructions",
|
773 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
774 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but rather "
|
775 |
95 |
lampret |
"by the implementation itself.",
|
776 |
|
|
"N/A",
|
777 |
|
|
"N/A",
|
778 |
|
|
"N/A", ORBIS32II,},
|
779 |
|
|
|
780 |
|
|
{"l.cust3", "Reserved for ORBIS32/64 Custom Instructions",
|
781 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
782 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but rather "
|
783 |
95 |
lampret |
"by the implementation itself.",
|
784 |
|
|
"N/A",
|
785 |
|
|
"N/A",
|
786 |
|
|
"N/A", ORBIS32II,},
|
787 |
|
|
|
788 |
|
|
{"l.cust4", "Reserved for ORBIS32/64 Custom Instructions",
|
789 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
790 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but rather "
|
791 |
95 |
lampret |
"by the implementation itself.",
|
792 |
|
|
"N/A",
|
793 |
|
|
"N/A",
|
794 |
|
|
"N/A", ORBIS32II,},
|
795 |
|
|
|
796 |
|
|
{"l.cust5", "Reserved for ORBIS32/64 Custom Instructions",
|
797 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
798 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but rather "
|
799 |
95 |
lampret |
"by the implementation itself.",
|
800 |
|
|
"N/A",
|
801 |
|
|
"N/A",
|
802 |
|
|
"N/A", ORBIS32II,},
|
803 |
|
|
|
804 |
|
|
{"l.cust6", "Reserved for ORBIS32/64 Custom Instructions",
|
805 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
806 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but rather "
|
807 |
95 |
lampret |
"by the implementation itself.",
|
808 |
|
|
"N/A",
|
809 |
|
|
"N/A",
|
810 |
|
|
"N/A", ORBIS32II,},
|
811 |
|
|
|
812 |
|
|
{"l.cust7", "Reserved for ORBIS32/64 Custom Instructions",
|
813 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
814 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but rather "
|
815 |
95 |
lampret |
"by the implementation itself.",
|
816 |
|
|
"N/A",
|
817 |
|
|
"N/A",
|
818 |
|
|
"N/A", ORBIS32II,},
|
819 |
|
|
|
820 |
|
|
{"l.cust8", "Reserved for ORBIS32/64 Custom Instructions",
|
821 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
822 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but rather "
|
823 |
95 |
lampret |
"by the implementation itself.",
|
824 |
|
|
"N/A",
|
825 |
|
|
"N/A",
|
826 |
|
|
"N/A", ORBIS32II,},
|
827 |
|
|
|
828 |
87 |
lampret |
/*** ORFPX32 ***/
|
829 |
14 |
lampret |
|
830 |
87 |
lampret |
{"lf.add.s", "Add Floating-Point Single-Precision",
|
831 |
955 |
markom |
"The contents of vector/floating-point register vfrA are added to the contents "
|
832 |
87 |
lampret |
"of vector/floating-point register vfrB to form the result. The result is placed into "
|
833 |
|
|
"vector/floating-point register vfrD.",
|
834 |
|
|
"vfrD[31:0] <- vfrA[31:0] + vfrB[31:0]",
|
835 |
155 |
simons |
"N/A",
|
836 |
|
|
"None", ORFPX32I,},
|
837 |
14 |
lampret |
|
838 |
87 |
lampret |
{"lf.sub.s", "Subtract Floating-Point Single-Precision",
|
839 |
955 |
markom |
"The contents of vector/floating-point register vfrB are subtracted from the contents "
|
840 |
87 |
lampret |
"of vector/floating-point register vfrA to form the result. The result is placed into "
|
841 |
|
|
"vector/floating-point register vfrD.",
|
842 |
|
|
"vfrD[31:0] <- vfrA[31:0] - vfrB[31:0]",
|
843 |
155 |
simons |
"N/A",
|
844 |
|
|
"None", ORFPX32I,},
|
845 |
14 |
lampret |
|
846 |
87 |
lampret |
{"lf.mul.s", "Multiply Floating-Point Single-Precision",
|
847 |
955 |
markom |
"The contents of vector/floating-point register vfrA are multiplied by the contents "
|
848 |
87 |
lampret |
"of vector/floating-point register vfrB to form the result. The result is placed into "
|
849 |
|
|
"vector/floating-point register vfrD.",
|
850 |
|
|
"vfrD[31:0] <- vfrA[31:0] * vfrB[31:0]",
|
851 |
155 |
simons |
"N/A",
|
852 |
|
|
"None", ORFPX32I,},
|
853 |
14 |
lampret |
|
854 |
87 |
lampret |
{"lf.div.s", "Divide Floating-Point Single-Precision",
|
855 |
955 |
markom |
"The contents of vector/floating-point register vfrA are divided by the contents "
|
856 |
87 |
lampret |
"of vector/floating-point register vfrB to form the result. The result is placed into "
|
857 |
|
|
"vector/floating-point register vfrD.",
|
858 |
|
|
"vfrD[31:0] <- vfrA[31:0] / vfrB[31:0]",
|
859 |
155 |
simons |
"N/A",
|
860 |
|
|
"None", ORFPX32II,},
|
861 |
14 |
lampret |
|
862 |
87 |
lampret |
{"lf.rem.s", "Remainder Floating-Point Single-Precision",
|
863 |
955 |
markom |
"The contents of vector/floating-point register vfrA are divided by the contents "
|
864 |
|
|
"of vector/floating-point register vfrB, and remainder is used as the result. The result is placed into "
|
865 |
87 |
lampret |
"vector/floating-point register vfrD.",
|
866 |
|
|
"vfrD[31:0] <- vfrA[31:0] % vfrB[31:0]",
|
867 |
155 |
simons |
"N/A",
|
868 |
|
|
"None", ORFPX32II,},
|
869 |
14 |
lampret |
|
870 |
87 |
lampret |
{"lf.madd.s", "Multiply and Add Floating-Point Single-Precision",
|
871 |
955 |
markom |
"The contents of vector/floating-point register vfrA are multiplied by the contents "
|
872 |
|
|
"of vector/floating-point register vfrB, and added to special-purpose register "
|
873 |
87 |
lampret |
"FPMADDLO/FPMADDHI.",
|
874 |
|
|
"FPMADDHI[31:0]FPMADDLO[31:0] <- vfrA[31:0] * vfrB[31:0] + FPMADDHI[31:0]FPMADDLO[31:0]",
|
875 |
155 |
simons |
"N/A",
|
876 |
|
|
"None", ORFPX32II,},
|
877 |
14 |
lampret |
|
878 |
87 |
lampret |
{"lf.sfeq.s", "Set Flag if Equal Floating-Point Single-Precision",
|
879 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
880 |
|
|
"vector/floating-point register vfrB are compared. If the two registers are equal, "
|
881 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
882 |
155 |
simons |
"SR[F] <- vfrA[31:0] == vfrB[31:0]",
|
883 |
|
|
"N/A",
|
884 |
87 |
lampret |
"None", ORFPX32I,},
|
885 |
14 |
lampret |
|
886 |
87 |
lampret |
{"lf.sfne.s", "Set Flag if Not Equal Floating-Point Single-Precision",
|
887 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
888 |
|
|
"vector/floating-point register vfrB are compared. If the two registers are not equal, "
|
889 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
890 |
155 |
simons |
"SR[F] <- vfrA[31:0] != vfrB[31:0]",
|
891 |
|
|
"N/A",
|
892 |
87 |
lampret |
"None", ORFPX32I,},
|
893 |
14 |
lampret |
|
894 |
87 |
lampret |
{"lf.sfgt.s", "Set Flag if Greater Than Floating-Point Single-Precision",
|
895 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
896 |
487 |
markom |
"vector/floating-point register vfrB are compared. If the first register is greater than "
|
897 |
955 |
markom |
"the second register, the compare flag is set; otherwise the compare flag is cleared.",
|
898 |
155 |
simons |
"SR[F] <- vfrA[31:0] > vfrB[31:0]",
|
899 |
|
|
"N/A",
|
900 |
87 |
lampret |
"None", ORFPX32I,},
|
901 |
14 |
lampret |
|
902 |
87 |
lampret |
{"lf.sfge.s", "Set Flag if Greater or Equal Than Floating-Point Single-Precision",
|
903 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
904 |
955 |
markom |
"vector/floating-point register vfrB are compared. If the first register is greater than "
|
905 |
|
|
"or equal to the second register, the compare flag is set; otherwise the compare flag is cleared.",
|
906 |
155 |
simons |
"SR[F] <- vfrA[31:0] >= vfrB[31:0]",
|
907 |
|
|
"N/A",
|
908 |
87 |
lampret |
"None", ORFPX32I,},
|
909 |
14 |
lampret |
|
910 |
87 |
lampret |
{"lf.sflt.s", "Set Flag if Less Than Floating-Point Single-Precision",
|
911 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
912 |
955 |
markom |
"vector/floating-point register vfrB are compared. If the first register is less than the "
|
913 |
|
|
"second register, the compare flag is set; otherwise the compare flag is cleared.",
|
914 |
155 |
simons |
"SR[F] <- vfrA[31:0] < vfrB[31:0]",
|
915 |
|
|
"N/A",
|
916 |
87 |
lampret |
"None", ORFPX32I,},
|
917 |
|
|
|
918 |
|
|
{"lf.sfle.s", "Set Flag if Less or Equal Than Floating-Point Single-Precision",
|
919 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
920 |
955 |
markom |
"vector/floating-point register vfrB are compared. If the first register is less than "
|
921 |
|
|
"or equal to the second register, the compare flag is set; otherwise the compare flag is cleared.",
|
922 |
155 |
simons |
"SR[F] <- vfrA[31:0] <= vfrB[31:0]",
|
923 |
|
|
"N/A",
|
924 |
87 |
lampret |
"None", ORFPX32I,},
|
925 |
|
|
|
926 |
|
|
{"lf.ftoi.s", "Floating-Point Single-Precision To Integer",
|
927 |
487 |
markom |
"The contents of vector/floating-point register vfrA are converted to an integer "
|
928 |
87 |
lampret |
"and stored into general-purpose register rD.",
|
929 |
|
|
"rD[31:0] <- ftoi(vfrA[31:0])",
|
930 |
155 |
simons |
"N/A",
|
931 |
87 |
lampret |
"None", ORFPX32I,},
|
932 |
|
|
|
933 |
|
|
{"lf.itof.s", "Integer To Floating-Point Single-Precision",
|
934 |
487 |
markom |
"The contents of general-purpose register rA are converted to a single-precision "
|
935 |
87 |
lampret |
"floating-point number and stored into vector/floating-point register vfrD.",
|
936 |
|
|
"vfrD[31:0] <- itof(rA[31:0])",
|
937 |
155 |
simons |
"N/A",
|
938 |
87 |
lampret |
"None", ORFPX32I,},
|
939 |
|
|
|
940 |
95 |
lampret |
{"lf.cust1.s", "Reserved for ORFPX32 Custom Instructions",
|
941 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
942 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but instead "
|
943 |
95 |
lampret |
"by the implementation itself.",
|
944 |
|
|
"N/A",
|
945 |
|
|
"N/A",
|
946 |
|
|
"N/A", ORFPX32II,},
|
947 |
|
|
|
948 |
87 |
lampret |
/*** ORFPX64 ***/
|
949 |
|
|
|
950 |
|
|
{"lf.add.d", "Add Floating-Point Double-Precision",
|
951 |
487 |
markom |
"The contents of vector/floating-point register vfrA are added to the contents "
|
952 |
87 |
lampret |
"of vector/floating-point register vfrB to form the result. The result is placed into "
|
953 |
|
|
"vector/floating-point register vfrD.",
|
954 |
155 |
simons |
"N/A",
|
955 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] + vfrB[63:0]",
|
956 |
155 |
simons |
"None", ORFPX64I,},
|
957 |
87 |
lampret |
|
958 |
|
|
{"lf.sub.d", "Subtract Floating-Point Double-Precision",
|
959 |
487 |
markom |
"The contents of vector/floating-point register vfrB are subtracted from the contents "
|
960 |
87 |
lampret |
"of vector/floating-point register vfrA to form the result. The result is placed into "
|
961 |
|
|
"vector/floating-point register vfrD.",
|
962 |
155 |
simons |
"N/A",
|
963 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] - vfrB[63:0]",
|
964 |
155 |
simons |
"None", ORFPX64I,},
|
965 |
87 |
lampret |
|
966 |
|
|
{"lf.mul.d", "Multiply Floating-Point Double-Precision",
|
967 |
487 |
markom |
"The contents of vector/floating-point register vfrA are multiplied by the contents "
|
968 |
87 |
lampret |
"of vector/floating-point register vfrB to form the result. The result is placed into "
|
969 |
|
|
"vector/floating-point register vfrD.",
|
970 |
155 |
simons |
"N/A",
|
971 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] * vfrB[63:0]",
|
972 |
155 |
simons |
"None", ORFPX64I,},
|
973 |
87 |
lampret |
|
974 |
|
|
{"lf.div.d", "Divide Floating-Point Double-Precision",
|
975 |
487 |
markom |
"The contents of vector/floating-point register vfrA are divided by the contents "
|
976 |
87 |
lampret |
"of vector/floating-point register vfrB to form the result. The result is placed into "
|
977 |
|
|
"vector/floating-point register vfrD.",
|
978 |
155 |
simons |
"N/A",
|
979 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] / vfrB[63:0]",
|
980 |
155 |
simons |
"None", ORFPX64II,},
|
981 |
87 |
lampret |
|
982 |
|
|
{"lf.rem.d", "Remainder Floating-Point Double-Precision",
|
983 |
487 |
markom |
"The contents of vector/floating-point register vfrA are divided by the contents "
|
984 |
955 |
markom |
"of vector/floating-point register vfrB, and remainder is used as the result. The result is placed into "
|
985 |
87 |
lampret |
"vector/floating-point register vfrD.",
|
986 |
155 |
simons |
"N/A",
|
987 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] % vfrB[63:0]",
|
988 |
155 |
simons |
"None", ORFPX64II,},
|
989 |
87 |
lampret |
|
990 |
|
|
{"lf.madd.d", "Multiply and Add Floating-Point Double-Precision",
|
991 |
487 |
markom |
"The contents of vector/floating-point register vfrA are multiplied by the contents "
|
992 |
955 |
markom |
"of vector/floating-point register vfrB, and added to special-purpose register "
|
993 |
87 |
lampret |
"FPMADDLO/FPMADDHI.",
|
994 |
155 |
simons |
"N/A",
|
995 |
87 |
lampret |
"FPMADDHI[31:0]FPMADDLO[31:0] <- vfrA[63:0] * vfrB[63:0] + FPMADDHI[31:0]FPMADDLO[31:0]",
|
996 |
155 |
simons |
"None", ORFPX64II,},
|
997 |
87 |
lampret |
|
998 |
|
|
{"lf.sfeq.d", "Set Flag if Equal Floating-Point Double-Precision",
|
999 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
1000 |
|
|
"vector/floating-point register vfrB are compared. If the two registers are equal, "
|
1001 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
1002 |
155 |
simons |
"N/A",
|
1003 |
|
|
"SR[F] <- vfrA[63:0] == vfrB[63:0]",
|
1004 |
87 |
lampret |
"None", ORFPX64I,},
|
1005 |
|
|
|
1006 |
|
|
{"lf.sfne.d", "Set Flag if Not Equal Floating-Point Double-Precision",
|
1007 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
1008 |
|
|
"vector/floating-point register vfrB are compared. If the two registers are not equal, "
|
1009 |
955 |
markom |
"the compare flag is set; otherwise the compare flag is cleared.",
|
1010 |
155 |
simons |
"N/A",
|
1011 |
|
|
"SR[F] <- vfrA[63:0] != vfrB[63:0]",
|
1012 |
87 |
lampret |
"None", ORFPX64I,},
|
1013 |
|
|
|
1014 |
|
|
{"lf.sfgt.d", "Set Flag if Greater Than Floating-Point Double-Precision",
|
1015 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
1016 |
955 |
markom |
"vector/floating-point register vfrB are compared. If the first register is greater than the "
|
1017 |
|
|
"second register, the compare flag is set; otherwise the compare flag is cleared.",
|
1018 |
155 |
simons |
"N/A",
|
1019 |
|
|
"SR[F] <- vfrA[63:0] > vfrB[63:0]",
|
1020 |
87 |
lampret |
"None", ORFPX64I,},
|
1021 |
|
|
|
1022 |
|
|
{"lf.sfge.d", "Set Flag if Greater or Equal Than Floating-Point Double-Precision",
|
1023 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
1024 |
955 |
markom |
"vector/floating-point register vfrB are compared. If the first register is greater than "
|
1025 |
|
|
"or equal to the second register, the compare flag is set; otherwise the compare flag is cleared.",
|
1026 |
155 |
simons |
"N/A",
|
1027 |
|
|
"SR[F] <- vfrA[63:0] >= vfrB[63:0]",
|
1028 |
87 |
lampret |
"None", ORFPX64I,},
|
1029 |
|
|
|
1030 |
|
|
{"lf.sflt.d", "Set Flag if Less Than Floating-Point Double-Precision",
|
1031 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
1032 |
955 |
markom |
"vector/floating-point register vfrB are compared. If the first register is less than the "
|
1033 |
|
|
"second register, the compare flag is set; otherwise the compare flag is cleared.",
|
1034 |
155 |
simons |
"N/A",
|
1035 |
|
|
"SR[F] <- vfrA[63:0] < vfrB[63:0]",
|
1036 |
87 |
lampret |
"None", ORFPX64I,},
|
1037 |
|
|
|
1038 |
|
|
{"lf.sfle.d", "Set Flag if Less or Equal Than Floating-Point Double-Precision",
|
1039 |
|
|
"The contents of vector/floating-point register vfrA and the contents of "
|
1040 |
955 |
markom |
"vector/floating-point register vfrB are compared. If the first register is less than "
|
1041 |
|
|
"or equal to the second register, the compare flag is set; otherwise the compare flag is cleared.",
|
1042 |
155 |
simons |
"N/A",
|
1043 |
|
|
"SR[F] <- vfrA[363:0] <= vfrB[63:0]",
|
1044 |
87 |
lampret |
"None", ORFPX64I,},
|
1045 |
|
|
|
1046 |
|
|
{"lf.ftoi.d", "Floating-Point Double-Precision To Integer",
|
1047 |
487 |
markom |
"The contents of vector/floating-point register vfrA are converted to an integer "
|
1048 |
|
|
"and stored in general-purpose register rD.",
|
1049 |
155 |
simons |
"N/A",
|
1050 |
87 |
lampret |
"rD[63:0] <- ftoi(vfrA[63:0])",
|
1051 |
|
|
"None", ORFPX64I,},
|
1052 |
|
|
|
1053 |
|
|
{"lf.itof.d", "Integer To Floating-Point Double-Precision",
|
1054 |
955 |
markom |
"The contents of general-purpose register rA are converted to a double-precision "
|
1055 |
487 |
markom |
"floating-point number and stored in vector/floating-point register vfrD.",
|
1056 |
155 |
simons |
"N/A",
|
1057 |
87 |
lampret |
"vfrD[63:0] <- itof(rA[63:0])",
|
1058 |
|
|
"None", ORFPX64I,},
|
1059 |
|
|
|
1060 |
95 |
lampret |
{"lf.cust1.d", "Reserved for ORFPX64 Custom Instructions",
|
1061 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
1062 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but instead "
|
1063 |
95 |
lampret |
"by the implementation itself.",
|
1064 |
|
|
"N/A",
|
1065 |
|
|
"N/A",
|
1066 |
|
|
"N/A", ORFPX64II,},
|
1067 |
|
|
|
1068 |
87 |
lampret |
/*** ORVDX64 ***/
|
1069 |
|
|
|
1070 |
|
|
{"lv.all_eq.b", "Vector Byte Elements All Equal",
|
1071 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1072 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1073 |
|
|
"set if all corresponding elements are equal; otherwise the compare flag is cleared. "
|
1074 |
|
|
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1075 |
87 |
lampret |
"register vfrD.",
|
1076 |
155 |
simons |
"N/A",
|
1077 |
87 |
lampret |
"flag <- vfrA[7:0] == vfrB[7:0] \\"
|
1078 |
155 |
simons |
"\tvfrA[15:8] == vfrB[15:8] &&\\"
|
1079 |
|
|
"\tvfrA[23:16] == vfrB[23:16] &&\\"
|
1080 |
|
|
"\tvfrA[31:24] == vfrB[31:24] &&\\"
|
1081 |
|
|
"\tvfrA[39:32] == vfrB[39:32] &&\\"
|
1082 |
|
|
"\tvfrA[47:40] == vfrB[47:40] &&\\"
|
1083 |
|
|
"\tvfrA[55:48] == vfrB[55:48] &&\\"
|
1084 |
|
|
"\tvfrA[63:56] == vfrB[63:56]\\"
|
1085 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1086 |
|
|
"None", ORVDX64I,},
|
1087 |
|
|
|
1088 |
|
|
{"lv.all_eq.h", "Vector Half-Word Elements All Equal",
|
1089 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1090 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1091 |
|
|
"set if all corresponding elements are equal; otherwise the compare flag is cleared. "
|
1092 |
|
|
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1093 |
87 |
lampret |
"register vfrD.",
|
1094 |
155 |
simons |
"N/A",
|
1095 |
|
|
"flag <- vfrA[15:0] == vfrB[15:0] &&\\"
|
1096 |
|
|
"\tvfrA[31:16] == vfrB[31:16] &&\\"
|
1097 |
|
|
"\tvfrA[47:32] == vfrB[47:32] &&\\"
|
1098 |
|
|
"\tvfrA[63:48] == vfrB[63:48]\\"
|
1099 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1100 |
|
|
"None", ORVDX64I,},
|
1101 |
|
|
|
1102 |
487 |
markom |
{"lv.all_ge.b", "Vector Byte Elements All Greater Than or Equal To",
|
1103 |
87 |
lampret |
"All byte elements of vector/floating-point register vfrA are compared "
|
1104 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1105 |
|
|
"set if all elements of vfrA are greater than or equal to the elements of vfrB;"
|
1106 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1107 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1108 |
87 |
lampret |
"register vfrD.",
|
1109 |
155 |
simons |
"N/A",
|
1110 |
|
|
"flag <- vfrA[7:0] >= vfrB[7:0] &&\\"
|
1111 |
|
|
"\tvfrA[15:8] >= vfrB[15:8] &&\\"
|
1112 |
|
|
"\tvfrA[23:16] >= vfrB[23:16] &&\\"
|
1113 |
|
|
"\tvfrA[31:24] >= vfrB[31:24] &&\\"
|
1114 |
|
|
"\tvfrA[39:32] >= vfrB[39:32] &&\\"
|
1115 |
|
|
"\tvfrA[47:40] >= vfrB[47:40] &&\\"
|
1116 |
|
|
"\tvfrA[55:48] >= vfrB[55:48] &&\\"
|
1117 |
|
|
"\tvfrA[63:56] >= vfrB[63:56]\\"
|
1118 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1119 |
|
|
"None", ORVDX64I,},
|
1120 |
|
|
|
1121 |
487 |
markom |
{"lv.all_ge.h", "Vector Half-Word Elements All Greater Than or Equal To",
|
1122 |
87 |
lampret |
"All half-word elements of vector/floating-point register vfrA are compared "
|
1123 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1124 |
|
|
"set if all elements of vfrA are greater than or equal to the elements of vfrB;"
|
1125 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1126 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1127 |
87 |
lampret |
"register vfrD.",
|
1128 |
155 |
simons |
"N/A",
|
1129 |
|
|
"flag <- vfrA[15:0] >= vfrB[15:0] &&\\"
|
1130 |
|
|
"\tvfrA[31:16] >= vfrB[31:16] &&\\"
|
1131 |
|
|
"\tvfrA[47:32] >= vfrB[47:32] &&\\"
|
1132 |
|
|
"\tvfrA[63:48] >= vfrB[63:48]\\"
|
1133 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1134 |
|
|
"None", ORVDX64I,},
|
1135 |
|
|
|
1136 |
|
|
{"lv.all_gt.b", "Vector Byte Elements All Greater Than",
|
1137 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1138 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1139 |
|
|
"set if all elements of vfrA are greater than the elements of vfrB;"
|
1140 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1141 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1142 |
87 |
lampret |
"register vfrD.",
|
1143 |
155 |
simons |
"N/A",
|
1144 |
|
|
"flag <- vfrA[7:0] > vfrB[7:0] &&\\"
|
1145 |
|
|
"\tvfrA[15:8] > vfrB[15:8] &&\\"
|
1146 |
|
|
"\tvfrA[23:16] > vfrB[23:16] &&\\"
|
1147 |
|
|
"\tvfrA[31:24] > vfrB[31:24] &&\\"
|
1148 |
|
|
"\tvfrA[39:32] > vfrB[39:32] &&\\"
|
1149 |
|
|
"\tvfrA[47:40] > vfrB[47:40] &&\\"
|
1150 |
|
|
"\tvfrA[55:48] > vfrB[55:48] &&\\"
|
1151 |
|
|
"\tvfrA[63:56] > vfrB[63:56]\\"
|
1152 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1153 |
|
|
"None", ORVDX64I,},
|
1154 |
|
|
|
1155 |
|
|
{"lv.all_gt.h", "Vector Half-Word Elements All Greater Than",
|
1156 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1157 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1158 |
|
|
"set if all elements of vfrA are greater than the elements of vfrB;"
|
1159 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1160 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1161 |
87 |
lampret |
"register vfrD.",
|
1162 |
155 |
simons |
"N/A",
|
1163 |
|
|
"flag <- vfrA[15:0] > vfrB[15:0] &&\\"
|
1164 |
|
|
"\tvfrA[31:16] > vfrB[31:16] &&\\"
|
1165 |
|
|
"\tvfrA[47:32] > vfrB[47:32] &&\\"
|
1166 |
|
|
"\tvfrA[63:48] > vfrB[63:48]\\"
|
1167 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1168 |
|
|
"None", ORVDX64I,},
|
1169 |
|
|
|
1170 |
|
|
{"lv.all_lt.b", "Vector Byte Elements All Less Than",
|
1171 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1172 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1173 |
|
|
"set if all elements of vfrA are less than the elements of vfrB;"
|
1174 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1175 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1176 |
87 |
lampret |
"register vfrD.",
|
1177 |
155 |
simons |
"N/A",
|
1178 |
|
|
"flag <- vfrA[7:0] < vfrB[7:0] &&\\"
|
1179 |
|
|
"\tvfrA[15:8] < vfrB[15:8] &&\\"
|
1180 |
|
|
"\tvfrA[23:16] < vfrB[23:16] &&\\"
|
1181 |
|
|
"\tvfrA[31:24] < vfrB[31:24] &&\\"
|
1182 |
|
|
"\tvfrA[39:32] < vfrB[39:32] &&\\"
|
1183 |
|
|
"\tvfrA[47:40] < vfrB[47:40] &&\\"
|
1184 |
|
|
"\tvfrA[55:48] < vfrB[55:48] &&\\"
|
1185 |
|
|
"\tvfrA[63:56] < vfrB[63:56]\\"
|
1186 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1187 |
|
|
"None", ORVDX64I,},
|
1188 |
|
|
|
1189 |
|
|
{"lv.all_lt.h", "Vector Half-Word Elements All Less Than",
|
1190 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1191 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1192 |
|
|
"set if all elements of vfrA are less than the elements of vfrB;"
|
1193 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1194 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1195 |
87 |
lampret |
"register vfrD.",
|
1196 |
155 |
simons |
"N/A",
|
1197 |
|
|
"flag <- vfrA[15:0] < vfrB[15:0] &&\\"
|
1198 |
|
|
"\tvfrA[31:16] < vfrB[31:16] &&\\"
|
1199 |
|
|
"\tvfrA[47:32] < vfrB[47:32] &&\\"
|
1200 |
|
|
"\tvfrA[63:48] < vfrB[63:48]\\"
|
1201 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1202 |
|
|
"None", ORVDX64I,},
|
1203 |
|
|
|
1204 |
487 |
markom |
{"lv.all_le.b", "Vector Byte Elements All Less Than or Equal To",
|
1205 |
87 |
lampret |
"All byte elements of vector/floating-point register vfrA are compared "
|
1206 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1207 |
|
|
"set if all elements of vfrA are less than or equal to the elements of vfrB;"
|
1208 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1209 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1210 |
87 |
lampret |
"register vfrD.",
|
1211 |
155 |
simons |
"N/A",
|
1212 |
|
|
"flag <- vfrA[7:0] <= vfrB[7:0] &&\\"
|
1213 |
|
|
"\tvfrA[15:8] <= vfrB[15:8] &&\\"
|
1214 |
|
|
"\tvfrA[23:16] <= vfrB[23:16] &&\\"
|
1215 |
|
|
"\tvfrA[31:24] <= vfrB[31:24] &&\\"
|
1216 |
|
|
"\tvfrA[39:32] <= vfrB[39:32] &&\\"
|
1217 |
|
|
"\tvfrA[47:40] <= vfrB[47:40] &&\\"
|
1218 |
|
|
"\tvfrA[55:48] <= vfrB[55:48] &&\\"
|
1219 |
|
|
"\tvfrA[63:56] <= vfrB[63:56]\\"
|
1220 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1221 |
|
|
"None", ORVDX64I,},
|
1222 |
|
|
|
1223 |
487 |
markom |
{"lv.all_le.h", "Vector Half-Word Elements All Less Than or Equal To",
|
1224 |
87 |
lampret |
"All half-word elements of vector/floating-point register vfrA are compared "
|
1225 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1226 |
|
|
"set if all elements of vfrA are less than or equal to the elements of vfrB;"
|
1227 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1228 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1229 |
87 |
lampret |
"register vfrD.",
|
1230 |
155 |
simons |
"N/A",
|
1231 |
|
|
"flag <- vfrA[15:0] <= vfrB[15:0] &&\\"
|
1232 |
|
|
"\tvfrA[31:16] <= vfrB[31:16] &&\\"
|
1233 |
|
|
"\tvfrA[47:32] <= vfrB[47:32] &&\\"
|
1234 |
87 |
lampret |
"\tvfrA[63:48] <= vfrB[63:48]"
|
1235 |
|
|
"vfrD[63:0] <- repl(flag)",
|
1236 |
|
|
"None", ORVDX64I,},
|
1237 |
|
|
|
1238 |
|
|
{"lv.all_ne.b", "Vector Byte Elements All Not Equal",
|
1239 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1240 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1241 |
|
|
"set if all corresponding elements are not equal; otherwise the compare flag is cleared. "
|
1242 |
|
|
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1243 |
87 |
lampret |
"register vfrD.",
|
1244 |
155 |
simons |
"N/A",
|
1245 |
|
|
"flag <- vfrA[7:0] != vfrB[7:0] &&\\"
|
1246 |
|
|
"\tvfrA[15:8] != vfrB[15:8] &&\\"
|
1247 |
|
|
"\tvfrA[23:16] != vfrB[23:16] &&\\"
|
1248 |
|
|
"\tvfrA[31:24] != vfrB[31:24] &&\\"
|
1249 |
|
|
"\tvfrA[39:32] != vfrB[39:32] &&\\"
|
1250 |
|
|
"\tvfrA[47:40] != vfrB[47:40] &&\\"
|
1251 |
|
|
"\tvfrA[55:48] != vfrB[55:48] &&\\"
|
1252 |
|
|
"\tvfrA[63:56] != vfrB[63:56]\\"
|
1253 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1254 |
|
|
"None", ORVDX64I,},
|
1255 |
|
|
|
1256 |
|
|
{"lv.all_ne.h", "Vector Half-Word Elements All Not Equal",
|
1257 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1258 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1259 |
|
|
"set if all corresponding elements are not equal; otherwise the compare flag is cleared. "
|
1260 |
|
|
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1261 |
87 |
lampret |
"register vfrD.",
|
1262 |
155 |
simons |
"N/A",
|
1263 |
|
|
"flag <- vfrA[15:0] != vfrB[15:0] &&\\"
|
1264 |
|
|
"\tvfrA[31:16] != vfrB[31:16] &&\\"
|
1265 |
|
|
"\tvfrA[47:32] != vfrB[47:32] &&\\"
|
1266 |
|
|
"\tvfrA[63:48] != vfrB[63:48]\\"
|
1267 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1268 |
|
|
"None", ORVDX64I,},
|
1269 |
|
|
|
1270 |
|
|
{"lv.any_eq.b", "Vector Byte Elements Any Equal",
|
1271 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1272 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1273 |
|
|
"set if any two corresponding elements are equal; otherwise the compare flag is cleared. "
|
1274 |
|
|
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1275 |
87 |
lampret |
"register vfrD.",
|
1276 |
155 |
simons |
"N/A",
|
1277 |
87 |
lampret |
"flag <- vfrA[7:0] == vfrB[7:0] ||\\"
|
1278 |
|
|
"\tvfrA[15:8] == vfrB[15:8] ||\\"
|
1279 |
|
|
"\tvfrA[23:16] == vfrB[23:16] ||\\"
|
1280 |
|
|
"\tvfrA[31:24] == vfrB[31:24] ||\\"
|
1281 |
|
|
"\tvfrA[39:32] == vfrB[39:32] ||\\"
|
1282 |
|
|
"\tvfrA[47:40] == vfrB[47:40] ||\\"
|
1283 |
|
|
"\tvfrA[55:48] == vfrB[55:48] ||\\"
|
1284 |
155 |
simons |
"\tvfrA[63:56] == vfrB[63:56]\\"
|
1285 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1286 |
|
|
"None", ORVDX64I,},
|
1287 |
|
|
|
1288 |
|
|
{"lv.any_eq.h", "Vector Half-Word Elements Any Equal",
|
1289 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1290 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1291 |
|
|
"set if any two corresponding elements are equal; otherwise the compare flag is cleared. "
|
1292 |
|
|
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1293 |
87 |
lampret |
"register vfrD.",
|
1294 |
155 |
simons |
"N/A",
|
1295 |
87 |
lampret |
"flag <- vfrA[15:0] == vfrB[15:0] ||\\"
|
1296 |
|
|
"\tvfrA[31:16] == vfrB[31:16] ||\\"
|
1297 |
|
|
"\tvfrA[47:32] == vfrB[47:32] ||\\"
|
1298 |
155 |
simons |
"\tvfrA[63:48] == vfrB[63:48]\\"
|
1299 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1300 |
|
|
"None", ORVDX64I,},
|
1301 |
|
|
|
1302 |
487 |
markom |
{"lv.any_ge.b", "Vector Byte Elements Any Greater Than or Equal To",
|
1303 |
87 |
lampret |
"All byte elements of vector/floating-point register vfrA are compared "
|
1304 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1305 |
|
|
"set if any element of vfrA is greater than or equal to the corresponding element of vfrB;"
|
1306 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1307 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1308 |
87 |
lampret |
"register vfrD.",
|
1309 |
155 |
simons |
"N/A",
|
1310 |
87 |
lampret |
"flag <- vfrA[7:0] >= vfrB[7:0] ||\\"
|
1311 |
|
|
"\tvfrA[15:8] >= vfrB[15:8] ||\\"
|
1312 |
|
|
"\tvfrA[23:16] >= vfrB[23:16] ||\\"
|
1313 |
|
|
"\tvfrA[31:24] >= vfrB[31:24] ||\\"
|
1314 |
|
|
"\tvfrA[39:32] >= vfrB[39:32] ||\\"
|
1315 |
|
|
"\tvfrA[47:40] >= vfrB[47:40] ||\\"
|
1316 |
|
|
"\tvfrA[55:48] >= vfrB[55:48] ||\\"
|
1317 |
155 |
simons |
"\tvfrA[63:56] >= vfrB[63:56]\\"
|
1318 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1319 |
|
|
"None", ORVDX64I,},
|
1320 |
|
|
|
1321 |
487 |
markom |
{"lv.any_ge.h", "Vector Half-Word Elements Any Greater Than or Equal To",
|
1322 |
87 |
lampret |
"All half-word elements of vector/floating-point register vfrA are compared "
|
1323 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1324 |
|
|
"set if any element of vfrA is greater than or equal to the corresponding element of vfrB;"
|
1325 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1326 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1327 |
87 |
lampret |
"register vfrD.",
|
1328 |
155 |
simons |
"N/A",
|
1329 |
87 |
lampret |
"flag <- vfrA[15:0] >= vfrB[15:0] ||\\"
|
1330 |
|
|
"\tvfrA[31:16] >= vfrB[31:16] ||\\"
|
1331 |
|
|
"\tvfrA[47:32] >= vfrB[47:32] ||\\"
|
1332 |
155 |
simons |
"\tvfrA[63:48] >= vfrB[63:48]\\"
|
1333 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1334 |
|
|
"None", ORVDX64I,},
|
1335 |
|
|
|
1336 |
|
|
{"lv.any_gt.b", "Vector Byte Elements Any Greater Than",
|
1337 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1338 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1339 |
|
|
"set if any element of vfrA is greater than the corresponding element of vfrB;"
|
1340 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1341 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1342 |
87 |
lampret |
"register vfrD.",
|
1343 |
155 |
simons |
"N/A",
|
1344 |
87 |
lampret |
"flag <- vfrA[7:0] > vfrB[7:0] ||\\"
|
1345 |
|
|
"\tvfrA[15:8] > vfrB[15:8] ||\\"
|
1346 |
|
|
"\tvfrA[23:16] > vfrB[23:16] ||\\"
|
1347 |
|
|
"\tvfrA[31:24] > vfrB[31:24] ||\\"
|
1348 |
|
|
"\tvfrA[39:32] > vfrB[39:32] ||\\"
|
1349 |
|
|
"\tvfrA[47:40] > vfrB[47:40] ||\\"
|
1350 |
|
|
"\tvfrA[55:48] > vfrB[55:48] ||\\"
|
1351 |
155 |
simons |
"\tvfrA[63:56] > vfrB[63:56]\\"
|
1352 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1353 |
|
|
"None", ORVDX64I,},
|
1354 |
|
|
|
1355 |
|
|
{"lv.any_gt.h", "Vector Half-Word Elements Any Greater Than",
|
1356 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1357 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1358 |
|
|
"set if any element of vfrA is greater than the corresponding element of vfrB;"
|
1359 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1360 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1361 |
87 |
lampret |
"register vfrD.",
|
1362 |
155 |
simons |
"N/A",
|
1363 |
87 |
lampret |
"flag <- vfrA[15:0] > vfrB[15:0] ||\\"
|
1364 |
|
|
"\tvfrA[31:16] > vfrB[31:16] ||\\"
|
1365 |
|
|
"\tvfrA[47:32] > vfrB[47:32] ||\\"
|
1366 |
155 |
simons |
"\tvfrA[63:48] > vfrB[63:48]\\"
|
1367 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1368 |
|
|
"None", ORVDX64I,},
|
1369 |
|
|
|
1370 |
|
|
{"lv.any_lt.b", "Vector Byte Elements Any Less Than",
|
1371 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1372 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1373 |
|
|
"set if any element of vfrA is less than the corresponding element of vfrB;"
|
1374 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1375 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1376 |
87 |
lampret |
"register vfrD.",
|
1377 |
155 |
simons |
"N/A",
|
1378 |
87 |
lampret |
"flag <- vfrA[7:0] < vfrB[7:0] ||\\"
|
1379 |
|
|
"\tvfrA[15:8] < vfrB[15:8] ||\\"
|
1380 |
|
|
"\tvfrA[23:16] < vfrB[23:16] ||\\"
|
1381 |
|
|
"\tvfrA[31:24] < vfrB[31:24] ||\\"
|
1382 |
|
|
"\tvfrA[39:32] < vfrB[39:32] ||\\"
|
1383 |
|
|
"\tvfrA[47:40] < vfrB[47:40] ||\\"
|
1384 |
|
|
"\tvfrA[55:48] < vfrB[55:48] ||\\"
|
1385 |
155 |
simons |
"\tvfrA[63:56] < vfrB[63:56]\\"
|
1386 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1387 |
|
|
"None", ORVDX64I,},
|
1388 |
|
|
|
1389 |
|
|
{"lv.any_lt.h", "Vector Half-Word Elements Any Less Than",
|
1390 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1391 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1392 |
|
|
"set if any element of vfrA is less than the corresponding element of vfrB;"
|
1393 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1394 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1395 |
87 |
lampret |
"register vfrD.",
|
1396 |
155 |
simons |
"N/A",
|
1397 |
87 |
lampret |
"flag <- vfrA[15:0] < vfrB[15:0] ||\\"
|
1398 |
|
|
"\tvfrA[31:16] < vfrB[31:16] ||\\"
|
1399 |
|
|
"\tvfrA[47:32] < vfrB[47:32] ||\\"
|
1400 |
155 |
simons |
"\tvfrA[63:48] < vfrB[63:48]\\"
|
1401 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1402 |
|
|
"None", ORVDX64I,},
|
1403 |
|
|
|
1404 |
487 |
markom |
{"lv.any_le.b", "Vector Byte Elements Any Less Than or Equal To",
|
1405 |
87 |
lampret |
"All byte elements of vector/floating-point register vfrA are compared "
|
1406 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1407 |
|
|
"set if any element of vfrA is less than or equal to the corresponding element of vfrB;"
|
1408 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1409 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1410 |
87 |
lampret |
"register vfrD.",
|
1411 |
155 |
simons |
"N/A",
|
1412 |
87 |
lampret |
"flag <- vfrA[7:0] <= vfrB[7:0] ||\\"
|
1413 |
|
|
"\tvfrA[15:8] <= vfrB[15:8] ||\\"
|
1414 |
|
|
"\tvfrA[23:16] <= vfrB[23:16] ||\\"
|
1415 |
|
|
"\tvfrA[31:24] <= vfrB[31:24] ||\\"
|
1416 |
|
|
"\tvfrA[39:32] <= vfrB[39:32] ||\\"
|
1417 |
|
|
"\tvfrA[47:40] <= vfrB[47:40] ||\\"
|
1418 |
|
|
"\tvfrA[55:48] <= vfrB[55:48] ||\\"
|
1419 |
155 |
simons |
"\tvfrA[63:56] <= vfrB[63:56]\\"
|
1420 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1421 |
|
|
"None", ORVDX64I,},
|
1422 |
|
|
|
1423 |
487 |
markom |
{"lv.any_le.h", "Vector Half-Word Elements Any Less Than or Equal To",
|
1424 |
87 |
lampret |
"All half-word elements of vector/floating-point register vfrA are compared "
|
1425 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1426 |
|
|
"set if any element of vfrA is less than or equal to the corresponding element of vfrB;"
|
1427 |
955 |
markom |
" otherwise the compare flag is cleared. "
|
1428 |
487 |
markom |
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1429 |
87 |
lampret |
"register vfrD.",
|
1430 |
155 |
simons |
"N/A",
|
1431 |
87 |
lampret |
"flag <- vfrA[15:0] ,= vfrB[15:0] ||\\"
|
1432 |
|
|
"\tvfrA[31:16] <= vfrB[31:16] ||\\"
|
1433 |
|
|
"\tvfrA[47:32] <= vfrB[47:32] ||\\"
|
1434 |
155 |
simons |
"\tvfrA[63:48] <= vfrB[63:48]\\"
|
1435 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1436 |
|
|
"None", ORVDX64I,},
|
1437 |
|
|
|
1438 |
|
|
{"lv.any_ne.b", "Vector Byte Elements Any Not Equal",
|
1439 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1440 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. The compare flag is "
|
1441 |
|
|
"set if any two corresponding elements are not equal; otherwise the compare flag is cleared. "
|
1442 |
|
|
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1443 |
87 |
lampret |
"register vfrD.",
|
1444 |
155 |
simons |
"N/A",
|
1445 |
87 |
lampret |
"flag <- vfrA[7:0] != vfrB[7:0] ||\\"
|
1446 |
|
|
"\tvfrA[15:8] != vfrB[15:8] ||\\"
|
1447 |
|
|
"\tvfrA[23:16] != vfrB[23:16] ||\\"
|
1448 |
|
|
"\tvfrA[31:24] != vfrB[31:24] ||\\"
|
1449 |
|
|
"\tvfrA[39:32] != vfrB[39:32] ||\\"
|
1450 |
|
|
"\tvfrA[47:40] != vfrB[47:40] ||\\"
|
1451 |
|
|
"\tvfrA[55:48] != vfrB[55:48] ||\\"
|
1452 |
155 |
simons |
"\tvfrA[63:56] != vfrB[63:56]\\"
|
1453 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1454 |
|
|
"None", ORVDX64I,},
|
1455 |
|
|
|
1456 |
|
|
{"lv.any_ne.h", "Vector Half-Word Elements Any Not Equal",
|
1457 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1458 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. The compare flag is "
|
1459 |
|
|
"set if any two corresponding elements are not equal; otherwise the compare flag is cleared. "
|
1460 |
|
|
"\\The compare flag is replicated into all bit positions of vector/floating-point "
|
1461 |
87 |
lampret |
"register vfrD.",
|
1462 |
155 |
simons |
"N/A",
|
1463 |
87 |
lampret |
"flag <- vfrA[15:0] != vfrB[15:0] ||\\"
|
1464 |
|
|
"\tvfrA[31:16] != vfrB[31:16] ||\\"
|
1465 |
|
|
"\tvfrA[47:32] != vfrB[47:32] ||\\"
|
1466 |
155 |
simons |
"\tvfrA[63:48] != vfrB[63:48]\\"
|
1467 |
87 |
lampret |
"vfrD[63:0] <- repl(flag)",
|
1468 |
|
|
"None", ORVDX64I,},
|
1469 |
|
|
|
1470 |
|
|
{"lv.cmp_eq.b", "Vector Byte Elements Compare Equal",
|
1471 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1472 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. Bits of the element "
|
1473 |
|
|
"in vector/floating-point register vfrD are set if the two corresponding compared "
|
1474 |
|
|
"elements are equal; otherwise the element bits are cleared. ",
|
1475 |
155 |
simons |
"N/A",
|
1476 |
87 |
lampret |
"vfrD[7:0] <- repl(vfrA[7:0] == vfrB[7:0]\\"
|
1477 |
|
|
"vfrD[15:8] <- repl(vfrA[15:8] == vfrB[15:8]\\"
|
1478 |
|
|
"vfrD[23:16] <- repl(vfrA[23:16] == vfrB[23:16]\\"
|
1479 |
|
|
"vfrD[31:24] <- repl(vfrA[31:24] == vfrB[31:24]\\"
|
1480 |
|
|
"vfrD[39:32] <- repl(vfrA[39:32] == vfrB[39:32]\\"
|
1481 |
|
|
"vfrD[47:40] <- repl(vfrA[47:40] == vfrB[47:40]\\"
|
1482 |
|
|
"vfrD[55:48] <- repl(vfrA[55:48] == vfrB[55:48]\\"
|
1483 |
|
|
"vfrD[63:56] <- repl(vfrA[63:56] == vfrB[63:56]\\",
|
1484 |
|
|
"None", ORVDX64I,},
|
1485 |
|
|
|
1486 |
|
|
{"lv.cmp_eq.h", "Vector Half-Word Elements Compare Equal",
|
1487 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1488 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. Bits of the element "
|
1489 |
|
|
"in vector/floating-point register vfrD are set if the two corresponding compared "
|
1490 |
|
|
"elements are equal; otherwise the element bits are cleared. ",
|
1491 |
155 |
simons |
"N/A",
|
1492 |
87 |
lampret |
"vfrD[15:0] <- repl(vfrA[7:0] == vfrB[7:0]\\"
|
1493 |
|
|
"vfrD[31:16] <- repl(vfrA[23:16] == vfrB[23:16]\\"
|
1494 |
|
|
"vfrD[47:32] <- repl(vfrA[39:32] == vfrB[39:32]\\"
|
1495 |
|
|
"vfrD[63:48] <- repl(vfrA[55:48] == vfrB[55:48]\\",
|
1496 |
|
|
"None", ORVDX64I,},
|
1497 |
|
|
|
1498 |
487 |
markom |
{"lv.cmp_ge.b", "Vector Byte Elements Compare Greater Than or Equal To",
|
1499 |
87 |
lampret |
"All byte elements of vector/floating-point register vfrA are compared "
|
1500 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. Bits of the element "
|
1501 |
|
|
"in vector/floating-point register vfrD are set if the element in vfrA is "
|
1502 |
|
|
"greater than or equal to the element in vfrB; otherwise the element bits are cleared. ",
|
1503 |
155 |
simons |
"N/A",
|
1504 |
87 |
lampret |
"vfrD[7:0] <- repl(vfrA[7:0] >= vfrB[7:0]\\"
|
1505 |
|
|
"vfrD[15:8] <- repl(vfrA[15:8] >= vfrB[15:8]\\"
|
1506 |
|
|
"vfrD[23:16] <- repl(vfrA[23:16] >= vfrB[23:16]\\"
|
1507 |
|
|
"vfrD[31:24] <- repl(vfrA[31:24] >= vfrB[31:24]\\"
|
1508 |
|
|
"vfrD[39:32] <- repl(vfrA[39:32] >= vfrB[39:32]\\"
|
1509 |
|
|
"vfrD[47:40] <- repl(vfrA[47:40] >= vfrB[47:40]\\"
|
1510 |
|
|
"vfrD[55:48] <- repl(vfrA[55:48] >= vfrB[55:48]\\"
|
1511 |
|
|
"vfrD[63:56] <- repl(vfrA[63:56] >= vfrB[63:56]\\",
|
1512 |
|
|
"None", ORVDX64I,},
|
1513 |
|
|
|
1514 |
487 |
markom |
{"lv.cmp_ge.h", "Vector Half-Word Elements Compare Greater Than or Equal To",
|
1515 |
87 |
lampret |
"All half-word elements of vector/floating-point register vfrA are compared "
|
1516 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. Bits of the element "
|
1517 |
|
|
"in vector/floating-point register vfrD are set if the element in vfrA is "
|
1518 |
|
|
"greater than or equal to the element in vfrB; otherwise the element bits are cleared. ",
|
1519 |
155 |
simons |
"N/A",
|
1520 |
87 |
lampret |
"vfrD[15:0] <- repl(vfrA[7:0] >= vfrB[7:0]\\"
|
1521 |
|
|
"vfrD[31:16] <- repl(vfrA[23:16] >= vfrB[23:16]\\"
|
1522 |
|
|
"vfrD[47:32] <- repl(vfrA[39:32] >= vfrB[39:32]\\"
|
1523 |
|
|
"vfrD[63:48] <- repl(vfrA[55:48] >= vfrB[55:48]\\",
|
1524 |
|
|
"None", ORVDX64I,},
|
1525 |
|
|
|
1526 |
|
|
{"lv.cmp_gt.b", "Vector Byte Elements Compare Greater Than",
|
1527 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1528 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. Bits of the element "
|
1529 |
|
|
"in vector/floating-point register vfrD are set if the element in vfrA is "
|
1530 |
|
|
"greater than the element in vfrB; otherwise the element bits are cleared. ",
|
1531 |
155 |
simons |
"N/A",
|
1532 |
87 |
lampret |
"vfrD[7:0] <- repl(vfrA[7:0] > vfrB[7:0]\\"
|
1533 |
|
|
"vfrD[15:8] <- repl(vfrA[15:8] > vfrB[15:8]\\"
|
1534 |
|
|
"vfrD[23:16] <- repl(vfrA[23:16] > vfrB[23:16]\\"
|
1535 |
|
|
"vfrD[31:24] <- repl(vfrA[31:24] > vfrB[31:24]\\"
|
1536 |
|
|
"vfrD[39:32] <- repl(vfrA[39:32] > vfrB[39:32]\\"
|
1537 |
|
|
"vfrD[47:40] <- repl(vfrA[47:40] > vfrB[47:40]\\"
|
1538 |
|
|
"vfrD[55:48] <- repl(vfrA[55:48] > vfrB[55:48]\\"
|
1539 |
|
|
"vfrD[63:56] <- repl(vfrA[63:56] > vfrB[63:56]\\",
|
1540 |
|
|
"None", ORVDX64I,},
|
1541 |
|
|
|
1542 |
|
|
{"lv.cmp_gt.h", "Vector Half-Word Elements Compare Greater Than",
|
1543 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1544 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. Bits of the element "
|
1545 |
|
|
"in vector/floating-point register vfrD are set if the element in vfrA is "
|
1546 |
|
|
"greater than the element in vfrB; otherwise the element bits are cleared. ",
|
1547 |
155 |
simons |
"N/A",
|
1548 |
87 |
lampret |
"vfrD[15:0] <- repl(vfrA[7:0] > vfrB[7:0]\\"
|
1549 |
|
|
"vfrD[31:16] <- repl(vfrA[23:16] > vfrB[23:16]\\"
|
1550 |
|
|
"vfrD[47:32] <- repl(vfrA[39:32] > vfrB[39:32]\\"
|
1551 |
|
|
"vfrD[63:48] <- repl(vfrA[55:48] > vfrB[55:48]\\",
|
1552 |
|
|
"None", ORVDX64I,},
|
1553 |
|
|
|
1554 |
487 |
markom |
{"lv.cmp_le.b", "Vector Byte Elements Compare Less Than or Equal To",
|
1555 |
87 |
lampret |
"All byte elements of vector/floating-point register vfrA are compared "
|
1556 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. Bits of the element "
|
1557 |
|
|
"in vector/floating-point register vfrD are set if the element in vfrA is "
|
1558 |
|
|
"less than or equal to the element in vfrB; otherwise the element bits are cleared. ",
|
1559 |
155 |
simons |
"N/A",
|
1560 |
87 |
lampret |
"vfrD[7:0] <- repl(vfrA[7:0] <= vfrB[7:0]\\"
|
1561 |
|
|
"vfrD[15:8] <- repl(vfrA[15:8] <= vfrB[15:8]\\"
|
1562 |
|
|
"vfrD[23:16] <- repl(vfrA[23:16] <= vfrB[23:16]\\"
|
1563 |
|
|
"vfrD[31:24] <- repl(vfrA[31:24] <= vfrB[31:24]\\"
|
1564 |
|
|
"vfrD[39:32] <- repl(vfrA[39:32] <= vfrB[39:32]\\"
|
1565 |
|
|
"vfrD[47:40] <- repl(vfrA[47:40] <= vfrB[47:40]\\"
|
1566 |
|
|
"vfrD[55:48] <- repl(vfrA[55:48] <= vfrB[55:48]\\"
|
1567 |
|
|
"vfrD[63:56] <- repl(vfrA[63:56] <= vfrB[63:56]\\",
|
1568 |
|
|
"None", ORVDX64I,},
|
1569 |
|
|
|
1570 |
487 |
markom |
{"lv.cmp_le.h", "Vector Half-Word Elements Compare Less Than or Equal To",
|
1571 |
87 |
lampret |
"All half-word elements of vector/floating-point register vfrA are compared "
|
1572 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. Bits of the element "
|
1573 |
|
|
"in vector/floating-point register vfrD are set if the element in vfrA is "
|
1574 |
|
|
"less than or equal to the element in vfrB; otherwise the element bits are cleared. ",
|
1575 |
155 |
simons |
"N/A",
|
1576 |
87 |
lampret |
"vfrD[15:0] <- repl(vfrA[7:0] <= vfrB[7:0]\\"
|
1577 |
|
|
"vfrD[31:16] <- repl(vfrA[23:16] <= vfrB[23:16]\\"
|
1578 |
|
|
"vfrD[47:32] <- repl(vfrA[39:32] <= vfrB[39:32]\\"
|
1579 |
|
|
"vfrD[63:48] <- repl(vfrA[55:48] <= vfrB[55:48]\\",
|
1580 |
|
|
"None", ORVDX64I,},
|
1581 |
|
|
|
1582 |
|
|
{"lv.cmp_lt.b", "Vector Byte Elements Compare Less Than",
|
1583 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1584 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. Bits of the element "
|
1585 |
|
|
"in vector/floating-point register vfrD are set if the element in vfrA is "
|
1586 |
|
|
"less than the element in vfrB; otherwise the element bits are cleared. ",
|
1587 |
155 |
simons |
"N/A",
|
1588 |
87 |
lampret |
"vfrD[7:0] <- repl(vfrA[7:0] <= vfrB[7:0]\\"
|
1589 |
|
|
"vfrD[15:8] <- repl(vfrA[15:8] <= vfrB[15:8]\\"
|
1590 |
|
|
"vfrD[23:16] <- repl(vfrA[23:16] <= vfrB[23:16]\\"
|
1591 |
|
|
"vfrD[31:24] <- repl(vfrA[31:24] <= vfrB[31:24]\\"
|
1592 |
|
|
"vfrD[39:32] <- repl(vfrA[39:32] <= vfrB[39:32]\\"
|
1593 |
|
|
"vfrD[47:40] <- repl(vfrA[47:40] <= vfrB[47:40]\\"
|
1594 |
|
|
"vfrD[55:48] <- repl(vfrA[55:48] <= vfrB[55:48]\\"
|
1595 |
|
|
"vfrD[63:56] <- repl(vfrA[63:56] <= vfrB[63:56]\\",
|
1596 |
|
|
"None", ORVDX64I,},
|
1597 |
|
|
|
1598 |
|
|
{"lv.cmp_lt.h", "Vector Half-Word Elements Compare Less Than",
|
1599 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1600 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. Bits of the element "
|
1601 |
|
|
"in vector/floating-point register vfrD are set if the element in vfrA is "
|
1602 |
|
|
"less than the element in vfrB; otherwise the element bits are cleared. ",
|
1603 |
155 |
simons |
"N/A",
|
1604 |
87 |
lampret |
"vfrD[15:0] <- repl(vfrA[7:0] <= vfrB[7:0]\\"
|
1605 |
|
|
"vfrD[31:16] <- repl(vfrA[23:16] <= vfrB[23:16]\\"
|
1606 |
|
|
"vfrD[47:32] <- repl(vfrA[39:32] <= vfrB[39:32]\\"
|
1607 |
|
|
"vfrD[63:48] <- repl(vfrA[55:48] <= vfrB[55:48]\\",
|
1608 |
|
|
"None", ORVDX64I,},
|
1609 |
|
|
|
1610 |
|
|
{"lv.cmp_ne.b", "Vector Byte Elements Compare Not Equal",
|
1611 |
|
|
"All byte elements of vector/floating-point register vfrA are compared "
|
1612 |
487 |
markom |
"to the byte elements of vector/floating-point register vfrB. Bits of the element "
|
1613 |
|
|
"in vector/floating-point register vfrD are set if the two corresponding compared "
|
1614 |
|
|
"elements are not equal; otherwise the element bits are cleared. ",
|
1615 |
155 |
simons |
"N/A",
|
1616 |
87 |
lampret |
"vfrD[7:0] <- repl(vfrA[7:0] != vfrB[7:0])\\"
|
1617 |
|
|
"vfrD[15:8] <- repl(vfrA[15:8] != vfrB[15:8])\\"
|
1618 |
|
|
"vfrD[23:16] <- repl(vfrA[23:16] != vfrB[23:16])\\"
|
1619 |
|
|
"vfrD[31:24] <- repl(vfrA[31:24] != vfrB[31:24])\\"
|
1620 |
|
|
"vfrD[39:32] <- repl(vfrA[39:32] != vfrB[39:32])\\"
|
1621 |
|
|
"vfrD[47:40] <- repl(vfrA[47:40] != vfrB[47:40])\\"
|
1622 |
|
|
"vfrD[55:48] <- repl(vfrA[55:48] != vfrB[55:48])\\"
|
1623 |
|
|
"vfrD[63:56] <- repl(vfrA[63:56] != vfrB[63:56])\\",
|
1624 |
|
|
"None", ORVDX64I,},
|
1625 |
|
|
|
1626 |
|
|
{"lv.cmp_ne.h", "Vector Half-Word Elements Compare Not Equal",
|
1627 |
|
|
"All half-word elements of vector/floating-point register vfrA are compared "
|
1628 |
487 |
markom |
"to the half-word elements of vector/floating-point register vfrB. Bits of the element "
|
1629 |
|
|
"in vector/floating-point register vfrD are set if the two corresponding compared "
|
1630 |
|
|
"elements are not equal; otherwise the element bits are cleared. ",
|
1631 |
155 |
simons |
"N/A",
|
1632 |
87 |
lampret |
"vfrD[15:0] <- repl(vfrA[7:0] != vfrB[7:0])\\"
|
1633 |
|
|
"vfrD[31:16] <- repl(vfrA[23:16] != vfrB[23:16])\\"
|
1634 |
|
|
"vfrD[47:32] <- repl(vfrA[39:32] != vfrB[39:32])\\"
|
1635 |
|
|
"vfrD[63:48] <- repl(vfrA[55:48] != vfrB[55:48])\\",
|
1636 |
|
|
"None", ORVDX64I,},
|
1637 |
|
|
|
1638 |
|
|
{"lv.and", "Vector And",
|
1639 |
|
|
"The contents of vector/floating-point register vfrA are combined with the contents "
|
1640 |
|
|
"of vector/floating-point register vfrB in a bit-wise logical AND operation. The "
|
1641 |
|
|
"result is placed into vector/floating-point register vfrD.",
|
1642 |
155 |
simons |
"N/A",
|
1643 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] AND vfrB[63:0]",
|
1644 |
|
|
"None", ORVDX64I,},
|
1645 |
|
|
|
1646 |
|
|
{"lv.nand", "Vector Not And",
|
1647 |
|
|
"The contents of vector/floating-point register vfrA are combined with the contents "
|
1648 |
|
|
"of vector/floating-point register vfrB in a bit-wise logical NAND operation. The "
|
1649 |
|
|
"result is placed into vector/floating-point register vfrD.",
|
1650 |
155 |
simons |
"N/A",
|
1651 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] NAND vfrB[63:0]",
|
1652 |
|
|
"None", ORVDX64I,},
|
1653 |
|
|
|
1654 |
|
|
{"lv.nor", "Vector Not Or",
|
1655 |
|
|
"The contents of vector/floating-point register vfrA are combined with the contents "
|
1656 |
|
|
"of vector/floating-point register vfrB in a bit-wise logical NOR operation. The "
|
1657 |
|
|
"result is placed into vector/floating-point register vfrD.",
|
1658 |
155 |
simons |
"N/A",
|
1659 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] NOR vfrB[63:0]",
|
1660 |
|
|
"None", ORVDX64I,},
|
1661 |
|
|
|
1662 |
|
|
{"lv.or", "Vector Or",
|
1663 |
|
|
"The contents of vector/floating-point register vfrA are combined with the contents "
|
1664 |
|
|
"of vector/floating-point register vfrB in a bit-wise logical OR operation. The "
|
1665 |
|
|
"result is placed into vector/floating-point register vfrD.",
|
1666 |
155 |
simons |
"N/A",
|
1667 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] OR vfrB[63:0]",
|
1668 |
|
|
"None", ORVDX64I,},
|
1669 |
|
|
|
1670 |
|
|
{"lv.xor", "Vector Exclusive Or",
|
1671 |
|
|
"The contents of vector/floating-point register vfrA are combined with the contents "
|
1672 |
|
|
"of vector/floating-point register vfrB in a bit-wise logical XOR operation. The "
|
1673 |
|
|
"result is placed into vector/floating-point register vfrD.",
|
1674 |
155 |
simons |
"N/A",
|
1675 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] XOR vfrB[63:0]",
|
1676 |
|
|
"None", ORVDX64I,},
|
1677 |
|
|
|
1678 |
|
|
{"lv.add.b", "Vector Byte Elements Add Signed",
|
1679 |
|
|
"The byte elements of vector/floating-point register vfrA are added to the byte elements "
|
1680 |
487 |
markom |
"of vector/floating-point register vfrB to form the result elements. The result "
|
1681 |
87 |
lampret |
"elements are placed into vector/floating-point register vfrD.",
|
1682 |
155 |
simons |
"N/A",
|
1683 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] + vfrB[7:0]\\"
|
1684 |
|
|
"vfrD[15:8] <- vfrA[15:8] + vfrB[15:8]\\"
|
1685 |
|
|
"vfrD[23:16] <- vfrA[23:16] + vfrB[23:16]\\"
|
1686 |
|
|
"vfrD[31:24] <- vfrA[31:24] + vfrB[31:24]\\"
|
1687 |
|
|
"vfrD[39:32] <- vfrA[39:32] + vfrB[39:32]\\"
|
1688 |
|
|
"vfrD[47:40] <- vfrA[47:40] + vfrB[47:40]\\"
|
1689 |
|
|
"vfrD[55:48] <- vfrA[55:48] + vfrB[55:48]\\"
|
1690 |
|
|
"vfrD[63:56] <- vfrA[63:56] + vfrB[63:56]",
|
1691 |
|
|
"None", ORVDX64I,},
|
1692 |
|
|
|
1693 |
|
|
{"lv.add.h", "Vector Half-Word Elements Add Signed",
|
1694 |
|
|
"The half-word elements of vector/floating-point register vfrA are added to the "
|
1695 |
|
|
"half-word elements of vector/floating-point register vfrB to form the result "
|
1696 |
487 |
markom |
"elements. The result elements are placed into vector/floating-point "
|
1697 |
87 |
lampret |
"register vfrD.",
|
1698 |
155 |
simons |
"N/A",
|
1699 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] + vfrB[15:0]\\"
|
1700 |
|
|
"vfrD[31:16] <- vfrA[31:16] + vfrB[31:16]\\"
|
1701 |
|
|
"vfrD[47:32] <- vfrA[47:32] + vfrB[47:32]\\"
|
1702 |
|
|
"vfrD[63:48] <- vfrA[63:48] + vfrB[63:48]\\",
|
1703 |
|
|
"None", ORVDX64I,},
|
1704 |
|
|
|
1705 |
|
|
{"lv.sub.b", "Vector Byte Elements Subtract Signed",
|
1706 |
|
|
"The byte elements of vector/floating-point register vfrB are subtracted from the "
|
1707 |
|
|
"byte elements of vector/floating-point register vfrA to form the result elements. "
|
1708 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
1709 |
155 |
simons |
"N/A",
|
1710 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] - vfrB[7:0]\\"
|
1711 |
|
|
"vfrD[15:8] <- vfrA[15:8] - vfrB[15:8]\\"
|
1712 |
|
|
"vfrD[23:16] <- vfrA[23:16] - vfrB[23:16]\\"
|
1713 |
|
|
"vfrD[31:24] <- vfrA[31:24] - vfrB[31:24]\\"
|
1714 |
|
|
"vfrD[39:32] <- vfrA[39:32] - vfrB[39:32]\\"
|
1715 |
|
|
"vfrD[47:40] <- vfrA[47:40] - vfrB[47:40]\\"
|
1716 |
|
|
"vfrD[55:48] <- vfrA[55:48] - vfrB[55:48]\\"
|
1717 |
|
|
"vfrD[63:56] <- vfrA[63:56] - vfrB[63:56]",
|
1718 |
|
|
"None", ORVDX64I,},
|
1719 |
|
|
|
1720 |
|
|
{"lv.sub.h", "Vector Half-Word Elements Subtract Signed",
|
1721 |
|
|
"The half-word elements of vector/floating-point register vfrB are subtracted from the "
|
1722 |
|
|
"half-word elements of vector/floating-point register vfrA to form the result "
|
1723 |
487 |
markom |
"elements. The result elements are placed into vector/floating-point "
|
1724 |
87 |
lampret |
"register vfrD.",
|
1725 |
155 |
simons |
"N/A",
|
1726 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] - vfrB[15:0]\\"
|
1727 |
|
|
"vfrD[31:16] <- vfrA[31:16] - vfrB[31:16]\\"
|
1728 |
|
|
"vfrD[47:32] <- vfrA[47:32] - vfrB[47:32]\\"
|
1729 |
|
|
"vfrD[63:48] <- vfrA[63:48] - vfrB[63:48]\\",
|
1730 |
|
|
"None", ORVDX64I,},
|
1731 |
|
|
|
1732 |
|
|
{"lv.adds.b", "Vector Byte Elements Add Signed Saturated",
|
1733 |
|
|
"The byte elements of vector/floating-point register vfrA are added to the byte elements "
|
1734 |
|
|
"of vector/floating-point register vfrB to form the result elements. If the result "
|
1735 |
487 |
markom |
"exceeds the min/max value for the destination data type, it is saturated to the min/max value "
|
1736 |
|
|
"and placed into vector/floating-point register vfrD.",
|
1737 |
155 |
simons |
"N/A",
|
1738 |
87 |
lampret |
"vfrD[7:0] <- sat8s(vfrA[7:0] + vfrB[7:0])\\"
|
1739 |
|
|
"vfrD[15:8] <- sat8s(vfrA[15:8] + vfrB[15:8])\\"
|
1740 |
|
|
"vfrD[23:16] <- sat8s(vfrA[23:16] + vfrB[23:16])\\"
|
1741 |
|
|
"vfrD[31:24] <- sat8s(vfrA[31:24] + vfrB[31:24])\\"
|
1742 |
|
|
"vfrD[39:32] <- sat8s(vfrA[39:32] + vfrB[39:32])\\"
|
1743 |
|
|
"vfrD[47:40] <- sat8s(vfrA[47:40] + vfrB[47:40])\\"
|
1744 |
|
|
"vfrD[55:48] <- sat8s(vfrA[55:48] + vfrB[55:48])\\"
|
1745 |
|
|
"vfrD[63:56] <- sat8s(vfrA[63:56] + vfrB[63:56])",
|
1746 |
|
|
"None", ORVDX64I,},
|
1747 |
|
|
|
1748 |
|
|
{"lv.adds.h", "Vector Half-Word Elements Add Signed Saturated",
|
1749 |
|
|
"The half-word elements of vector/floating-point register vfrA are added to the "
|
1750 |
|
|
"half-word elements of vector/floating-point register vfrB to form the result "
|
1751 |
487 |
markom |
"elements. If the result exceeds the min/max value for the destination data type, "
|
1752 |
|
|
"it is saturated to the min/max value and placed into vector/floating-point register vfrD.",
|
1753 |
155 |
simons |
"N/A",
|
1754 |
87 |
lampret |
"vfrD[15:0] <- sat16s(vfrA[15:0] + vfrB[15:0])\\"
|
1755 |
|
|
"vfrD[31:16] <- sat16s(vfrA[31:16] + vfrB[31:16])\\"
|
1756 |
|
|
"vfrD[47:32] <- sat16s(vfrA[47:32] + vfrB[47:32])\\"
|
1757 |
|
|
"vfrD[63:48] <- sat16s(vfrA[63:48] + vfrB[63:48])",
|
1758 |
|
|
"None", ORVDX64I,},
|
1759 |
|
|
|
1760 |
|
|
{"lv.subs.b", "Vector Byte Elements Subtract Signed Saturated",
|
1761 |
|
|
"The byte elements of vector/floating-point register vfrB are subtracted from the byte elements "
|
1762 |
|
|
"of vector/floating-point register vfrA to form the result elements. If the result "
|
1763 |
487 |
markom |
"exceeds the min/max value for the destination data type, it is saturated to the min/max value "
|
1764 |
87 |
lampret |
"and placed into vector/floating-point register vfrD.",
|
1765 |
155 |
simons |
"N/A",
|
1766 |
87 |
lampret |
"vfrD[7:0] <- sat8s(vfrA[7:0] + vfrB[7:0])\\"
|
1767 |
|
|
"vfrD[15:8] <- sat8s(vfrA[15:8] + vfrB[15:8])\\"
|
1768 |
|
|
"vfrD[23:16] <- sat8s(vfrA[23:16] + vfrB[23:16])\\"
|
1769 |
|
|
"vfrD[31:24] <- sat8s(vfrA[31:24] + vfrB[31:24])\\"
|
1770 |
|
|
"vfrD[39:32] <- sat8s(vfrA[39:32] + vfrB[39:32])\\"
|
1771 |
|
|
"vfrD[47:40] <- sat8s(vfrA[47:40] + vfrB[47:40])\\"
|
1772 |
|
|
"vfrD[55:48] <- sat8s(vfrA[55:48] + vfrB[55:48])\\"
|
1773 |
|
|
"vfrD[63:56] <- sat8s(vfrA[63:56] + vfrB[63:56])",
|
1774 |
|
|
"None", ORVDX64I,},
|
1775 |
|
|
|
1776 |
|
|
{"lv.subs.h", "Vector Half-Word Elements Subtract Signed Saturated",
|
1777 |
|
|
"The half-word elements of vector/floating-point register vfrB are subtracted from the "
|
1778 |
|
|
"half-word elements of vector/floating-point register vfrA to form the result "
|
1779 |
487 |
markom |
"elements. If the result exceeds the min/max value for the destination data type, "
|
1780 |
|
|
"it is saturated to the min/max value and placed into vector/floating-point register vfrD.",
|
1781 |
155 |
simons |
"N/A",
|
1782 |
87 |
lampret |
"vfrD[15:0] <- sat16s(vfrA[15:0] - vfrB[15:0])\\"
|
1783 |
|
|
"vfrD[31:16] <- sat16s(vfrA[31:16] - vfrB[31:16])\\"
|
1784 |
|
|
"vfrD[47:32] <- sat16s(vfrA[47:32] - vfrB[47:32])\\"
|
1785 |
|
|
"vfrD[63:48] <- sat16s(vfrA[63:48] - vfrB[63:48])",
|
1786 |
|
|
"None", ORVDX64I,},
|
1787 |
|
|
|
1788 |
|
|
{"lv.addu.b", "Vector Byte Elements Add Unsigned",
|
1789 |
|
|
"The unsigned byte elements of vector/floating-point register vfrA are added to "
|
1790 |
|
|
"the unsigned byte elements of vector/floating-point register vfrB to form the "
|
1791 |
487 |
markom |
"result elements. The result elements are placed into vector/floating-point register vfrD.",
|
1792 |
155 |
simons |
"N/A",
|
1793 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] + vfrB[7:0]\\"
|
1794 |
|
|
"vfrD[15:8] <- vfrA[15:8] + vfrB[15:8]\\"
|
1795 |
|
|
"vfrD[23:16] <- vfrA[23:16] + vfrB[23:16]\\"
|
1796 |
|
|
"vfrD[31:24] <- vfrA[31:24] + vfrB[31:24]\\"
|
1797 |
|
|
"vfrD[39:32] <- vfrA[39:32] + vfrB[39:32]\\"
|
1798 |
|
|
"vfrD[47:40] <- vfrA[47:40] + vfrB[47:40]\\"
|
1799 |
|
|
"vfrD[55:48] <- vfrA[55:48] + vfrB[55:48]\\"
|
1800 |
|
|
"vfrD[63:56] <- vfrA[63:56] + vfrB[63:56]",
|
1801 |
|
|
"None", ORVDX64I,},
|
1802 |
|
|
|
1803 |
|
|
{"lv.addu.h", "Vector Half-Word Elements Add Unsigned",
|
1804 |
|
|
"The unsigned half-word elements of vector/floating-point register vfrA are added to the "
|
1805 |
|
|
"unsigned half-word elements of vector/floating-point register vfrB to form the result "
|
1806 |
487 |
markom |
"elements. The result elements are placed into vector/floating-point "
|
1807 |
87 |
lampret |
"register vfrD.",
|
1808 |
155 |
simons |
"N/A",
|
1809 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] + vfrB[15:0]\\"
|
1810 |
|
|
"vfrD[31:16] <- vfrA[31:16] + vfrB[31:16]\\"
|
1811 |
|
|
"vfrD[47:32] <- vfrA[47:32] + vfrB[47:32]\\"
|
1812 |
|
|
"vfrD[63:48] <- vfrA[63:48] + vfrB[63:48]\\",
|
1813 |
|
|
"None", ORVDX64I,},
|
1814 |
|
|
|
1815 |
|
|
{"lv.subu.b", "Vector Byte Elements Subtract Unsigned",
|
1816 |
|
|
"The unsigned byte elements of vector/floating-point register vfrB are subtracted from the "
|
1817 |
|
|
"unsigned byte elements of vector/floating-point register vfrA to form the result elements. "
|
1818 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
1819 |
155 |
simons |
"N/A",
|
1820 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] - vfrB[7:0]\\"
|
1821 |
|
|
"vfrD[15:8] <- vfrA[15:8] - vfrB[15:8]\\"
|
1822 |
|
|
"vfrD[23:16] <- vfrA[23:16] - vfrB[23:16]\\"
|
1823 |
|
|
"vfrD[31:24] <- vfrA[31:24] - vfrB[31:24]\\"
|
1824 |
|
|
"vfrD[39:32] <- vfrA[39:32] - vfrB[39:32]\\"
|
1825 |
|
|
"vfrD[47:40] <- vfrA[47:40] - vfrB[47:40]\\"
|
1826 |
|
|
"vfrD[55:48] <- vfrA[55:48] - vfrB[55:48]\\"
|
1827 |
|
|
"vfrD[63:56] <- vfrA[63:56] - vfrB[63:56]",
|
1828 |
|
|
"None", ORVDX64I,},
|
1829 |
|
|
|
1830 |
|
|
{"lv.subu.h", "Vector Half-Word Elements Subtract Unsigned",
|
1831 |
|
|
"The unsigned half-word elements of vector/floating-point register vfrB are subtracted from the "
|
1832 |
|
|
"unsigned half-word elements of vector/floating-point register vfrA to form the result "
|
1833 |
487 |
markom |
"elements. The result elements are placed into vector/floating-point "
|
1834 |
87 |
lampret |
"register vfrD.",
|
1835 |
155 |
simons |
"N/A",
|
1836 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] - vfrB[15:0]\\"
|
1837 |
|
|
"vfrD[31:16] <- vfrA[31:16] - vfrB[31:16]\\"
|
1838 |
|
|
"vfrD[47:32] <- vfrA[47:32] - vfrB[47:32]\\"
|
1839 |
|
|
"vfrD[63:48] <- vfrA[63:48] - vfrB[63:48]\\",
|
1840 |
|
|
"None", ORVDX64I,},
|
1841 |
|
|
|
1842 |
|
|
{"lv.addus.b", "Vector Byte Elements Add Unsigned Saturated",
|
1843 |
|
|
"The unsigned byte elements of vector/floating-point register vfrA are added to the "
|
1844 |
|
|
"unsigned byte elements of vector/floating-point register vfrB to form the result "
|
1845 |
487 |
markom |
"elements. If the result exceeds the min/max value for the destination data type, "
|
1846 |
|
|
"it is saturated to the min/max value and placed into vector/floating-point register vfrD.",
|
1847 |
155 |
simons |
"N/A",
|
1848 |
87 |
lampret |
"vfrD[7:0] <- sat8u(vfrA[7:0] + vfrB[7:0])\\"
|
1849 |
|
|
"vfrD[15:8] <- sat8u(vfrA[15:8] + vfrB[15:8])\\"
|
1850 |
|
|
"vfrD[23:16] <- sat8u(vfrA[23:16] + vfrB[23:16])\\"
|
1851 |
|
|
"vfrD[31:24] <- sat8u(vfrA[31:24] + vfrB[31:24])\\"
|
1852 |
|
|
"vfrD[39:32] <- sat8u(vfrA[39:32] + vfrB[39:32])\\"
|
1853 |
|
|
"vfrD[47:40] <- sat8u(vfrA[47:40] + vfrB[47:40])\\"
|
1854 |
|
|
"vfrD[55:48] <- sat8u(vfrA[55:48] + vfrB[55:48])\\"
|
1855 |
|
|
"vfrD[63:56] <- sat8u(vfrA[63:56] + vfrB[63:56])",
|
1856 |
|
|
"None", ORVDX64I,},
|
1857 |
|
|
|
1858 |
|
|
{"lv.addus.h", "Vector Half-Word Elements Add Unsigned Saturated",
|
1859 |
|
|
"The unsigned half-word elements of vector/floating-point register vfrA are added to the "
|
1860 |
|
|
"unsigned half-word elements of vector/floating-point register vfrB to form the result "
|
1861 |
487 |
markom |
"elements. If the result exceeds the min/max value for the destination data type, "
|
1862 |
|
|
"it is saturated to the min/max value and placed into vector/floating-point register vfrD.",
|
1863 |
155 |
simons |
"N/A",
|
1864 |
87 |
lampret |
"vfrD[15:0] <- sat16s(vfrA[15:0] + vfrB[15:0])\\"
|
1865 |
|
|
"vfrD[31:16] <- sat16s(vfrA[31:16] + vfrB[31:16])\\"
|
1866 |
|
|
"vfrD[47:32] <- sat16s(vfrA[47:32] + vfrB[47:32])\\"
|
1867 |
|
|
"vfrD[63:48] <- sat16s(vfrA[63:48] + vfrB[63:48])",
|
1868 |
|
|
"None", ORVDX64I,},
|
1869 |
|
|
|
1870 |
|
|
{"lv.subus.b", "Vector Byte Elements Subtract Unsigned Saturated",
|
1871 |
|
|
"The unsigned byte elements of vector/floating-point register vfrB are subtracted from "
|
1872 |
|
|
"the unsigned byte elements of vector/floating-point register vfrA to form the result "
|
1873 |
487 |
markom |
"elements. If the result exceeds the min/max value for the destination data type, it is "
|
1874 |
|
|
"saturated to the min/max value and placed into vector/floating-point register vfrD.",
|
1875 |
155 |
simons |
"N/A",
|
1876 |
87 |
lampret |
"vfrD[7:0] <- sat8u(vfrA[7:0] + vfrB[7:0])\\"
|
1877 |
|
|
"vfrD[15:8] <- sat8u(vfrA[15:8] + vfrB[15:8])\\"
|
1878 |
|
|
"vfrD[23:16] <- sat8u(vfrA[23:16] + vfrB[23:16])\\"
|
1879 |
|
|
"vfrD[31:24] <- sat8u(vfrA[31:24] + vfrB[31:24])\\"
|
1880 |
|
|
"vfrD[39:32] <- sat8u(vfrA[39:32] + vfrB[39:32])\\"
|
1881 |
|
|
"vfrD[47:40] <- sat8u(vfrA[47:40] + vfrB[47:40])\\"
|
1882 |
|
|
"vfrD[55:48] <- sat8u(vfrA[55:48] + vfrB[55:48])\\"
|
1883 |
|
|
"vfrD[63:56] <- sat8u(vfrA[63:56] + vfrB[63:56])",
|
1884 |
|
|
"None", ORVDX64I,},
|
1885 |
|
|
|
1886 |
|
|
{"lv.subus.h", "Vector Half-Word Elements Subtract Unsigned Saturated",
|
1887 |
|
|
"The unsigned half-word elements of vector/floating-point register vfrB are subtracted "
|
1888 |
|
|
"from the unsigned half-word elements of vector/floating-point register vfrA to form "
|
1889 |
487 |
markom |
"the result elements. If the result exceeds the min/max value for the destination data type, "
|
1890 |
|
|
"it is saturated to the min/max value and placed into vector/floating-point register vfrD.",
|
1891 |
155 |
simons |
"N/A",
|
1892 |
87 |
lampret |
"vfrD[15:0] <- sat16u(vfrA[15:0] - vfrB[15:0])\\"
|
1893 |
|
|
"vfrD[31:16] <- sat16u(vfrA[31:16] - vfrB[31:16])\\"
|
1894 |
|
|
"vfrD[47:32] <- sat16u(vfrA[47:32] - vfrB[47:32])\\"
|
1895 |
|
|
"vfrD[63:48] <- sat16u(vfrA[63:48] - vfrB[63:48])",
|
1896 |
|
|
"None", ORVDX64I,},
|
1897 |
|
|
|
1898 |
|
|
{"lv.avg.b", "Vector Byte Elements Average",
|
1899 |
|
|
"The byte elements of vector/floating-point register vfrA are added to the byte elements "
|
1900 |
955 |
markom |
"of vector/floating-point register vfrB, and the sum is shifted right by one to form the "
|
1901 |
487 |
markom |
"result elements. The result elements are placed into vector/floating-point register vfrD.",
|
1902 |
155 |
simons |
"N/A",
|
1903 |
87 |
lampret |
"vfrD[7:0] <- (vfrA[7:0] + vfrB[7:0]) >> 1\\"
|
1904 |
|
|
"vfrD[15:8] <- (vfrA[15:8] + vfrB[15:8]) >> 1\\"
|
1905 |
|
|
"vfrD[23:16] <- (vfrA[23:16] + vfrB[23:16]) >> 1\\"
|
1906 |
|
|
"vfrD[31:24] <- (vfrA[31:24] + vfrB[31:24]) >> 1\\"
|
1907 |
|
|
"vfrD[39:32] <- (vfrA[39:32] + vfrB[39:32]) >> 1\\"
|
1908 |
|
|
"vfrD[47:40] <- (vfrA[47:40] + vfrB[47:40]) >> 1\\"
|
1909 |
|
|
"vfrD[55:48] <- (vfrA[55:48] + vfrB[55:48]) >> 1\\"
|
1910 |
|
|
"vfrD[63:56] <- (vfrA[63:56] + vfrB[63:56]) >> 1",
|
1911 |
|
|
"None", ORVDX64I,},
|
1912 |
|
|
|
1913 |
|
|
{"lv.avg.h", "Vector Half-Word Elements Average",
|
1914 |
|
|
"The half-word elements of vector/floating-point register vfrA are added to the "
|
1915 |
955 |
markom |
"half-word elements of vector/floating-point register vfrB, and the sum is shifted "
|
1916 |
487 |
markom |
"right by one to form the result elements. The result elements are placed into "
|
1917 |
87 |
lampret |
"vector/floating-point register vfrD.",
|
1918 |
155 |
simons |
"N/A",
|
1919 |
87 |
lampret |
"vfrD[15:0] <- (vfrA[15:0] + vfrB[15:0]) >> 1\\"
|
1920 |
|
|
"vfrD[31:16] <- (vfrA[31:16] + vfrB[31:16]) >> 1\\"
|
1921 |
|
|
"vfrD[47:32] <- (vfrA[47:32] + vfrB[47:32]) >> 1\\"
|
1922 |
|
|
"vfrD[63:48] <- (vfrA[63:48] + vfrB[63:48]) >> 1\\",
|
1923 |
|
|
"None", ORVDX64I,},
|
1924 |
|
|
|
1925 |
|
|
{"lv.max.b", "Vector Byte Elements Maximum",
|
1926 |
|
|
"The byte elements of vector/floating-point register vfrA are compared to the byte elements "
|
1927 |
955 |
markom |
"of vector/floating-point register vfrB, and the larger elements are selected to form the "
|
1928 |
487 |
markom |
"result elements. The result elements are placed into vector/floating-point register vfrD.",
|
1929 |
155 |
simons |
"N/A",
|
1930 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] > vfrB[7:0] ? vfrA[7:0] : vrfB[7:0]\\"
|
1931 |
|
|
"vfrD[15:8] <- vfrA[15:8] > vfrB[15:8] ? vfrA[15:8] : vrfB[15:8]\\"
|
1932 |
|
|
"vfrD[23:16] <- vfrA[23:16] > vfrB[23:16] ? vfrA[23:16] : vrfB[23:16]\\"
|
1933 |
|
|
"vfrD[31:24] <- vfrA[31:24] > vfrB[31:24] ? vfrA[31:24] : vrfB[31:24]\\"
|
1934 |
|
|
"vfrD[39:32] <- vfrA[39:32] > vfrB[39:32] ? vfrA[39:32] : vrfB[39:32]\\"
|
1935 |
|
|
"vfrD[47:40] <- vfrA[47:40] > vfrB[47:40] ? vfrA[47:40] : vrfB[47:40]\\"
|
1936 |
|
|
"vfrD[55:48] <- vfrA[55:48] > vfrB[55:48] ? vfrA[55:48] : vrfB[55:48]\\"
|
1937 |
|
|
"vfrD[63:56] <- vfrA[63:56] > vfrB[63:56] ? vfrA[63:56] : vrfB[63:56]",
|
1938 |
|
|
"None", ORVDX64I,},
|
1939 |
|
|
|
1940 |
|
|
{"lv.max.h", "Vector Half-Word Elements Maximum",
|
1941 |
|
|
"The half-word elements of vector/floating-point register vfrA are compared to the "
|
1942 |
955 |
markom |
"half-word elements of vector/floating-point register vfrB, and the larger elements "
|
1943 |
487 |
markom |
"are selected to form the result elements. The result elements are placed into "
|
1944 |
87 |
lampret |
"vector/floating-point register vfrD.",
|
1945 |
155 |
simons |
"N/A",
|
1946 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] > vfrB[15:0] ? vfrA[15:0] : vrfB[15:0]\\"
|
1947 |
|
|
"vfrD[31:16] <- vfrA[31:16] > vfrB[31:16] ? vfrA[31:16] : vrfB[31:16]\\"
|
1948 |
|
|
"vfrD[47:32] <- vfrA[47:32] > vfrB[47:32] ? vfrA[47:32] : vrfB[47:32]\\"
|
1949 |
|
|
"vfrD[63:48] <- vfrA[63:48] > vfrB[63:48] ? vfrA[63:48] : vrfB[63:48]\\",
|
1950 |
|
|
"None", ORVDX64I,},
|
1951 |
|
|
|
1952 |
|
|
{"lv.min.b", "Vector Byte Elements Minimum",
|
1953 |
|
|
"The byte elements of vector/floating-point register vfrA are compared to the byte elements "
|
1954 |
955 |
markom |
"of vector/floating-point register vfrB, and the smaller elements are selected to form the "
|
1955 |
487 |
markom |
"result elements. The result elements are placed into vector/floating-point register vfrD.",
|
1956 |
155 |
simons |
"N/A",
|
1957 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] < vfrB[7:0] ? vfrA[7:0] : vrfB[7:0]\\"
|
1958 |
|
|
"vfrD[15:8] <- vfrA[15:8] < vfrB[15:8] ? vfrA[15:8] : vrfB[15:8]\\"
|
1959 |
|
|
"vfrD[23:16] <- vfrA[23:16] < vfrB[23:16] ? vfrA[23:16] : vrfB[23:16]\\"
|
1960 |
|
|
"vfrD[31:24] <- vfrA[31:24] < vfrB[31:24] ? vfrA[31:24] : vrfB[31:24]\\"
|
1961 |
|
|
"vfrD[39:32] <- vfrA[39:32] < vfrB[39:32] ? vfrA[39:32] : vrfB[39:32]\\"
|
1962 |
|
|
"vfrD[47:40] <- vfrA[47:40] < vfrB[47:40] ? vfrA[47:40] : vrfB[47:40]\\"
|
1963 |
|
|
"vfrD[55:48] <- vfrA[55:48] < vfrB[55:48] ? vfrA[55:48] : vrfB[55:48]\\"
|
1964 |
|
|
"vfrD[63:56] <- vfrA[63:56] < vfrB[63:56] ? vfrA[63:56] : vrfB[63:56]",
|
1965 |
|
|
"None", ORVDX64I,},
|
1966 |
|
|
|
1967 |
|
|
{"lv.min.h", "Vector Half-Word Elements Minimum",
|
1968 |
|
|
"The half-word elements of vector/floating-point register vfrA are compared to the "
|
1969 |
955 |
markom |
"half-word elements of vector/floating-point register vfrB, and the smaller elements "
|
1970 |
487 |
markom |
"are selected to form the result elements. The result elements are placed into "
|
1971 |
87 |
lampret |
"vector/floating-point register vfrD.",
|
1972 |
155 |
simons |
"N/A",
|
1973 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] < vfrB[15:0] ? vfrA[15:0] : vrfB[15:0]\\"
|
1974 |
|
|
"vfrD[31:16] <- vfrA[31:16] < vfrB[31:16] ? vfrA[31:16] : vrfB[31:16]\\"
|
1975 |
|
|
"vfrD[47:32] <- vfrA[47:32] < vfrB[47:32] ? vfrA[47:32] : vrfB[47:32]\\"
|
1976 |
|
|
"vfrD[63:48] <- vfrA[63:48] < vfrB[63:48] ? vfrA[63:48] : vrfB[63:48]\\",
|
1977 |
|
|
"None", ORVDX64I,},
|
1978 |
|
|
|
1979 |
|
|
{"lv.sll.b", "Vector Byte Elements Shift Left Logical",
|
1980 |
|
|
"The contents of byte elements of vector/floating-point register vfrA are "
|
1981 |
955 |
markom |
"shifted left by the number of bits specified in the lower 3 bits in each byte element "
|
1982 |
487 |
markom |
"of vector/floating-point register vfrB, inserting zeros into the low-order bits. "
|
1983 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
1984 |
155 |
simons |
"N/A",
|
1985 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] << vfrB[2:0]\\"
|
1986 |
|
|
"vfrD[15:8] <- vfrA[15:8] << vfrB[10:8]\\"
|
1987 |
|
|
"vfrD[23:16] <- vfrA[23:16] << vfrB[18:16]\\"
|
1988 |
|
|
"vfrD[31:24] <- vfrA[31:24] << vfrB[26:24]\\"
|
1989 |
|
|
"vfrD[39:32] <- vfrA[39:32] << vfrB[34:32]\\"
|
1990 |
|
|
"vfrD[47:40] <- vfrA[47:40] << vfrB[42:40]\\"
|
1991 |
|
|
"vfrD[55:48] <- vfrA[55:48] << vfrB[50:48]\\"
|
1992 |
|
|
"vfrD[63:56] <- vfrA[63:56] << vfrB[58:56]",
|
1993 |
|
|
"None", ORVDX64I,},
|
1994 |
|
|
|
1995 |
|
|
{"lv.sll.h", "Vector Half-Word Elements Shift Left Logical",
|
1996 |
|
|
"The contents of half-word elements of vector/floating-point register vfrA are "
|
1997 |
955 |
markom |
"shifted left by the number of bits specified in the lower 4 bits in each half-word element "
|
1998 |
487 |
markom |
"of vector/floating-point register vfrB, inserting zeros into the low-order bits. "
|
1999 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2000 |
155 |
simons |
"N/A",
|
2001 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] << vfrB[3:0]\\"
|
2002 |
|
|
"vfrD[31:16] <- vfrA[31:16] << vfrB[19:16]\\"
|
2003 |
|
|
"vfrD[47:32] <- vfrA[47:32] << vfrB[35:32]\\"
|
2004 |
|
|
"vfrD[63:48] <- vfrA[63:48] << vfrB[51:48]\\",
|
2005 |
|
|
"None", ORVDX64I,},
|
2006 |
|
|
|
2007 |
|
|
{"lv.srl.b", "Vector Byte Elements Shift Right Logical",
|
2008 |
|
|
"The contents of byte elements of vector/floating-point register vfrA are "
|
2009 |
955 |
markom |
"shifted right by the number of bits specified in the lower 3 bits in each byte element "
|
2010 |
487 |
markom |
"of vector/floating-point register vfrB, inserting zeros into the high-order bits. "
|
2011 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2012 |
155 |
simons |
"N/A",
|
2013 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] >> vfrB[2:0]\\"
|
2014 |
|
|
"vfrD[15:8] <- vfrA[15:8] >> vfrB[10:8]\\"
|
2015 |
|
|
"vfrD[23:16] <- vfrA[23:16] >> vfrB[18:16]\\"
|
2016 |
|
|
"vfrD[31:24] <- vfrA[31:24] >> vfrB[26:24]\\"
|
2017 |
|
|
"vfrD[39:32] <- vfrA[39:32] >> vfrB[34:32]\\"
|
2018 |
|
|
"vfrD[47:40] <- vfrA[47:40] >> vfrB[42:40]\\"
|
2019 |
|
|
"vfrD[55:48] <- vfrA[55:48] >> vfrB[50:48]\\"
|
2020 |
|
|
"vfrD[63:56] <- vfrA[63:56] >> vfrB[58:56]",
|
2021 |
|
|
"None", ORVDX64I,},
|
2022 |
|
|
|
2023 |
|
|
{"lv.srl.h", "Vector Half-Word Elements Shift Right Logical",
|
2024 |
|
|
"The contents of half-word elements of vector/floating-point register vfrA are "
|
2025 |
955 |
markom |
"shifted right by the number of bits specified in the lower 4 bits in each half-word element "
|
2026 |
487 |
markom |
"of vector/floating-point register vfrB, inserting zeros into the high-order bits. "
|
2027 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2028 |
155 |
simons |
"N/A",
|
2029 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] >> vfrB[3:0]\\"
|
2030 |
|
|
"vfrD[31:16] <- vfrA[31:16] >> vfrB[19:16]\\"
|
2031 |
|
|
"vfrD[47:32] <- vfrA[47:32] >> vfrB[35:32]\\"
|
2032 |
|
|
"vfrD[63:48] <- vfrA[63:48] >> vfrB[51:48]\\",
|
2033 |
|
|
"None", ORVDX64I,},
|
2034 |
|
|
|
2035 |
|
|
{"lv.sra.b", "Vector Byte Elements Shift Right Arithmetic",
|
2036 |
|
|
"The contents of byte elements of vector/floating-point register vfrA are "
|
2037 |
955 |
markom |
"shifted right by the number of bits specified in the lower 3 bits in each byte element "
|
2038 |
487 |
markom |
"of vector/floating-point register vfrB, inserting the most significant bit of each "
|
2039 |
87 |
lampret |
"element into the high-order bits. "
|
2040 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2041 |
155 |
simons |
"N/A",
|
2042 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] sra vfrB[2:0]\\"
|
2043 |
|
|
"vfrD[15:8] <- vfrA[15:8] sra vfrB[10:8]\\"
|
2044 |
|
|
"vfrD[23:16] <- vfrA[23:16] sra vfrB[18:16]\\"
|
2045 |
|
|
"vfrD[31:24] <- vfrA[31:24] sra vfrB[26:24]\\"
|
2046 |
|
|
"vfrD[39:32] <- vfrA[39:32] sra vfrB[34:32]\\"
|
2047 |
|
|
"vfrD[47:40] <- vfrA[47:40] sra vfrB[42:40]\\"
|
2048 |
|
|
"vfrD[55:48] <- vfrA[55:48] sra vfrB[50:48]\\"
|
2049 |
|
|
"vfrD[63:56] <- vfrA[63:56] sra vfrB[58:56]",
|
2050 |
|
|
"None", ORVDX64I,},
|
2051 |
|
|
|
2052 |
|
|
{"lv.sra.h", "Vector Half-Word Elements Shift Right Arithmetic",
|
2053 |
|
|
"The contents of half-word elements of vector/floating-point register vfrA are "
|
2054 |
955 |
markom |
"shifted right by the number of bits specified in the lower 4 bits in each half-word element "
|
2055 |
487 |
markom |
"of vector/floating-point register vfrB, inserting the most significant bit of each element "
|
2056 |
|
|
"into the high-order bits. "
|
2057 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2058 |
155 |
simons |
"N/A",
|
2059 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] sra vfrB[3:0]\\"
|
2060 |
|
|
"vfrD[31:16] <- vfrA[31:16] sra vfrB[19:16]\\"
|
2061 |
|
|
"vfrD[47:32] <- vfrA[47:32] sra vfrB[35:32]\\"
|
2062 |
|
|
"vfrD[63:48] <- vfrA[63:48] sra vfrB[51:48]\\",
|
2063 |
|
|
"None", ORVDX64I,},
|
2064 |
|
|
|
2065 |
|
|
{"lv.rl.b", "Vector Byte Elements Rotate Left",
|
2066 |
|
|
"The contents of byte elements of vector/floating-point register vfrA are "
|
2067 |
955 |
markom |
"rotated left by the number of bits specified in the lower 3 bits in each byte element "
|
2068 |
87 |
lampret |
"of vector/floating-point register vfrB. "
|
2069 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2070 |
155 |
simons |
"N/A",
|
2071 |
87 |
lampret |
"vfrD[7:0] <- vfrA[7:0] rl vfrB[2:0]\\"
|
2072 |
|
|
"vfrD[15:8] <- vfrA[15:8] rl vfrB[10:8]\\"
|
2073 |
|
|
"vfrD[23:16] <- vfrA[23:16] rl vfrB[18:16]\\"
|
2074 |
|
|
"vfrD[31:24] <- vfrA[31:24] rl vfrB[26:24]\\"
|
2075 |
|
|
"vfrD[39:32] <- vfrA[39:32] rl vfrB[34:32]\\"
|
2076 |
|
|
"vfrD[47:40] <- vfrA[47:40] rl vfrB[42:40]\\"
|
2077 |
|
|
"vfrD[55:48] <- vfrA[55:48] rl vfrB[50:48]\\"
|
2078 |
|
|
"vfrD[63:56] <- vfrA[63:56] rl vfrB[58:56]",
|
2079 |
|
|
"None", ORVDX64I,},
|
2080 |
|
|
|
2081 |
|
|
{"lv.rl.h", "Vector Half-Word Elements Rotate Left",
|
2082 |
|
|
"The contents of half-word elements of vector/floating-point register vfrA are "
|
2083 |
955 |
markom |
"rotated left by the number of bits specified in the lower 4 bits in each half-word element "
|
2084 |
87 |
lampret |
"of vector/floating-point register vfrB. "
|
2085 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2086 |
155 |
simons |
"N/A",
|
2087 |
87 |
lampret |
"vfrD[15:0] <- vfrA[15:0] rl vfrB[3:0]\\"
|
2088 |
|
|
"vfrD[31:16] <- vfrA[31:16] rl vfrB[19:16]\\"
|
2089 |
|
|
"vfrD[47:32] <- vfrA[47:32] rl vfrB[35:32]\\"
|
2090 |
|
|
"vfrD[63:48] <- vfrA[63:48] rl vfrB[51:48]\\",
|
2091 |
|
|
"None", ORVDX64I,},
|
2092 |
|
|
|
2093 |
|
|
{"lv.sll", "Vector Shift Left Logical",
|
2094 |
|
|
"The contents of vector/floating-point register vfrA are "
|
2095 |
955 |
markom |
"shifted left by the number of bits specified in the lower 4 bits in each byte element "
|
2096 |
87 |
lampret |
"of vector/floating-point register vfrB, inserting zeros into the low-order bits of "
|
2097 |
|
|
"vfrD. "
|
2098 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2099 |
155 |
simons |
"N/A",
|
2100 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] << vfrB[2:0]",
|
2101 |
|
|
"None", ORVDX64I,},
|
2102 |
|
|
|
2103 |
|
|
{"lv.srl", "Vector Shift Right Logical",
|
2104 |
|
|
"The contents of vector/floating-point register vfrA are "
|
2105 |
955 |
markom |
"shifted right by the number of bits specified in the lower 4 bits in each byte element "
|
2106 |
87 |
lampret |
"of vector/floating-point register vfrB, inserting zeros into the high-order bits of "
|
2107 |
|
|
"vfrD. "
|
2108 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2109 |
155 |
simons |
"N/A",
|
2110 |
87 |
lampret |
"vfrD[63:0] <- vfrA[63:0] >> vfrB[2:0]",
|
2111 |
|
|
"None", ORVDX64I,},
|
2112 |
|
|
|
2113 |
|
|
{"lv.merge.b", "Vector Byte Elements Merge",
|
2114 |
487 |
markom |
"The byte elements of the lower half of the vector/floating-point register vfrA are "
|
2115 |
87 |
lampret |
"combined with the byte elements of the lower half of vector/floating-point "
|
2116 |
955 |
markom |
"register vfrB in such a way that the lowest element is from vfrB, the second element "
|
2117 |
487 |
markom |
"from vfrA, the third again from vfrB etc. "
|
2118 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2119 |
155 |
simons |
"N/A",
|
2120 |
87 |
lampret |
"vfrD[7:0] <- vfrB[7:0]\\"
|
2121 |
|
|
"vfrD[15:8] <- vfrA[15:8]\\"
|
2122 |
|
|
"vfrD[23:16] <- vfrB[23:16]\\"
|
2123 |
|
|
"vfrD[31:24] <- vfrA[31:24]\\"
|
2124 |
|
|
"vfrD[39:32] <- vfrB[39:32]\\"
|
2125 |
|
|
"vfrD[47:40] <- vfrA[47:40]\\"
|
2126 |
|
|
"vfrD[55:48] <- vfrB[55:48]\\"
|
2127 |
|
|
"vfrD[63:56] <- vfrA[63:56]",
|
2128 |
|
|
"None", ORVDX64I,},
|
2129 |
|
|
|
2130 |
|
|
{"lv.merge.h", "Vector Half-Word Elements Merge",
|
2131 |
487 |
markom |
"The half-word elements of the lower half of the vector/floating-point register vfrA are "
|
2132 |
|
|
"combined with the half-word elements of the lower half of vector/floating-point "
|
2133 |
955 |
markom |
"register vfrB in such a way that the lowest element is from vfrB, the second element "
|
2134 |
487 |
markom |
"from vfrA, the third again from vfrB etc. "
|
2135 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2136 |
155 |
simons |
"N/A",
|
2137 |
87 |
lampret |
"vfrD[15:0] <- vfrB[15:0]\\"
|
2138 |
|
|
"vfrD[31:16] <- vfrA[31:16]\\"
|
2139 |
|
|
"vfrD[47:32] <- vfrB[47:32]\\"
|
2140 |
|
|
"vfrD[63:48] <- vfrA[63:48]",
|
2141 |
|
|
"None", ORVDX64I,},
|
2142 |
|
|
|
2143 |
|
|
{"lv.pack.b", "Vector Byte Elements Pack",
|
2144 |
487 |
markom |
"The lower half of the byte elements of the vector/floating-point register vfrA are "
|
2145 |
87 |
lampret |
"truncated and combined with the lower half of the byte truncated elements of the "
|
2146 |
955 |
markom |
"vector/floating-point register vfrB in such a way that the lowest elements are from "
|
2147 |
|
|
"vfrB, and the highest elements from vfrA. "
|
2148 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2149 |
155 |
simons |
"N/A",
|
2150 |
87 |
lampret |
"vfrD[3:0] <- vfrB[3:0]\\"
|
2151 |
|
|
"vfrD[7:4] <- vfrB[11:8]\\"
|
2152 |
|
|
"vfrD[11:8] <- vfrB[19:16]\\"
|
2153 |
|
|
"vfrD[15:12] <- vfrB[27:24]\\"
|
2154 |
|
|
"vfrD[19:16] <- vfrB[35:32]\\"
|
2155 |
|
|
"vfrD[23:20] <- vfrB[43:40]\\"
|
2156 |
|
|
"vfrD[27:24] <- vfrB[51:48]\\"
|
2157 |
|
|
"vfrD[31:28] <- vfrB[59:56]\\"
|
2158 |
|
|
"vfrD[35:32] <- vfrA[3:0]\\"
|
2159 |
|
|
"vfrD[39:36] <- vfrA[11:8]\\"
|
2160 |
|
|
"vfrD[43:40] <- vfrA[19:16]\\"
|
2161 |
|
|
"vfrD[47:44] <- vfrA[27:24]\\"
|
2162 |
|
|
"vfrD[51:48] <- vfrA[35:32]\\"
|
2163 |
|
|
"vfrD[55:52] <- vfrA[43:40]\\"
|
2164 |
|
|
"vfrD[59:56] <- vfrA[51:48]\\"
|
2165 |
|
|
"vfrD[63:60] <- vfrA[59:56]",
|
2166 |
|
|
"None", ORVDX64I,},
|
2167 |
|
|
|
2168 |
|
|
{"lv.pack.h", "Vector Half-word Elements Pack",
|
2169 |
487 |
markom |
"The lower half of the half-word elements of the vector/floating-point register vfrA are "
|
2170 |
87 |
lampret |
"truncated and combined with the lower half of the half-word truncated elements of the "
|
2171 |
955 |
markom |
"vector/floating-point register vfrB in such a way that the lowest elements are from vfrB, and the highest elements "
|
2172 |
87 |
lampret |
"from vfrA. "
|
2173 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2174 |
155 |
simons |
"N/A",
|
2175 |
87 |
lampret |
"vfrD[7:0] <- vfrB[15:0]\\"
|
2176 |
|
|
"vfrD[15:8] <- vfrB[31:16]\\"
|
2177 |
|
|
"vfrD[23:16] <- vfrB[47:32]\\"
|
2178 |
|
|
"vfrD[31:24] <- vfrB[63:48]\\"
|
2179 |
|
|
"vfrD[39:32] <- vfrA[15:0]\\"
|
2180 |
|
|
"vfrD[47:40] <- vfrA[31:16]\\"
|
2181 |
|
|
"vfrD[55:48] <- vfrA[47:32]\\"
|
2182 |
|
|
"vfrD[63:56] <- vfrA[63:48]\\",
|
2183 |
|
|
"None", ORVDX64I,},
|
2184 |
|
|
|
2185 |
|
|
{"lv.packs.b", "Vector Byte Elements Pack Signed Saturated",
|
2186 |
487 |
markom |
"The lower half of the signed byte elements of the vector/floating-point register vfrA are "
|
2187 |
87 |
lampret |
"truncated and combined with the lower half of the signed byte truncated elements of "
|
2188 |
955 |
markom |
"the vector/floating-point register vfrB in such a way that the lowest elements are from "
|
2189 |
|
|
"vfrB, and the highest elements from vfrA. "
|
2190 |
487 |
markom |
"If any truncated element exceeds a signed 4-bit value, it is saturated. "
|
2191 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2192 |
155 |
simons |
"N/A",
|
2193 |
87 |
lampret |
"vfrD[3:0] <- sat4s(vfrB[7:0]\\"
|
2194 |
|
|
"vfrD[7:4] <- sat4s(vfrB[15:8]\\"
|
2195 |
|
|
"vfrD[11:8] <- sat4s(vfrB[23:16]\\"
|
2196 |
|
|
"vfrD[15:12] <- sat4s(vfrB[31:24]\\"
|
2197 |
|
|
"vfrD[19:16] <- sat4s(vfrB[39:32]\\"
|
2198 |
|
|
"vfrD[23:20] <- sat4s(vfrB[47:40]\\"
|
2199 |
|
|
"vfrD[27:24] <- sat4s(vfrB[55:48]\\"
|
2200 |
|
|
"vfrD[31:28] <- sat4s(vfrB[63:56]\\"
|
2201 |
|
|
"vfrD[35:32] <- sat4s(vfrA[7:0]\\"
|
2202 |
|
|
"vfrD[39:36] <- sat4s(vfrA[15:8]\\"
|
2203 |
|
|
"vfrD[43:40] <- sat4s(vfrA[23:16]\\"
|
2204 |
|
|
"vfrD[47:44] <- sat4s(vfrA[31:24]\\"
|
2205 |
|
|
"vfrD[51:48] <- sat4s(vfrA[39:32]\\"
|
2206 |
|
|
"vfrD[55:52] <- sat4s(vfrA[47:40]\\"
|
2207 |
|
|
"vfrD[59:56] <- sat4s(vfrA[55:48]\\"
|
2208 |
|
|
"vfrD[63:60] <- sat4s(vfrA[63:56]",
|
2209 |
|
|
"None", ORVDX64I,},
|
2210 |
|
|
|
2211 |
|
|
{"lv.packs.h", "Vector Half-word Elements Pack Signed Saturated",
|
2212 |
487 |
markom |
"The lower half of the signed halfword elements of the vector/floating-point register "
|
2213 |
87 |
lampret |
"vfrA are truncated and combined with the lower half of the signed half-word "
|
2214 |
|
|
"truncated elements of the vector/floating-point register vfrB in such a way "
|
2215 |
955 |
markom |
"that the lowest elements are from vfrB, and the highest elements from vfrA. "
|
2216 |
487 |
markom |
"If any truncated element exceeds a signed 8-bit value, it is saturated. "
|
2217 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2218 |
155 |
simons |
"N/A",
|
2219 |
87 |
lampret |
"vfrD[7:0] <- sat8s(vfrB[15:0])\\"
|
2220 |
|
|
"vfrD[15:8] <- sat8s(vfrB[31:16])\\"
|
2221 |
|
|
"vfrD[23:16] <- sat8s(vfrB[47:32])\\"
|
2222 |
|
|
"vfrD[31:24] <- sat8s(vfrB[63:48])\\"
|
2223 |
|
|
"vfrD[39:32] <- sat8s(vfrA[15:0])\\"
|
2224 |
|
|
"vfrD[47:40] <- sat8s(vfrA[31:16])\\"
|
2225 |
|
|
"vfrD[55:48] <- sat8s(vfrA[47:32])\\"
|
2226 |
|
|
"vfrD[63:56] <- sat8s(vfrA[63:48])\\",
|
2227 |
|
|
"None", ORVDX64I,},
|
2228 |
|
|
|
2229 |
|
|
{"lv.packus.b", "Vector Byte Elements Pack Unsigned Saturated",
|
2230 |
487 |
markom |
"The lower half of the unsigned byte elements of the vector/floating-point register vfrA are "
|
2231 |
87 |
lampret |
"truncated and combined with the lower half of the unsigned byte truncated elements of "
|
2232 |
955 |
markom |
"the vector/floating-point register vfrB in such a way that the lowest elements are from "
|
2233 |
|
|
"vfrB, and the highest elements from vfrA. "
|
2234 |
|
|
"If any truncated element exceeds an unsigned 4-bit value, it is saturated. "
|
2235 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2236 |
155 |
simons |
"N/A",
|
2237 |
87 |
lampret |
"vfrD[3:0] <- sat4u(vfrB[7:0]\\"
|
2238 |
|
|
"vfrD[7:4] <- sat4u(vfrB[15:8]\\"
|
2239 |
|
|
"vfrD[11:8] <- sat4u(vfrB[23:16]\\"
|
2240 |
|
|
"vfrD[15:12] <- sat4u(vfrB[31:24]\\"
|
2241 |
|
|
"vfrD[19:16] <- sat4u(vfrB[39:32]\\"
|
2242 |
|
|
"vfrD[23:20] <- sat4u(vfrB[47:40]\\"
|
2243 |
|
|
"vfrD[27:24] <- sat4u(vfrB[55:48]\\"
|
2244 |
|
|
"vfrD[31:28] <- sat4u(vfrB[63:56]\\"
|
2245 |
|
|
"vfrD[35:32] <- sat4u(vfrA[7:0]\\"
|
2246 |
|
|
"vfrD[39:36] <- sat4u(vfrA[15:8]\\"
|
2247 |
|
|
"vfrD[43:40] <- sat4u(vfrA[23:16]\\"
|
2248 |
|
|
"vfrD[47:44] <- sat4u(vfrA[31:24]\\"
|
2249 |
|
|
"vfrD[51:48] <- sat4u(vfrA[39:32]\\"
|
2250 |
|
|
"vfrD[55:52] <- sat4u(vfrA[47:40]\\"
|
2251 |
|
|
"vfrD[59:56] <- sat4u(vfrA[55:48]\\"
|
2252 |
|
|
"vfrD[63:60] <- sat4u(vfrA[63:56]",
|
2253 |
|
|
"None", ORVDX64I,},
|
2254 |
|
|
|
2255 |
|
|
{"lv.packus.h", "Vector Half-word Elements Pack Unsigned Saturated",
|
2256 |
487 |
markom |
"The lower half of the unsigned halfword elements of the vector/floating-point register "
|
2257 |
87 |
lampret |
"vfrA are truncated and combined with the lower half of the unsigned half-word "
|
2258 |
|
|
"truncated elements of the vector/floating-point register vfrB in such a way "
|
2259 |
955 |
markom |
"that the lowest elements are from vfrB, and the highest elements from vfrA. "
|
2260 |
487 |
markom |
"If any truncated element exceeds an unsigned 8-bit value, it is saturated. "
|
2261 |
|
|
"The result elements are placed into vector/floating-point register vfrD.",
|
2262 |
155 |
simons |
"N/A",
|
2263 |
87 |
lampret |
"vfrD[7:0] <- sat8u(vfrB[15:0])\\"
|
2264 |
|
|
"vfrD[15:8] <- sat8u(vfrB[31:16])\\"
|
2265 |
|
|
"vfrD[23:16] <- sat8u(vfrB[47:32])\\"
|
2266 |
|
|
"vfrD[31:24] <- sat8u(vfrB[63:48])\\"
|
2267 |
|
|
"vfrD[39:32] <- sat8u(vfrA[15:0])\\"
|
2268 |
|
|
"vfrD[47:40] <- sat8u(vfrA[31:16])\\"
|
2269 |
|
|
"vfrD[55:48] <- sat8u(vfrA[47:32])\\"
|
2270 |
|
|
"vfrD[63:56] <- sat8u(vfrA[63:48])\\",
|
2271 |
|
|
"None", ORVDX64I,},
|
2272 |
|
|
|
2273 |
|
|
{"lv.unpack.b", "Vector Byte Elements Unpack",
|
2274 |
487 |
markom |
"The lower half of the 4-bit elements in vector/floating-point register "
|
2275 |
87 |
lampret |
"vfrA are sign-extended and placed into vector/floating-point register vfrD.",
|
2276 |
155 |
simons |
"N/A",
|
2277 |
87 |
lampret |
"vfrD[7:0] <- exts(vfrA[3:0])\\"
|
2278 |
|
|
"vfrD[15:8] <- exts(vfrA[7:4])\\"
|
2279 |
|
|
"vfrD[23:16] <- exts(vfrA[11:8])\\"
|
2280 |
|
|
"vfrD[31:24] <- exts(vfrA[15:12])\\"
|
2281 |
|
|
"vfrD[39:32] <- exts(vfrA[19:16])\\"
|
2282 |
|
|
"vfrD[47:40] <- exts(vfrA[23:20])\\"
|
2283 |
|
|
"vfrD[55:48] <- exts(vfrA[27:24])\\"
|
2284 |
|
|
"vfrD[63:56] <- exts(vfrA[31:28])",
|
2285 |
|
|
"None", ORVDX64I,},
|
2286 |
|
|
|
2287 |
|
|
{"lv.unpack.h", "Vector Half-Word Elements Unpack",
|
2288 |
487 |
markom |
"The lower half of the 8-bit elements in vector/floating-point register "
|
2289 |
87 |
lampret |
"vfrA are sign-extended and placed into vector/floating-point register vfrD.",
|
2290 |
155 |
simons |
"N/A",
|
2291 |
87 |
lampret |
"vfrD[15:0] <- exts(vfrA[7:0])\\"
|
2292 |
|
|
"vfrD[31:16] <- exts(vfrA[15:8])\\"
|
2293 |
|
|
"vfrD[47:32] <- exts(vfrA[23:16])\\"
|
2294 |
|
|
"vfrD[63:48] <- exts(vfrA[31:24])\\",
|
2295 |
|
|
"None", ORVDX64I,},
|
2296 |
|
|
|
2297 |
|
|
{"lv.perm.n", "Vector Nibble Elements Permute",
|
2298 |
|
|
"The 4-bit elements of vector/floating-point register vfrA are "
|
2299 |
955 |
markom |
"permuted according to the corresponding 4-bit values in vector/floating-point "
|
2300 |
87 |
lampret |
"register vfrB. "
|
2301 |
487 |
markom |
"The result elements are placed into vector/floating-point register vfrD.",
|
2302 |
155 |
simons |
"N/A",
|
2303 |
87 |
lampret |
"vfrD[3:0] <- vfrA[vfrB[3:0]*4+3:vfrB[3:0]*4]\\"
|
2304 |
|
|
"vfrD[7:4] <- vfrA[vfrB[7:4]*4+3:vfrB[7:4]*4]\\"
|
2305 |
|
|
"vfrD[11:8] <- vfrA[vfrB[11:8]*4+3:vfrB[11:8]*4]\\"
|
2306 |
|
|
"vfrD[15:12] <- vfrA[vfrB[15:12]*4+3:vfrB[15:12]*4]\\"
|
2307 |
|
|
"vfrD[19:16] <- vfrA[vfrB[19:16]*4+3:vfrB[19:16]*4]\\"
|
2308 |
|
|
"vfrD[23:20] <- vfrA[vfrB[23:20]*4+3:vfrB[23:20]*4]\\"
|
2309 |
|
|
"vfrD[27:24] <- vfrA[vfrB[27:24]*4+3:vfrB[27:24]*4]\\"
|
2310 |
|
|
"vfrD[31:28] <- vfrA[vfrB[31:28]*4+3:vfrB[31:28]*4]\\"
|
2311 |
|
|
"vfrD[35:32] <- vfrA[vfrB[35:32]*4+3:vfrB[35:32]*4]\\"
|
2312 |
|
|
"vfrD[39:36] <- vfrA[vfrB[39:36]*4+3:vfrB[39:36]*4]\\"
|
2313 |
|
|
"vfrD[43:40] <- vfrA[vfrB[43:40]*4+3:vfrB[43:40]*4]\\"
|
2314 |
|
|
"vfrD[47:44] <- vfrA[vfrB[47:44]*4+3:vfrB[47:44]*4]\\"
|
2315 |
|
|
"vfrD[51:48] <- vfrA[vfrB[51:48]*4+3:vfrB[51:48]*4]\\"
|
2316 |
|
|
"vfrD[55:52] <- vfrA[vfrB[55:52]*4+3:vfrB[55:52]*4]\\"
|
2317 |
|
|
"vfrD[59:56] <- vfrA[vfrB[59:56]*4+3:vfrB[59:56]*4]\\"
|
2318 |
|
|
"vfrD[63:60] <- vfrA[vfrB[63:60]*4+3:vfrB[63:60]*4]",
|
2319 |
|
|
"None", ORVDX64I,},
|
2320 |
|
|
|
2321 |
|
|
{"lv.madds.h", "Vector Half-Word Elements Multiply Add Signed Saturated",
|
2322 |
|
|
"The signed half-word elements of vector/floating-point register vfrA are multiplied "
|
2323 |
|
|
"by the signed half-word elements of vector/floating-point register vfrB to form "
|
2324 |
487 |
markom |
"intermediate results. They are then added to the signed half-word VMAC elements to "
|
2325 |
|
|
"form the final results that are placed again in the VMAC registers. "
|
2326 |
|
|
"The intermediate result is placed into vector/floating-point register vfrD. "
|
2327 |
|
|
"If any of the final results exceeds the min/max value, it is saturated.",
|
2328 |
155 |
simons |
"N/A",
|
2329 |
87 |
lampret |
"vfrD[15:0] <- sat32s(vfrA[15:0] * vfrB[15:0] + VMACLO[31:0])\\"
|
2330 |
|
|
"vfrD[31:16] <- sat32s(vfrA[31:16] * vfrB[31:16] + VMACLO[63:32])\\"
|
2331 |
|
|
"vfrD[47:32] <- sat32s(vfrA[47:32] * vfrB[47:32] + VMACHI[31:0])\\"
|
2332 |
|
|
"vfrD[63:48] <- sat32s(vfrA[63:48] * vfrB[63:48] + VMACHI[63:32])\\",
|
2333 |
|
|
"None", ORVDX64I,},
|
2334 |
|
|
|
2335 |
|
|
{"lv.msubs.h", "Vector Half-Word Elements Multiply Subtract Signed Saturated",
|
2336 |
|
|
"The signed half-word elements of vector/floating-point register vfrA are multiplied "
|
2337 |
|
|
"by the signed half-word elements of vector/floating-point register vfrB to form "
|
2338 |
487 |
markom |
"intermediate results. They are then subtracted from the signed half-word VMAC elements to "
|
2339 |
|
|
"form the final results that are placed again in the VMAC registers. "
|
2340 |
|
|
"The intermediate result is placed into vector/floating-point register vfrD. "
|
2341 |
|
|
"If any of the final results exceeds the min/max value, it is saturated.",
|
2342 |
155 |
simons |
"N/A",
|
2343 |
87 |
lampret |
"vfrD[15:0] <- sat32s(VMACLO[31:0] - vfrA[15:0] * vfrB[15:0])\\"
|
2344 |
|
|
"vfrD[31:16] <- sat32s(VMACLO[63:32] - vfrA[31:16] * vfrB[31:16])\\"
|
2345 |
|
|
"vfrD[47:32] <- sat32s(VMACHI[31:0] - vfrA[47:32] * vfrB[47:32])\\"
|
2346 |
|
|
"vfrD[63:48] <- sat32s(VMACHI[63:32] - vfrA[63:48] * vfrB[63:48])\\",
|
2347 |
|
|
"None", ORVDX64I,},
|
2348 |
|
|
|
2349 |
95 |
lampret |
{"lv.muls.h", "Vector Half-Word Elements Multiply Signed Saturated",
|
2350 |
|
|
"The signed half-word elements of vector/floating-point register vfrA are multiplied "
|
2351 |
|
|
"by the signed half-word elements of vector/floating-point register vfrB to form "
|
2352 |
|
|
"the results. "
|
2353 |
|
|
"The result is placed into vector/floating-point register vfrD. "
|
2354 |
487 |
markom |
"If any of the final results exceeds the min/max value, it is saturated.",
|
2355 |
155 |
simons |
"N/A",
|
2356 |
95 |
lampret |
"vfrD[15:0] <- sat32s(vfrA[15:0] * vfrB[15:0])\\"
|
2357 |
|
|
"vfrD[31:16] <- sat32s(vfrA[31:16] * vfrB[31:16])\\"
|
2358 |
|
|
"vfrD[47:32] <- sat32s(vfrA[47:32] * vfrB[47:32])\\"
|
2359 |
|
|
"vfrD[63:48] <- sat32s(vfrA[63:48] * vfrB[63:48])\\",
|
2360 |
|
|
"None", ORVDX64II,},
|
2361 |
87 |
lampret |
|
2362 |
95 |
lampret |
{"lv.cust1", "Reserved for Custom Vector Instructions",
|
2363 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
2364 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but instead "
|
2365 |
95 |
lampret |
"by the implementation itself.",
|
2366 |
|
|
"N/A",
|
2367 |
|
|
"N/A",
|
2368 |
|
|
"N/A", ORVDX64II,},
|
2369 |
87 |
lampret |
|
2370 |
95 |
lampret |
{"lv.cust2", "Reserved for Custom Vector Instructions",
|
2371 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
2372 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but instead "
|
2373 |
95 |
lampret |
"by the implementation itself.",
|
2374 |
|
|
"N/A",
|
2375 |
|
|
"N/A",
|
2376 |
|
|
"N/A", ORVDX64II,},
|
2377 |
87 |
lampret |
|
2378 |
95 |
lampret |
{"lv.cust3", "Reserved for Custom Vector Instructions",
|
2379 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
2380 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but instead "
|
2381 |
95 |
lampret |
"by the implementation itself.",
|
2382 |
|
|
"N/A",
|
2383 |
|
|
"N/A",
|
2384 |
|
|
"N/A", ORVDX64II,},
|
2385 |
|
|
|
2386 |
|
|
{"lv.cust4", "Reserved for Custom Vector Instructions",
|
2387 |
|
|
"This fake instruction only allocates instruction set space for custom instructions. "
|
2388 |
955 |
markom |
"Custom instructions are those that are not defined by the architecture but instead "
|
2389 |
95 |
lampret |
"by the implementation itself.",
|
2390 |
|
|
"N/A",
|
2391 |
|
|
"N/A",
|
2392 |
|
|
"N/A", ORVDX64II,},
|
2393 |
|
|
|
2394 |
|
|
/**** L/S for ORFPX/ORVDX ***/
|
2395 |
|
|
|
2396 |
|
|
{"lvf.ld", "Load Vector/Floating-Point Double Word",
|
2397 |
|
|
"The contents of vector/floating-point "
|
2398 |
955 |
markom |
"register vfrA are used as an effective address. The double word in memory "
|
2399 |
95 |
lampret |
"addressed by EA is loaded into vector/floating-point register vfrD. ",
|
2400 |
|
|
"N/A",
|
2401 |
155 |
simons |
"EA <- vfrA[63:0]\\vfrD[63:0] <- (EA)[63:0]",
|
2402 |
95 |
lampret |
"TLB miss\\Page fault\\Bus error", ORFPX64I,},
|
2403 |
|
|
|
2404 |
|
|
{"lvf.lw", "Load Vector/Floating-Point Single Word",
|
2405 |
|
|
"The contents of vector/floating-point "
|
2406 |
955 |
markom |
"register vfrA are used as an effective address. The double word in memory "
|
2407 |
95 |
lampret |
"addressed by EA is loaded into vector/floating-point register vfrD. ",
|
2408 |
155 |
simons |
"EA <- vfrA[31:0]\\vfrD[31:0] <- (EA)[31:0]",
|
2409 |
|
|
"EA <- vfrA[31:0]\\vfrD[31:0] <- (EA)[31:0]",
|
2410 |
95 |
lampret |
"TLB miss\\Page fault\\Bus error", ORFPX32I,},
|
2411 |
|
|
|
2412 |
|
|
{"lvf.sd", "Store Vector/Floating-Point Double Word",
|
2413 |
|
|
"The contents of vector/floating-point "
|
2414 |
955 |
markom |
"register vfrA are used as an effective address. The double word in vector/floating-point "
|
2415 |
487 |
markom |
"register vrfB is stored to the memory location addressed by EA. ",
|
2416 |
95 |
lampret |
"N/A",
|
2417 |
155 |
simons |
"EA <- vfrA[63:0]\\vfrD[63:0] <- (EA)[63:0]",
|
2418 |
95 |
lampret |
"TLB miss\\Page fault\\Bus error", ORFPX64I,},
|
2419 |
|
|
|
2420 |
|
|
{"lvf.sw", "Store Vector/Floating-Point Single Word",
|
2421 |
|
|
"The contents of vector/floating-point "
|
2422 |
955 |
markom |
"register vfrA are used as an effective address. The single word in vector/floating-point "
|
2423 |
487 |
markom |
"register vrfB is stored to the memory location addressed by EA. ",
|
2424 |
155 |
simons |
"EA <- vfrA[31:0]\\vfrD[31:0] <- (EA)[31:0]",
|
2425 |
|
|
"EA <- vfrA[31:0]\\vfrD[31:0] <- (EA)[31:0]",
|
2426 |
95 |
lampret |
"TLB miss\\Page fault\\Bus error", ORFPX32I,},
|
2427 |
|
|
|
2428 |
87 |
lampret |
{"", "", "", "", "", "", 0}
|
2429 |
|
|
|
2430 |
14 |
lampret |
};
|
2431 |
|
|
|
2432 |
|
|
struct or1k_isa_classes {
|
2433 |
|
|
char *title;
|
2434 |
|
|
char *desc;
|
2435 |
|
|
char *table;
|
2436 |
|
|
} or1k_isa_classes[] = {
|
2437 |
|
|
|
2438 |
87 |
lampret |
{ "", "x", "-&-\\", },
|
2439 |
1108 |
lampret |
{ "", "x", "ORBIS32 I& \\", },
|
2440 |
|
|
{ "", "x", "ORBIS32 II& \\", },
|
2441 |
|
|
{ "", "x", "ORBIS64 I& \\", },
|
2442 |
|
|
{ "", "x", "ORBIS64 II& \\", },
|
2443 |
|
|
{ "", "x", "ORFPX32 I& \\", },
|
2444 |
|
|
{ "", "x", "ORFPX32 II& \\", },
|
2445 |
|
|
{ "", "x", "ORFPX64 I& \\", },
|
2446 |
|
|
{ "", "x", "ORFPX64 II& \\", },
|
2447 |
|
|
{ "", "x", "ORVDX64 I& \\", },
|
2448 |
|
|
{ "", "x", "ORVDX64 II& \\", },
|
2449 |
87 |
lampret |
{ "", "x", "&\\", },
|
2450 |
14 |
lampret |
|
2451 |
|
|
};
|
2452 |
87 |
lampret |
|
2453 |
|
|
struct or1k_order {
|
2454 |
|
|
char *title;
|
2455 |
|
|
unsigned long classes;
|
2456 |
|
|
} or1k_order[] = {
|
2457 |
|
|
|
2458 |
|
|
{ "ORBIS32/64", (1<<ORBIS32I)>>1 | (1<<ORBIS32II)>>1 | (1<<ORBIS64I)>>1 | (1<<ORBIS64II)>>1, },
|
2459 |
|
|
{ "ORFPX32/64", (1<<ORFPX32I)>>1 | (1<<ORFPX32II)>>1 | (1<<ORFPX64I)>>1 | (1<<ORFPX64II)>>1, },
|
2460 |
|
|
{ "ORVDX64", (1<<ORVDX64I)>>1 | (1<<ORVDX64II)>>1, },
|
2461 |
|
|
{ "", 0, },
|
2462 |
|
|
|
2463 |
|
|
};
|
2464 |
487 |
markom |
|
2465 |
|
|
|