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[/] [or1k/] [trunk/] [hello-uart/] [ram.ld] - Blame information for rev 1780

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MEMORY
        {
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
        ram     : ORIGIN = 0x00002000, LENGTH = 0x00200000 - 0x00002000
        }
 
SECTIONS
{
        .vectors :
        {
        *(.vectors)
        } > vectors
 
        .text :
        {
        *(.text)
        } > ram
 
        .data :
        {
        *(.data)
        } > ram
 
        .rodata :
        {
        *(.rodata)
        } > ram
 
        .bss :
        {
        *(.bss)
        } > ram
 
        .stack :
        {
        *(.stack)
        _src_addr = .;
        } > ram
}

Line No.	Rev	Author	Line
1	1223	dries	`MEMORY`
2			`{`
3			`vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000`
4			`ram : ORIGIN = 0x00002000, LENGTH = 0x00200000 - 0x00002000`
5			`}`
6
7			`SECTIONS`
8			`{`
9			`.vectors :`
10			`{`
11			`*(.vectors)`
12			`} > vectors`
13
14			`.text :`
15			`{`
16			`*(.text)`
17			`} > ram`
18
19			`.data :`
20			`{`
21			`*(.data)`
22			`} > ram`
23
24			`.rodata :`
25			`{`
26			`*(.rodata)`
27			`} > ram`
28
29			`.bss :`
30			`{`
31			`*(.bss)`
32			`} > ram`
33
34			`.stack :`
35			`{`
36			`*(.stack)`
37			`_src_addr = .;`
38			`} > ram`
39			`}`

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[/] [or1k/] [trunk/] [hello-uart/] [ram.ld] - Blame information for rev 1780