OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [insight/] [dejagnu/] [baseboards/] [d30v-sim.exp] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 578 markom
# This is a list of toolchains that are supported on this board.
2
set_board_info target_install  {d30v-elf}
3
 
4
# Load the generic configuration for this board. This will define any
5
# routines needed to communicate with the board.
6
load_generic_config "sim";
7
 
8
# basic-sim.exp is a basic description for the standard Cygnus simulator.
9
load_base_board_description "basic-sim"
10
 
11
# The name of the simulator directory is "d30v".
12
setup_sim d30v
13
 
14
# The compiler used to build for this board. This has *nothing* to do
15
# with what compiler is tested if we're testing gcc.
16
set_board_info compiler  "[find_gcc]"
17
 
18
# We only support newlib on this target. We assume that all multilib
19
# options have been specified before we get here.
20
# Pass -C to the assembler to suppress the warning about symbols being the same name as registers
21
set_board_info cflags  "[libgloss_include_flags] [newlib_include_flags] -Wa,-C"
22
set_board_info ldflags  "[libgloss_link_flags] [newlib_link_flags] -mextmem -Wl,--defsym,__stack=0x80800000"
23
# No linker script needed.
24
set_board_info ldscript "";
25
 
26
# Can't pass arguments to programs on this target..
27
set_board_info noargs  1
28
# And there's no support for signals.
29
set_board_info gdb,nosignals  1
30
 
31
# Used by a few gcc.c-torture testcases to delimit how large the stack can
32
# be.
33
set_board_info gcc,stack_size  5000

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.