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/* Target-specific definition for the Mitsubishi D30V
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Copyright 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#ifndef TM_D30V_H
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#define TM_D30V_H
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#include "regcache.h"
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/* Define the bit, byte, and word ordering of the machine. */
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#define TARGET_BYTE_ORDER BIG_ENDIAN
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/* Offset from address of function to start of its code.
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Zero on most machines. */
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#define FUNCTION_START_OFFSET 0
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/* these are the addresses the D30V-EVA board maps data */
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/* and instruction memory to. */
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#define DMEM_START 0x20000000
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#define IMEM_START 0x00000000 /* was 0x10000000 */
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#define STACK_START 0x20007ffe
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/* Forward decls for prototypes */
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struct frame_info;
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struct frame_saved_regs;
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struct type;
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struct value;
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/* Advance PC across any function entry prologue instructions
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to reach some "real" code. */
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extern CORE_ADDR d30v_skip_prologue (CORE_ADDR);
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#define SKIP_PROLOGUE(ip) (d30v_skip_prologue (ip))
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/* Stack grows downward. */
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#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
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/* for a breakpoint, use "dbt || nop" */
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#define BREAKPOINT {0x00, 0xb0, 0x00, 0x00,\
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0x00, 0xf0, 0x00, 0x00}
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/* If your kernel resets the pc after the trap happens you may need to
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define this before including this file. */
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#define DECR_PC_AFTER_BREAK 0
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#define REGISTER_NAMES \
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{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
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"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
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"r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
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"r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
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"r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
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"r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", \
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"spi", "spu", \
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"psw", "bpsw", "pc", "bpc", "dpsw", "dpc", "cr6", "rpt_c", \
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"rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "eit_vb",\
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"int_s", "int_m", "a0", "a1" \
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}
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#define NUM_REGS 86
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/* Register numbers of various important registers.
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Note that some of these values are "real" register numbers,
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and correspond to the general registers of the machine,
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and some are "phony" register numbers which are too large
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to be actual register numbers as far as the user is concerned
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but do serve to get the desired values when passed to read_register. */
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#define R0_REGNUM 0
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#define FP_REGNUM 61
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#define LR_REGNUM 62
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#define SP_REGNUM 63
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#define SPI_REGNUM 64 /* Interrupt stack pointer */
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#define SPU_REGNUM 65 /* User stack pointer */
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#define CREGS_START 66
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#define PSW_REGNUM (CREGS_START + 0) /* psw, bpsw, or dpsw??? */
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#define PSW_SM (((unsigned long)0x80000000) >> 0) /* Stack mode: 0/SPI */
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/* 1/SPU */
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#define PSW_EA (((unsigned long)0x80000000) >> 2) /* Execution status */
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#define PSW_DB (((unsigned long)0x80000000) >> 3) /* Debug mode */
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#define PSW_DS (((unsigned long)0x80000000) >> 4) /* Debug EIT status */
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#define PSW_IE (((unsigned long)0x80000000) >> 5) /* Interrupt enable */
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#define PSW_RP (((unsigned long)0x80000000) >> 6) /* Repeat enable */
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#define PSW_MD (((unsigned long)0x80000000) >> 7) /* Modulo enable */
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#define PSW_F0 (((unsigned long)0x80000000) >> 17) /* F0 flag */
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#define PSW_F1 (((unsigned long)0x80000000) >> 19) /* F1 flag */
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#define PSW_F2 (((unsigned long)0x80000000) >> 21) /* F2 flag */
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#define PSW_F3 (((unsigned long)0x80000000) >> 23) /* F3 flag */
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#define PSW_S (((unsigned long)0x80000000) >> 25) /* Saturation flag */
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#define PSW_V (((unsigned long)0x80000000) >> 27) /* Overflow flag */
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#define PSW_VA (((unsigned long)0x80000000) >> 29) /* Accum. overflow */
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#define PSW_C (((unsigned long)0x80000000) >> 31) /* Carry/Borrow flag */
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#define BPSW_REGNUM (CREGS_START + 1) /* Backup PSW (on interrupt) */
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#define PC_REGNUM (CREGS_START + 2) /* pc, bpc, or dpc??? */
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#define BPC_REGNUM (CREGS_START + 3) /* Backup PC (on interrupt) */
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#define DPSW_REGNUM (CREGS_START + 4) /* Backup PSW (on debug trap) */
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#define DPC_REGNUM (CREGS_START + 5) /* Backup PC (on debug trap) */
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#define RPT_C_REGNUM (CREGS_START + 7) /* Loop count */
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#define RPT_S_REGNUM (CREGS_START + 8) /* Loop start address */
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#define RPT_E_REGNUM (CREGS_START + 9) /* Loop end address */
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#define MOD_S_REGNUM (CREGS_START + 10)
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#define MOD_E_REGNUM (CREGS_START + 11)
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#define IBA_REGNUM (CREGS_START + 14) /* Instruction break address */
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#define EIT_VB_REGNUM (CREGS_START + 15) /* Vector base address */
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#define INT_S_REGNUM (CREGS_START + 16) /* Interrupt status */
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#define INT_M_REGNUM (CREGS_START + 17) /* Interrupt mask */
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#define A0_REGNUM 84
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#define A1_REGNUM 85
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/* Say how much memory is needed to store a copy of the register set */
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#define REGISTER_BYTES ((NUM_REGS - 2) * 4 + 2 * 8)
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/* Index within `registers' of the first byte of the space for
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register N. */
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#define REGISTER_BYTE(N) \
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( ((N) >= A0_REGNUM) ? ( ((N) - A0_REGNUM) * 8 + A0_REGNUM * 4 ) : ((N) * 4) )
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/* Number of bytes of storage in the actual machine representation
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for register N. */
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#define REGISTER_RAW_SIZE(N) ( ((N) >= A0_REGNUM) ? 8 : 4 )
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/* Number of bytes of storage in the program's representation
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for register N. */
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#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
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/* Largest value REGISTER_RAW_SIZE can have. */
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#define MAX_REGISTER_RAW_SIZE 8
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/* Largest value REGISTER_VIRTUAL_SIZE can have. */
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#define MAX_REGISTER_VIRTUAL_SIZE 8
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/* Return the GDB type object for the "standard" data type
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of data in register N. */
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#define REGISTER_VIRTUAL_TYPE(N) \
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( ((N) < A0_REGNUM ) ? builtin_type_long : builtin_type_long_long)
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/* Writing to r0 is a noop (not an error or exception or anything like
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that, however). */
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#define CANNOT_STORE_REGISTER(regno) ((regno) == R0_REGNUM)
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void d30v_do_registers_info (int regnum, int fpregs);
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#define DO_REGISTERS_INFO d30v_do_registers_info
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/* Store the address of the place in which to copy the structure the
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subroutine will return. This is called from call_function.
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We store structs through a pointer passed in R2 */
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#define STORE_STRUCT_RETURN(ADDR, SP) \
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{ write_register (2, (ADDR)); }
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/* Write into appropriate registers a function return value
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of type TYPE, given in virtual format.
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Things always get returned in R2/R3 */
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#define STORE_RETURN_VALUE(TYPE,VALBUF) \
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write_register_bytes (REGISTER_BYTE(2), VALBUF, TYPE_LENGTH (TYPE))
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/* Extract from an array REGBUF containing the (raw) register state
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the address in which a function should return its structure value,
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as a CORE_ADDR (or an expression that can be used as one). */
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#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (((CORE_ADDR *)(REGBUF))[2])
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/* Define other aspects of the stack frame.
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we keep a copy of the worked out return pc lying around, since it
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is a useful bit of info */
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#define EXTRA_FRAME_INFO \
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CORE_ADDR return_pc; \
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CORE_ADDR dummy; \
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int frameless; \
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int size;
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#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
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d30v_init_extra_frame_info(fromleaf, fi)
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extern void d30v_init_extra_frame_info (int fromleaf, struct frame_info *fi);
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/* A macro that tells us whether the function invocation represented
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by FI does not have a frame on the stack associated with it. If it
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does not, FRAMELESS is set to 1, else 0. */
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#define FRAMELESS_FUNCTION_INVOCATION(FI) \
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(frameless_look_for_prologue (FI))
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CORE_ADDR d30v_frame_chain (struct frame_info *frame);
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#define FRAME_CHAIN(FRAME) d30v_frame_chain(FRAME)
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extern int d30v_frame_chain_valid (CORE_ADDR, struct frame_info *);
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#define FRAME_CHAIN_VALID(chain, thisframe) d30v_frame_chain_valid (chain, thisframe)
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#define FRAME_SAVED_PC(FRAME) ((FRAME)->return_pc)
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#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
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#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
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void d30v_init_frame_pc (int fromleaf, struct frame_info *prev);
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#define INIT_FRAME_PC_FIRST(fromleaf, prev) d30v_init_frame_pc(fromleaf, prev)
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#define INIT_FRAME_PC(fromleaf, prev) /* nada */
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/* Immediately after a function call, return the saved pc. We can't */
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/* use frame->return_pc beause that is determined by reading R62 off the */
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/* stack and that may not be written yet. */
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#define SAVED_PC_AFTER_CALL(frame) (read_register(LR_REGNUM))
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/* Set VAL to the number of args passed to frame described by FI.
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Can set VAL to -1, meaning no way to tell. */
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/* We can't tell how many args there are */
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#define FRAME_NUM_ARGS(fi) (-1)
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/* Return number of bytes at start of arglist that are not really args. */
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#define FRAME_ARGS_SKIP 0
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/* Put here the code to store, into a struct frame_saved_regs,
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the addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special:
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the address we return for it IS the sp for the next frame. */
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#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
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d30v_frame_find_saved_regs(frame_info, &(frame_saved_regs))
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extern void d30v_frame_find_saved_regs (struct frame_info *,
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struct frame_saved_regs *);
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/* DUMMY FRAMES. Need these to support inferior function calls.
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They work like this on D30V:
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First we set a breakpoint at 0 or __start.
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Then we push all the registers onto the stack.
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Then put the function arguments in the proper registers and set r13
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to our breakpoint address.
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Finally call the function directly.
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When it hits the breakpoint, clear the break point and pop the old
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register contents off the stack. */
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#define CALL_DUMMY { 0 }
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#define PUSH_DUMMY_FRAME
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#define CALL_DUMMY_START_OFFSET 0
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#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
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#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
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extern CORE_ADDR d30v_call_dummy_address (void);
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#define CALL_DUMMY_ADDRESS() d30v_call_dummy_address()
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#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
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sp = d30v_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
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#define PC_IN_CALL_DUMMY(pc, sp, frame_address) ( pc == IMEM_START + 4 )
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extern CORE_ADDR d30v_fix_call_dummy (char *, CORE_ADDR, CORE_ADDR,
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int, struct value **,
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struct type *, int);
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#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
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(d30v_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
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extern CORE_ADDR d30v_push_arguments (int, struct value **, CORE_ADDR, int,
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CORE_ADDR);
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/* Extract from an array REGBUF containing the (raw) register state
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a function return value of type TYPE, and copy that, in virtual format,
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into VALBUF. */
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#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
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d30v_extract_return_value(TYPE, REGBUF, VALBUF)
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extern void d30v_extract_return_value (struct type *, char *, char *);
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/* Discard from the stack the innermost frame,
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restoring all saved registers. */
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#define POP_FRAME d30v_pop_frame();
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extern void d30v_pop_frame (void);
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#define REGISTER_SIZE 4
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/* Need to handle SP special, as we need to select between spu and spi. */
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#if 0 /* XXX until the simulator is fixed */
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#define TARGET_READ_SP() ((read_register (PSW_REGNUM) & PSW_SM) \
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? read_register (SPU_REGNUM) \
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: read_register (SPI_REGNUM))
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315 |
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316 |
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#define TARGET_WRITE_SP(val) ((read_register (PSW_REGNUM) & PSW_SM) \
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317 |
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? write_register (SPU_REGNUM, (val)) \
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: write_register (SPI_REGNUM, (val)))
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#endif
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320 |
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321 |
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#define STACK_ALIGN(len) (((len) + 7 ) & ~7)
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322 |
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323 |
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/* Turn this on to cause remote-sim.c to use sim_set/clear_breakpoint. */
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325 |
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#define SIM_HAS_BREAKPOINTS
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326 |
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327 |
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#endif /* TM_D30V_H */
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