OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [insight/] [gdb/] [config/] [i960/] [tm-i960.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 578 markom
/* Parameters for target machine Intel 960, for GDB, the GNU debugger.
2
   Copyright 1990, 1991, 1993, 1994, 1996, 1998, 1999, 2000
3
   Free Software Foundation, Inc.
4
   Contributed by Intel Corporation.
5
   This file is part of GDB.
6
 
7
   This program is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 2 of the License, or
10
   (at your option) any later version.
11
 
12
   This program is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with this program; if not, write to the Free Software
19
   Foundation, Inc., 59 Temple Place - Suite 330,
20
   Boston, MA 02111-1307, USA.  */
21
 
22
/* Definitions to target GDB to any i960.  */
23
 
24
#ifndef I80960
25
#define I80960
26
#endif
27
 
28
/* Hook for the SYMBOL_CLASS of a parameter when decoding DBX symbol
29
   information.  In the i960, parameters can be stored as locals or as
30
   args, depending on the type of the debug record.
31
 
32
   From empirical observation, gcc960 uses N_LSYM to indicate
33
   arguments passed in registers and then copied immediately
34
   to the frame, and N_PSYM to indicate arguments passed in a
35
   g14-relative argument block.  */
36
 
37
#define DBX_PARM_SYMBOL_CLASS(type) ((type == N_LSYM)? LOC_LOCAL_ARG: LOC_ARG)
38
 
39
/* Byte order is configurable, but this machine runs little-endian.  */
40
#define TARGET_BYTE_ORDER       LITTLE_ENDIAN
41
 
42
/* We have IEEE floating point, if we have any float at all.  */
43
 
44
#define IEEE_FLOAT (1)
45
 
46
/* Offset from address of function to start of its code.
47
   Zero on most machines.  */
48
 
49
#define FUNCTION_START_OFFSET 0
50
 
51
/* Advance ip across any function entry prologue instructions
52
   to reach some "real" code.  */
53
 
54
#define SKIP_PROLOGUE(ip)       (i960_skip_prologue (ip))
55
extern CORE_ADDR i960_skip_prologue ();
56
 
57
/* Immediately after a function call, return the saved ip.
58
   Can't always go through the frames for this because on some machines
59
   the new frame is not set up until the new function
60
   executes some instructions.  */
61
 
62
#define SAVED_PC_AFTER_CALL(frame) (saved_pc_after_call (frame))
63
extern CORE_ADDR saved_pc_after_call ();
64
 
65
/* Stack grows upward */
66
 
67
#define INNER_THAN(lhs,rhs) ((lhs) > (rhs))
68
 
69
/* Say how long (ordinary) registers are.  This is a piece of bogosity
70
   used in push_word and a few other places; REGISTER_RAW_SIZE is the
71
   real way to know how big a register is.  */
72
 
73
#define REGISTER_SIZE 4
74
 
75
/* Number of machine registers */
76
#define NUM_REGS 40
77
 
78
/* Initializer for an array of names of registers.
79
   There should be NUM_REGS strings in this initializer.  */
80
 
81
#define REGISTER_NAMES { \
82
        /*  0 */ "pfp", "sp",  "rip", "r3",  "r4",  "r5",  "r6",  "r7", \
83
        /*  8 */ "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",\
84
        /* 16 */ "g0",  "g1",  "g2",  "g3",  "g4",  "g5",  "g6",  "g7", \
85
        /* 24 */ "g8",  "g9",  "g10", "g11", "g12", "g13", "g14", "fp", \
86
        /* 32 */ "pcw", "ac",  "tc",  "ip",  "fp0", "fp1", "fp2", "fp3",\
87
}
88
 
89
/* Register numbers of various important registers (used to index
90
   into arrays of register names and register values).  */
91
 
92
#define R0_REGNUM   0           /* First local register           */
93
#define SP_REGNUM   1           /* Contains address of top of stack */
94
#define RIP_REGNUM  2           /* Return instruction pointer (local r2) */
95
#define R15_REGNUM 15           /* Last local register            */
96
#define G0_REGNUM  16           /* First global register  */
97
#define G13_REGNUM 29           /* g13 - holds struct return address */
98
#define G14_REGNUM 30           /* g14 - ptr to arg block / leafproc return address */
99
#define FP_REGNUM  31           /* Contains address of executing stack frame */
100
#define PCW_REGNUM 32           /* process control word */
101
#define ACW_REGNUM 33           /* arithmetic control word */
102
#define TCW_REGNUM 34           /* trace control word */
103
#define IP_REGNUM  35           /* instruction pointer */
104
#define FP0_REGNUM 36           /* First floating point register */
105
 
106
/* Some registers have more than one name */
107
 
108
#define PC_REGNUM  IP_REGNUM    /* GDB refers to ip as the Program Counter */
109
#define PFP_REGNUM R0_REGNUM    /* Previous frame pointer */
110
 
111
/* Total amount of space needed to store our copies of the machine's
112
   register state, the array `registers'.  */
113
#define REGISTER_BYTES ((36*4) + (4*10))
114
 
115
/* Index within `registers' of the first byte of the space for register N.  */
116
 
117
#define REGISTER_BYTE(N) ( (N) < FP0_REGNUM ? \
118
                                (4*(N)) : ((10*(N)) - (6*FP0_REGNUM)) )
119
 
120
/* The i960 has register windows, sort of.  */
121
 
122
#define HAVE_REGISTER_WINDOWS
123
 
124
/* Is this register part of the register window system?  A yes answer
125
   implies that 1) The name of this register will not be the same in
126
   other frames, and 2) This register is automatically "saved" upon
127
   subroutine calls and thus there is no need to search more than one
128
   stack frame for it.
129
 
130
   On the i960, in fact, the name of this register in another frame is
131
   "mud" -- there is no overlap between the windows.  Each window is
132
   simply saved into the stack (true for our purposes, after having been
133
   flushed; normally they reside on-chip and are restored from on-chip
134
   without ever going to memory).  */
135
 
136
#define REGISTER_IN_WINDOW_P(regnum)    ((regnum) <= R15_REGNUM)
137
 
138
/* Number of bytes of storage in the actual machine representation
139
   for register N.  On the i960, all regs are 4 bytes except for floating
140
   point, which are 10.  NINDY only sends us 8 byte values for these,
141
   which is a pain, but VxWorks handles this correctly, so we must.  */
142
 
143
#define REGISTER_RAW_SIZE(N)            ( (N) < FP0_REGNUM ? 4 : 10 )
144
 
145
/* Number of bytes of storage in the program's representation for register N. */
146
 
147
#define REGISTER_VIRTUAL_SIZE(N)        ( (N) < FP0_REGNUM ? 4 : 8 )
148
 
149
/* Largest value REGISTER_RAW_SIZE can have.  */
150
 
151
#define MAX_REGISTER_RAW_SIZE 10
152
 
153
/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
154
 
155
#define MAX_REGISTER_VIRTUAL_SIZE 8
156
 
157
/* Nonzero if register N requires conversion from raw format to virtual
158
   format.  */
159
 
160
#define REGISTER_CONVERTIBLE(N) ((N) >= FP0_REGNUM)
161
 
162
#include "floatformat.h"
163
 
164
#define TARGET_LONG_DOUBLE_FORMAT &floatformat_i960_ext
165
 
166
/* Convert data from raw format for register REGNUM in buffer FROM
167
   to virtual format with type TYPE in buffer TO.  */
168
 
169
#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO)        \
170
{ \
171
  DOUBLEST val; \
172
  floatformat_to_doublest (&floatformat_i960_ext, (FROM), &val); \
173
  store_floating ((TO), TYPE_LENGTH (TYPE), val); \
174
}
175
 
176
/* Convert data from virtual format with type TYPE in buffer FROM
177
   to raw format for register REGNUM in buffer TO.  */
178
 
179
#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO)    \
180
{ \
181
  DOUBLEST val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
182
  floatformat_from_doublest (&floatformat_i960_ext, &val, (TO)); \
183
}
184
 
185
/* Return the GDB type object for the "standard" data type
186
   of data in register N.  */
187
 
188
#define REGISTER_VIRTUAL_TYPE(N) ((N) < FP0_REGNUM ? \
189
                                        builtin_type_int : builtin_type_double)
190
 
191
/* Macros for understanding function return values... */
192
 
193
/* Does the specified function use the "struct returning" convention
194
   or the "value returning" convention?  The "value returning" convention
195
   almost invariably returns the entire value in registers.  The
196
   "struct returning" convention often returns the entire value in
197
   memory, and passes a pointer (out of or into the function) saying
198
   where the value (is or should go).
199
 
200
   Since this sometimes depends on whether it was compiled with GCC,
201
   this is also an argument.  This is used in call_function to build a
202
   stack, and in value_being_returned to print return values.
203
 
204
   On i960, a structure is returned in registers g0-g3, if it will fit.
205
   If it's more than 16 bytes long, g13 pointed to it on entry.  */
206
 
207
extern use_struct_convention_fn i960_use_struct_convention;
208
#define USE_STRUCT_CONVENTION(gcc_p, type) i960_use_struct_convention (gcc_p, type)
209
 
210
/* Extract from an array REGBUF containing the (raw) register state
211
   a function return value of type TYPE, and copy that, in virtual format,
212
   into VALBUF.  This is only called if USE_STRUCT_CONVENTION for this
213
   type is 0.
214
 
215
   On the i960 we just take as many bytes as we need from G0 through G3.  */
216
 
217
#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
218
        memcpy(VALBUF, REGBUF+REGISTER_BYTE(G0_REGNUM), TYPE_LENGTH (TYPE))
219
 
220
/* If USE_STRUCT_CONVENTION produces a 1,
221
   extract from an array REGBUF containing the (raw) register state
222
   the address in which a function should return its structure value,
223
   as a CORE_ADDR (or an expression that can be used as one).
224
 
225
   Address of where to put structure was passed in in global
226
   register g13 on entry.  God knows what's in g13 now.  The
227
   (..., 0) below is to make it appear to return a value, though
228
   actually all it does is call error().  */
229
 
230
#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
231
   (error("Don't know where large structure is returned on i960"), 0)
232
 
233
/* Write into appropriate registers a function return value
234
   of type TYPE, given in virtual format, for "value returning" functions.
235
 
236
   For 'return' command:  not (yet) implemented for i960.  */
237
 
238
#define STORE_RETURN_VALUE(TYPE,VALBUF) \
239
    error ("Returning values from functions is not implemented in i960 gdb")
240
 
241
/* Store the address of the place in which to copy the structure the
242
   subroutine will return.  This is called from call_function. */
243
 
244
#define STORE_STRUCT_RETURN(ADDR, SP) \
245
    error ("Returning values from functions is not implemented in i960 gdb")
246
 
247
/* Describe the pointer in each stack frame to the previous stack frame
248
   (its caller).  */
249
 
250
/* FRAME_CHAIN takes a frame's nominal address
251
   and produces the frame's chain-pointer.
252
 
253
   However, if FRAME_CHAIN_VALID returns zero,
254
   it means the given frame is the outermost one and has no caller.  */
255
 
256
/* We cache information about saved registers in the frame structure,
257
   to save us from having to re-scan function prologues every time
258
   a register in a non-current frame is accessed.  */
259
 
260
#define EXTRA_FRAME_INFO        \
261
        struct frame_saved_regs *fsr;   \
262
        CORE_ADDR arg_pointer;
263
 
264
/* Zero the frame_saved_regs pointer when the frame is initialized,
265
   so that FRAME_FIND_SAVED_REGS () will know to allocate and
266
   initialize a frame_saved_regs struct the first time it is called.
267
   Set the arg_pointer to -1, which is not valid; 0 and other values
268
   indicate real, cached values.  */
269
 
270
#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
271
        ((fi)->fsr = 0, (fi)->arg_pointer = -1)
272
 
273
/* On the i960, we get the chain pointer by reading the PFP saved
274
   on the stack and clearing the status bits.  */
275
 
276
#define FRAME_CHAIN(thisframe) \
277
  (read_memory_integer (FRAME_FP(thisframe), 4) & ~0xf)
278
 
279
/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
280
   and has no caller.
281
 
282
   On the i960, each various target system type must define FRAME_CHAIN_VALID,
283
   since it differs between NINDY and VxWorks, the two currently supported
284
   targets types.  We leave it undefined here.  */
285
 
286
 
287
/* A macro that tells us whether the function invocation represented
288
   by FI does not have a frame on the stack associated with it.  If it
289
   does not, FRAMELESS is set to 1, else 0.  */
290
 
291
CORE_ADDR leafproc_return (CORE_ADDR ip);
292
#define FRAMELESS_FUNCTION_INVOCATION(FI) \
293
  (leafproc_return ((FI)->pc) != 0)
294
 
295
/* Note that in the i960 architecture the return pointer is saved in the
296
   *caller's* stack frame.
297
 
298
   Make sure to zero low-order bits because of bug in 960CA A-step part
299
   (instruction addresses should always be word-aligned anyway).  */
300
 
301
#define FRAME_SAVED_PC(frame) \
302
                        ((read_memory_integer(FRAME_CHAIN(frame)+8,4)) & ~3)
303
 
304
/* On the i960, FRAME_ARGS_ADDRESS should return the value of
305
   g14 as passed into the frame, if known.  We need a function for this.
306
   We cache this value in the frame info if we've already looked it up.  */
307
 
308
#define FRAME_ARGS_ADDRESS(fi)  \
309
  (((fi)->arg_pointer != -1)? (fi)->arg_pointer: frame_args_address (fi, 0))
310
extern CORE_ADDR frame_args_address ();         /* i960-tdep.c */
311
 
312
/* This is the same except it should return 0 when
313
   it does not really know where the args are, rather than guessing.
314
   This value is not cached since it is only used infrequently.  */
315
 
316
#define FRAME_ARGS_ADDRESS_CORRECT(fi)  (frame_args_address (fi, 1))
317
 
318
#define FRAME_LOCALS_ADDRESS(fi)        (fi)->frame
319
 
320
/* Set NUMARGS to the number of args passed to a frame.
321
   Can return -1, meaning no way to tell.  */
322
 
323
#define FRAME_NUM_ARGS(fi)      (-1)
324
 
325
/* Return number of bytes at start of arglist that are not really args.  */
326
 
327
#define FRAME_ARGS_SKIP 0
328
 
329
/* Produce the positions of the saved registers in a stack frame.  */
330
 
331
#define FRAME_FIND_SAVED_REGS(frame_info_addr, sr) \
332
        frame_find_saved_regs (frame_info_addr, &sr)
333
extern void frame_find_saved_regs ();   /* See i960-tdep.c */
334
 
335
/* Things needed for making calls to functions in the inferior process */
336
 
337
/* Push an empty stack frame, to record the current ip, etc.
338
 
339
   Not (yet?) implemented for i960.  */
340
 
341
#define PUSH_DUMMY_FRAME        \
342
error("Function calls into the inferior process are not supported on the i960")
343
 
344
/* Discard from the stack the innermost frame, restoring all registers.  */
345
 
346
 
347
void i960_pop_frame (void);
348
#define POP_FRAME \
349
        i960_pop_frame ()
350
 
351
 
352
/* This sequence of words is the instructions
353
 
354
   callx 0x00000000
355
   fmark
356
 */
357
 
358
/* #define CALL_DUMMY { 0x86003000, 0x00000000, 0x66003e00 } */
359
 
360
                                                                                                                                                            /* #define CALL_DUMMY_START_OFFSET 0 *//* Start execution at beginning of dummy */
361
 
362
/* Indicate that we don't support calling inferior child functions.  */
363
 
364
#undef CALL_DUMMY
365
 
366
/* Insert the specified number of args and function address
367
   into a call sequence of the above form stored at 'dummyname'.
368
 
369
   Ignore arg count on i960.  */
370
 
371
/* #define FIX_CALL_DUMMY(dummyname, fun, nargs) *(((int *)dummyname)+1) = fun */
372
 
373
#undef FIX_CALL_DUMMY
374
 
375
 
376
/* Interface definitions for kernel debugger KDB */
377
/* (Not relevant to i960.) */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.