1 |
578 |
markom |
/* Target-dependent code for Motorola 68HC11 & 68HC12
|
2 |
|
|
Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
|
3 |
|
|
Contributed by Stephane Carrez, stcarrez@worldnet.fr
|
4 |
|
|
|
5 |
|
|
This file is part of GDB.
|
6 |
|
|
|
7 |
|
|
This program is free software; you can redistribute it and/or modify
|
8 |
|
|
it under the terms of the GNU General Public License as published by
|
9 |
|
|
the Free Software Foundation; either version 2 of the License, or
|
10 |
|
|
(at your option) any later version.
|
11 |
|
|
|
12 |
|
|
This program is distributed in the hope that it will be useful,
|
13 |
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
14 |
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
15 |
|
|
GNU General Public License for more details.
|
16 |
|
|
|
17 |
|
|
You should have received a copy of the GNU General Public License
|
18 |
|
|
along with this program; if not, write to the Free Software
|
19 |
|
|
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
20 |
|
|
|
21 |
|
|
|
22 |
|
|
#include "defs.h"
|
23 |
|
|
#include "frame.h"
|
24 |
|
|
#include "obstack.h"
|
25 |
|
|
#include "symtab.h"
|
26 |
|
|
#include "gdbtypes.h"
|
27 |
|
|
#include "gdbcmd.h"
|
28 |
|
|
#include "gdbcore.h"
|
29 |
|
|
#include "gdb_string.h"
|
30 |
|
|
#include "value.h"
|
31 |
|
|
#include "inferior.h"
|
32 |
|
|
#include "dis-asm.h"
|
33 |
|
|
#include "symfile.h"
|
34 |
|
|
#include "objfiles.h"
|
35 |
|
|
#include "arch-utils.h"
|
36 |
|
|
#include "regcache.h"
|
37 |
|
|
|
38 |
|
|
#include "target.h"
|
39 |
|
|
#include "opcode/m68hc11.h"
|
40 |
|
|
|
41 |
|
|
/* Register numbers of various important registers.
|
42 |
|
|
Note that some of these values are "real" register numbers,
|
43 |
|
|
and correspond to the general registers of the machine,
|
44 |
|
|
and some are "phony" register numbers which are too large
|
45 |
|
|
to be actual register numbers as far as the user is concerned
|
46 |
|
|
but do serve to get the desired values when passed to read_register. */
|
47 |
|
|
|
48 |
|
|
#define HARD_X_REGNUM 0
|
49 |
|
|
#define HARD_D_REGNUM 1
|
50 |
|
|
#define HARD_Y_REGNUM 2
|
51 |
|
|
#define HARD_SP_REGNUM 3
|
52 |
|
|
#define HARD_PC_REGNUM 4
|
53 |
|
|
|
54 |
|
|
#define HARD_A_REGNUM 5
|
55 |
|
|
#define HARD_B_REGNUM 6
|
56 |
|
|
#define HARD_CCR_REGNUM 7
|
57 |
|
|
#define M68HC11_LAST_HARD_REG (HARD_CCR_REGNUM)
|
58 |
|
|
|
59 |
|
|
/* Z is replaced by X or Y by gcc during machine reorg.
|
60 |
|
|
??? There is no way to get it and even know whether
|
61 |
|
|
it's in X or Y or in ZS. */
|
62 |
|
|
#define SOFT_Z_REGNUM 8
|
63 |
|
|
|
64 |
|
|
/* Soft registers. These registers are special. There are treated
|
65 |
|
|
like normal hard registers by gcc and gdb (ie, within dwarf2 info).
|
66 |
|
|
They are physically located in memory. */
|
67 |
|
|
#define SOFT_FP_REGNUM 9
|
68 |
|
|
#define SOFT_TMP_REGNUM 10
|
69 |
|
|
#define SOFT_ZS_REGNUM 11
|
70 |
|
|
#define SOFT_XY_REGNUM 12
|
71 |
|
|
#define SOFT_UNUSED_REGNUM 13
|
72 |
|
|
#define SOFT_D1_REGNUM 14
|
73 |
|
|
#define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
|
74 |
|
|
#define M68HC11_MAX_SOFT_REGS 32
|
75 |
|
|
|
76 |
|
|
#define M68HC11_NUM_REGS (8)
|
77 |
|
|
#define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
|
78 |
|
|
#define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
|
79 |
|
|
|
80 |
|
|
#define M68HC11_REG_SIZE (2)
|
81 |
|
|
|
82 |
|
|
struct insn_sequence;
|
83 |
|
|
struct gdbarch_tdep
|
84 |
|
|
{
|
85 |
|
|
/* Stack pointer correction value. For 68hc11, the stack pointer points
|
86 |
|
|
to the next push location. An offset of 1 must be applied to obtain
|
87 |
|
|
the address where the last value is saved. For 68hc12, the stack
|
88 |
|
|
pointer points to the last value pushed. No offset is necessary. */
|
89 |
|
|
int stack_correction;
|
90 |
|
|
|
91 |
|
|
/* Description of instructions in the prologue. */
|
92 |
|
|
struct insn_sequence *prologue;
|
93 |
|
|
};
|
94 |
|
|
|
95 |
|
|
#define M6811_TDEP gdbarch_tdep (current_gdbarch)
|
96 |
|
|
#define STACK_CORRECTION (M6811_TDEP->stack_correction)
|
97 |
|
|
|
98 |
|
|
struct frame_extra_info
|
99 |
|
|
{
|
100 |
|
|
int frame_reg;
|
101 |
|
|
CORE_ADDR return_pc;
|
102 |
|
|
CORE_ADDR dummy;
|
103 |
|
|
int frameless;
|
104 |
|
|
int size;
|
105 |
|
|
};
|
106 |
|
|
|
107 |
|
|
/* Table of registers for 68HC11. This includes the hard registers
|
108 |
|
|
and the soft registers used by GCC. */
|
109 |
|
|
static char *
|
110 |
|
|
m68hc11_register_names[] =
|
111 |
|
|
{
|
112 |
|
|
"x", "d", "y", "sp", "pc", "a", "b",
|
113 |
|
|
"ccr", "z", "frame","tmp", "zs", "xy", 0,
|
114 |
|
|
"d1", "d2", "d3", "d4", "d5", "d6", "d7",
|
115 |
|
|
"d8", "d9", "d10", "d11", "d12", "d13", "d14",
|
116 |
|
|
"d15", "d16", "d17", "d18", "d19", "d20", "d21",
|
117 |
|
|
"d22", "d23", "d24", "d25", "d26", "d27", "d28",
|
118 |
|
|
"d29", "d30", "d31", "d32"
|
119 |
|
|
};
|
120 |
|
|
|
121 |
|
|
struct m68hc11_soft_reg
|
122 |
|
|
{
|
123 |
|
|
const char *name;
|
124 |
|
|
CORE_ADDR addr;
|
125 |
|
|
};
|
126 |
|
|
|
127 |
|
|
static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
|
128 |
|
|
|
129 |
|
|
#define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
|
130 |
|
|
|
131 |
|
|
static int soft_min_addr;
|
132 |
|
|
static int soft_max_addr;
|
133 |
|
|
static int soft_reg_initialized = 0;
|
134 |
|
|
|
135 |
|
|
/* Look in the symbol table for the address of a pseudo register
|
136 |
|
|
in memory. If we don't find it, pretend the register is not used
|
137 |
|
|
and not available. */
|
138 |
|
|
static void
|
139 |
|
|
m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
|
140 |
|
|
{
|
141 |
|
|
struct minimal_symbol *msymbol;
|
142 |
|
|
|
143 |
|
|
msymbol = lookup_minimal_symbol (name, NULL, NULL);
|
144 |
|
|
if (msymbol)
|
145 |
|
|
{
|
146 |
|
|
reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
|
147 |
|
|
reg->name = xstrdup (name);
|
148 |
|
|
|
149 |
|
|
/* Keep track of the address range for soft registers. */
|
150 |
|
|
if (reg->addr < (CORE_ADDR) soft_min_addr)
|
151 |
|
|
soft_min_addr = reg->addr;
|
152 |
|
|
if (reg->addr > (CORE_ADDR) soft_max_addr)
|
153 |
|
|
soft_max_addr = reg->addr;
|
154 |
|
|
}
|
155 |
|
|
else
|
156 |
|
|
{
|
157 |
|
|
reg->name = 0;
|
158 |
|
|
reg->addr = 0;
|
159 |
|
|
}
|
160 |
|
|
}
|
161 |
|
|
|
162 |
|
|
/* Initialize the table of soft register addresses according
|
163 |
|
|
to the symbol table. */
|
164 |
|
|
static void
|
165 |
|
|
m68hc11_initialize_register_info (void)
|
166 |
|
|
{
|
167 |
|
|
int i;
|
168 |
|
|
|
169 |
|
|
if (soft_reg_initialized)
|
170 |
|
|
return;
|
171 |
|
|
|
172 |
|
|
soft_min_addr = INT_MAX;
|
173 |
|
|
soft_max_addr = 0;
|
174 |
|
|
for (i = 0; i < M68HC11_ALL_REGS; i++)
|
175 |
|
|
{
|
176 |
|
|
soft_regs[i].name = 0;
|
177 |
|
|
}
|
178 |
|
|
|
179 |
|
|
m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
|
180 |
|
|
m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
|
181 |
|
|
m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
|
182 |
|
|
soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
|
183 |
|
|
m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
|
184 |
|
|
|
185 |
|
|
for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
|
186 |
|
|
{
|
187 |
|
|
char buf[10];
|
188 |
|
|
|
189 |
|
|
sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
|
190 |
|
|
m68hc11_get_register_info (&soft_regs[i], buf);
|
191 |
|
|
}
|
192 |
|
|
|
193 |
|
|
if (soft_regs[SOFT_FP_REGNUM].name == 0)
|
194 |
|
|
{
|
195 |
|
|
warning ("No frame soft register found in the symbol table.\n");
|
196 |
|
|
warning ("Stack backtrace will not work.\n");
|
197 |
|
|
}
|
198 |
|
|
soft_reg_initialized = 1;
|
199 |
|
|
}
|
200 |
|
|
|
201 |
|
|
/* Given an address in memory, return the soft register number if
|
202 |
|
|
that address corresponds to a soft register. Returns -1 if not. */
|
203 |
|
|
static int
|
204 |
|
|
m68hc11_which_soft_register (CORE_ADDR addr)
|
205 |
|
|
{
|
206 |
|
|
int i;
|
207 |
|
|
|
208 |
|
|
if (addr < soft_min_addr || addr > soft_max_addr)
|
209 |
|
|
return -1;
|
210 |
|
|
|
211 |
|
|
for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
|
212 |
|
|
{
|
213 |
|
|
if (soft_regs[i].name && soft_regs[i].addr == addr)
|
214 |
|
|
return i;
|
215 |
|
|
}
|
216 |
|
|
return -1;
|
217 |
|
|
}
|
218 |
|
|
|
219 |
|
|
/* Fetch a pseudo register. The 68hc11 soft registers are treated like
|
220 |
|
|
pseudo registers. They are located in memory. Translate the register
|
221 |
|
|
fetch into a memory read. */
|
222 |
|
|
void
|
223 |
|
|
m68hc11_fetch_pseudo_register (int regno)
|
224 |
|
|
{
|
225 |
|
|
char buf[MAX_REGISTER_RAW_SIZE];
|
226 |
|
|
|
227 |
|
|
m68hc11_initialize_register_info ();
|
228 |
|
|
|
229 |
|
|
/* Fetch a soft register: translate into a memory read. */
|
230 |
|
|
if (soft_regs[regno].name)
|
231 |
|
|
{
|
232 |
|
|
target_read_memory (soft_regs[regno].addr, buf, 2);
|
233 |
|
|
}
|
234 |
|
|
else
|
235 |
|
|
{
|
236 |
|
|
memset (buf, 0, 2);
|
237 |
|
|
}
|
238 |
|
|
supply_register (regno, buf);
|
239 |
|
|
}
|
240 |
|
|
|
241 |
|
|
/* Store a pseudo register. Translate the register store
|
242 |
|
|
into a memory write. */
|
243 |
|
|
static void
|
244 |
|
|
m68hc11_store_pseudo_register (int regno)
|
245 |
|
|
{
|
246 |
|
|
m68hc11_initialize_register_info ();
|
247 |
|
|
|
248 |
|
|
/* Store a soft register: translate into a memory write. */
|
249 |
|
|
if (soft_regs[regno].name)
|
250 |
|
|
{
|
251 |
|
|
char buf[MAX_REGISTER_RAW_SIZE];
|
252 |
|
|
|
253 |
|
|
read_register_gen (regno, buf);
|
254 |
|
|
target_write_memory (soft_regs[regno].addr, buf, 2);
|
255 |
|
|
}
|
256 |
|
|
}
|
257 |
|
|
|
258 |
|
|
static char *
|
259 |
|
|
m68hc11_register_name (int reg_nr)
|
260 |
|
|
{
|
261 |
|
|
if (reg_nr < 0)
|
262 |
|
|
return NULL;
|
263 |
|
|
if (reg_nr >= M68HC11_ALL_REGS)
|
264 |
|
|
return NULL;
|
265 |
|
|
|
266 |
|
|
/* If we don't know the address of a soft register, pretend it
|
267 |
|
|
does not exist. */
|
268 |
|
|
if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
|
269 |
|
|
return NULL;
|
270 |
|
|
return m68hc11_register_names[reg_nr];
|
271 |
|
|
}
|
272 |
|
|
|
273 |
|
|
static unsigned char *
|
274 |
|
|
m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
|
275 |
|
|
{
|
276 |
|
|
static unsigned char breakpoint[] = {0x0};
|
277 |
|
|
|
278 |
|
|
*lenptr = sizeof (breakpoint);
|
279 |
|
|
return breakpoint;
|
280 |
|
|
}
|
281 |
|
|
|
282 |
|
|
/* Immediately after a function call, return the saved pc before the frame
|
283 |
|
|
is setup. */
|
284 |
|
|
|
285 |
|
|
static CORE_ADDR
|
286 |
|
|
m68hc11_saved_pc_after_call (struct frame_info *frame)
|
287 |
|
|
{
|
288 |
|
|
CORE_ADDR addr;
|
289 |
|
|
|
290 |
|
|
addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION;
|
291 |
|
|
addr &= 0x0ffff;
|
292 |
|
|
return read_memory_integer (addr, 2) & 0x0FFFF;
|
293 |
|
|
}
|
294 |
|
|
|
295 |
|
|
static CORE_ADDR
|
296 |
|
|
m68hc11_frame_saved_pc (struct frame_info *frame)
|
297 |
|
|
{
|
298 |
|
|
return frame->extra_info->return_pc;
|
299 |
|
|
}
|
300 |
|
|
|
301 |
|
|
static CORE_ADDR
|
302 |
|
|
m68hc11_frame_args_address (struct frame_info *frame)
|
303 |
|
|
{
|
304 |
|
|
return frame->frame + frame->extra_info->size + STACK_CORRECTION + 2;
|
305 |
|
|
}
|
306 |
|
|
|
307 |
|
|
static CORE_ADDR
|
308 |
|
|
m68hc11_frame_locals_address (struct frame_info *frame)
|
309 |
|
|
{
|
310 |
|
|
return frame->frame;
|
311 |
|
|
}
|
312 |
|
|
|
313 |
|
|
/* Discard from the stack the innermost frame, restoring all saved
|
314 |
|
|
registers. */
|
315 |
|
|
|
316 |
|
|
static void
|
317 |
|
|
m68hc11_pop_frame (void)
|
318 |
|
|
{
|
319 |
|
|
register struct frame_info *frame = get_current_frame ();
|
320 |
|
|
register CORE_ADDR fp, sp;
|
321 |
|
|
register int regnum;
|
322 |
|
|
|
323 |
|
|
if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
|
324 |
|
|
generic_pop_dummy_frame ();
|
325 |
|
|
else
|
326 |
|
|
{
|
327 |
|
|
fp = FRAME_FP (frame);
|
328 |
|
|
FRAME_INIT_SAVED_REGS (frame);
|
329 |
|
|
|
330 |
|
|
/* Copy regs from where they were saved in the frame. */
|
331 |
|
|
for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
|
332 |
|
|
if (frame->saved_regs[regnum])
|
333 |
|
|
write_register (regnum,
|
334 |
|
|
read_memory_integer (frame->saved_regs[regnum], 2));
|
335 |
|
|
|
336 |
|
|
write_register (HARD_PC_REGNUM, frame->extra_info->return_pc);
|
337 |
|
|
sp = (fp + frame->extra_info->size + 2) & 0x0ffff;
|
338 |
|
|
write_register (HARD_SP_REGNUM, sp);
|
339 |
|
|
}
|
340 |
|
|
flush_cached_frames ();
|
341 |
|
|
}
|
342 |
|
|
|
343 |
|
|
|
344 |
|
|
/* 68HC11 & 68HC12 prologue analysis.
|
345 |
|
|
|
346 |
|
|
*/
|
347 |
|
|
#define MAX_CODES 12
|
348 |
|
|
|
349 |
|
|
/* 68HC11 opcodes. */
|
350 |
|
|
#undef M6811_OP_PAGE2
|
351 |
|
|
#define M6811_OP_PAGE2 (0x18)
|
352 |
|
|
#define M6811_OP_LDX (0xde)
|
353 |
|
|
#define M6811_OP_PSHX (0x3c)
|
354 |
|
|
#define M6811_OP_STS (0x9f)
|
355 |
|
|
#define M6811_OP_TSX (0x30)
|
356 |
|
|
#define M6811_OP_XGDX (0x8f)
|
357 |
|
|
#define M6811_OP_ADDD (0xc3)
|
358 |
|
|
#define M6811_OP_TXS (0x35)
|
359 |
|
|
#define M6811_OP_DES (0x34)
|
360 |
|
|
|
361 |
|
|
/* 68HC12 opcodes. */
|
362 |
|
|
#define M6812_OP_PAGE2 (0x18)
|
363 |
|
|
#define M6812_OP_MOVW (0x01)
|
364 |
|
|
#define M6812_PB_PSHW (0xae)
|
365 |
|
|
#define M6812_OP_STS (0x7f)
|
366 |
|
|
#define M6812_OP_LEAS (0x1b)
|
367 |
|
|
|
368 |
|
|
/* Operand extraction. */
|
369 |
|
|
#define OP_DIRECT (0x100) /* 8-byte direct addressing. */
|
370 |
|
|
#define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
|
371 |
|
|
#define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
|
372 |
|
|
#define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
|
373 |
|
|
|
374 |
|
|
/* Identification of the sequence. */
|
375 |
|
|
enum m6811_seq_type
|
376 |
|
|
{
|
377 |
|
|
P_LAST = 0,
|
378 |
|
|
P_SAVE_REG, /* Save a register on the stack. */
|
379 |
|
|
P_SET_FRAME, /* Setup the frame pointer. */
|
380 |
|
|
P_LOCAL_1, /* Allocate 1 byte for locals. */
|
381 |
|
|
P_LOCAL_2, /* Allocate 2 bytes for locals. */
|
382 |
|
|
P_LOCAL_N /* Allocate N bytes for locals. */
|
383 |
|
|
};
|
384 |
|
|
|
385 |
|
|
struct insn_sequence {
|
386 |
|
|
enum m6811_seq_type type;
|
387 |
|
|
unsigned length;
|
388 |
|
|
unsigned short code[MAX_CODES];
|
389 |
|
|
};
|
390 |
|
|
|
391 |
|
|
/* Sequence of instructions in the 68HC11 function prologue. */
|
392 |
|
|
static struct insn_sequence m6811_prologue[] = {
|
393 |
|
|
/* Sequences to save a soft-register. */
|
394 |
|
|
{ P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
|
395 |
|
|
M6811_OP_PSHX } },
|
396 |
|
|
{ P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
|
397 |
|
|
M6811_OP_PAGE2, M6811_OP_PSHX } },
|
398 |
|
|
|
399 |
|
|
/* Sequences to allocate local variables. */
|
400 |
|
|
{ P_LOCAL_N, 7, { M6811_OP_TSX,
|
401 |
|
|
M6811_OP_XGDX,
|
402 |
|
|
M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
|
403 |
|
|
M6811_OP_XGDX,
|
404 |
|
|
M6811_OP_TXS } },
|
405 |
|
|
{ P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
|
406 |
|
|
M6811_OP_PAGE2, M6811_OP_XGDX,
|
407 |
|
|
M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
|
408 |
|
|
M6811_OP_PAGE2, M6811_OP_XGDX,
|
409 |
|
|
M6811_OP_PAGE2, M6811_OP_TXS } },
|
410 |
|
|
{ P_LOCAL_1, 1, { M6811_OP_DES } },
|
411 |
|
|
{ P_LOCAL_2, 1, { M6811_OP_PSHX } },
|
412 |
|
|
{ P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
|
413 |
|
|
|
414 |
|
|
/* Initialize the frame pointer. */
|
415 |
|
|
{ P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
|
416 |
|
|
{ P_LAST, 0, { 0 } }
|
417 |
|
|
};
|
418 |
|
|
|
419 |
|
|
|
420 |
|
|
/* Sequence of instructions in the 68HC12 function prologue. */
|
421 |
|
|
static struct insn_sequence m6812_prologue[] = {
|
422 |
|
|
{ P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
|
423 |
|
|
OP_IMM_HIGH, OP_IMM_LOW } },
|
424 |
|
|
{ P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } },
|
425 |
|
|
{ P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
|
426 |
|
|
{ P_LAST, 0 }
|
427 |
|
|
};
|
428 |
|
|
|
429 |
|
|
|
430 |
|
|
/* Analyze the sequence of instructions starting at the given address.
|
431 |
|
|
Returns a pointer to the sequence when it is recognized and
|
432 |
|
|
the optional value (constant/address) associated with it.
|
433 |
|
|
Advance the pc for the next sequence. */
|
434 |
|
|
static struct insn_sequence *
|
435 |
|
|
m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc,
|
436 |
|
|
CORE_ADDR *val)
|
437 |
|
|
{
|
438 |
|
|
unsigned char buffer[MAX_CODES];
|
439 |
|
|
unsigned bufsize;
|
440 |
|
|
unsigned j;
|
441 |
|
|
CORE_ADDR cur_val;
|
442 |
|
|
short v = 0;
|
443 |
|
|
|
444 |
|
|
bufsize = 0;
|
445 |
|
|
for (; seq->type != P_LAST; seq++)
|
446 |
|
|
{
|
447 |
|
|
cur_val = 0;
|
448 |
|
|
for (j = 0; j < seq->length; j++)
|
449 |
|
|
{
|
450 |
|
|
if (bufsize < j + 1)
|
451 |
|
|
{
|
452 |
|
|
buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize,
|
453 |
|
|
1);
|
454 |
|
|
bufsize++;
|
455 |
|
|
}
|
456 |
|
|
/* Continue while we match the opcode. */
|
457 |
|
|
if (seq->code[j] == buffer[j])
|
458 |
|
|
continue;
|
459 |
|
|
|
460 |
|
|
if ((seq->code[j] & 0xf00) == 0)
|
461 |
|
|
break;
|
462 |
|
|
|
463 |
|
|
/* Extract a sequence parameter (address or constant). */
|
464 |
|
|
switch (seq->code[j])
|
465 |
|
|
{
|
466 |
|
|
case OP_DIRECT:
|
467 |
|
|
cur_val = (CORE_ADDR) buffer[j];
|
468 |
|
|
break;
|
469 |
|
|
|
470 |
|
|
case OP_IMM_HIGH:
|
471 |
|
|
cur_val = cur_val & 0x0ff;
|
472 |
|
|
cur_val |= (buffer[j] << 8);
|
473 |
|
|
break;
|
474 |
|
|
|
475 |
|
|
case OP_IMM_LOW:
|
476 |
|
|
cur_val &= 0x0ff00;
|
477 |
|
|
cur_val |= buffer[j];
|
478 |
|
|
break;
|
479 |
|
|
|
480 |
|
|
case OP_PBYTE:
|
481 |
|
|
if ((buffer[j] & 0xE0) == 0x80)
|
482 |
|
|
{
|
483 |
|
|
v = buffer[j] & 0x1f;
|
484 |
|
|
if (v & 0x10)
|
485 |
|
|
v |= 0xfff0;
|
486 |
|
|
}
|
487 |
|
|
else if ((buffer[j] & 0xfe) == 0xf0)
|
488 |
|
|
{
|
489 |
|
|
v = read_memory_unsigned_integer (*pc + j + 1, 1);
|
490 |
|
|
if (buffer[j] & 1)
|
491 |
|
|
v |= 0xff00;
|
492 |
|
|
*pc = *pc + 1;
|
493 |
|
|
}
|
494 |
|
|
else if (buffer[j] == 0xf2)
|
495 |
|
|
{
|
496 |
|
|
v = read_memory_unsigned_integer (*pc + j + 1, 2);
|
497 |
|
|
*pc = *pc + 2;
|
498 |
|
|
}
|
499 |
|
|
cur_val = v;
|
500 |
|
|
break;
|
501 |
|
|
}
|
502 |
|
|
}
|
503 |
|
|
|
504 |
|
|
/* We have a full match. */
|
505 |
|
|
if (j == seq->length)
|
506 |
|
|
{
|
507 |
|
|
*val = cur_val;
|
508 |
|
|
*pc = *pc + j;
|
509 |
|
|
return seq;
|
510 |
|
|
}
|
511 |
|
|
}
|
512 |
|
|
return 0;
|
513 |
|
|
}
|
514 |
|
|
|
515 |
|
|
/* Analyze the function prologue to find some information
|
516 |
|
|
about the function:
|
517 |
|
|
- the PC of the first line (for m68hc11_skip_prologue)
|
518 |
|
|
- the offset of the previous frame saved address (from current frame)
|
519 |
|
|
- the soft registers which are pushed. */
|
520 |
|
|
static void
|
521 |
|
|
m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp,
|
522 |
|
|
CORE_ADDR *first_line,
|
523 |
|
|
int *frame_offset, CORE_ADDR *pushed_regs)
|
524 |
|
|
{
|
525 |
|
|
CORE_ADDR save_addr;
|
526 |
|
|
CORE_ADDR func_end;
|
527 |
|
|
int size;
|
528 |
|
|
int found_frame_point;
|
529 |
|
|
int saved_reg;
|
530 |
|
|
CORE_ADDR first_pc;
|
531 |
|
|
int done = 0;
|
532 |
|
|
struct insn_sequence *seq_table;
|
533 |
|
|
|
534 |
|
|
first_pc = get_pc_function_start (pc);
|
535 |
|
|
size = 0;
|
536 |
|
|
|
537 |
|
|
m68hc11_initialize_register_info ();
|
538 |
|
|
if (first_pc == 0)
|
539 |
|
|
{
|
540 |
|
|
*frame_offset = 0;
|
541 |
|
|
*first_line = pc;
|
542 |
|
|
return;
|
543 |
|
|
}
|
544 |
|
|
|
545 |
|
|
seq_table = gdbarch_tdep (current_gdbarch)->prologue;
|
546 |
|
|
|
547 |
|
|
/* The 68hc11 stack is as follows:
|
548 |
|
|
|
549 |
|
|
|
550 |
|
|
| |
|
551 |
|
|
+-----------+
|
552 |
|
|
| |
|
553 |
|
|
| args |
|
554 |
|
|
| |
|
555 |
|
|
+-----------+
|
556 |
|
|
| PC-return |
|
557 |
|
|
+-----------+
|
558 |
|
|
| Old frame |
|
559 |
|
|
+-----------+
|
560 |
|
|
| |
|
561 |
|
|
| Locals |
|
562 |
|
|
| |
|
563 |
|
|
+-----------+ <--- current frame
|
564 |
|
|
| |
|
565 |
|
|
|
566 |
|
|
With most processors (like 68K) the previous frame can be computed
|
567 |
|
|
easily because it is always at a fixed offset (see link/unlink).
|
568 |
|
|
That is, locals are accessed with negative offsets, arguments are
|
569 |
|
|
accessed with positive ones. Since 68hc11 only supports offsets
|
570 |
|
|
in the range [0..255], the frame is defined at the bottom of
|
571 |
|
|
locals (see picture).
|
572 |
|
|
|
573 |
|
|
The purpose of the analysis made here is to find out the size
|
574 |
|
|
of locals in this function. An alternative to this is to use
|
575 |
|
|
DWARF2 info. This would be better but I don't know how to
|
576 |
|
|
access dwarf2 debug from this function.
|
577 |
|
|
|
578 |
|
|
Walk from the function entry point to the point where we save
|
579 |
|
|
the frame. While walking instructions, compute the size of bytes
|
580 |
|
|
which are pushed. This gives us the index to access the previous
|
581 |
|
|
frame.
|
582 |
|
|
|
583 |
|
|
We limit the search to 128 bytes so that the algorithm is bounded
|
584 |
|
|
in case of random and wrong code. We also stop and abort if
|
585 |
|
|
we find an instruction which is not supposed to appear in the
|
586 |
|
|
prologue (as generated by gcc 2.95, 2.96).
|
587 |
|
|
*/
|
588 |
|
|
pc = first_pc;
|
589 |
|
|
func_end = pc + 128;
|
590 |
|
|
found_frame_point = 0;
|
591 |
|
|
*frame_offset = 0;
|
592 |
|
|
save_addr = fp + STACK_CORRECTION;
|
593 |
|
|
while (!done && pc + 2 < func_end)
|
594 |
|
|
{
|
595 |
|
|
struct insn_sequence *seq;
|
596 |
|
|
CORE_ADDR val;
|
597 |
|
|
|
598 |
|
|
seq = m68hc11_analyze_instruction (seq_table, &pc, &val);
|
599 |
|
|
if (seq == 0)
|
600 |
|
|
break;
|
601 |
|
|
|
602 |
|
|
if (seq->type == P_SAVE_REG)
|
603 |
|
|
{
|
604 |
|
|
if (found_frame_point)
|
605 |
|
|
{
|
606 |
|
|
saved_reg = m68hc11_which_soft_register (val);
|
607 |
|
|
if (saved_reg < 0)
|
608 |
|
|
break;
|
609 |
|
|
|
610 |
|
|
save_addr -= 2;
|
611 |
|
|
if (pushed_regs)
|
612 |
|
|
pushed_regs[saved_reg] = save_addr;
|
613 |
|
|
}
|
614 |
|
|
else
|
615 |
|
|
{
|
616 |
|
|
size += 2;
|
617 |
|
|
}
|
618 |
|
|
}
|
619 |
|
|
else if (seq->type == P_SET_FRAME)
|
620 |
|
|
{
|
621 |
|
|
found_frame_point = 1;
|
622 |
|
|
*frame_offset = size;
|
623 |
|
|
}
|
624 |
|
|
else if (seq->type == P_LOCAL_1)
|
625 |
|
|
{
|
626 |
|
|
size += 1;
|
627 |
|
|
}
|
628 |
|
|
else if (seq->type == P_LOCAL_2)
|
629 |
|
|
{
|
630 |
|
|
size += 2;
|
631 |
|
|
}
|
632 |
|
|
else if (seq->type == P_LOCAL_N)
|
633 |
|
|
{
|
634 |
|
|
/* Stack pointer is decremented for the allocation. */
|
635 |
|
|
if (val & 0x8000)
|
636 |
|
|
size -= (int) (val) | 0xffff0000;
|
637 |
|
|
else
|
638 |
|
|
size -= val;
|
639 |
|
|
}
|
640 |
|
|
}
|
641 |
|
|
*first_line = pc;
|
642 |
|
|
}
|
643 |
|
|
|
644 |
|
|
static CORE_ADDR
|
645 |
|
|
m68hc11_skip_prologue (CORE_ADDR pc)
|
646 |
|
|
{
|
647 |
|
|
CORE_ADDR func_addr, func_end;
|
648 |
|
|
struct symtab_and_line sal;
|
649 |
|
|
int frame_offset;
|
650 |
|
|
|
651 |
|
|
/* If we have line debugging information, then the end of the
|
652 |
|
|
prologue should be the first assembly instruction of the
|
653 |
|
|
first source line. */
|
654 |
|
|
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
|
655 |
|
|
{
|
656 |
|
|
sal = find_pc_line (func_addr, 0);
|
657 |
|
|
if (sal.end && sal.end < func_end)
|
658 |
|
|
return sal.end;
|
659 |
|
|
}
|
660 |
|
|
|
661 |
|
|
m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0);
|
662 |
|
|
return pc;
|
663 |
|
|
}
|
664 |
|
|
|
665 |
|
|
/* Given a GDB frame, determine the address of the calling function's frame.
|
666 |
|
|
This will be used to create a new GDB frame struct, and then
|
667 |
|
|
INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
|
668 |
|
|
*/
|
669 |
|
|
|
670 |
|
|
static CORE_ADDR
|
671 |
|
|
m68hc11_frame_chain (struct frame_info *frame)
|
672 |
|
|
{
|
673 |
|
|
CORE_ADDR addr;
|
674 |
|
|
|
675 |
|
|
if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
|
676 |
|
|
return frame->frame; /* dummy frame same as caller's frame */
|
677 |
|
|
|
678 |
|
|
if (frame->extra_info->return_pc == 0
|
679 |
|
|
|| inside_entry_file (frame->extra_info->return_pc))
|
680 |
|
|
return (CORE_ADDR) 0;
|
681 |
|
|
|
682 |
|
|
if (frame->frame == 0)
|
683 |
|
|
{
|
684 |
|
|
return (CORE_ADDR) 0;
|
685 |
|
|
}
|
686 |
|
|
|
687 |
|
|
addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2;
|
688 |
|
|
addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
|
689 |
|
|
if (addr == 0)
|
690 |
|
|
{
|
691 |
|
|
return (CORE_ADDR) 0;
|
692 |
|
|
}
|
693 |
|
|
|
694 |
|
|
return addr;
|
695 |
|
|
}
|
696 |
|
|
|
697 |
|
|
/* Put here the code to store, into a struct frame_saved_regs, the
|
698 |
|
|
addresses of the saved registers of frame described by FRAME_INFO.
|
699 |
|
|
This includes special registers such as pc and fp saved in special
|
700 |
|
|
ways in the stack frame. sp is even more special: the address we
|
701 |
|
|
return for it IS the sp for the next frame. */
|
702 |
|
|
static void
|
703 |
|
|
m68hc11_frame_init_saved_regs (struct frame_info *fi)
|
704 |
|
|
{
|
705 |
|
|
CORE_ADDR pc;
|
706 |
|
|
CORE_ADDR addr;
|
707 |
|
|
|
708 |
|
|
if (fi->saved_regs == NULL)
|
709 |
|
|
frame_saved_regs_zalloc (fi);
|
710 |
|
|
else
|
711 |
|
|
memset (fi->saved_regs, 0, sizeof (fi->saved_regs));
|
712 |
|
|
|
713 |
|
|
pc = fi->pc;
|
714 |
|
|
m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size,
|
715 |
|
|
fi->saved_regs);
|
716 |
|
|
|
717 |
|
|
addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
|
718 |
|
|
if (soft_regs[SOFT_FP_REGNUM].name)
|
719 |
|
|
fi->saved_regs[SOFT_FP_REGNUM] = addr - 2;
|
720 |
|
|
fi->saved_regs[HARD_SP_REGNUM] = addr;
|
721 |
|
|
fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM];
|
722 |
|
|
}
|
723 |
|
|
|
724 |
|
|
static void
|
725 |
|
|
m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
|
726 |
|
|
{
|
727 |
|
|
CORE_ADDR addr;
|
728 |
|
|
|
729 |
|
|
fi->extra_info = (struct frame_extra_info *)
|
730 |
|
|
frame_obstack_alloc (sizeof (struct frame_extra_info));
|
731 |
|
|
|
732 |
|
|
if (fi->next)
|
733 |
|
|
fi->pc = FRAME_SAVED_PC (fi->next);
|
734 |
|
|
|
735 |
|
|
m68hc11_frame_init_saved_regs (fi);
|
736 |
|
|
|
737 |
|
|
if (fromleaf)
|
738 |
|
|
{
|
739 |
|
|
fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi);
|
740 |
|
|
}
|
741 |
|
|
else
|
742 |
|
|
{
|
743 |
|
|
addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
|
744 |
|
|
addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
|
745 |
|
|
fi->extra_info->return_pc = addr;
|
746 |
|
|
#if 0
|
747 |
|
|
printf ("Pc@0x%04x, FR 0x%04x, size %d, read ret @0x%04x -> 0x%04x\n",
|
748 |
|
|
fi->pc,
|
749 |
|
|
fi->frame, fi->size,
|
750 |
|
|
addr & 0x0ffff,
|
751 |
|
|
fi->return_pc);
|
752 |
|
|
#endif
|
753 |
|
|
}
|
754 |
|
|
}
|
755 |
|
|
|
756 |
|
|
/* Same as 'info reg' but prints the registers in a different way. */
|
757 |
|
|
static void
|
758 |
|
|
show_regs (char *args, int from_tty)
|
759 |
|
|
{
|
760 |
|
|
int ccr = read_register (HARD_CCR_REGNUM);
|
761 |
|
|
int i;
|
762 |
|
|
int nr;
|
763 |
|
|
|
764 |
|
|
printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n",
|
765 |
|
|
(int) read_register (HARD_PC_REGNUM),
|
766 |
|
|
(int) read_register (HARD_SP_REGNUM),
|
767 |
|
|
(int) read_register (SOFT_FP_REGNUM),
|
768 |
|
|
ccr,
|
769 |
|
|
ccr & M6811_S_BIT ? 'S' : '-',
|
770 |
|
|
ccr & M6811_X_BIT ? 'X' : '-',
|
771 |
|
|
ccr & M6811_H_BIT ? 'H' : '-',
|
772 |
|
|
ccr & M6811_I_BIT ? 'I' : '-',
|
773 |
|
|
ccr & M6811_N_BIT ? 'N' : '-',
|
774 |
|
|
ccr & M6811_Z_BIT ? 'Z' : '-',
|
775 |
|
|
ccr & M6811_V_BIT ? 'V' : '-',
|
776 |
|
|
ccr & M6811_C_BIT ? 'C' : '-');
|
777 |
|
|
|
778 |
|
|
printf_filtered ("D=%04x IX=%04x IY=%04x\n",
|
779 |
|
|
(int) read_register (HARD_D_REGNUM),
|
780 |
|
|
(int) read_register (HARD_X_REGNUM),
|
781 |
|
|
(int) read_register (HARD_Y_REGNUM));
|
782 |
|
|
|
783 |
|
|
nr = 0;
|
784 |
|
|
for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
|
785 |
|
|
{
|
786 |
|
|
/* Skip registers which are not defined in the symbol table. */
|
787 |
|
|
if (soft_regs[i].name == 0)
|
788 |
|
|
continue;
|
789 |
|
|
|
790 |
|
|
printf_filtered ("D%d=%04x",
|
791 |
|
|
i - SOFT_D1_REGNUM + 1,
|
792 |
|
|
(int) read_register (i));
|
793 |
|
|
nr++;
|
794 |
|
|
if ((nr % 8) == 7)
|
795 |
|
|
printf_filtered ("\n");
|
796 |
|
|
else
|
797 |
|
|
printf_filtered (" ");
|
798 |
|
|
}
|
799 |
|
|
if (nr && (nr % 8) != 7)
|
800 |
|
|
printf_filtered ("\n");
|
801 |
|
|
}
|
802 |
|
|
|
803 |
|
|
static CORE_ADDR
|
804 |
|
|
m68hc11_stack_align (CORE_ADDR addr)
|
805 |
|
|
{
|
806 |
|
|
return ((addr + 1) & -2);
|
807 |
|
|
}
|
808 |
|
|
|
809 |
|
|
static CORE_ADDR
|
810 |
|
|
m68hc11_push_arguments (int nargs,
|
811 |
|
|
value_ptr *args,
|
812 |
|
|
CORE_ADDR sp,
|
813 |
|
|
int struct_return,
|
814 |
|
|
CORE_ADDR struct_addr)
|
815 |
|
|
{
|
816 |
|
|
int stack_alloc;
|
817 |
|
|
int argnum;
|
818 |
|
|
int first_stack_argnum;
|
819 |
|
|
int stack_offset;
|
820 |
|
|
struct type *type;
|
821 |
|
|
char *val;
|
822 |
|
|
int len;
|
823 |
|
|
|
824 |
|
|
stack_alloc = 0;
|
825 |
|
|
first_stack_argnum = 0;
|
826 |
|
|
if (struct_return)
|
827 |
|
|
{
|
828 |
|
|
/* The struct is allocated on the stack and gdb used the stack
|
829 |
|
|
pointer for the address of that struct. We must apply the
|
830 |
|
|
stack offset on the address. */
|
831 |
|
|
write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION);
|
832 |
|
|
}
|
833 |
|
|
else if (nargs > 0)
|
834 |
|
|
{
|
835 |
|
|
type = VALUE_TYPE (args[0]);
|
836 |
|
|
len = TYPE_LENGTH (type);
|
837 |
|
|
|
838 |
|
|
/* First argument is passed in D and X registers. */
|
839 |
|
|
if (len <= 4)
|
840 |
|
|
{
|
841 |
|
|
LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
|
842 |
|
|
first_stack_argnum = 1;
|
843 |
|
|
write_register (HARD_D_REGNUM, v);
|
844 |
|
|
if (len > 2)
|
845 |
|
|
{
|
846 |
|
|
v >>= 16;
|
847 |
|
|
write_register (HARD_X_REGNUM, v);
|
848 |
|
|
}
|
849 |
|
|
}
|
850 |
|
|
}
|
851 |
|
|
for (argnum = first_stack_argnum; argnum < nargs; argnum++)
|
852 |
|
|
{
|
853 |
|
|
type = VALUE_TYPE (args[argnum]);
|
854 |
|
|
stack_alloc += (TYPE_LENGTH (type) + 1) & -2;
|
855 |
|
|
}
|
856 |
|
|
sp -= stack_alloc;
|
857 |
|
|
|
858 |
|
|
stack_offset = STACK_CORRECTION;
|
859 |
|
|
for (argnum = first_stack_argnum; argnum < nargs; argnum++)
|
860 |
|
|
{
|
861 |
|
|
type = VALUE_TYPE (args[argnum]);
|
862 |
|
|
len = TYPE_LENGTH (type);
|
863 |
|
|
|
864 |
|
|
val = (char*) VALUE_CONTENTS (args[argnum]);
|
865 |
|
|
write_memory (sp + stack_offset, val, len);
|
866 |
|
|
stack_offset += len;
|
867 |
|
|
if (len & 1)
|
868 |
|
|
{
|
869 |
|
|
static char zero = 0;
|
870 |
|
|
|
871 |
|
|
write_memory (sp + stack_offset, &zero, 1);
|
872 |
|
|
stack_offset++;
|
873 |
|
|
}
|
874 |
|
|
}
|
875 |
|
|
return sp;
|
876 |
|
|
}
|
877 |
|
|
|
878 |
|
|
|
879 |
|
|
/* Return a location where we can set a breakpoint that will be hit
|
880 |
|
|
when an inferior function call returns. */
|
881 |
|
|
CORE_ADDR
|
882 |
|
|
m68hc11_call_dummy_address (void)
|
883 |
|
|
{
|
884 |
|
|
return entry_point_address ();
|
885 |
|
|
}
|
886 |
|
|
|
887 |
|
|
static struct type *
|
888 |
|
|
m68hc11_register_virtual_type (int reg_nr)
|
889 |
|
|
{
|
890 |
|
|
return builtin_type_uint16;
|
891 |
|
|
}
|
892 |
|
|
|
893 |
|
|
static void
|
894 |
|
|
m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
|
895 |
|
|
{
|
896 |
|
|
/* The struct address computed by gdb is on the stack.
|
897 |
|
|
It uses the stack pointer so we must apply the stack
|
898 |
|
|
correction offset. */
|
899 |
|
|
write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
|
900 |
|
|
}
|
901 |
|
|
|
902 |
|
|
static void
|
903 |
|
|
m68hc11_store_return_value (struct type *type, char *valbuf)
|
904 |
|
|
{
|
905 |
|
|
int len;
|
906 |
|
|
|
907 |
|
|
len = TYPE_LENGTH (type);
|
908 |
|
|
|
909 |
|
|
/* First argument is passed in D and X registers. */
|
910 |
|
|
if (len <= 4)
|
911 |
|
|
{
|
912 |
|
|
LONGEST v = extract_unsigned_integer (valbuf, len);
|
913 |
|
|
|
914 |
|
|
write_register (HARD_D_REGNUM, v);
|
915 |
|
|
if (len > 2)
|
916 |
|
|
{
|
917 |
|
|
v >>= 16;
|
918 |
|
|
write_register (HARD_X_REGNUM, v);
|
919 |
|
|
}
|
920 |
|
|
}
|
921 |
|
|
else
|
922 |
|
|
error ("return of value > 4 is not supported.");
|
923 |
|
|
}
|
924 |
|
|
|
925 |
|
|
|
926 |
|
|
/* Given a return value in `regbuf' with a type `type',
|
927 |
|
|
extract and copy its value into `valbuf'. */
|
928 |
|
|
|
929 |
|
|
static void
|
930 |
|
|
m68hc11_extract_return_value (struct type *type,
|
931 |
|
|
char *regbuf,
|
932 |
|
|
char *valbuf)
|
933 |
|
|
{
|
934 |
|
|
int len = TYPE_LENGTH (type);
|
935 |
|
|
|
936 |
|
|
switch (len)
|
937 |
|
|
{
|
938 |
|
|
case 1:
|
939 |
|
|
memcpy (valbuf, ®buf[HARD_D_REGNUM * 2 + 1], len);
|
940 |
|
|
break;
|
941 |
|
|
|
942 |
|
|
case 2:
|
943 |
|
|
memcpy (valbuf, ®buf[HARD_D_REGNUM * 2], len);
|
944 |
|
|
break;
|
945 |
|
|
|
946 |
|
|
case 3:
|
947 |
|
|
memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2 + 1], 1);
|
948 |
|
|
memcpy (&valbuf[1], ®buf[HARD_D_REGNUM * 2], 2);
|
949 |
|
|
break;
|
950 |
|
|
|
951 |
|
|
case 4:
|
952 |
|
|
memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2], 2);
|
953 |
|
|
memcpy (&valbuf[2], ®buf[HARD_D_REGNUM * 2], 2);
|
954 |
|
|
break;
|
955 |
|
|
|
956 |
|
|
default:
|
957 |
|
|
error ("bad size for return value");
|
958 |
|
|
}
|
959 |
|
|
}
|
960 |
|
|
|
961 |
|
|
/* Should call_function allocate stack space for a struct return? */
|
962 |
|
|
static int
|
963 |
|
|
m68hc11_use_struct_convention (int gcc_p, struct type *type)
|
964 |
|
|
{
|
965 |
|
|
return (TYPE_CODE (type) == TYPE_CODE_STRUCT
|
966 |
|
|
|| TYPE_CODE (type) == TYPE_CODE_UNION
|
967 |
|
|
|| TYPE_LENGTH (type) > 4);
|
968 |
|
|
}
|
969 |
|
|
|
970 |
|
|
static int
|
971 |
|
|
m68hc11_return_value_on_stack (struct type *type)
|
972 |
|
|
{
|
973 |
|
|
return TYPE_LENGTH (type) > 4;
|
974 |
|
|
}
|
975 |
|
|
|
976 |
|
|
/* Extract from an array REGBUF containing the (raw) register state
|
977 |
|
|
the address in which a function should return its structure value,
|
978 |
|
|
as a CORE_ADDR (or an expression that can be used as one). */
|
979 |
|
|
static CORE_ADDR
|
980 |
|
|
m68hc11_extract_struct_value_address (char *regbuf)
|
981 |
|
|
{
|
982 |
|
|
return extract_address (®buf[HARD_D_REGNUM * 2],
|
983 |
|
|
REGISTER_RAW_SIZE (HARD_D_REGNUM));
|
984 |
|
|
}
|
985 |
|
|
|
986 |
|
|
/* Function: push_return_address (pc)
|
987 |
|
|
Set up the return address for the inferior function call.
|
988 |
|
|
Needed for targets where we don't actually execute a JSR/BSR instruction */
|
989 |
|
|
|
990 |
|
|
static CORE_ADDR
|
991 |
|
|
m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
|
992 |
|
|
{
|
993 |
|
|
char valbuf[2];
|
994 |
|
|
|
995 |
|
|
pc = CALL_DUMMY_ADDRESS ();
|
996 |
|
|
sp -= 2;
|
997 |
|
|
store_unsigned_integer (valbuf, 2, pc);
|
998 |
|
|
write_memory (sp + STACK_CORRECTION, valbuf, 2);
|
999 |
|
|
return sp;
|
1000 |
|
|
}
|
1001 |
|
|
|
1002 |
|
|
/* Index within `registers' of the first byte of the space for
|
1003 |
|
|
register N. */
|
1004 |
|
|
static int
|
1005 |
|
|
m68hc11_register_byte (int reg_nr)
|
1006 |
|
|
{
|
1007 |
|
|
return (reg_nr * M68HC11_REG_SIZE);
|
1008 |
|
|
}
|
1009 |
|
|
|
1010 |
|
|
static int
|
1011 |
|
|
m68hc11_register_raw_size (int reg_nr)
|
1012 |
|
|
{
|
1013 |
|
|
return M68HC11_REG_SIZE;
|
1014 |
|
|
}
|
1015 |
|
|
|
1016 |
|
|
static int
|
1017 |
|
|
gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
|
1018 |
|
|
{
|
1019 |
|
|
if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
|
1020 |
|
|
return print_insn_m68hc11 (memaddr, info);
|
1021 |
|
|
else
|
1022 |
|
|
return print_insn_m68hc12 (memaddr, info);
|
1023 |
|
|
}
|
1024 |
|
|
|
1025 |
|
|
static struct gdbarch *
|
1026 |
|
|
m68hc11_gdbarch_init (struct gdbarch_info info,
|
1027 |
|
|
struct gdbarch_list *arches)
|
1028 |
|
|
{
|
1029 |
|
|
static LONGEST m68hc11_call_dummy_words[] =
|
1030 |
|
|
{0};
|
1031 |
|
|
struct gdbarch *gdbarch;
|
1032 |
|
|
struct gdbarch_tdep *tdep;
|
1033 |
|
|
|
1034 |
|
|
soft_reg_initialized = 0;
|
1035 |
|
|
|
1036 |
|
|
/* try to find a pre-existing architecture */
|
1037 |
|
|
for (arches = gdbarch_list_lookup_by_info (arches, &info);
|
1038 |
|
|
arches != NULL;
|
1039 |
|
|
arches = gdbarch_list_lookup_by_info (arches->next, &info))
|
1040 |
|
|
{
|
1041 |
|
|
return arches->gdbarch;
|
1042 |
|
|
}
|
1043 |
|
|
|
1044 |
|
|
/* Need a new architecture. Fill in a target specific vector. */
|
1045 |
|
|
tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
|
1046 |
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
1047 |
|
|
|
1048 |
|
|
switch (info.bfd_arch_info->arch)
|
1049 |
|
|
{
|
1050 |
|
|
case bfd_arch_m68hc11:
|
1051 |
|
|
tdep->stack_correction = 1;
|
1052 |
|
|
tdep->prologue = m6811_prologue;
|
1053 |
|
|
break;
|
1054 |
|
|
|
1055 |
|
|
case bfd_arch_m68hc12:
|
1056 |
|
|
tdep->stack_correction = 0;
|
1057 |
|
|
tdep->prologue = m6812_prologue;
|
1058 |
|
|
break;
|
1059 |
|
|
|
1060 |
|
|
default:
|
1061 |
|
|
break;
|
1062 |
|
|
}
|
1063 |
|
|
|
1064 |
|
|
/* Initially set everything according to the ABI. */
|
1065 |
|
|
set_gdbarch_short_bit (gdbarch, 16);
|
1066 |
|
|
set_gdbarch_int_bit (gdbarch, 32);
|
1067 |
|
|
set_gdbarch_float_bit (gdbarch, 32);
|
1068 |
|
|
set_gdbarch_double_bit (gdbarch, 64);
|
1069 |
|
|
set_gdbarch_long_double_bit (gdbarch, 64);
|
1070 |
|
|
set_gdbarch_long_bit (gdbarch, 32);
|
1071 |
|
|
set_gdbarch_ptr_bit (gdbarch, 16);
|
1072 |
|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
1073 |
|
|
|
1074 |
|
|
/* Set register info. */
|
1075 |
|
|
set_gdbarch_fp0_regnum (gdbarch, -1);
|
1076 |
|
|
set_gdbarch_max_register_raw_size (gdbarch, 2);
|
1077 |
|
|
set_gdbarch_max_register_virtual_size (gdbarch, 2);
|
1078 |
|
|
set_gdbarch_register_raw_size (gdbarch, m68hc11_register_raw_size);
|
1079 |
|
|
set_gdbarch_register_virtual_size (gdbarch, m68hc11_register_raw_size);
|
1080 |
|
|
set_gdbarch_register_byte (gdbarch, m68hc11_register_byte);
|
1081 |
|
|
set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs);
|
1082 |
|
|
set_gdbarch_frame_args_skip (gdbarch, 0);
|
1083 |
|
|
|
1084 |
|
|
set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
|
1085 |
|
|
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
|
1086 |
|
|
set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
|
1087 |
|
|
set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
|
1088 |
|
|
set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
|
1089 |
|
|
set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
|
1090 |
|
|
|
1091 |
|
|
set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
|
1092 |
|
|
set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
|
1093 |
|
|
set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
|
1094 |
|
|
set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM);
|
1095 |
|
|
set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
|
1096 |
|
|
set_gdbarch_register_name (gdbarch, m68hc11_register_name);
|
1097 |
|
|
set_gdbarch_register_size (gdbarch, 2);
|
1098 |
|
|
set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2);
|
1099 |
|
|
set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type);
|
1100 |
|
|
set_gdbarch_fetch_pseudo_register (gdbarch, m68hc11_fetch_pseudo_register);
|
1101 |
|
|
set_gdbarch_store_pseudo_register (gdbarch, m68hc11_store_pseudo_register);
|
1102 |
|
|
|
1103 |
|
|
set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
|
1104 |
|
|
set_gdbarch_call_dummy_length (gdbarch, 0);
|
1105 |
|
|
set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
|
1106 |
|
|
set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address);
|
1107 |
|
|
set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
|
1108 |
|
|
set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
|
1109 |
|
|
set_gdbarch_call_dummy_start_offset (gdbarch, 0);
|
1110 |
|
|
set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
|
1111 |
|
|
set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words);
|
1112 |
|
|
set_gdbarch_sizeof_call_dummy_words (gdbarch,
|
1113 |
|
|
sizeof (m68hc11_call_dummy_words));
|
1114 |
|
|
set_gdbarch_call_dummy_p (gdbarch, 1);
|
1115 |
|
|
set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
|
1116 |
|
|
set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
|
1117 |
|
|
set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
|
1118 |
|
|
set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value);
|
1119 |
|
|
set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments);
|
1120 |
|
|
set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
|
1121 |
|
|
set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address);
|
1122 |
|
|
set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
|
1123 |
|
|
|
1124 |
|
|
set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
|
1125 |
|
|
set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
|
1126 |
|
|
set_gdbarch_extract_struct_value_address (gdbarch,
|
1127 |
|
|
m68hc11_extract_struct_value_address);
|
1128 |
|
|
set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
|
1129 |
|
|
|
1130 |
|
|
|
1131 |
|
|
set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain);
|
1132 |
|
|
set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
|
1133 |
|
|
set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc);
|
1134 |
|
|
set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address);
|
1135 |
|
|
set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address);
|
1136 |
|
|
set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call);
|
1137 |
|
|
set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
|
1138 |
|
|
|
1139 |
|
|
set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid);
|
1140 |
|
|
set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
|
1141 |
|
|
|
1142 |
|
|
set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
|
1143 |
|
|
set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
|
1144 |
|
|
set_gdbarch_extract_struct_value_address
|
1145 |
|
|
(gdbarch, m68hc11_extract_struct_value_address);
|
1146 |
|
|
set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
|
1147 |
|
|
set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
|
1148 |
|
|
set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame);
|
1149 |
|
|
set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
|
1150 |
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
1151 |
|
|
set_gdbarch_decr_pc_after_break (gdbarch, 0);
|
1152 |
|
|
set_gdbarch_function_start_offset (gdbarch, 0);
|
1153 |
|
|
set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
|
1154 |
|
|
set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
|
1155 |
|
|
|
1156 |
|
|
set_gdbarch_believe_pcc_promotion (gdbarch, 1);
|
1157 |
|
|
set_gdbarch_ieee_float (gdbarch, 1);
|
1158 |
|
|
|
1159 |
|
|
return gdbarch;
|
1160 |
|
|
}
|
1161 |
|
|
|
1162 |
|
|
void
|
1163 |
|
|
_initialize_m68hc11_tdep (void)
|
1164 |
|
|
{
|
1165 |
|
|
register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
|
1166 |
|
|
register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
|
1167 |
|
|
if (!tm_print_insn) /* Someone may have already set it */
|
1168 |
|
|
tm_print_insn = gdb_print_insn_m68hc11;
|
1169 |
|
|
|
1170 |
|
|
add_com ("regs", class_vars, show_regs, "Print all registers");
|
1171 |
|
|
}
|
1172 |
|
|
|