OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [insight/] [gdb/] [memattr.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 578 markom
/* Memory attributes support, for GDB.
2
   Copyright 2001 Free Software Foundation, Inc.
3
 
4
   This file is part of GDB.
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 2 of the License, or
9
   (at your option) any later version.
10
 
11
   This program is distributed in the hope that it will be useful,
12
   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, Inc., 59 Temple Place - Suite 330,
19
   Boston, MA 02111-1307, USA.  */
20
 
21
#ifndef MEMATTR_H
22
#define MEMATTR_H
23
 
24
enum mem_access_mode
25
{
26
  MEM_RW,                       /* read/write */
27
  MEM_RO,                       /* read only */
28
  MEM_WO                        /* write only */
29
};
30
 
31
enum mem_access_width
32
{
33
  MEM_WIDTH_UNSPECIFIED,
34
  MEM_WIDTH_8,                  /*  8 bit accesses */
35
  MEM_WIDTH_16,                 /* 16  "      "    */
36
  MEM_WIDTH_32,                 /* 32  "      "    */
37
  MEM_WIDTH_64                  /* 64  "      "    */
38
};
39
 
40
/* The set of all attributes that can be set for a memory region.
41
 
42
   This structure was created so that memory attributes can be passed
43
   to target_ functions without exposing the details of memory region
44
   list, which would be necessary if these fields were simply added to
45
   the mem_region structure.
46
 
47
   FIXME: It would be useful if there was a mechanism for targets to
48
   add their own attributes.  For example, the number of wait states. */
49
 
50
struct mem_attrib
51
{
52
  /* read/write, read-only, or write-only */
53
  enum mem_access_mode mode;
54
 
55
  enum mem_access_width width;
56
 
57
  /* enables hardware breakpoints */
58
  int hwbreak;
59
 
60
  /* enables host-side caching of memory region data */
61
  int cache;
62
 
63
  /* enables memory verification.  after a write, memory is re-read
64
     to verify that the write was successful. */
65
  int verify;
66
};
67
 
68
struct mem_region
69
{
70
  /* FIXME: memory regions are stored in an unsorted singly-linked
71
     list.  This probably won't scale to handle hundreds of memory
72
     regions --- that many could be needed to describe the allowed
73
     access modes for memory mapped i/o device registers. */
74
  struct mem_region *next;
75
 
76
  CORE_ADDR lo;
77
  CORE_ADDR hi;
78
 
79
  /* Item number of this memory region. */
80
  int number;
81
 
82
  /* Status of this memory region (enabled or disabled) */
83
  int status;
84
 
85
  /* Attributes for this region */
86
  struct mem_attrib attrib;
87
};
88
 
89
extern struct mem_region *lookup_mem_region(CORE_ADDR);
90
 
91
#endif  /* MEMATTR_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.