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[/] [or1k/] [trunk/] [insight/] [gdb/] [nlm/] [ppc.h] - Blame information for rev 1765

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Line No. Rev Author Line
1 578 markom
typedef long Long;
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/* The following enum is used to access the special registers in
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   the saved machine state.  */
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typedef enum
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{
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  kDc_SavedPC = 0,               /* really SRR0 */
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  kDc_SavedMSR = 1,             /* really SRR1 */
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  kDc_SavedCR = 2,
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  kDc_SavedLR = 3,
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  kDc_SavedDSISR = 4,
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  kDc_SavedDAR = 5,
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  kDc_SavedXER = 6,
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  kDc_SavedCTR = 7,
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  kDc_SavedSDR1 = 8,
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  kDc_SavedRTCU = 9,
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  kDc_SavedRTCL = 10,
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  kDc_SavedDEC = 11,
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  kDc_SavedSR00 = 12,           /* The Segement Registers are consecutive */
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  kDc_SavedSR01 = 13,           /* kDc_SavedSR00 + n is supported */
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  kDc_SavedSR02 = 14,
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  kDc_SavedSR03 = 15,
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  kDc_SavedSR04 = 16,
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  kDc_SavedSR05 = 17,
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  kDc_SavedSR06 = 18,
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  kDc_SavedSR07 = 19,
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  kDc_SavedSR08 = 20,
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  kDc_SavedSR09 = 21,
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  kDc_SavedSR10 = 22,
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  kDc_SavedSR11 = 23,
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  kDc_SavedSR12 = 24,
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  kDc_SavedSR13 = 25,
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  kDc_SavedSR14 = 26,
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  kDc_SavedSR15 = 27,
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  kDc_SavedFPSCR = 29,
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  kDc_SavedMQ = 30,
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  kDc_SavedBAT0U = 31,
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  kDc_SavedBAT0L = 32,
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  kDc_SavedBAT1U = 33,
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  kDc_SavedBAT1L = 34,
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  kDc_SavedBAT2U = 35,
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  kDc_SavedBAT2L = 36,
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  kDc_SavedBAT3U = 37,
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  kDc_SavedBAT3L = 38,
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  kNumberSpecialRegisters = 39
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} Dc_SavedRegisterName;
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/* Access to floating points is not very easy.  This allows the number to be
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   accessed both as a floating number and as a pair of Longs.  */
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typedef union
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{
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  double asfloat;               /* access the variable as a floating number */
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  struct
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    {
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      Long high;
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      Long low;
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    }
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  asLONG;                       /* access the variable as two Longs */
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} FloatingPoints;
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/* The following is the standard record for Saving a machine state */
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struct SavedMachineState
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{
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  FloatingPoints CSavedFPRegs[32]; /* The floating point registers [0->31] */
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                                /* ***32bit assumption*** */
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  Long CsavedRegs[32];          /* space to save the General Registers */
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                                /* These are saved 0->31 */
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  Long CexReason;
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  Long SavedDomainID;
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  union
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    {                           /* must be 8-byte aligned, so doubleFPSCR is 8-byte aligned */
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      struct
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        {
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          Long CsavedSRR0;      /* Index 0 - The saved PC */
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          Long CsavedSRR1;      /* 1 saved MSR */
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          Long CsavedCR;        /* 2 */
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          Long CsavedLR;        /* 3 */
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          Long CsavedDSISR;     /* 4 */
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          Long CsavedDAR;       /* 5 */
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          Long CsavedXER;       /* 6 */
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          Long CsavedCTR;       /* 7 */
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          Long CsavedSDR1;      /* 8 */
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          Long CsavedRTCU;      /* 9 */
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          Long CsavedRTCL;      /* 10 */
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          Long CsavedDEC;       /* 11 */
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          Long CsavedSR0;       /* 12 */
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          Long CsavedSR1;       /* 13 */
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          Long CsavedSR2;       /* 14 */
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          Long CsavedSR3;       /* 15 */
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          Long CsavedSR4;       /* 16 */
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          Long CsavedSR5;       /* 17 */
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          Long CsavedSR6;       /* 18 */
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          Long CsavedSR7;       /* 19 */
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          Long CsavedSR8;       /* 20 */
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          Long CsavedSR9;       /* 21 */
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          Long CsavedSR10;      /* 22 */
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          Long CsavedSR11;      /* 23 */
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          Long CsavedSR12;      /* 24 */
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          Long CsavedSR13;      /* 25 */
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          Long CsavedSR14;      /* 26 */
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          Long CsavedSR15;      /* 27 */
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                                /* CdoubleFPSCR must be double word aligned */
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          Long CdoubleFPSCR;    /* 28 this is the upper part of the store and has
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                                      no meaning */
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          Long CsavedFPSCR;     /* 29 */
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          Long CsavedMQ;        /* 30 */
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          Long CsavedBAT0U;     /* 31 */
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          Long CsavedBAT0L;     /* 32 */
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          Long CsavedBAT1U;     /* 33 */
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          Long CsavedBAT1L;     /* 34 */
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          Long CsavedBAT2U;     /* 35 */
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          Long CsavedBAT2L;     /* 36 */
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          Long CsavedBAT3U;     /* 37 */
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          Long CsavedBAT3L;     /* 38 */
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        }
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      SpecialRegistersEnumerated;
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      Long SpecialRegistersIndexed[kNumberSpecialRegisters];
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    } u;
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  Long Padding[3];              /* Needed for quad-word alignment */
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};
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struct StackFrame
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{
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  LONG *ExceptionDomainID;
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  /*ProcessorStructure*/ int *ExceptionProcessorID;
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  BYTE *ExceptionDescription;
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  LONG ExceptionFlags;
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  LONG ExceptionErrorCode;
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  LONG ExceptionNumber;
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  struct SavedMachineState ExceptionState;
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};
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/* Register values.  All of these values *MUST* agree with tm.h */
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#define GP0_REGNUM 0            /* GPR register 0 */
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#define SP_REGNUM 1             /* Contains address of top of stack */
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#define FP0_REGNUM 32           /* FPR (Floating point) register 0 */
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#define PC_REGNUM 64            /* Contains program counter */
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#define PS_REGNUM 65            /* Processor (or machine) status (%msr) */
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#define CR_REGNUM 66            /* Condition register */
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#define LR_REGNUM 67            /* Link register */
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#define CTR_REGNUM 68           /* Count register */
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#define XER_REGNUM 69           /* Fixed point exception registers */
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#define MQ_REGNUM 70            /* Multiply/quotient register */
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#define NUM_REGS 71             /* Number of machine registers */
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#define REGISTER_BYTES (420)    /* Total size of registers array */
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#define ExceptionPC ExceptionState.u.SpecialRegistersEnumerated.CsavedSRR0
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#define DECR_PC_AFTER_BREAK 0   /* PPCs get this right! */
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#define BREAKPOINT {0x7d, 0x82, 0x10, 0x08}
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extern unsigned char breakpoint_insn[];
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#define BREAKPOINT_SIZE 4
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#if 0
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#define ALTERNATE_MEM_FUNCS     /* We need our own get_char/set_char */
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#endif
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extern int get_char (char *addr);
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extern void set_char (char *addr, int val);

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