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[/] [or1k/] [trunk/] [insight/] [gdb/] [remote-or1k.c] - Blame information for rev 107

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1 106 markom
/* Remote debugging interface for various or1k debugging protocols.
2
   Copyright 1993-1995, 2000 Free Software Foundation, Inc.
3
   Contributed by Cygnus Support.  Written by Marko Mlinar
4
   <markom@opencores.org>
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 2 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program; if not, write to the Free Software
20
   Foundation, Inc., 59 Temple Place - Suite 330,
21
   Boston, MA 02111-1307, USA.  */
22
 
23
#include "defs.h"
24
#include "inferior.h"
25
#include "bfd.h"
26
#include "symfile.h"
27
#include "gdb_wait.h"
28
#include "gdbcmd.h"
29
#include "gdbcore.h"
30
#include "target.h"
31
#include "remote-utils.h"
32
#include "gdb_string.h"
33
#include "tm.h"
34
 
35
#include <signal.h>
36
#include <sys/types.h>
37
#include <sys/stat.h>
38
#include <sys/ioctl.h>
39
#include <fcntl.h>
40
 
41
extern void jtag_init PARAMS ((char * args));
42
extern unsigned int jtag_read_reg PARAMS ((unsigned int regno));
43
extern void jtag_write_reg PARAMS ((unsigned int regno, unsigned int data));
44
extern unsigned int jtag_read_tap_reg PARAMS ((unsigned int regno));
45
extern void jtag_write_tap_reg PARAMS ((unsigned int regno, unsigned int data));
46
extern void jtag_done PARAMS ((void));
47
 
48
struct target_ops or1k_jtag_ops;
49
static struct or1k_target_ops or1k_target_jtag =
50
  {
51
    "jtag",
52
    jtag_init,
53
    jtag_done,
54
    jtag_read_reg,
55
    jtag_write_reg,
56
    jtag_read_tap_reg,
57
    jtag_write_tap_reg,
58
    NULL,
59
    &or1k_jtag_ops,
60
    OPS_MAGIC
61
  };
62
 
63
struct target_ops or1k_sim_ops;
64
static struct or1k_target_ops or1k_target_sim =
65
  {
66
    "simulator",
67
    NULL,
68
    NULL,
69
    NULL,
70
    NULL,
71
    NULL,
72
    NULL,
73
    NULL,
74
    &or1k_sim_ops,
75
    OPS_MAGIC
76
  };
77
 
78
struct target_ops or1k_dummy_ops;
79
static struct or1k_target_ops or1k_target_dummy =
80
  {
81
    "dummy",
82
    NULL,
83
    NULL,
84
    NULL,
85
    NULL,
86
    NULL,
87
    NULL,
88
    NULL,
89
    &or1k_dummy_ops,
90
    OPS_MAGIC
91
  };
92
 
93
const char *str_err[] =
94
  {
95
    "None", "CRC error"
96
  };
97
 
98
const char *status_name[] =
99
  {
100
    "UNDEFINED", "CONNECTING", "DISCONNECTING", "RUNNING", "STOPPED"
101
  };
102
 
103
/* Implementation specific information.  Set by or1k_initialize.  */
104
struct struct_or1k_implementation or1k_implementation;
105
 
106
/* Current target status.  */
107
static enum target_status or1k_status = TARGET_UNDEFINED;
108
 
109
/* The target vector.  */
110
struct target_ops or1k_dummy_ops, or1k_jtag_ops, or1k_sim_ops;
111
 
112
/* Currently active target description (if or1k_is_open == 1) */
113
static struct target_ops *current_ops;
114
 
115
/* Currently active or1k target operations.  */
116
static struct or1k_target_ops *current_or1k_target = NULL;
117
 
118
/* Set to 1 if the target is open.  */
119
static int or1k_is_open = 0;
120
 
121
/* Error last occured, zero = ok.  */
122
static int err = 0;
123
 
124
/* Number of interrupts while waiting for process.  */
125
static int interrupt_count = 0;
126
 
127
/* Current register values.  */
128
static unsigned int dmr1 = 0;
129
static unsigned int dmr2 = 0;
130
static unsigned int dsr = 0;
131
static unsigned int drr = 0;
132
 
133
/* Current watchpoints.  */
134
static int dvr[8];
135
static struct dcr_struct dcr[8];
136
 
137
/* Handle low-level error that we can't recover from.  Note that just
138
   error()ing out from target_wait or some such low-level place will cause
139
   all hell to break loose--the rest of GDB will tend to get left in an
140
   inconsistent state.  */
141
 
142
static NORETURN void
143
or1k_error (char *string,...)
144
{
145
  va_list args;
146
 
147
  va_start (args, string);
148
 
149
  target_terminal_ours ();
150
  wrap_here ("");               /* Force out any buffered output */
151
  gdb_flush (gdb_stdout);
152
  if (error_pre_print)
153
    fprintf_filtered (gdb_stderr, error_pre_print);
154
  vfprintf_filtered (gdb_stderr, string, args);
155
  fprintf_filtered (gdb_stderr, "\n");
156
  va_end (args);
157
  gdb_flush (gdb_stderr);
158
 
159
  /* Clean up in such a way that or1k_close won't try to talk to the
160
     board (it almost surely won't work since we weren't able to talk to
161
     it).  */
162
  or1k_is_open = 0;
163
 
164
  printf_unfiltered ("Ending remote or1k debugging.\n");
165
  target_mourn_inferior ();
166
 
167
  return_to_top_level (RETURN_ERROR);
168
}
169
 
170
const char *
171
or1k_err_name (e)
172
     int e;
173
{
174
  return str_err[e];
175
}
176
 
177
/* putc_readable - print a character, displaying non-printable chars in
178
   ^x notation or in hex.  */
179
 
180
static void
181
fputc_readable (ch, file)
182
     int ch;
183
     struct ui_file *file;
184
{
185
  if (ch == '\n')
186
    fputc_unfiltered ('\n', file);
187
  else if (ch == '\r')
188
    fprintf_unfiltered (file, "\\r");
189
  else if (ch < 0x20)           /* ASCII control character */
190
    fprintf_unfiltered (file, "^%c", ch + '@');
191
  else if (ch >= 0x7f)          /* non-ASCII characters (rubout or greater) */
192
    fprintf_unfiltered (file, "[%02x]", ch & 0xff);
193
  else
194
    fputc_unfiltered (ch, file);
195
}
196
 
197
 
198
/* puts_readable - print a string, displaying non-printable chars in
199
   ^x notation or in hex.  */
200
 
201
static void
202
fputs_readable (string, file)
203
     char *string;
204
     struct ui_file *file;
205
{
206
  int c;
207
 
208
  while ((c = *string++) != '\0')
209
    fputc_readable (c, file);
210
}
211
 
212
/* Sets register/memory regno to data.  */
213
 
214
void
215
or1k_write_reg (regno, data)
216
     unsigned int regno;
217
     unsigned int data;
218
{
219
  if (current_or1k_target != NULL && current_or1k_target->to_write_spr_reg != NULL)
220
    current_or1k_target->to_write_spr_reg (regno, data);
221
}
222
 
223
/* Reads register/memory from regno.  */
224
 
225
unsigned int
226
or1k_read_reg (regno)
227
     unsigned int regno;
228
{
229
  if (current_or1k_target != NULL && current_or1k_target->to_read_spr_reg != NULL)
230
    return current_or1k_target->to_read_spr_reg (regno);
231
  else
232
    return 0x1234;
233
}
234
 
235
/* Stalls the CPU.  */
236
 
237
static void
238
or1k_stall ()
239
{
240
  //!!! or1k_write_tap_reg (xxx, xxx);
241
}
242
 
243
/* Unstalls the CPU.  */
244
 
245
static void
246
or1k_unstall ()
247
{
248
  //!!! or1k_write_tap_reg (xxx, xxx);
249
}
250
 
251
static void
252
or1k_set_undefined_cleanups (arg)
253
     PTR arg;
254
{
255
  or1k_status = TARGET_UNDEFINED;
256
}
257
 
258
/* Initialize a new connection to the or1k board, and make sure we are
259
   really connected.  */
260
 
261
static void
262
or1k_init (args)
263
     char *args;
264
{
265
  struct cleanup *old_cleanups = make_cleanup (or1k_set_undefined_cleanups, NULL);
266
  int i;
267
 
268
  /* What is this code doing here?  I don't see any way it can happen, and
269
     it might mean or1k_initializing didn't get cleared properly.
270
     So I'll make it a warning.  */
271
 
272
  if (or1k_status == TARGET_CONNECTING)
273
    {
274
      warning ("internal error: or1k_initialize called twice");
275
      return;
276
    }
277
 
278
  or1k_status = TARGET_CONNECTING;
279
  or1k_stall ();
280
  if (current_or1k_target != NULL && current_or1k_target->to_init != NULL)
281
    current_or1k_target->to_init (args);
282
 
283
  /* Determine implementation configuration.  */
284
  or1k_implementation.VR = or1k_read_reg (VR_SPRNUM);
285
  or1k_implementation.UPR = or1k_read_reg (UPR_SPRNUM);
286
 
287
  /* Determine max number of supported matchpoints.  */
288
  or1k_implementation.num_matchpoints = 2;
289
  or1k_implementation.num_gpr_regs = 32;
290
  /*!!! FINISH */
291
 
292
 
293
  /* Is implementation supported? */
294
 
295
  /* First we should have system and debug groups implemented. */
296
  if (or1k_implementation.VR & (1 << SPR_SYSTEM_GROUP) == 0)
297
    error ("System group should be available in the or1k implementation.");
298
  if (or1k_implementation.VR & (1 << SPR_DEBUG_GROUP) == 0)
299
    error ("Debug group should be available in the or1k implementation.");
300
 
301
 
302
 
303
  /* Delete break, watch, catch points.  */
304
  for(i = 0; i < NUM_MATCHPOINTS; i++)
305
    or1k_write_reg (DCR0_SPRNUM + i, 0);
306
 
307
  dmr1 = 0;
308
  or1k_write_reg (DMR1_SPRNUM, dmr1);
309
  dmr2 = 0;
310
  or1k_write_reg (DMR2_SPRNUM, dmr2);
311
  if (err != 0)
312
    error ("Cannot connect.");
313
 
314
  /* Stop when breakpoint occurs.  */
315
  or1k_write_reg (DSR_SPRNUM, 0x1000);
316
 
317
  do_cleanups (old_cleanups);
318
 
319
  /* This should cause an error if not connected.  */
320
  or1k_fetch_registers (-1);
321
 
322
  set_current_frame (create_new_frame (read_fp (), read_pc ()));
323
  select_frame (get_current_frame (), 0);
324
}
325
 
326
/* Kill the process running on the board.  */
327
 
328
void
329
or1k_kill ()
330
{
331
  if (or1k_status != TARGET_RUNNING)
332
    return;
333
  or1k_status = TARGET_UNDEFINED;
334
  /* HW STEP.  Set DMR1_ST.  */
335
  dmr1 |= DMR1_ST;
336
  or1k_write_reg (DMR1_SPRNUM, dmr1);
337
  dmr1 &= ~DMR1_ST;
338
  or1k_stall();
339
  or1k_status = TARGET_UNDEFINED;
340
 
341
  inferior_pid = 0;
342
}
343
 
344
/* Open a connection to the remote board.  */
345
 
346
static void
347
or1k_open (name, from_tty)
348
     char *name;
349
     int from_tty;
350
{
351
  or1k_init (name);
352
 
353
  /* Switch to using remote target now.  */
354
  current_ops = current_or1k_target->gdb_ops;
355
  or1k_is_open = 1;
356
  push_target (current_ops);
357
 
358
  /* FIXME: Should we call start_remote here?  */
359
 
360
/* This is really the job of start_remote however, that makes an assumption
361
   that the target is about to print out a status message of some sort.  That
362
   doesn't happen here (in fact, it may not be possible to get the monitor to
363
   send the appropriate packet).  */
364
 
365
  flush_cached_frames ();
366
  registers_changed ();
367
  stop_pc = read_pc ();
368
  set_current_frame (create_new_frame (read_fp (), stop_pc));
369
  select_frame (get_current_frame (), 0);
370
  print_stack_frame (selected_frame, -1, 1);
371
}
372
 
373
/* Close a connection to the remote board.  */
374
 
375
static void
376
or1k_close (quitting)
377
     int quitting;
378
{
379
  if (or1k_is_open)
380
    {
381
      or1k_kill ();
382
      if (current_or1k_target != NULL && current_or1k_target->to_done != NULL)
383
        current_or1k_target->to_done ();
384
      current_or1k_target = NULL;
385
    }
386
  generic_mourn_inferior ();
387
}
388
 
389
/* Detach from the remote board.  */
390
 
391
static void
392
or1k_detach (args, from_tty)
393
     char *args;
394
     int from_tty;
395
{
396
  if (args)
397
    error ("Argument given to \"detach\" when remotely debugging.");
398
 
399
  pop_target ();
400
 
401
  or1k_close (1);
402
 
403
  if (from_tty)
404
    printf_unfiltered ("Ending remote or1k debugging.\n");
405
}
406
 
407
/* Resume execution of the target process.  STEP says whether to single-step
408
   or to run free; SIGGNAL is the signal value (e.g. SIGINT) to be given
409
   to the target, or zero for no signal.  */
410
 
411
static void
412
or1k_resume (pid, step, siggnal)
413
     int pid, step;
414
     enum target_signal siggnal;
415
{
416
  if (or1k_status != TARGET_STOPPED)
417
    if (or1k_status == TARGET_RUNNING)
418
      error ("Program is already running.");
419
    else
420
      error ("The program is not being run.");
421
 
422
  /* Clear reason register for later.  */
423
  or1k_write_reg (DRR_SPRNUM, 0);
424
 
425
  if (step)
426
    {
427
      /* HW STEP.  Set DMR1_ST.  */
428
      dmr1 |= DMR1_ST;
429
      or1k_write_reg (DMR1_SPRNUM, dmr1);
430
      dmr1 &= ~DMR1_ST;
431
    }
432
 
433
  /* Run the target. */
434
  or1k_unstall ();
435
  or1k_status = TARGET_RUNNING;
436
}
437
 
438
/* Wait until the remote stops, and return a wait status.  */
439
 
440
static int
441
or1k_wait (pid, status)
442
     int pid;
443
     struct target_waitstatus *status;
444
{
445
  interrupt_count = 0;
446
 
447
  /* If we have not sent a single step or continue command, then the
448
     board is waiting for us to do something.  Return a status
449
     indicating that it is stopped.  */
450
  if (or1k_status != TARGET_RUNNING)
451
    {
452
      if (or1k_status != TARGET_STOPPED)
453
        error("Target in invalid state.");
454
      status->kind = TARGET_WAITKIND_STOPPED;
455
      status->value.sig = TARGET_SIGNAL_TRAP;
456
      return 0;
457
    }
458
 
459
  if (err)
460
    or1k_error ("Remote failure: %s", or1k_err_name (err));
461
 
462
  /* Wait for or1k DRR register to be nonzero.  */
463
  do
464
    {
465
      drr = or1k_read_reg (DRR_SPRNUM);
466
      usleep (10);
467
    }
468
  while (drr == 0);
469
 
470
  status->kind = TARGET_WAITKIND_STOPPED;
471
 
472
  if (drr & DRR_RSTE)
473
    status->value.sig = TARGET_SIGNAL_REALTIME_33;
474
  else if (drr & DRR_BUSEE)
475
    status->value.sig = TARGET_SIGNAL_BUS;
476
  else if (drr & DRR_DPFE)
477
    status->value.sig = TARGET_SIGNAL_REALTIME_34;
478
  else if (drr & DRR_IPFE)
479
    status->value.sig = TARGET_SIGNAL_REALTIME_35;
480
  else if (drr & DRR_LPINTE)
481
    status->value.sig = TARGET_SIGNAL_INT;
482
  else if (drr & DRR_AE)
483
    status->value.sig = TARGET_SIGNAL_REALTIME_36;
484
  else if (drr & DRR_IIE)
485
    status->value.sig = TARGET_SIGNAL_ILL;
486
  else if (drr & DRR_HPINTE)
487
    status->value.sig = TARGET_SIGNAL_INT;
488
  else if (drr & DRR_DME)
489
    status->value.sig = TARGET_SIGNAL_REALTIME_37;
490
  else if (drr & DRR_IME)
491
    status->value.sig = TARGET_SIGNAL_REALTIME_38;
492
  else if (drr & DRR_RE)
493
    status->value.sig = TARGET_SIGNAL_REALTIME_39;
494
  else if (drr & DRR_SCE)
495
    status->value.sig = TARGET_SIGNAL_REALTIME_40;
496
  else if (drr & DRR_BE)
497
    status->value.sig = TARGET_SIGNAL_TRAP;
498
  else
499
    {
500
      status->value.sig = TARGET_SIGNAL_UNKNOWN;
501
      warning ("Invalid exception occured.");
502
    }
503
 
504
  or1k_status = TARGET_STOPPED;
505
 
506
  /* If the stop PC is in the _exit function, assume
507
     we hit the 'break 0x3ff' instruction in _exit, so this
508
     is not a normal breakpoint.  */
509
  {
510
    char *func_name;
511
    CORE_ADDR func_start;
512
    CORE_ADDR pc = read_pc ();
513
 
514
    find_pc_partial_function (pc, &func_name, &func_start, NULL);
515
    if (func_name != NULL && strcmp (func_name, "_exit") == 0
516
        && func_start == pc)
517
      status->kind = TARGET_WAITKIND_EXITED;
518
  }
519
  return 0;
520
}
521
 
522
/* Fetch a word from the target board.  */
523
 
524
static unsigned int
525
or1k_fetch_word (addr)
526
     CORE_ADDR addr;
527
{
528
  return or1k_read_reg (addr + MEM_SPACE);
529
}
530
 
531
/* Store a word to the target board.  Returns errno code or zero for
532
   success.  */
533
static int
534
or1k_store_word (addr, val)
535
     CORE_ADDR addr;
536
     unsigned int val;
537
{
538
  or1k_write_reg (addr + MEM_SPACE, val);
539
  return err;
540
}
541
 
542
/* Fetch the remote registers.  */
543
 
544
void
545
or1k_fetch_registers (regno)
546
     int regno;
547
{
548
  unsigned int val;
549
 
550
  if (regno == -1)
551
    {
552
      for (regno = 0; regno < NUM_REGS; regno++)
553
        or1k_fetch_registers (regno);
554
      return;
555
    }
556
 
557
  if (regno >= NUM_REGS)
558
    error("Invalid register number!");
559
 
560
  /* Convert to SPRNUM and read.  */
561
  val = or1k_read_reg (REGNUM_TO_SPRNUM(regno) + REG_SPACE);
562
 
563
  {
564
    char buf[MAX_REGISTER_RAW_SIZE];
565
 
566
    /* We got the number the register holds, but gdb expects to see a
567
       value in the target byte ordering.  */
568
    store_unsigned_integer (buf, REGISTER_RAW_SIZE (regno), val);
569
    supply_register (regno, buf);
570
  }
571
  if (err)
572
    or1k_error ("Can't read register %d(%i): %s", regno, REGNUM_TO_SPRNUM(regno) + REG_SPACE, or1k_err_name (err));
573
}
574
 
575
/* Fetch and return instruction from the specified location.  */
576
 
577
unsigned int
578
or1k_fetch_instruction (addr)
579
     CORE_ADDR addr;
580
{
581
  char buf[OR1K_INSTLEN];
582
  int status;
583
 
584
  status = read_memory_nobpt (addr, buf, OR1K_INSTLEN);
585
  if (status)
586
    memory_error (status, addr);
587
  return extract_unsigned_integer (buf, OR1K_INSTLEN);
588
}
589
 
590
static void
591
or1k_prepare_to_store ()
592
{
593
}
594
 
595
/* Store remote register(s).  */
596
 
597
static void
598
or1k_store_registers (regno)
599
     int regno;
600
{
601
  if (regno == -1)
602
    {
603
      for (regno = 0; regno < NUM_REGS; regno++)
604
        or1k_store_registers (regno);
605
      return;
606
    }
607
 
608
  if (regno >= NUM_REGS)
609
    error("Invalid register number!");
610
 
611
  or1k_write_reg (REGNUM_TO_SPRNUM(regno) + REG_SPACE, or1k_read_reg (REGNUM_TO_SPRNUM(regno) + REG_SPACE));
612
  if (err)
613
    or1k_error ("Can't write register %d(%i): %s", regno, REGNUM_TO_SPRNUM(regno) + REG_SPACE, or1k_err_name (err));
614
}
615
 
616
/* Read or write LEN bytes from inferior memory at MEMADDR,
617
   transferring to or from debugger address MYADDR.  Write to inferior
618
   if SHOULD_WRITE is nonzero.  Returns length of data written or
619
   read; 0 for error.  Note that protocol gives us the correct value
620
   for a longword, since it transfers values in ASCII.  We want the
621
   byte values, so we have to swap the longword values.  */
622
 
623
static int
624
or1k_xfer_memory (memaddr, myaddr, len, write, ignore)
625
     CORE_ADDR memaddr;
626
     char *myaddr;
627
     int len;
628
     int write;
629
     struct target_ops *ignore;
630
{
631
  register int i;
632
  /* Round starting address down to longword boundary.  */
633
  register CORE_ADDR addr = memaddr & ~3;
634
  /* Round ending address up; get number of longwords that makes.  */
635
  register int count = (((memaddr + len) - addr) + 3) / 4;
636
  /* Allocate buffer of that many longwords.  */
637
  register char *buffer = alloca (count * 4);
638
 
639
  int status;
640
 
641
  if (memaddr >= MEM_SPACE)
642
    error("Invalid address");
643
 
644
  if (write)
645
    {
646
      /* Fill start and end extra bytes of buffer with existing data.  */
647
      if (addr != memaddr || len < 4)
648
        {
649
          /* Need part of initial word -- fetch it.  */
650
          store_unsigned_integer (&buffer[0], 4, or1k_fetch_word (addr));
651
        }
652
 
653
      if (count > 1)
654
        {
655
          /* Need part of last word -- fetch it.  FIXME: we do this even
656
             if we don't need it.  */
657
          store_unsigned_integer (&buffer[(count - 1) * 4], 4,
658
                                  or1k_fetch_word (addr + (count - 1) * 4));
659
        }
660
 
661
      /* Copy data to be written over corresponding part of buffer */
662
 
663
      memcpy ((char *) buffer + (memaddr & 3), myaddr, len);
664
 
665
      /* Write the entire buffer.  */
666
 
667
      for (i = 0; i < count; i++, addr += 4)
668
        {
669
          status = or1k_store_word (addr,
670
                               extract_unsigned_integer (&buffer[i * 4], 4));
671
          /* Report each kilobyte (we download 32-bit words at a time) */
672
          if (i % 256 == 255)
673
            {
674
              printf_unfiltered ("*");
675
              gdb_flush (gdb_stdout);
676
            }
677
          if (status)
678
            {
679
              errno = status;
680
              return 0;
681
            }
682
          /* FIXME: Do we want a QUIT here?  */
683
        }
684
      if (count >= 256)
685
        printf_unfiltered ("\n");
686
    }
687
  else
688
    {
689
      /* Read all the longwords */
690
      for (i = 0; i < count; i++, addr += 4)
691
        {
692
          store_unsigned_integer (&buffer[i * 4], 4, or1k_fetch_word (addr));
693
          QUIT;
694
        }
695
 
696
      /* Copy appropriate bytes out of the buffer.  */
697
      memcpy (myaddr, buffer + (memaddr & 3), len);
698
    }
699
  return len;
700
}
701
 
702
/* Print info on this target.  */
703
 
704
static void
705
or1k_files_info (ignore)
706
     struct target_ops *ignore;
707
{
708
  char *file = "nothing";
709
 
710
  if (exec_bfd)
711
    file = bfd_get_filename (exec_bfd);
712
 
713
  printf_filtered ("or1k_files_info: file \"%s\"\n", file);
714
 
715
  if (exec_bfd)
716
    {
717
      printf_filtered ("\tAttached to %s running program %s\n",
718
                       target_shortname, file);
719
    }
720
  /* Print target info. */
721
  printf_filtered ("Status: %s\n", status_name[or1k_status]);
722
}
723
 
724
 
725
/* We can write a breakpoint and read the shadow contents in one
726
   operation.  */
727
 
728
/* Tell whether we can support a hardware breakpoint.  */
729
static int
730
or1k_can_use_hardware_breakpoint ()
731
{
732
  int i;
733
  /* Search for unused breakpoint.  */
734
  for (i = 0; i < NUM_MATCHPOINTS; i++)
735
    if (dcr[i].dp == 0)
736
      return 1;
737
  return 0;
738
}
739
 
740
/* Insert a breakpoint.  On targets that don't have built-in breakpoint
741
   support, we read the contents of the target location and stash it,
742
   then overwrite it with a breakpoint instruction.  ADDR is the target
743
   location in the target machine.  CONTENTS_CACHE is a pointer to
744
   memory allocated for saving the target contents.  It is guaranteed
745
   by the caller to be long enough to save sizeof BREAKPOINT bytes (this
746
   is accomplished via BREAKPOINT_MAX).  */
747
 
748
static int
749
or1k_insert_breakpoint (addr, contents_cache)
750
     CORE_ADDR addr;
751
     char *contents_cache;
752
{
753
  if (or1k_can_use_hardware_breakpoint())
754
    return set_breakpoint (addr);
755
  else
756
    return memory_insert_breakpoint (addr, contents_cache);
757
}
758
 
759
static int
760
or1k_remove_breakpoint (addr, contents_cache)
761
     CORE_ADDR addr;
762
     char *contents_cache;
763
{
764
  /* First try to remove HW breakpoint at address */
765
  if (clear_breakpoint (addr))
766
    return memory_remove_breakpoint (addr, contents_cache);
767
  else
768
    return 0;
769
}
770
 
771
/* Insert a breakpoint.  */
772
 
773
int
774
set_breakpoint (addr)
775
     CORE_ADDR addr;
776
{
777
  int i;
778
  unsigned int u;
779
  /* Search for unused breakpoint.  */
780
  for (i = 0; i < NUM_MATCHPOINTS; i++)
781
    if (dcr[i].dp == 0) break;
782
  if (i >= NUM_MATCHPOINTS) return 1;
783
  dvr[i] = addr;
784
  dcr[i].dp = 1;
785
  dcr[i].cc = CC_EQUAL;
786
  dcr[i].sc = 0;
787
  dcr[i].ct = CT_FETCH;
788
  or1k_write_reg (DVR0_SPRNUM + i, dvr[i]);
789
  memcpy (&u, &dcr[i], sizeof(dcr[i]));
790
  or1k_write_reg (DCR0_SPRNUM + i, u);
791
  return 0;
792
}
793
 
794
/* Clear a breakpoint.  */
795
 
796
int
797
clear_breakpoint (addr)
798
     CORE_ADDR addr;
799
{
800
  int i;
801
  unsigned int u;
802
  /* Search for matching breakpoint.  */
803
  for (i = 0; i < NUM_MATCHPOINTS; i++)
804
    if ((dcr[i].dp == 1) && (dvr[i] == addr) && (dcr[i].cc == CC_EQUAL)
805
        && (dcr[i].sc == 0) && (dcr[i].ct == CT_FETCH)) break;
806
 
807
  if (i >= NUM_MATCHPOINTS) return 1;
808
  dcr[i].dp = 0;
809
  memcpy (&u, &dcr[i], sizeof(dcr[i]));
810
  or1k_write_reg (DCR0_SPRNUM + i, u);
811
  return 0;
812
}
813
 
814
/* Start running on the target board.  */
815
 
816
static void
817
or1k_create_inferior (execfile, args, env)
818
     char *execfile;
819
     char *args;
820
     char **env;
821
{
822
  CORE_ADDR entry_pt;
823
 
824
  if (args && *args)
825
    {
826
      warning ("\
827
Can't pass arguments to remote OR1K board; arguments ignored.");
828
      /* And don't try to use them on the next "run" command.  */
829
      execute_command ("set args", 0);
830
    }
831
 
832
  if (execfile == 0 || exec_bfd == 0)
833
    error ("No executable file specified");
834
 
835
  or1k_kill ();
836
  remove_breakpoints ();
837
 
838
  entry_pt = (CORE_ADDR) bfd_get_start_address (exec_bfd);
839
  init_wait_for_inferior ();
840
 
841
  /* FIXME: Should we set inferior_pid here?  */
842
  //inferior_pid = 42;
843
  insert_breakpoints ();        /* Needed to get correct instruction in cache */
844
  clear_proceed_status ();
845
  or1k_status = TARGET_STOPPED;
846
  proceed (entry_pt, TARGET_SIGNAL_DEFAULT, 0);
847
}
848
 
849
/* Clean up after a process.  Actually nothing to do.  */
850
 
851
static void
852
or1k_mourn_inferior ()
853
{
854
  generic_mourn_inferior ();
855
}
856
 
857
static void
858
or1k_dummy_open (name, from_tty)
859
     char *name;
860
     int from_tty;
861
{
862
  target_preopen (from_tty);
863
  if (or1k_is_open)
864
    unpush_target (current_ops);
865
  current_or1k_target = &or1k_target_dummy;
866
  or1k_open (name, from_tty);
867
}
868
 
869
static void
870
or1k_jtag_open (name, from_tty)
871
     char *name;
872
     int from_tty;
873
{
874
  target_preopen (from_tty);
875
  if (or1k_is_open)
876
    unpush_target (current_ops);
877
  current_or1k_target = &or1k_target_jtag;
878
  or1k_open (name, from_tty);
879
}
880
 
881
static void
882
or1k_sim_open (name, from_tty)
883
     char *name;
884
     int from_tty;
885
{
886
  /* target_preopen (from_tty); - do we need this ? */
887
  if (or1k_is_open)
888
    unpush_target (current_ops);
889
  current_or1k_target = &or1k_target_sim;
890
  or1k_open (name, from_tty);
891
}
892
 
893
/* Executes command on the target.  */
894
 
895
void
896
or1k_sim_cmd (char *args, int from_tty)
897
{
898
  if (current_or1k_target != NULL && current_or1k_target->to_exec_command != NULL)
899
    current_or1k_target->to_exec_command (args, from_tty);
900
  else
901
    error ("Command not supported on this target. ");
902
}
903
 
904
void
905
_initialize_remote_or1k ()
906
{
907
  /* Initialize the fields in or1k_ops that are common to all targets.  */
908
  or1k_dummy_ops.to_close = or1k_close;
909
  or1k_dummy_ops.to_detach = or1k_detach;
910
  or1k_dummy_ops.to_resume = or1k_resume;
911
  or1k_dummy_ops.to_wait = or1k_wait;
912
  or1k_dummy_ops.to_fetch_registers = or1k_fetch_registers;
913
  or1k_dummy_ops.to_store_registers = or1k_store_registers;
914
  or1k_dummy_ops.to_prepare_to_store = or1k_prepare_to_store;
915
  or1k_dummy_ops.to_xfer_memory = or1k_xfer_memory;
916
  or1k_dummy_ops.to_files_info = or1k_files_info;
917
  or1k_dummy_ops.to_insert_breakpoint = or1k_insert_breakpoint;
918
  or1k_dummy_ops.to_remove_breakpoint = or1k_remove_breakpoint;
919
  or1k_dummy_ops.to_kill = or1k_kill;
920
  or1k_dummy_ops.to_load = generic_load;
921
  or1k_dummy_ops.to_create_inferior = or1k_create_inferior;
922
  or1k_dummy_ops.to_mourn_inferior = or1k_mourn_inferior;
923
  or1k_dummy_ops.to_stratum = process_stratum;
924
  or1k_dummy_ops.to_has_all_memory = 0; /* We can access memory while program is running.  */
925
  or1k_dummy_ops.to_has_memory = 1;
926
  or1k_dummy_ops.to_has_stack = 1;
927
  or1k_dummy_ops.to_has_registers = 1;
928
  or1k_dummy_ops.to_has_execution = 1;
929
  or1k_dummy_ops.to_magic = OPS_MAGIC;
930
  //or1k_ops.to_wait = or1k_wait;
931
 
932
  /* Copy the common fields to all target vectors.  */
933
  or1k_jtag_ops = or1k_sim_ops = or1k_dummy_ops;
934
 
935
  /* Initialize target-specific fields in the target vectors adn add targets.  */
936
  or1k_jtag_ops.to_shortname = "jtag";
937
  or1k_jtag_ops.to_longname = "Remote or1k debugging over JTAG port";
938
  or1k_jtag_ops.to_doc = "\
939
Debug a board using the OR1K remote debugging protocol over a parallel line.\n\
940
The argument is the device it is connected to or, if it contains a colon,\n";
941
  or1k_jtag_ops.to_open = or1k_jtag_open;
942
  add_target (&or1k_jtag_ops);
943
 
944
  or1k_dummy_ops.to_shortname = "dummy";
945
  or1k_dummy_ops.to_longname = "Dummy target";
946
  or1k_dummy_ops.to_doc = "Actually no real target attached - more like /dev/null.\n";
947
  or1k_dummy_ops.to_open = or1k_dummy_open;
948
  add_target (&or1k_dummy_ops);
949
 
950
  or1k_sim_ops.to_shortname = "sim";
951
  or1k_sim_ops.to_longname = "Remote or1k debugging using architecture simulator";
952
  or1k_sim_ops.to_doc = "Debug using an architecture simulator.\n";
953
  or1k_sim_ops.to_open = or1k_sim_open;
954
  add_target (&or1k_sim_ops);
955
}

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