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[/] [or1k/] [trunk/] [insight/] [gdb/] [remote-or1k.c] - Blame information for rev 405

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1 106 markom
/* Remote debugging interface for various or1k debugging protocols.
2 118 markom
   Currently supported or1k targets are: simulator, jtag, dummy.
3
 
4 106 markom
   Copyright 1993-1995, 2000 Free Software Foundation, Inc.
5
   Contributed by Cygnus Support.  Written by Marko Mlinar
6
   <markom@opencores.org>
7
 
8
   This file is part of GDB.
9
 
10
   This program is free software; you can redistribute it and/or modify
11
   it under the terms of the GNU General Public License as published by
12
   the Free Software Foundation; either version 2 of the License, or
13
   (at your option) any later version.
14
 
15
   This program is distributed in the hope that it will be useful,
16
   but WITHOUT ANY WARRANTY; without even the implied warranty of
17
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18
   GNU General Public License for more details.
19
 
20
   You should have received a copy of the GNU General Public License
21
   along with this program; if not, write to the Free Software
22
   Foundation, Inc., 59 Temple Place - Suite 330,
23
   Boston, MA 02111-1307, USA.  */
24
 
25
#include "defs.h"
26
#include "inferior.h"
27
#include "bfd.h"
28
#include "symfile.h"
29
#include "gdb_wait.h"
30
#include "gdbcmd.h"
31
#include "gdbcore.h"
32
#include "target.h"
33
#include "remote-utils.h"
34
#include "gdb_string.h"
35
#include "tm.h"
36
 
37
#include <signal.h>
38
#include <sys/types.h>
39
#include <sys/stat.h>
40
#include <sys/ioctl.h>
41
#include <fcntl.h>
42
 
43 362 markom
#define debug if (remote_debug) printf_unfiltered
44
 
45 125 chris
/* The following prototype is necessary or the compiler will not
46
   correctly promote the data argument to ULONGEST */
47
static void or1k_write_reg (unsigned int, ULONGEST);
48 405 simons
static int insn_modifies_gprs (unsigned int insn);
49 125 chris
 
50 118 markom
/* JTAG or1k target ops.  */
51 106 markom
extern void jtag_init PARAMS ((char * args));
52 122 markom
extern ULONGEST jtag_read_reg PARAMS ((unsigned int regno));
53
extern void jtag_write_reg PARAMS ((unsigned int regno, ULONGEST data));
54 106 markom
extern void jtag_done PARAMS ((void));
55 143 chris
extern int jtag_read_block PARAMS ((unsigned int regno, void* block, int nRegisters));
56
extern int jtag_write_block PARAMS ((unsigned int regno, void* block, int nRegisters));
57 113 markom
extern void jtag_set_chain PARAMS ((int chain));
58 106 markom
struct target_ops or1k_jtag_ops;
59
static struct or1k_target_ops or1k_target_jtag =
60
  {
61
    "jtag",
62
    jtag_init,
63
    jtag_done,
64
    jtag_read_reg,
65
    jtag_write_reg,
66 143 chris
    jtag_read_block,
67
    jtag_write_block,
68 113 markom
    jtag_set_chain,
69 106 markom
    NULL,
70
    &or1k_jtag_ops,
71
    OPS_MAGIC
72
  };
73
 
74 118 markom
/* simulator or1k target ops.  */
75 106 markom
struct target_ops or1k_sim_ops;
76
static struct or1k_target_ops or1k_target_sim =
77
  {
78
    "simulator",
79
    NULL,
80
    NULL,
81
    NULL,
82
    NULL,
83
    NULL,
84
    NULL,
85 143 chris
    NULL,
86
    NULL,
87 106 markom
    &or1k_sim_ops,
88
    OPS_MAGIC
89
  };
90
 
91 118 markom
/* dummy or1k target ops.  */
92 106 markom
struct target_ops or1k_dummy_ops;
93
static struct or1k_target_ops or1k_target_dummy =
94
  {
95
    "dummy",
96
    NULL,
97
    NULL,
98
    NULL,
99
    NULL,
100
    NULL,
101
    NULL,
102 143 chris
    NULL,
103
    NULL,
104 106 markom
    &or1k_dummy_ops,
105
    OPS_MAGIC
106
  };
107
 
108
const char *str_err[] =
109
  {
110
    "None", "CRC error"
111
  };
112
 
113
const char *status_name[] =
114
  {
115
    "UNDEFINED", "CONNECTING", "DISCONNECTING", "RUNNING", "STOPPED"
116
  };
117
 
118 113 markom
/* Names for matchpoint related stuff.  */
119
static char *ct_names[] =
120
  {
121
    "DIS", "IFEA", "LEA", "SEA", "AEA", "LDATA", "SDATA", "ADATA"
122
  };
123
 
124
static char *cc_names[] =
125
  {
126
    "&", "==", "<", "<=", ">", ">=", "!=", "ERR"
127
  };
128
 
129
static char *ch_names[] =
130
  {
131
    "ERR", "&", "|", "ERR"
132
  };
133
 
134 106 markom
/* Implementation specific information.  Set by or1k_initialize.  */
135
struct struct_or1k_implementation or1k_implementation;
136
 
137
/* Current target status.  */
138
static enum target_status or1k_status = TARGET_UNDEFINED;
139
 
140
/* The target vector.  */
141
struct target_ops or1k_dummy_ops, or1k_jtag_ops, or1k_sim_ops;
142
 
143
/* Currently active target description (if or1k_is_open == 1) */
144
static struct target_ops *current_ops;
145
 
146
/* Currently active or1k target operations.  */
147
static struct or1k_target_ops *current_or1k_target = NULL;
148
 
149
/* Set to 1 if the target is open.  */
150
static int or1k_is_open = 0;
151
 
152
/* Error last occured, zero = ok.  */
153 118 markom
int err = 0;
154 106 markom
 
155 362 markom
/* Nonzero, if we changed something (except DMR1 which is updated on every run anyway).  */
156 118 markom
int debug_regs_changed;
157
 
158 106 markom
/* Number of interrupts while waiting for process.  */
159
static int interrupt_count = 0;
160
 
161 113 markom
/* Reason of last stop.  */
162
static int hit_watchpoint = 0;
163 374 simons
static int hit_breakpoint = 0;
164 405 simons
static int step_link_insn = 0;
165 375 simons
static int new_pc_set = 0;
166 113 markom
 
167 106 markom
/* Current register values.  */
168 118 markom
unsigned int dmr1 = 0;
169
unsigned int dmr2 = 0;
170
unsigned int dsr = 0;
171
unsigned int drr = 0;
172 405 simons
unsigned int lr = 0;
173 106 markom
 
174 118 markom
/* Current matchpoints.  */
175
unsigned int dvr[MAX_MATCHPOINTS];
176
struct dcr_struct dcr[MAX_MATCHPOINTS];
177 106 markom
 
178 362 markom
/* Number of matchpoint users */
179 118 markom
int matchpoint_user_count[MAX_MATCHPOINTS] = {0};
180
 
181 362 markom
/* Old SIGINT handler.  */
182
static void (*ofunc) PARAMS ((int));
183
 
184
 
185 106 markom
/* Handle low-level error that we can't recover from.  Note that just
186
   error()ing out from target_wait or some such low-level place will cause
187
   all hell to break loose--the rest of GDB will tend to get left in an
188
   inconsistent state.  */
189
 
190
static NORETURN void
191
or1k_error (char *string,...)
192
{
193
  va_list args;
194
 
195
  va_start (args, string);
196
 
197
  target_terminal_ours ();
198
  wrap_here ("");               /* Force out any buffered output */
199
  gdb_flush (gdb_stdout);
200
  if (error_pre_print)
201
    fprintf_filtered (gdb_stderr, error_pre_print);
202
  vfprintf_filtered (gdb_stderr, string, args);
203
  fprintf_filtered (gdb_stderr, "\n");
204
  va_end (args);
205
  gdb_flush (gdb_stderr);
206
 
207
  /* Clean up in such a way that or1k_close won't try to talk to the
208
     board (it almost surely won't work since we weren't able to talk to
209
     it).  */
210
  or1k_is_open = 0;
211
 
212
  printf_unfiltered ("Ending remote or1k debugging.\n");
213
  target_mourn_inferior ();
214
 
215
  return_to_top_level (RETURN_ERROR);
216
}
217
 
218
const char *
219
or1k_err_name (e)
220
     int e;
221
{
222
  return str_err[e];
223
}
224
 
225
/* putc_readable - print a character, displaying non-printable chars in
226
   ^x notation or in hex.  */
227
 
228
static void
229
fputc_readable (ch, file)
230
     int ch;
231
     struct ui_file *file;
232
{
233
  if (ch == '\n')
234
    fputc_unfiltered ('\n', file);
235
  else if (ch == '\r')
236
    fprintf_unfiltered (file, "\\r");
237
  else if (ch < 0x20)           /* ASCII control character */
238
    fprintf_unfiltered (file, "^%c", ch + '@');
239
  else if (ch >= 0x7f)          /* non-ASCII characters (rubout or greater) */
240
    fprintf_unfiltered (file, "[%02x]", ch & 0xff);
241
  else
242
    fputc_unfiltered (ch, file);
243
}
244
 
245
 
246
/* puts_readable - print a string, displaying non-printable chars in
247
   ^x notation or in hex.  */
248
 
249
static void
250
fputs_readable (string, file)
251
     char *string;
252
     struct ui_file *file;
253
{
254
  int c;
255
 
256
  while ((c = *string++) != '\0')
257
    fputc_readable (c, file);
258
}
259
 
260 113 markom
/* Sets scan chain.  */
261
 
262
static void
263
or1k_set_chain (chain)
264
     int chain;
265
{
266
  if (current_or1k_target != NULL && current_or1k_target->to_set_chain != NULL)
267
    current_or1k_target->to_set_chain (chain);
268
}
269
 
270 106 markom
/* Sets register/memory regno to data.  */
271
 
272 113 markom
static void
273 106 markom
or1k_write_reg (regno, data)
274
     unsigned int regno;
275 122 markom
     ULONGEST data;
276 106 markom
{
277 113 markom
  if (current_or1k_target != NULL && current_or1k_target->to_write_reg != NULL)
278
    current_or1k_target->to_write_reg (regno, data);
279 106 markom
}
280
 
281
/* Reads register/memory from regno.  */
282
 
283 122 markom
static ULONGEST
284 106 markom
or1k_read_reg (regno)
285
     unsigned int regno;
286
{
287 113 markom
  if (current_or1k_target != NULL && current_or1k_target->to_read_reg != NULL)
288
    return current_or1k_target->to_read_reg (regno);
289 106 markom
  else
290
    return 0x1234;
291
}
292
 
293 113 markom
/* Sets SPR register regno to data.  */
294
 
295
void
296
or1k_write_spr_reg (regno, data)
297
     unsigned int regno;
298
     unsigned int data;
299
{
300
  or1k_set_chain (SC_RISC_DEBUG);
301 362 markom
  or1k_write_reg (regno, (ULONGEST)data);
302 374 simons
  if (regno == PC_SPRNUM) {
303
    hit_breakpoint = 0;
304 405 simons
    step_link_insn = 0;
305 375 simons
    new_pc_set = 1;
306 374 simons
  }
307 113 markom
}
308
 
309
/* Reads register SPR from regno.  */
310
 
311
unsigned int
312
or1k_read_spr_reg (regno)
313
     unsigned int regno;
314
{
315
  or1k_set_chain (SC_RISC_DEBUG);
316 362 markom
  return or1k_read_reg (regno);
317 113 markom
}
318
 
319 362 markom
/* Sets mem to data.  */
320
 
321
void
322
or1k_write_mem (addr, data)
323
     unsigned int addr;
324
     unsigned int data;
325
{
326
  or1k_set_chain (SC_WISHBONE);
327
  or1k_write_reg (addr, (ULONGEST)data);
328
}
329
 
330
/* Reads register SPR from regno.  */
331
 
332
unsigned int
333
or1k_read_mem (addr)
334
     unsigned int addr;
335
{
336
  or1k_set_chain (SC_WISHBONE);
337
  return or1k_read_reg (addr);
338
}
339
 
340 106 markom
/* Stalls the CPU.  */
341
 
342
static void
343
or1k_stall ()
344
{
345 113 markom
  int val;
346
  or1k_set_chain (SC_REGISTER);
347
  val = or1k_read_reg (JTAG_RISCOP);
348
  or1k_write_reg (JTAG_RISCOP, val | 1);
349 362 markom
  or1k_read_reg (JTAG_RISCOP);
350 118 markom
 
351
  /* Be cautious - disable trace.  */
352
  val = or1k_read_reg (JTAG_MODER);
353
  or1k_write_reg (JTAG_MODER, val & ~2);
354 106 markom
}
355
 
356
/* Unstalls the CPU.  */
357
 
358
static void
359
or1k_unstall ()
360
{
361 113 markom
  unsigned int val;
362 143 chris
 
363 207 chris
 
364 113 markom
  or1k_set_chain (SC_REGISTER);
365
  val = or1k_read_reg (JTAG_RISCOP);
366
  or1k_write_reg (JTAG_RISCOP, val & ~1);
367 362 markom
  or1k_read_reg (JTAG_RISCOP);
368 106 markom
}
369
 
370 113 markom
/* Resets the CPU and stalls it.  */
371 118 markom
 
372 106 markom
static void
373 113 markom
or1k_reset ()
374
{
375
  unsigned int val;
376 362 markom
  int i;
377
  debug ("%08x\n", or1k_read_reg (JTAG_RISCOP));
378 113 markom
  or1k_set_chain (SC_REGISTER);
379 118 markom
 
380
  /* Be cautious - disable trace.  */
381
  val = or1k_read_reg (JTAG_MODER);
382
  or1k_write_reg (JTAG_MODER, val & ~2);
383
 
384 113 markom
  val = or1k_read_reg (JTAG_RISCOP);
385
  val &= ~3;
386 118 markom
  /* Assert reset signal.  */
387
  or1k_write_reg (JTAG_RISCOP, val | 3);
388
 
389 362 markom
  /* Just do something */
390
  for (i = 0; i < 100; i++)
391
    or1k_read_reg (JTAG_RISCOP);
392
 
393 118 markom
  /* give it some time */
394
  usleep (1000);
395 125 chris
 
396 362 markom
  or1k_set_chain (SC_REGISTER);
397 118 markom
  /* Release reset signal, but keep in stall state.  */
398
  or1k_write_reg (JTAG_RISCOP, val | 1);
399 362 markom
  or1k_read_reg (JTAG_RISCOP);
400 113 markom
}
401
 
402 118 markom
/* Synchronizes debug registers in memory with those on target,
403
   if there is any change.  */
404
 
405 113 markom
static void
406 118 markom
or1k_commit_debug_registers ()
407
{
408
  int i;
409
  unsigned int u;
410
  if (!debug_regs_changed)
411
    return;
412
 
413
  /* Matchpoints (breakpoints, watchpoints).  */
414
  for (i = 0; i < NUM_MATCHPOINTS; i++)
415
    {
416
      unsigned int u;
417
      or1k_write_spr_reg (DVR0_SPRNUM + i, dvr[i]);
418
      memcpy (&u, &dcr[i], sizeof(dcr[i]));
419
      or1k_write_spr_reg (DCR0_SPRNUM + i, u);
420
    }
421
  or1k_write_spr_reg (DMR1_SPRNUM, dmr1);
422
  or1k_write_spr_reg (DMR2_SPRNUM, dmr2);
423
 
424
  /* Trace dependent.  */
425
  or1k_set_chain (SC_REGISTER);
426
  memcpy (&u, &or1k_htrace.trig, sizeof(or1k_htrace.trig));
427
  or1k_write_reg (JTAG_TSEL, u);
428
  memcpy (&u, &or1k_htrace.qual, sizeof(or1k_htrace.qual));
429
  or1k_write_reg (JTAG_QSEL, u);
430
  memcpy (&u, &or1k_htrace.stop, sizeof(or1k_htrace.stop));
431
  or1k_write_reg (JTAG_SSEL, u);
432
  debug_regs_changed = 0;
433
  for (i = 0; i < NUM_RECORDS; i++)
434
    {
435
      memcpy (&u, &or1k_htrace.recwp[i], sizeof(or1k_htrace.recwp[i]));
436
      or1k_write_reg (JTAG_RECWP0 + i, u);
437
    }
438
  memcpy (&u, &or1k_htrace.recbp, sizeof(or1k_htrace.recbp));
439
  or1k_write_reg (JTAG_RECBP0, u);
440
  memcpy (&u, &or1k_htrace.moder, sizeof(or1k_htrace.moder));
441
  or1k_write_reg (JTAG_MODER, u);
442
}
443
 
444
static void
445 106 markom
or1k_set_undefined_cleanups (arg)
446
     PTR arg;
447
{
448
  or1k_status = TARGET_UNDEFINED;
449
}
450
 
451
/* Initialize a new connection to the or1k board, and make sure we are
452
   really connected.  */
453
 
454
static void
455
or1k_init (args)
456
     char *args;
457
{
458
  struct cleanup *old_cleanups = make_cleanup (or1k_set_undefined_cleanups, NULL);
459
  int i;
460 115 markom
  unsigned int tmp;
461 118 markom
  FILE *f;
462 106 markom
 
463
  /* What is this code doing here?  I don't see any way it can happen, and
464
     it might mean or1k_initializing didn't get cleared properly.
465
     So I'll make it a warning.  */
466
 
467
  if (or1k_status == TARGET_CONNECTING)
468
    {
469
      warning ("internal error: or1k_initialize called twice");
470
      return;
471
    }
472
 
473
  or1k_status = TARGET_CONNECTING;
474
  if (current_or1k_target != NULL && current_or1k_target->to_init != NULL)
475
    current_or1k_target->to_init (args);
476 122 markom
 
477 362 markom
  debug("%08x\n", read_pc ());
478
  or1k_stall ();
479
  debug("%08x\n", read_pc ());
480
  usleep (1000);
481
 
482 106 markom
  /* Determine implementation configuration.  */
483 113 markom
  or1k_implementation.VR = or1k_read_spr_reg (VR_SPRNUM);
484
  or1k_implementation.UPR = or1k_read_spr_reg (UPR_SPRNUM);
485 118 markom
 
486 115 markom
  /* Determine number of gpr_regs.  */
487
  tmp = or1k_read_spr_reg (CPUCFGR_SPRNUM);
488
  or1k_implementation.num_gpr_regs = ((tmp >> 4) & 1)?(16):(32);
489 118 markom
 
490 115 markom
  /* Is any vector or floating point support present? */
491
  or1k_implementation.vf_present = ((tmp >> 7) & 7) != 0;
492
  or1k_implementation.num_vfpr_regs = (or1k_implementation.vf_present)?(32):(0);
493 106 markom
 
494 115 markom
  /* Determine max number of supported matchpoints.  */
495
  tmp = or1k_read_spr_reg (DCFGR_SPRNUM);
496
  or1k_implementation.num_matchpoints = tmp & 7;
497 113 markom
  or1k_implementation.num_used_matchpoints = 0;
498 115 markom
  or1k_implementation.has_counters = tmp & 4 == 1;
499 106 markom
 
500
  /* Is implementation supported? */
501
 
502
  /* First we should have system and debug groups implemented. */
503
  if (or1k_implementation.VR & (1 << SPR_SYSTEM_GROUP) == 0)
504
    error ("System group should be available in the or1k implementation.");
505
  if (or1k_implementation.VR & (1 << SPR_DEBUG_GROUP) == 0)
506
    error ("Debug group should be available in the or1k implementation.");
507 115 markom
  if (or1k_implementation.has_counters)
508
    warning ("Counters not supported.");
509 106 markom
 
510
  /* Delete break, watch, catch points.  */
511
  for(i = 0; i < NUM_MATCHPOINTS; i++)
512 118 markom
    {
513
      memset (&dcr[i], 0, sizeof (dcr[i]));
514
      matchpoint_user_count[i] = 0;
515
    }
516 106 markom
 
517
  dmr1 = 0;
518
  dmr2 = 0;
519 118 markom
  memset (&or1k_htrace, 0, sizeof (or1k_htrace));
520
 
521
  /* RECSELDEPEND = 0 does not match our trace scheme. */
522
  or1k_htrace.moder.rec_sel_dep = 1;
523
 
524 405 simons
  debug_regs_changed = 0;//1;
525 118 markom
  or1k_commit_debug_registers ();
526
 
527 106 markom
  if (err != 0)
528
    error ("Cannot connect.");
529
 
530 362 markom
  /* Enable exceptions */
531
  or1k_write_spr_reg (SR_SPRNUM, or1k_read_spr_reg(SR_SPRNUM) | 0x2);
532
 
533 106 markom
  /* Stop when breakpoint occurs.  */
534 372 markom
  or1k_write_spr_reg (DSR_SPRNUM, dsr = 0x2000);
535 106 markom
 
536
  do_cleanups (old_cleanups);
537
 
538
  /* This should cause an error if not connected.  */
539
  or1k_fetch_registers (-1);
540
 
541
  set_current_frame (create_new_frame (read_fp (), read_pc ()));
542
  select_frame (get_current_frame (), 0);
543 118 markom
 
544
  /* Just empty it.  */
545
  if ((f = fopen (TRACE_FILENAME, "wb+")) == NULL)
546
    error ("Cannot open trace file.");
547
  fclose (f);
548
  trace_size = 0;
549 363 markom
  or1k_status = TARGET_STOPPED;
550 106 markom
}
551
 
552
/* Kill the process running on the board.  */
553
 
554
void
555
or1k_kill ()
556
{
557
  if (or1k_status != TARGET_RUNNING)
558
    return;
559
  or1k_status = TARGET_UNDEFINED;
560 113 markom
  or1k_reset();
561
  or1k_status = TARGET_STOPPED;
562 106 markom
 
563
  inferior_pid = 0;
564
}
565
 
566
/* Open a connection to the remote board.  */
567
 
568
static void
569
or1k_open (name, from_tty)
570
     char *name;
571
     int from_tty;
572
{
573
  or1k_init (name);
574
 
575
  /* Switch to using remote target now.  */
576
  current_ops = current_or1k_target->gdb_ops;
577
  or1k_is_open = 1;
578
  push_target (current_ops);
579
 
580
  /* FIXME: Should we call start_remote here?  */
581
 
582
/* This is really the job of start_remote however, that makes an assumption
583
   that the target is about to print out a status message of some sort.  That
584
   doesn't happen here (in fact, it may not be possible to get the monitor to
585
   send the appropriate packet).  */
586
 
587
  flush_cached_frames ();
588
  registers_changed ();
589
  stop_pc = read_pc ();
590
  set_current_frame (create_new_frame (read_fp (), stop_pc));
591
  select_frame (get_current_frame (), 0);
592
  print_stack_frame (selected_frame, -1, 1);
593
}
594
 
595 362 markom
/* This is the generic stop called via the target vector. When a target
596
   interrupt is requested, either by the command line or the GUI, we
597
   will eventually end up here. */
598
static void
599
or1k_stop ()
600
{
601
  /* Send a break or a ^C, depending on user preference.  */
602
  debug ("remote_stop called\n");
603
 
604
  /* We should not stop the target immediately, since it can be in an
605
     unfinished state.  So we do a single step.  This should not affect
606
     on anything.  */
607
  or1k_stall ();
608
  /* HW STEP.  Set DMR1_ST.  */
609
  dmr1 |= DMR1_ST;
610
  or1k_write_spr_reg (DMR1_SPRNUM, dmr1);
611
  dmr1 &= ~DMR1_ST;
612
  or1k_unstall ();
613
}
614
 
615 106 markom
/* Close a connection to the remote board.  */
616
 
617
static void
618
or1k_close (quitting)
619
     int quitting;
620
{
621
  if (or1k_is_open)
622
    {
623
      or1k_kill ();
624
      if (current_or1k_target != NULL && current_or1k_target->to_done != NULL)
625
        current_or1k_target->to_done ();
626
      current_or1k_target = NULL;
627
    }
628
  generic_mourn_inferior ();
629
}
630
 
631
/* Detach from the remote board.  */
632
 
633
static void
634
or1k_detach (args, from_tty)
635
     char *args;
636
     int from_tty;
637
{
638
  if (args)
639
    error ("Argument given to \"detach\" when remotely debugging.");
640
 
641
  pop_target ();
642
 
643
  or1k_close (1);
644
 
645
  if (from_tty)
646
    printf_unfiltered ("Ending remote or1k debugging.\n");
647
}
648
 
649 118 markom
/* Appends trace data to the trace file.  */
650
 
651
static void
652
or1k_read_trace ()
653
{
654
  struct htrace_data_struct data;
655 122 markom
  ULONGEST tmp;
656 118 markom
  int first = 1;
657
  FILE *fd;
658
  if ((fd = fopen (TRACE_FILENAME, "ab")) == NULL)
659
    {
660
      warning ("Cannot append to trace file.");
661
      return;
662
    }
663
 
664
  or1k_set_chain (SC_TRACE);
665
  while (1)
666
    {
667
      tmp = or1k_read_reg (0);
668
      memcpy (&data, &tmp, sizeof (data));
669
 
670
      /* Last record reached. */
671
      if (!data.valid)
672
        break;
673
      data.valid = first;
674
      first = 0;
675
      if (!fwrite (&data, sizeof (data), 1, fd))
676
        {
677
          warning ("Cannot write trace data");
678
          break;
679
        }
680
    }
681
  fclose (fd);
682
}
683
 
684 362 markom
/* ^C Interrupt handling */
685
 
686
/* Ask the user what to do when an interrupt is received.  */
687
static void
688
interrupt_query ()
689
{
690
  target_terminal_ours ();
691
 
692
  if (query ("Interrupted while waiting for the program.\n\
693
Give up (and stop debugging it)? "))
694
    {
695
      target_mourn_inferior ();
696
      return_to_top_level (RETURN_QUIT);
697
    }
698
 
699
  target_terminal_inferior ();
700
}
701
 
702
static void or1k_interrupt_twice (int signo);
703
 
704
 
705
/* The command line interface's stop routine. This function is installed
706
   as a signal handler for SIGINT. The first time a user requests a
707
   stop, we call remote_stop to send a break or ^C. If there is no
708
   response from the target (it didn't stop when the user requested it),
709
   we ask the user if he'd like to detach from the target. */
710
static void
711
or1k_interrupt (signo)
712
     int signo;
713
{
714
        debug ("interrupt");
715
  /* If this doesn't work, try more severe steps. */
716
  signal (signo, or1k_interrupt_twice);
717
 
718
  debug ("remote_interrupt called\n");
719
 
720
  interrupt_count++;
721
}
722
 
723
/* The user typed ^C twice.  */
724
 
725
static void
726
or1k_interrupt_twice (signo)
727
     int signo;
728
{
729
        debug ("interrupt2");
730
  signal (signo, ofunc);
731
  interrupt_query ();
732
  signal (signo, or1k_interrupt);
733
}
734
 
735 106 markom
/* Resume execution of the target process.  STEP says whether to single-step
736
   or to run free; SIGGNAL is the signal value (e.g. SIGINT) to be given
737
   to the target, or zero for no signal.  */
738
 
739
static void
740
or1k_resume (pid, step, siggnal)
741
     int pid, step;
742
     enum target_signal siggnal;
743 362 markom
{
744 372 markom
  unsigned int pc;
745
  unsigned int ppc;
746
  unsigned int npc;
747
  unsigned int val;
748 375 simons
  unsigned int ppc_insn;
749 405 simons
  unsigned int pc_insn;
750 372 markom
 
751
  pc = read_pc();
752
  npc = or1k_read_spr_reg (PC_SPRNUM);
753
  ppc = or1k_read_spr_reg (PPC_SPRNUM);
754
  debug ("pc = %08x BP = %x npc = %08x ppc = %08x\n", pc, breakpoint_here_p (pc), npc, ppc);
755 362 markom
  debug ("resume %i, %i, %i\n",step, siggnal, or1k_status);
756 106 markom
  if (or1k_status != TARGET_STOPPED)
757
    if (or1k_status == TARGET_RUNNING)
758
      error ("Program is already running.");
759
    else
760
      error ("The program is not being run.");
761
 
762 150 chris
 
763 106 markom
  /* Clear reason register for later.  */
764 113 markom
  or1k_write_spr_reg (DRR_SPRNUM, 0);
765 106 markom
 
766 362 markom
  or1k_commit_debug_registers ();
767
 
768 405 simons
  /* Fetch previous insn */
769
  ppc_insn = or1k_fetch_instruction (ppc);
770 375 simons
 
771 405 simons
  /* Fetch next insn */
772
  pc_insn = or1k_fetch_instruction (pc);
773
 
774 374 simons
  if (step)
775
    {
776 106 markom
      /* HW STEP.  Set DMR1_ST.  */
777
      dmr1 |= DMR1_ST;
778 113 markom
      or1k_write_spr_reg (DMR1_SPRNUM, dmr1);
779 106 markom
      dmr1 &= ~DMR1_ST;
780 372 markom
 
781 375 simons
      if (new_pc_set)
782
        {
783 379 markom
          debug("resume: 1\n");
784 405 simons
          /* If new PC was set, then just set it again to fill the pipeline */
785
 
786 375 simons
          or1k_write_spr_reg (PC_SPRNUM, pc);
787 405 simons
 
788
          if (is_delayed (pc_insn) && insn_modifies_gprs (pc_insn))
789
            {
790
              debug("resume: 10\n");
791
              /* We are steping across jump an link insn - save link
792
                 register, so we will be able to restore it when we will
793
                 step across delay slot insn */
794
              step_link_insn = 1;
795
              lr = or1k_read_spr_reg (REGNUM_TO_SPRNUM(9));
796
            }
797 375 simons
        }
798 405 simons
      else if (is_delayed (ppc_insn) && (ppc != pc))
799 375 simons
        {
800 405 simons
          debug("resume: 2\n");
801 375 simons
          /* Steping across delay slot insn - we have to reexcute branch insn */
802 374 simons
 
803 405 simons
          if (breakpoint_here_p (ppc))
804
            or1k_write_mem(ppc, ppc_insn);
805
 
806
          if (insn_modifies_gprs (ppc_insn) && step_link_insn)
807
            {
808
              debug("resume: 11\n");
809
              /* If this is delay slot of jump an link insn that was
810
                 allready executed - restore link register first */
811
              or1k_write_spr_reg (REGNUM_TO_SPRNUM(9), lr);
812
              step_link_insn = 0;
813
            }
814
 
815 375 simons
          or1k_write_spr_reg (PC_SPRNUM, ppc);
816
 
817
          or1k_unstall ();
818
 
819
          or1k_set_chain (SC_REGISTER);
820
          val = or1k_read_reg (JTAG_RISCOP);
821
          do {
822
            val = or1k_read_reg (JTAG_RISCOP);
823
          } while ((val & 1) == 0);
824
        }
825 405 simons
      else if (hit_breakpoint && ((ppc + 4) != npc) && (pc != npc))
826
        {
827 379 markom
          debug("resume: 3\n");
828 374 simons
          /* Trapped on delay slot instruction. */
829
          /* Set PC to branch insn preceding delay slot. */
830
          or1k_write_spr_reg (PC_SPRNUM, ppc - 4);
831
 
832 405 simons
          if (insn_modifies_gprs (or1k_fetch_instruction (ppc - 4)))
833
            {
834
              debug("resume: 12\n");
835
              /* We are steping across jump an link insn - save link
836
                 register, so we will be able to restore it when we will
837
                 step across delay slot insn */
838
              step_link_insn = 1;
839
              lr = or1k_read_spr_reg (REGNUM_TO_SPRNUM(9));
840
            }
841
 
842 372 markom
          or1k_unstall ();
843
 
844
          or1k_set_chain (SC_REGISTER);
845
          val = or1k_read_reg (JTAG_RISCOP);
846 374 simons
          do {
847 372 markom
            val = or1k_read_reg (JTAG_RISCOP);
848 374 simons
          } while ((val & 1) == 0);
849 372 markom
        }
850 375 simons
      else
851 379 markom
        {
852
          debug("resume: 4\n");
853 405 simons
          /* Steping across 'non delay slot' insn - set PC to fill the pipeline */
854
 
855 379 markom
          or1k_write_spr_reg (PC_SPRNUM, pc);
856 375 simons
 
857 405 simons
          if (is_delayed (pc_insn) && insn_modifies_gprs (pc_insn))
858
            {
859
              debug("resume: 13\n");
860
              /* We are steping across jump an link insn - save link
861
                 register, so we will be able to restore it when we will
862
                 step across delay slot insn */
863
              step_link_insn = 1;
864
              lr = or1k_read_spr_reg (REGNUM_TO_SPRNUM(9));
865
            }
866 379 markom
        }
867 375 simons
    }
868
  else
869
    {
870
      dmr1 &= ~DMR1_ST;
871
      or1k_write_spr_reg (DMR1_SPRNUM, dmr1);
872
 
873
      if (new_pc_set)
874 374 simons
        {
875 379 markom
          debug("resume: 5\n");
876 405 simons
          /* If new PC was set, then just set it again to fill the pipeline */
877
 
878
          step_link_insn = 0;
879 375 simons
          or1k_write_spr_reg (PC_SPRNUM, pc);
880
        }
881 405 simons
      else if (is_delayed (ppc_insn) && !breakpoint_here_p (ppc))
882 379 markom
        {
883
          debug("resume: 6\n");
884 405 simons
          /* If next insn is delay slot insn - set PC to previous branch insn
885
             and continue from there to refill the pipeline */
886 379 markom
 
887 405 simons
          if (insn_modifies_gprs (ppc_insn) && step_link_insn)
888
            {
889
              debug("resume: 14\n");
890
              /* If this is delay slot of jump an link insn that was
891
                 allready executed - restore link register first */
892
              or1k_write_spr_reg (REGNUM_TO_SPRNUM(9), lr);
893
              step_link_insn = 0;
894
            }
895
 
896
           or1k_write_spr_reg (PC_SPRNUM, ppc);
897 379 markom
        }
898 405 simons
      else if (is_delayed (ppc_insn) && breakpoint_here_p (ppc))
899 375 simons
        {
900 379 markom
          debug("resume: 7\n");
901 405 simons
          /* If next insn is delay slot insn and previous branch insn
902
             is actually BP - replace BP with original branch insn, set PC
903
             to that insn step over it, put back BP and continue */
904
 
905 375 simons
          or1k_write_mem(ppc, ppc_insn);
906
 
907
          dmr1 |= DMR1_ST;
908
          or1k_write_spr_reg (DMR1_SPRNUM, dmr1);
909
          dmr1 &= ~DMR1_ST;
910
 
911
          or1k_write_spr_reg (PC_SPRNUM, ppc);
912 374 simons
 
913 405 simons
          if (insn_modifies_gprs (ppc_insn) && step_link_insn)
914
            {
915
              debug("resume: 15\n");
916
              /* If this is delay slot of jump an link insn that was
917
                 allready executed - restore link register first */
918
              or1k_write_spr_reg (REGNUM_TO_SPRNUM(9), lr);
919
              step_link_insn = 0;
920
            }
921 375 simons
 
922 405 simons
           or1k_unstall ();
923
 
924 374 simons
          or1k_set_chain (SC_REGISTER);
925
          val = or1k_read_reg (JTAG_RISCOP);
926
          do {
927
            val = or1k_read_reg (JTAG_RISCOP);
928
          } while ((val & 1) == 0);
929 375 simons
 
930
          or1k_write_mem(ppc, 0x21000001);
931
 
932
          or1k_write_spr_reg (DMR1_SPRNUM, dmr1);
933 374 simons
        }
934 375 simons
      else
935 379 markom
        {
936
          debug("resume: 8\n");
937 405 simons
          /* Continue from 'non delay slot' insn - set PC to fill the pipeline */
938
 
939 379 markom
          or1k_write_spr_reg (PC_SPRNUM, pc);
940
        }
941 106 markom
    }
942
 
943 405 simons
  /* Now we are in normal program flow again */
944
  new_pc_set = 0;
945
 
946 207 chris
  /* We can now continue normally, independent of step */
947 106 markom
  or1k_unstall ();
948
  or1k_status = TARGET_RUNNING;
949 362 markom
  debug ("-resume %i, %i, %i\n",step, siggnal, or1k_status);
950 106 markom
}
951
 
952
/* Wait until the remote stops, and return a wait status.  */
953
 
954
static int
955
or1k_wait (pid, status)
956
     int pid;
957
     struct target_waitstatus *status;
958
{
959 362 markom
  unsigned long val;
960
  unsigned long pc;
961 372 markom
  unsigned long ppc;
962 362 markom
  char buf[MAX_REGISTER_RAW_SIZE];
963 106 markom
  interrupt_count = 0;
964
 
965 362 markom
  debug ("wait %i %i\n", pid, or1k_status);
966 106 markom
  /* If we have not sent a single step or continue command, then the
967
     board is waiting for us to do something.  Return a status
968
     indicating that it is stopped.  */
969
  if (or1k_status != TARGET_RUNNING)
970
    {
971
      if (or1k_status != TARGET_STOPPED)
972
        error("Target in invalid state.");
973
      status->kind = TARGET_WAITKIND_STOPPED;
974
      status->value.sig = TARGET_SIGNAL_TRAP;
975
      return 0;
976
    }
977
 
978
  if (err)
979
    or1k_error ("Remote failure: %s", or1k_err_name (err));
980
 
981 362 markom
  /* Set new signal handler */
982
  ofunc = signal (SIGINT, or1k_interrupt);
983 106 markom
 
984 362 markom
  /* Wait for risc to stop.  */
985
  do {
986
    or1k_set_chain (SC_REGISTER);
987
    val = or1k_read_reg (JTAG_RISCOP);
988 372 markom
 
989 362 markom
    /* When we press Ctrl-C, interrupt count is set, but we must wait
990
         for or1k_read_reg to finish, otherwise we would interrupt transaction.  */
991
    if (interrupt_count)
992 372 markom
      or1k_stop ();
993 106 markom
 
994 362 markom
    usleep (10);
995
    debug ("%i", val);
996 372 markom
  } while ((val & 1) == 0);
997
 
998 362 markom
  drr = or1k_read_spr_reg (DRR_SPRNUM);
999 372 markom
 
1000 362 markom
  /* Restore old INT signal handler */
1001
  signal (SIGINT, ofunc);
1002
 
1003 372 markom
  /* Single step does not set trap exception, so we set it manually to simplify our code */
1004
  dmr1 = or1k_read_spr_reg (DMR1_SPRNUM);
1005
  if (dmr1 & DMR1_ST)
1006
    drr |= DRR_TE;
1007 362 markom
 
1008
  status->kind = TARGET_WAITKIND_STOPPED;
1009
 
1010
  debug ("epcr0 = %08x\n", or1k_read_spr_reg (EPCR0_SPRNUM));
1011
  debug ("drr = %08x\n", drr);
1012
 
1013 363 markom
  registers_changed ();
1014 362 markom
  pc = read_pc ();
1015 372 markom
  ppc = or1k_read_spr_reg (PPC_SPRNUM);
1016 375 simons
  debug ("ppc = %08x\n", ppc);
1017 362 markom
 
1018 372 markom
  if (drr & DRR_TE)
1019
    {
1020
      /* If single step is not set, we should correct the pc.  */
1021
      if (!(dmr1 & DMR1_ST))
1022
        /* PC has already stepped over the l.trap instruction.  */
1023
        pc = ppc;
1024
      status->value.sig = TARGET_SIGNAL_TRAP;
1025
      drr &= ~DRR_TE;
1026
    }
1027
  else if (drr & DRR_RSTE)
1028
    {
1029
      status->value.sig = TARGET_SIGNAL_REALTIME_33;
1030
      drr &= ~DRR_RSTE;
1031
    }
1032 106 markom
  else if (drr & DRR_BUSEE)
1033 372 markom
    {
1034
      status->value.sig = TARGET_SIGNAL_BUS;
1035
      drr &= ~DRR_BUSEE;
1036
    }
1037 106 markom
  else if (drr & DRR_AE)
1038 372 markom
    {
1039
      status->value.sig = TARGET_SIGNAL_REALTIME_36;
1040
      drr &= ~DRR_AE;
1041
    }
1042 106 markom
  else if (drr & DRR_IIE)
1043 372 markom
    {
1044
      status->value.sig = TARGET_SIGNAL_ILL;
1045
      drr &= ~DRR_IIE;
1046
    }
1047
  else if (drr & DRR_RE)
1048
    {
1049
      status->value.sig = TARGET_SIGNAL_REALTIME_39;
1050
      drr &= ~DRR_RE;
1051
    }
1052
  else if (drr & DRR_IME)
1053
    {
1054
      status->value.sig = TARGET_SIGNAL_REALTIME_38;
1055
      drr &= ~DRR_IME;
1056
    }
1057 106 markom
  else if (drr & DRR_DME)
1058 372 markom
    {
1059
      status->value.sig = TARGET_SIGNAL_REALTIME_37;
1060
      drr &= ~DRR_DME;
1061
    }
1062
  else if (drr & DRR_DPFE)
1063
    {
1064
      status->value.sig = TARGET_SIGNAL_REALTIME_34;
1065
      drr &= ~DRR_DPFE;
1066
    }
1067
  else if (drr & DRR_IPFE)
1068
    {
1069
      status->value.sig = TARGET_SIGNAL_REALTIME_35;
1070
      drr &= ~DRR_DPFE;
1071
    }
1072 106 markom
  else if (drr & DRR_SCE)
1073
    {
1074 372 markom
      status->value.sig = TARGET_SIGNAL_REALTIME_40;
1075
      drr &= ~DRR_SCE;
1076
    }
1077
  else if (drr & DRR_HPINTE)
1078
    {
1079
      status->value.sig = TARGET_SIGNAL_INT;
1080
      drr &= ~DRR_HPINTE;
1081
    }
1082
  else if (drr & DRR_LPINTE)
1083
    {
1084
      status->value.sig = TARGET_SIGNAL_INT;
1085
      drr &= ~DRR_LPINTE;
1086
    }
1087
  else
1088
    {
1089 106 markom
      status->value.sig = TARGET_SIGNAL_UNKNOWN;
1090
      warning ("Invalid exception occured.");
1091 372 markom
    }
1092 106 markom
 
1093 372 markom
  /* Update drr register */
1094
  or1k_write_spr_reg (DRR_SPRNUM, drr);
1095
 
1096 362 markom
  /* Write into PC flushes the pipeline! */
1097
  /* We got the number the register holds, but gdb expects to see a
1098
     value in the target byte ordering.  */
1099 372 markom
/*  write_pc (pc);
1100
*/
1101
  store_unsigned_integer (buf, REGISTER_RAW_SIZE (PC_REGNUM), pc);
1102
  supply_register (PC_REGNUM, buf);
1103 374 simons
 
1104
  hit_breakpoint = breakpoint_here_p (pc);
1105 372 markom
 
1106 363 markom
  /*or1k_write_spr_reg (PC_SPRNUM, pc);
1107 362 markom
  store_unsigned_integer (buf, REGISTER_RAW_SIZE (PC_REGNUM), pc);
1108 363 markom
  supply_register (PC_REGNUM, buf);*/
1109 362 markom
 
1110 113 markom
  /* Log remote stop.  */
1111 106 markom
  or1k_status = TARGET_STOPPED;
1112 113 markom
 
1113
  /* Determine what caused trap - breakpoint or watchpoint.  */
1114
  if (status->value.sig == TARGET_SIGNAL_TRAP)
1115
    {
1116
      /* Search all active breakpoints for a match.  */
1117
      CORE_ADDR pc = read_pc ();
1118
      int breakpoint = 0;
1119
      int i;
1120 150 chris
      unsigned char break_bytes[4] = BRK_INSTR_STRUCT;
1121
      unsigned long b_insn = ntohl(*((unsigned long*)break_bytes));
1122 151 chris
      unsigned long value = pc;
1123 143 chris
 
1124 113 markom
      for (i = 0; i < or1k_implementation.num_used_matchpoints; i++)
1125 118 markom
        if (dvr[i] == pc && dcr[i].dp && dcr[i].cc == CC_EQUAL
1126
            && !dcr[i].sc && dcr[i].ct == CT_FETCH)
1127 113 markom
          {
1128
            breakpoint = 1;
1129
            break;
1130
          }
1131
      hit_watchpoint = !breakpoint;
1132 143 chris
 
1133
      /* Cause the trap/breakpoint exception to be ignored. This is
1134
         the behavior of the simulator when the PC value is changed
1135
         by a write command. All pending exceptions are cleared and
1136 150 chris
         the simulator continues at the PC value specified. We need
1137
         to do this if the instruction at the current PC has the
1138
         value BRK_INSTR_STRUCT */
1139
 
1140 362 markom
      if(b_insn == or1k_read_mem((pc & 3)))
1141 150 chris
        {
1142
          or1k_write_spr_reg(PC_SPRNUM,value);
1143
        }
1144 113 markom
    }
1145
  else
1146
    hit_watchpoint = 0;
1147 106 markom
 
1148
  /* If the stop PC is in the _exit function, assume
1149
     we hit the 'break 0x3ff' instruction in _exit, so this
1150
     is not a normal breakpoint.  */
1151
  {
1152
    char *func_name;
1153
    CORE_ADDR func_start;
1154
    CORE_ADDR pc = read_pc ();
1155
 
1156
    find_pc_partial_function (pc, &func_name, &func_start, NULL);
1157
    if (func_name != NULL && strcmp (func_name, "_exit") == 0
1158
        && func_start == pc)
1159
      status->kind = TARGET_WAITKIND_EXITED;
1160
  }
1161 118 markom
 
1162
  or1k_read_trace ();
1163 362 markom
  debug ("-wait %i %i\n", pid, or1k_status);
1164 106 markom
  return 0;
1165
}
1166
 
1167 113 markom
/* Fetch a word from the target board.  All memory accesses to the
1168
   remote board are word aligned.  */
1169 106 markom
 
1170 118 markom
unsigned int
1171 106 markom
or1k_fetch_word (addr)
1172
     CORE_ADDR addr;
1173
{
1174 113 markom
  if (addr & 3)
1175
    {
1176
      int subaddr = addr & 3;
1177
      unsigned char buf[8];
1178
      unsigned int low, high;
1179
      addr >>= 2;
1180 362 markom
      low = or1k_read_mem (addr << 2);
1181
      high = or1k_read_reg ((addr + 1) << 2);
1182 113 markom
      memcpy (&buf[0], &low, 4);
1183
      memcpy (&buf[4], &high, 4);
1184
      memcpy (&low, &buf[subaddr], 4);
1185
      return low;
1186
    }
1187
  else
1188
    {
1189 362 markom
      return or1k_read_mem (addr);
1190 113 markom
    }
1191 106 markom
}
1192
 
1193
/* Store a word to the target board.  Returns errno code or zero for
1194 113 markom
   success.  All memory accesses to the remote board are word aligned.  */
1195 118 markom
 
1196 106 markom
static int
1197
or1k_store_word (addr, val)
1198
     CORE_ADDR addr;
1199
     unsigned int val;
1200
{
1201 113 markom
  if (addr & 3)
1202
    {
1203
      int subaddr = addr & 3;
1204
      unsigned char buf[8];
1205
      unsigned int low, high;
1206
      addr >>= 2;
1207 362 markom
      low = or1k_read_mem (addr << 2);
1208
      high = or1k_read_mem ((addr + 1) << 2);
1209 113 markom
      memcpy (&buf[0], &low, 4);
1210
      memcpy (&buf[4], &high, 4);
1211
      memcpy (&buf[subaddr], &val, 4);
1212
      memcpy (&low, &buf[0], 4);
1213
      memcpy (&high, &buf[4], 4);
1214 362 markom
      or1k_write_mem (addr << 2, low);
1215
      or1k_write_mem ((addr + 1) << 2, high);
1216 113 markom
    }
1217
  else
1218 362 markom
    {
1219
      or1k_write_mem (addr, val);
1220 113 markom
    }
1221 106 markom
  return err;
1222
}
1223
 
1224
/* Fetch the remote registers.  */
1225
 
1226
void
1227
or1k_fetch_registers (regno)
1228
     int regno;
1229
{
1230
  unsigned int val;
1231
 
1232
  if (regno == -1)
1233
    {
1234
      for (regno = 0; regno < NUM_REGS; regno++)
1235
        or1k_fetch_registers (regno);
1236
      return;
1237
    }
1238
 
1239
  if (regno >= NUM_REGS)
1240
    error("Invalid register number!");
1241
 
1242
  /* Convert to SPRNUM and read.  */
1243 113 markom
  val = or1k_read_spr_reg (REGNUM_TO_SPRNUM(regno));
1244 106 markom
 
1245
  {
1246
    char buf[MAX_REGISTER_RAW_SIZE];
1247
 
1248
    /* We got the number the register holds, but gdb expects to see a
1249
       value in the target byte ordering.  */
1250
    store_unsigned_integer (buf, REGISTER_RAW_SIZE (regno), val);
1251
    supply_register (regno, buf);
1252
  }
1253
  if (err)
1254 118 markom
    or1k_error ("Can't read register %d(%i): %s", regno,
1255 362 markom
                REGNUM_TO_SPRNUM(regno), or1k_err_name (err));
1256 106 markom
}
1257
 
1258
/* Fetch and return instruction from the specified location.  */
1259
 
1260
unsigned int
1261
or1k_fetch_instruction (addr)
1262
     CORE_ADDR addr;
1263
{
1264
  char buf[OR1K_INSTLEN];
1265
  int status;
1266
 
1267
  status = read_memory_nobpt (addr, buf, OR1K_INSTLEN);
1268
  if (status)
1269
    memory_error (status, addr);
1270
  return extract_unsigned_integer (buf, OR1K_INSTLEN);
1271
}
1272
 
1273 113 markom
/* Currently not needed.  */
1274
 
1275 106 markom
static void
1276
or1k_prepare_to_store ()
1277
{
1278
}
1279
 
1280
/* Store remote register(s).  */
1281
 
1282
static void
1283
or1k_store_registers (regno)
1284
     int regno;
1285
{
1286
  if (regno == -1)
1287
    {
1288
      for (regno = 0; regno < NUM_REGS; regno++)
1289
        or1k_store_registers (regno);
1290
      return;
1291
    }
1292
 
1293
  if (regno >= NUM_REGS)
1294
    error("Invalid register number!");
1295
 
1296 362 markom
  or1k_write_spr_reg (REGNUM_TO_SPRNUM(regno), read_register (regno));
1297 106 markom
  if (err)
1298 113 markom
    or1k_error ("Can't write register %d(%i): %s", regno, REGNUM_TO_SPRNUM(regno), or1k_err_name (err));
1299 106 markom
}
1300
 
1301
/* Read or write LEN bytes from inferior memory at MEMADDR,
1302
   transferring to or from debugger address MYADDR.  Write to inferior
1303
   if SHOULD_WRITE is nonzero.  Returns length of data written or
1304
   read; 0 for error.  Note that protocol gives us the correct value
1305
   for a longword, since it transfers values in ASCII.  We want the
1306
   byte values, so we have to swap the longword values.  */
1307
 
1308
static int
1309
or1k_xfer_memory (memaddr, myaddr, len, write, ignore)
1310
     CORE_ADDR memaddr;
1311
     char *myaddr;
1312
     int len;
1313
     int write;
1314
     struct target_ops *ignore;
1315
{
1316
  register int i;
1317
  /* Round starting address down to longword boundary.  */
1318
  register CORE_ADDR addr = memaddr & ~3;
1319
  /* Round ending address up; get number of longwords that makes.  */
1320
  register int count = (((memaddr + len) - addr) + 3) / 4;
1321
  /* Allocate buffer of that many longwords.  */
1322
  register char *buffer = alloca (count * 4);
1323
  int status;
1324
 
1325 143 chris
  int block_xfer_size = 256; /* CZ 21/06/01 ... number of 32 bit words */
1326
  int nBlocks = (count + block_xfer_size -1)/block_xfer_size;
1327
  int terminate = 0;  /* Terminate the printing of '*'s... */
1328
 
1329 362 markom
#ifdef DEBUG_JTAG
1330
  debug ("xfer_memory %s addr=%x, len=%i, \n", write?"write":"read", memaddr, len);
1331
  fflush(stdout);
1332
#endif
1333
 
1334
#if 0
1335 106 markom
  if (memaddr >= MEM_SPACE)
1336
    error("Invalid address");
1337 362 markom
#endif
1338 106 markom
 
1339 135 chris
  /* (CZ 21/06/01 -- because upper layers which know nothing about
1340
     Or1k or JTAG call this function directly, it is always necessary
1341
     to set the chain to point to the Debug Unit. Otherwise, it may
1342 143 chris
     be pointing to the Development Interface chain, in which case
1343 135 chris
     we're going to get bupkiss... */
1344
 
1345 106 markom
  if (write)
1346
    {
1347
      /* Fill start and end extra bytes of buffer with existing data.  */
1348
      if (addr != memaddr || len < 4)
1349
        {
1350
          /* Need part of initial word -- fetch it.  */
1351
          store_unsigned_integer (&buffer[0], 4, or1k_fetch_word (addr));
1352
        }
1353
 
1354
      if (count > 1)
1355
        {
1356
          /* Need part of last word -- fetch it.  FIXME: we do this even
1357
             if we don't need it.  */
1358
          store_unsigned_integer (&buffer[(count - 1) * 4], 4,
1359
                                  or1k_fetch_word (addr + (count - 1) * 4));
1360
        }
1361
 
1362
      /* Copy data to be written over corresponding part of buffer */
1363
      memcpy ((char *) buffer + (memaddr & 3), myaddr, len);
1364
 
1365 143 chris
      /* CZ: rewrote the block transfer routines to make the code
1366
         a little more efficient for implementations that can handle
1367
         variable sized scan chains. Might be useful in the future.
1368
         Certainly makes downloads to the simulator more efficient. */
1369
      for(i=0;i<nBlocks;i++,count-=block_xfer_size,addr += block_xfer_size*4)
1370 106 markom
        {
1371 143 chris
          int j;
1372
          int n = count < block_xfer_size ? count : block_xfer_size;
1373
          unsigned long *__buf;
1374
 
1375
          if(!(__buf = (unsigned long*)malloc(n*sizeof(unsigned long))))
1376 106 markom
            {
1377 143 chris
              errno = ERR_MEM;
1378
              return 0;
1379
            }
1380
 
1381
          for(j=0;j<n;j++)
1382
            __buf[j] = (unsigned long)extract_unsigned_integer(&buffer[(i * block_xfer_size +j)*4], 4);
1383 362 markom
          or1k_set_chain (SC_WISHBONE);
1384 143 chris
          status = or1k_store_block(addr,__buf,n);
1385
          free(__buf);
1386
          if(n == block_xfer_size)
1387
            {
1388 362 markom
              debug ("*");
1389 106 markom
              gdb_flush (gdb_stdout);
1390
            }
1391
          if (status)
1392
            {
1393
              errno = status;
1394
              return 0;
1395
            }
1396
          /* FIXME: Do we want a QUIT here?  */
1397
        }
1398 143 chris
      if (terminate)
1399 362 markom
        debug ("\n");
1400 106 markom
    }
1401
  else
1402
    {
1403 143 chris
      for(i=0;i<nBlocks;i++,count-=block_xfer_size,addr += block_xfer_size*4)
1404 106 markom
        {
1405 143 chris
          int j;
1406
          int n = count < block_xfer_size ? count : block_xfer_size;
1407
          unsigned long *__buf;
1408
 
1409 362 markom
    or1k_set_chain (SC_WISHBONE);
1410 143 chris
          __buf = (unsigned long*)malloc(n*sizeof(unsigned long));
1411
          status = or1k_load_block(addr,__buf,n);
1412
          if (!status)
1413
            for(j=0;j<n;j++)
1414
              store_unsigned_integer (&buffer[(i * block_xfer_size +j)*4], 4, __buf[j]);
1415
          else
1416
            errno = status;
1417
          free(__buf);
1418
 
1419
          if(status)
1420
            return 0;
1421 106 markom
        }
1422
      /* Copy appropriate bytes out of the buffer.  */
1423
      memcpy (myaddr, buffer + (memaddr & 3), len);
1424
    }
1425
  return len;
1426
}
1427
 
1428 143 chris
int or1k_load_block(CORE_ADDR addr,void* buffer,int nRegisters)
1429
{
1430
  int i=0;
1431 362 markom
  unsigned int regno = addr;
1432 143 chris
 
1433
  if (current_or1k_target != NULL && current_or1k_target->to_read_block != NULL)
1434
    return current_or1k_target->to_read_block (regno,buffer,nRegisters);
1435
  else
1436
    for(i=0;i<nRegisters;i++)
1437
      ((unsigned long*)buffer)[i] = 0x1234;
1438
  return 0;
1439
}
1440
 
1441
int or1k_store_block(CORE_ADDR addr,void* buffer,int nRegisters)
1442
{
1443 362 markom
  unsigned int regno = addr;
1444
 
1445 143 chris
  if (current_or1k_target != NULL && current_or1k_target->to_write_block != NULL)
1446
    return current_or1k_target->to_write_block (regno,buffer,nRegisters);
1447
  return 0;
1448
}
1449
 
1450 106 markom
/* Print info on this target.  */
1451
 
1452
static void
1453
or1k_files_info (ignore)
1454
     struct target_ops *ignore;
1455
{
1456
  char *file = "nothing";
1457
 
1458
  if (exec_bfd)
1459
    file = bfd_get_filename (exec_bfd);
1460
 
1461
  printf_filtered ("or1k_files_info: file \"%s\"\n", file);
1462
 
1463
  if (exec_bfd)
1464
    {
1465
      printf_filtered ("\tAttached to %s running program %s\n",
1466
                       target_shortname, file);
1467
    }
1468
  /* Print target info. */
1469
  printf_filtered ("Status: %s\n", status_name[or1k_status]);
1470
}
1471
 
1472
/* Tell whether we can support a hardware breakpoint.  */
1473 118 markom
 
1474 106 markom
static int
1475
or1k_can_use_hardware_breakpoint ()
1476
{
1477
  int i;
1478 118 markom
 
1479 106 markom
  /* Search for unused breakpoint.  */
1480 113 markom
  return or1k_implementation.num_used_matchpoints < or1k_implementation.num_matchpoints;
1481 106 markom
}
1482
 
1483
/* Insert a breakpoint.  On targets that don't have built-in breakpoint
1484
   support, we read the contents of the target location and stash it,
1485
   then overwrite it with a breakpoint instruction.  ADDR is the target
1486
   location in the target machine.  CONTENTS_CACHE is a pointer to
1487
   memory allocated for saving the target contents.  It is guaranteed
1488
   by the caller to be long enough to save sizeof BREAKPOINT bytes (this
1489
   is accomplished via BREAKPOINT_MAX).  */
1490
 
1491 113 markom
int
1492 106 markom
or1k_insert_breakpoint (addr, contents_cache)
1493
     CORE_ADDR addr;
1494
     char *contents_cache;
1495
{
1496
  if (or1k_can_use_hardware_breakpoint())
1497
    return set_breakpoint (addr);
1498
  else
1499
    return memory_insert_breakpoint (addr, contents_cache);
1500
}
1501
 
1502 113 markom
int
1503 106 markom
or1k_remove_breakpoint (addr, contents_cache)
1504
     CORE_ADDR addr;
1505
     char *contents_cache;
1506
{
1507
  /* First try to remove HW breakpoint at address */
1508
  if (clear_breakpoint (addr))
1509
    return memory_remove_breakpoint (addr, contents_cache);
1510
  else
1511
    return 0;
1512
}
1513
 
1514 113 markom
/* Tell whether this target can support a hardware breakpoint.  CNT
1515
   is the number of hardware breakpoints already installed.  This
1516
   implements the TARGET_CAN_USE_HARDWARE_WATCHPOINT macro.
1517
   Lower bound is estimated. !!! Can we estimate better? */
1518
 
1519
int
1520
or1k_can_use_hardware_watchpoint (bp_type, cnt)
1521
     enum bptype bp_type;
1522
     int cnt;
1523
{
1524
  /* Are there at least two matchpoints left for watch? - estimate lower bound  */
1525
  return cnt + ((bp_type == bp_hardware_watchpoint)?(1):(0))
1526
    <= or1k_implementation.num_matchpoints;
1527
}
1528
 
1529 118 markom
/* Moves matchpoint.  This is very tricky - we have to update
1530
   all references to matchpoint indexes.  We assume here that
1531
   matchpoint with index to is unused! */
1532
 
1533
static void
1534
move_matchpoint (int from, int to)
1535
{
1536
  int i, j, tmp, chaining;
1537
  if (matchpoint_user_count[to] != 0)
1538
    error ("Internal: Destination matchpoint still has users");
1539
  matchpoint_user_count[to] = matchpoint_user_count[from];
1540
  matchpoint_user_count[from] = 0;
1541
  debug_regs_changed = 1;
1542
 
1543
  dvr[to] = dvr[from];
1544
  dcr[to] = dcr[from];
1545
  dcr[from].dp = 0;
1546
 
1547
  /* Copy chaining bits.  */
1548
  chaining = dmr1 & (3 << (2 * from));
1549
  dmr1 &= ~(3 << (2 * to));
1550
  dmr1 |= chaining << (2 * to);
1551
  dmr1 &= ~(3 << (2 * from));
1552
 
1553
  /* Copy watchpoint bits */
1554
  tmp = dmr2 & (1 << from);
1555
  dmr2 &= 1 << to;
1556
  dmr2 |= tmp << to;
1557
  dmr2 &= 1 << from;
1558
 
1559
  /* Update hwatch table.  Here we assume that matchpoint
1560
     group is connected (it cannot be implemented in HW
1561
     otherwise), so if we move first, we will have to move
1562
     others later.  */
1563
  for (i = 0; i < num_hw_watches; i++)
1564
    if (or1k_hwatch[i].matchpoint_start == from)
1565
      or1k_hwatch[i].matchpoint_start = to;
1566
 
1567
  /* Update htrace struct.  */
1568
  tmp = or1k_htrace.trig.wp_trig & (1 << from);
1569
  or1k_htrace.trig.wp_trig &= 1 << to;
1570
  or1k_htrace.trig.wp_trig |= tmp << to;
1571
  or1k_htrace.trig.wp_trig &= 1 << from;
1572
 
1573
  tmp = or1k_htrace.qual.wp_trig & (1 << from);
1574
  or1k_htrace.qual.wp_trig &= 1 << to;
1575
  or1k_htrace.qual.wp_trig |= tmp << to;
1576
  or1k_htrace.qual.wp_trig &= 1 << from;
1577
 
1578
  tmp = or1k_htrace.stop.wp_trig & (1 << from);
1579
  or1k_htrace.stop.wp_trig &= 1 << to;
1580
  or1k_htrace.stop.wp_trig |= tmp << to;
1581
  or1k_htrace.stop.wp_trig &= 1 << from;
1582
 
1583
  for (i = 0; i < MAX_MATCHPOINTS; i++)
1584
    {
1585
      tmp = or1k_htrace.wp_record_uses[i] & (1 << from);
1586
      or1k_htrace.wp_record_uses[i] &= 1 << to;
1587
      or1k_htrace.wp_record_uses[i] |= tmp << to;
1588
      or1k_htrace.wp_record_uses[i] &= 1 << from;
1589
    }
1590
 
1591
  /* Do we need to move other references also? */
1592
}
1593
 
1594 113 markom
/* Sifts unused matchpoints to higher indexses.  */
1595
 
1596 118 markom
void
1597 113 markom
sift_matchpoints ()
1598
{
1599
  int i, first_free = 0;
1600
  for (i = 0; i < or1k_implementation.num_matchpoints; i++)
1601
    if (dcr[i].dp)
1602
      {
1603 118 markom
        /* Move references.  */
1604
        move_matchpoint (i, first_free);
1605
 
1606 113 markom
        first_free++;
1607
      }
1608 118 markom
 
1609
  /* Unused matchpoints should be disabled by move_matchpoint,
1610
     so we are done here.  */
1611 113 markom
}
1612
 
1613
/* Translates gdb watchpoint type into one in DCR register.  */
1614
 
1615
static int
1616
translate_type (gdb_type)
1617
     int gdb_type;
1618
{
1619
  switch (gdb_type)
1620
    {
1621
    case 0:
1622
      return CT_SDATA;
1623
    case 1:
1624
      return CT_LDATA;
1625
    case 2:
1626
      return CT_ADATA;
1627
    default:
1628
      error ("Invalid type.");
1629
    }
1630
}
1631
 
1632
/* Set a data watchpoint.  ADDR and LEN should be obvious.  TYPE is 0
1633
   for a write watchpoint, 1 for a read watchpoint, or 2 for a read/write
1634
   watchpoint. */
1635
 
1636
int
1637
or1k_insert_watchpoint (addr, len, type)
1638
     CORE_ADDR addr;
1639
     int len;
1640
     int type;
1641
{
1642
  int i;
1643 118 markom
 
1644 113 markom
  if (len < 1)
1645
    return -1;
1646
 
1647
  type = translate_type (type);
1648
 
1649
  /* Moves unused watchpoints to the top.  */
1650
  sift_matchpoints ();
1651 118 markom
 
1652 113 markom
  /* Place at first free matchpoint.  */
1653
  i = or1k_implementation.num_used_matchpoints;
1654
  dvr[i] = addr;
1655
  dcr[i].dp = 1;
1656
  dcr[i].cc = CC_GREATE;
1657
  dcr[i].sc = 0;
1658
  dcr[i].ct = type;
1659 118 markom
 
1660 113 markom
  /* Set && chaining here.  */
1661
  dmr1 &= ~(3 << (2 * i));
1662 118 markom
  dmr1 |= CHAINING_AND << (2 * i);
1663
 
1664 113 markom
  /* Set upper watchpoint bound.  */
1665
  i++;
1666
  dvr[i] = addr + len - 1;
1667
  dcr[i].dp = 1;
1668
  dcr[i].cc = CC_LESSE;
1669
  dcr[i].sc = 0;
1670
  dcr[i].ct = type;
1671 118 markom
 
1672 113 markom
  /* Matchpoints will cause breakpoints */
1673 118 markom
  dmr2 |= (1 << i);
1674 113 markom
  or1k_implementation.num_used_matchpoints += 2;
1675 118 markom
  debug_regs_changed = 1;
1676 113 markom
  return 0;
1677
}
1678
 
1679
/* Removes a data watchpoint.  ADDR and LEN should be obvious.  TYPE is 0
1680
   for a write watchpoint, 1 for a read watchpoint, or 2 for a read/write
1681
   watchpoint. */
1682 118 markom
 
1683 113 markom
int
1684
or1k_remove_watchpoint (addr, len, type)
1685
     CORE_ADDR addr;
1686
     int len;
1687
     int type;
1688
{
1689
  int i, found = -1;
1690 118 markom
 
1691 113 markom
  if (len < 1)
1692
    return -1;
1693
 
1694
  type = translate_type (type);
1695
 
1696
  /* Find the right one.  */
1697
  for (i = 0; i < or1k_implementation.num_used_matchpoints; i++)
1698
    if (dvr[i] == addr && dcr[i].dp && dcr[i].cc == CC_GREATE && !dcr[i].sc && dcr[i].ct == type
1699
        && dvr[i + 1] == addr + len - 1 && dcr[i + 1].dp && dcr[i + 1].cc == CC_LESSE
1700
        && !dcr[i + 1].sc && dcr[i + 1].ct == type)
1701
      {
1702
        found = i;
1703
        break;
1704
      }
1705
 
1706
  if (found < 0)
1707
    return -1;
1708
 
1709
  dcr[found].dp = 0;
1710
  dcr[found + 1].dp = 0;
1711
 
1712
  /* Matchpoints will not cause breakpoints anymore. */
1713 118 markom
  dmr2 &= ~(1 << i);
1714 113 markom
  or1k_implementation.num_used_matchpoints -= 2;
1715 118 markom
  debug_regs_changed = 1;
1716 113 markom
  return 0;
1717
}
1718
 
1719
int
1720
or1k_stopped_by_watchpoint (void)
1721
{
1722 143 chris
  /* For now, no watchpoints */
1723
  return 0;
1724
 
1725
  /* return hit_watchpoint; */
1726 113 markom
}
1727
 
1728 106 markom
/* Insert a breakpoint.  */
1729
 
1730
int
1731
set_breakpoint (addr)
1732
     CORE_ADDR addr;
1733
{
1734
  int i;
1735 118 markom
 
1736 106 markom
  /* Search for unused breakpoint.  */
1737
  for (i = 0; i < NUM_MATCHPOINTS; i++)
1738
    if (dcr[i].dp == 0) break;
1739
  if (i >= NUM_MATCHPOINTS) return 1;
1740
  dvr[i] = addr;
1741
  dcr[i].dp = 1;
1742
  dcr[i].cc = CC_EQUAL;
1743
  dcr[i].sc = 0;
1744
  dcr[i].ct = CT_FETCH;
1745 113 markom
  or1k_implementation.num_used_matchpoints++;
1746
 
1747
  /* No chaining here.  */
1748
  dmr1 &= ~(3 << (2*i));
1749 118 markom
 
1750 113 markom
  /* Matchpoints will cause breakpoints */
1751 118 markom
  dmr2 |= (1 << i);
1752
  debug_regs_changed = 1;
1753 106 markom
  return 0;
1754
}
1755
 
1756
/* Clear a breakpoint.  */
1757
 
1758
int
1759
clear_breakpoint (addr)
1760
     CORE_ADDR addr;
1761
{
1762
  int i;
1763 118 markom
 
1764 106 markom
  /* Search for matching breakpoint.  */
1765
  for (i = 0; i < NUM_MATCHPOINTS; i++)
1766
    if ((dcr[i].dp == 1) && (dvr[i] == addr) && (dcr[i].cc == CC_EQUAL)
1767
        && (dcr[i].sc == 0) && (dcr[i].ct == CT_FETCH)) break;
1768
 
1769
  if (i >= NUM_MATCHPOINTS) return 1;
1770
  dcr[i].dp = 0;
1771 118 markom
 
1772 113 markom
  /* Matchpoints will cause breakpoints */
1773 118 markom
  dmr2 &= ~(1 << i);
1774 113 markom
  or1k_implementation.num_used_matchpoints--;
1775 118 markom
  debug_regs_changed = 1;
1776 106 markom
  return 0;
1777
}
1778
 
1779
/* Start running on the target board.  */
1780
 
1781
static void
1782
or1k_create_inferior (execfile, args, env)
1783
     char *execfile;
1784
     char *args;
1785
     char **env;
1786
{
1787
  CORE_ADDR entry_pt;
1788
 
1789
  if (args && *args)
1790
    {
1791 118 markom
      warning ("Can't pass arguments to remote OR1K board; arguments ignored.");
1792
 
1793 106 markom
      /* And don't try to use them on the next "run" command.  */
1794
      execute_command ("set args", 0);
1795
    }
1796
 
1797
  if (execfile == 0 || exec_bfd == 0)
1798
    error ("No executable file specified");
1799
 
1800
  or1k_kill ();
1801
  remove_breakpoints ();
1802
 
1803
  entry_pt = (CORE_ADDR) bfd_get_start_address (exec_bfd);
1804
  init_wait_for_inferior ();
1805
 
1806
  /* FIXME: Should we set inferior_pid here?  */
1807 113 markom
 
1808 118 markom
  /* Needed to get correct instruction in cache */
1809
  insert_breakpoints ();
1810 106 markom
  clear_proceed_status ();
1811
  or1k_status = TARGET_STOPPED;
1812
  proceed (entry_pt, TARGET_SIGNAL_DEFAULT, 0);
1813
}
1814
 
1815
/* Clean up after a process.  Actually nothing to do.  */
1816
 
1817
static void
1818
or1k_mourn_inferior ()
1819
{
1820
  generic_mourn_inferior ();
1821
}
1822
 
1823
static void
1824
or1k_dummy_open (name, from_tty)
1825
     char *name;
1826
     int from_tty;
1827
{
1828
  target_preopen (from_tty);
1829
  if (or1k_is_open)
1830
    unpush_target (current_ops);
1831
  current_or1k_target = &or1k_target_dummy;
1832
  or1k_open (name, from_tty);
1833
}
1834
 
1835
static void
1836
or1k_jtag_open (name, from_tty)
1837
     char *name;
1838
     int from_tty;
1839
{
1840
  target_preopen (from_tty);
1841
  if (or1k_is_open)
1842
    unpush_target (current_ops);
1843
  current_or1k_target = &or1k_target_jtag;
1844
  or1k_open (name, from_tty);
1845
}
1846
 
1847
static void
1848
or1k_sim_open (name, from_tty)
1849
     char *name;
1850
     int from_tty;
1851
{
1852
  /* target_preopen (from_tty); - do we need this ? */
1853
  if (or1k_is_open)
1854
    unpush_target (current_ops);
1855
  current_or1k_target = &or1k_target_sim;
1856
  or1k_open (name, from_tty);
1857
}
1858
 
1859
/* Executes command on the target.  */
1860
 
1861
void
1862
or1k_sim_cmd (char *args, int from_tty)
1863
{
1864
  if (current_or1k_target != NULL && current_or1k_target->to_exec_command != NULL)
1865
    current_or1k_target->to_exec_command (args, from_tty);
1866
  else
1867
    error ("Command not supported on this target. ");
1868
}
1869
 
1870 113 markom
/* Displays matchpoints usage.  */
1871
 
1872 106 markom
void
1873 113 markom
info_matchpoints_command (char *args, int from_tty)
1874
{
1875
  int i;
1876
  for (i = 0; i < or1k_implementation.num_matchpoints; i++)
1877
    {
1878
      printf_filtered ("WP%i ", i);
1879
      if (dcr[i].dp)
1880
        {
1881
          int chaining = (dmr1 << 2*i) & 3;
1882
          printf_filtered ("= %s ", ct_names[dcr[i].ct]);
1883
          if (dcr[i]. sc)
1884
            printf_filtered ("s%s %i", cc_names[dcr[i].cc], (int)dvr[i]);
1885
          else
1886
            printf_filtered ("%s %u", cc_names[dcr[i].cc], (unsigned int)dvr[i]);
1887
          if (chaining)
1888
            printf_filtered ("%s WP%i", ch_names[chaining], i - 1);
1889
        }
1890
      else
1891
        printf_filtered ("NOT USED");
1892
      if ((dmr2 >> i) & 1)
1893
        printf_filtered (", causes breakpoint");
1894
      if ((dmr2 >> (i + 11)) & 1)
1895
        printf_filtered (", increments counter");
1896
      printf_filtered ("\n");
1897
    }
1898
}
1899 405 simons
 
1900 372 markom
static int
1901 405 simons
insn_modifies_gprs(unsigned int insn)
1902 372 markom
{
1903 405 simons
  /* l.jal */
1904
  if ((insn >> 26) == 0x01)
1905 372 markom
    return 1;
1906 405 simons
 
1907
  /* l.jalr */
1908
  if ((insn >> 26) == 0x12)
1909
    return 1;
1910
 
1911
  return 0;
1912 372 markom
}
1913 113 markom
 
1914
void
1915 106 markom
_initialize_remote_or1k ()
1916
{
1917
  /* Initialize the fields in or1k_ops that are common to all targets.  */
1918
  or1k_dummy_ops.to_close = or1k_close;
1919
  or1k_dummy_ops.to_detach = or1k_detach;
1920
  or1k_dummy_ops.to_resume = or1k_resume;
1921 362 markom
  or1k_dummy_ops.to_wait = or1k_wait;
1922 106 markom
  or1k_dummy_ops.to_fetch_registers = or1k_fetch_registers;
1923
  or1k_dummy_ops.to_store_registers = or1k_store_registers;
1924
  or1k_dummy_ops.to_prepare_to_store = or1k_prepare_to_store;
1925
  or1k_dummy_ops.to_xfer_memory = or1k_xfer_memory;
1926
  or1k_dummy_ops.to_files_info = or1k_files_info;
1927
  or1k_dummy_ops.to_insert_breakpoint = or1k_insert_breakpoint;
1928
  or1k_dummy_ops.to_remove_breakpoint = or1k_remove_breakpoint;
1929
  or1k_dummy_ops.to_kill = or1k_kill;
1930
  or1k_dummy_ops.to_load = generic_load;
1931
  or1k_dummy_ops.to_create_inferior = or1k_create_inferior;
1932
  or1k_dummy_ops.to_mourn_inferior = or1k_mourn_inferior;
1933
  or1k_dummy_ops.to_stratum = process_stratum;
1934 362 markom
  or1k_dummy_ops.to_stop = or1k_stop;
1935 118 markom
 
1936
  /* We can access memory while program is running.  */
1937
  or1k_dummy_ops.to_has_all_memory = 0;
1938
 
1939 106 markom
  or1k_dummy_ops.to_has_memory = 1;
1940
  or1k_dummy_ops.to_has_stack = 1;
1941
  or1k_dummy_ops.to_has_registers = 1;
1942
  or1k_dummy_ops.to_has_execution = 1;
1943
  or1k_dummy_ops.to_magic = OPS_MAGIC;
1944
 
1945
  /* Copy the common fields to all target vectors.  */
1946
  or1k_jtag_ops = or1k_sim_ops = or1k_dummy_ops;
1947 362 markom
 
1948
  /* Initialize target-specific fields in the target vectors adn add targets.  */
1949 106 markom
  or1k_jtag_ops.to_shortname = "jtag";
1950
  or1k_jtag_ops.to_longname = "Remote or1k debugging over JTAG port";
1951 125 chris
  or1k_jtag_ops.to_doc = "Debug a board using the OR1K remote debugging protocol"
1952
    " over a parallel line.\nThe argument is the parallel port it is connected "
1953
    "to, or, if it is formatted\nas a URL of the form jtag://<hostname>:<port>,"
1954
    " then the argument refers to\na remote JTAG proxy server.\n";
1955 362 markom
  or1k_jtag_ops.to_open = or1k_jtag_open;
1956 106 markom
  add_target (&or1k_jtag_ops);
1957
 
1958
  or1k_dummy_ops.to_shortname = "dummy";
1959
  or1k_dummy_ops.to_longname = "Dummy target";
1960
  or1k_dummy_ops.to_doc = "Actually no real target attached - more like /dev/null.\n";
1961
  or1k_dummy_ops.to_open = or1k_dummy_open;
1962
  add_target (&or1k_dummy_ops);
1963
 
1964
  or1k_sim_ops.to_shortname = "sim";
1965
  or1k_sim_ops.to_longname = "Remote or1k debugging using architecture simulator";
1966
  or1k_sim_ops.to_doc = "Debug using an architecture simulator.\n";
1967
  or1k_sim_ops.to_open = or1k_sim_open;
1968
  add_target (&or1k_sim_ops);
1969 113 markom
  add_info ("matchpoints", info_matchpoints_command, "Show current matchpoints allocation status.");
1970 106 markom
}

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