OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [insight/] [gdb/] [remote-vxmips.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 578 markom
/* MIPS-dependent portions of the RPC protocol
2
   used with a VxWorks target
3
 
4
   Contributed by Wind River Systems.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 2 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program; if not, write to the Free Software
20
   Foundation, Inc., 59 Temple Place - Suite 330,
21
   Boston, MA 02111-1307, USA.  */
22
 
23
#include <stdio.h>
24
#include "defs.h"
25
 
26
#include "vx-share/regPacket.h"
27
#include "frame.h"
28
#include "inferior.h"
29
#include "target.h"
30
#include "gdbcore.h"
31
#include "command.h"
32
#include "symtab.h"
33
#include "symfile.h"            /* for struct complaint */
34
#include "regcache.h"
35
 
36
#include "gdb_string.h"
37
#include <errno.h>
38
#include <fcntl.h>
39
#include <sys/types.h>
40
#include <sys/time.h>
41
#include <sys/socket.h>
42
#include <rpc/rpc.h>
43
#include <sys/time.h>           /* UTek's <rpc/rpc.h> doesn't #incl this */
44
#include <netdb.h>
45
#include "vx-share/ptrace.h"
46
#include "vx-share/xdr_ptrace.h"
47
#include "vx-share/xdr_ld.h"
48
#include "vx-share/xdr_rdb.h"
49
#include "vx-share/dbgRpcLib.h"
50
 
51
/* get rid of value.h if possible */
52
#include <value.h>
53
#include <symtab.h>
54
 
55
/* Flag set if target has fpu */
56
 
57
extern int target_has_fp;
58
 
59
/* Generic register read/write routines in remote-vx.c.  */
60
 
61
extern void net_read_registers ();
62
extern void net_write_registers ();
63
 
64
/* Read a register or registers from the VxWorks target.
65
   REGNO is the register to read, or -1 for all; currently,
66
   it is ignored.  FIXME look at regno to improve efficiency.  */
67
 
68
void
69
vx_read_register (int regno)
70
{
71
  char mips_greg_packet[MIPS_GREG_PLEN];
72
  char mips_fpreg_packet[MIPS_FPREG_PLEN];
73
 
74
  /* Get general-purpose registers.  */
75
 
76
  net_read_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_GETREGS);
77
 
78
  /* this code copies the registers obtained by RPC
79
     stored in a structure(s) like this :
80
 
81
     Register(s)                Offset(s)
82
     gp 0-31                    0x00
83
     hi                 0x80
84
     lo                 0x84
85
     sr                 0x88
86
     pc                 0x8c
87
 
88
     into a stucture like this:
89
 
90
     0x00       GP 0-31
91
     0x80       SR
92
     0x84       LO
93
     0x88       HI
94
     0x8C       BAD             --- Not available currently
95
     0x90       CAUSE           --- Not available currently
96
     0x94       PC
97
     0x98       FP 0-31
98
     0x118      FCSR
99
     0x11C      FIR             --- Not available currently
100
     0x120      FP              --- Not available currently
101
 
102
     structure is 0x124 (292) bytes in length */
103
 
104
  /* Copy the general registers.  */
105
 
106
  bcopy (&mips_greg_packet[MIPS_R_GP0], &registers[0], 32 * MIPS_GREG_SIZE);
107
 
108
  /* Copy SR, LO, HI, and PC.  */
109
 
110
  bcopy (&mips_greg_packet[MIPS_R_SR],
111
         &registers[REGISTER_BYTE (PS_REGNUM)], MIPS_GREG_SIZE);
112
  bcopy (&mips_greg_packet[MIPS_R_LO],
113
         &registers[REGISTER_BYTE (LO_REGNUM)], MIPS_GREG_SIZE);
114
  bcopy (&mips_greg_packet[MIPS_R_HI],
115
         &registers[REGISTER_BYTE (HI_REGNUM)], MIPS_GREG_SIZE);
116
  bcopy (&mips_greg_packet[MIPS_R_PC],
117
         &registers[REGISTER_BYTE (PC_REGNUM)], MIPS_GREG_SIZE);
118
 
119
  /* If the target has floating point registers, fetch them.
120
     Otherwise, zero the floating point register values in
121
     registers[] for good measure, even though we might not
122
     need to.  */
123
 
124
  if (target_has_fp)
125
    {
126
      net_read_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,
127
                          PTRACE_GETFPREGS);
128
 
129
      /* Copy the floating point registers.  */
130
 
131
      bcopy (&mips_fpreg_packet[MIPS_R_FP0],
132
             &registers[REGISTER_BYTE (FP0_REGNUM)],
133
             REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
134
 
135
      /* Copy the floating point control/status register (fpcsr).  */
136
 
137
      bcopy (&mips_fpreg_packet[MIPS_R_FPCSR],
138
             &registers[REGISTER_BYTE (FCRCS_REGNUM)],
139
             REGISTER_RAW_SIZE (FCRCS_REGNUM));
140
    }
141
  else
142
    {
143
      bzero ((char *) &registers[REGISTER_BYTE (FP0_REGNUM)],
144
             REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
145
      bzero ((char *) &registers[REGISTER_BYTE (FCRCS_REGNUM)],
146
             REGISTER_RAW_SIZE (FCRCS_REGNUM));
147
    }
148
 
149
  /* Mark the register cache valid.  */
150
 
151
  registers_fetched ();
152
}
153
 
154
/* Store a register or registers into the VxWorks target.
155
   REGNO is the register to store, or -1 for all; currently,
156
   it is ignored.  FIXME look at regno to improve efficiency.  */
157
 
158
vx_write_register (int regno)
159
{
160
  char mips_greg_packet[MIPS_GREG_PLEN];
161
  char mips_fpreg_packet[MIPS_FPREG_PLEN];
162
 
163
  /* Store general registers.  */
164
 
165
  bcopy (&registers[0], &mips_greg_packet[MIPS_R_GP0], 32 * MIPS_GREG_SIZE);
166
 
167
  /* Copy SR, LO, HI, and PC.  */
168
 
169
  bcopy (&registers[REGISTER_BYTE (PS_REGNUM)],
170
         &mips_greg_packet[MIPS_R_SR], MIPS_GREG_SIZE);
171
  bcopy (&registers[REGISTER_BYTE (LO_REGNUM)],
172
         &mips_greg_packet[MIPS_R_LO], MIPS_GREG_SIZE);
173
  bcopy (&registers[REGISTER_BYTE (HI_REGNUM)],
174
         &mips_greg_packet[MIPS_R_HI], MIPS_GREG_SIZE);
175
  bcopy (&registers[REGISTER_BYTE (PC_REGNUM)],
176
         &mips_greg_packet[MIPS_R_PC], MIPS_GREG_SIZE);
177
 
178
  net_write_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_SETREGS);
179
 
180
  /* Store floating point registers if the target has them.  */
181
 
182
  if (target_has_fp)
183
    {
184
      /* Copy the floating point data registers.  */
185
 
186
      bcopy (&registers[REGISTER_BYTE (FP0_REGNUM)],
187
             &mips_fpreg_packet[MIPS_R_FP0],
188
             REGISTER_RAW_SIZE (FP0_REGNUM) * 32);
189
 
190
      /* Copy the floating point control/status register (fpcsr).  */
191
 
192
      bcopy (&registers[REGISTER_BYTE (FCRCS_REGNUM)],
193
             &mips_fpreg_packet[MIPS_R_FPCSR],
194
             REGISTER_RAW_SIZE (FCRCS_REGNUM));
195
 
196
      net_write_registers (mips_fpreg_packet, MIPS_FPREG_PLEN,
197
                           PTRACE_SETFPREGS);
198
    }
199
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.