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[/] [or1k/] [trunk/] [insight/] [gdb/] [sh-tdep.c] - Blame information for rev 1771

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1 578 markom 
/* Target-dependent code for Hitachi Super-H, for GDB.
2 
   Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 
   Free Software Foundation, Inc.
4 
 
5 
   This file is part of GDB.
6 
 
7 
   This program is free software; you can redistribute it and/or modify
8 
   it under the terms of the GNU General Public License as published by
9 
   the Free Software Foundation; either version 2 of the License, or
10 
   (at your option) any later version.
11 
 
12 
   This program is distributed in the hope that it will be useful,
13 
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14 
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 
   GNU General Public License for more details.
16 
 
17 
   You should have received a copy of the GNU General Public License
18 
   along with this program; if not, write to the Free Software
19 
   Foundation, Inc., 59 Temple Place - Suite 330,
20 
   Boston, MA 02111-1307, USA.  */
21 
 
22 
/*
23 
   Contributed by Steve Chamberlain
24 
   sac@cygnus.com
25 
 */
26 
 
27 
#include "defs.h"
28 
#include "frame.h"
29 
#include "obstack.h"
30 
#include "symtab.h"
31 
#include "symfile.h"
32 
#include "gdbtypes.h"
33 
#include "gdbcmd.h"
34 
#include "gdbcore.h"
35 
#include "value.h"
36 
#include "dis-asm.h"
37 
#include "inferior.h"           /* for BEFORE_TEXT_END etc. */
38 
#include "gdb_string.h"
39 
#include "arch-utils.h"
40 
#include "floatformat.h"
41 
#include "regcache.h"
42 
 
43 
#include "solib-svr4.h"
44 
 
45 
#undef XMALLOC
46 
#define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
47 
 
48 
void (*sh_show_regs) (void);
49 
int (*print_sh_insn) (bfd_vma, disassemble_info*);
50 
 
51 
/* Define other aspects of the stack frame.
52 
   we keep a copy of the worked out return pc lying around, since it
53 
   is a useful bit of info */
54 
 
55 
struct frame_extra_info
56 
{
57 
  CORE_ADDR return_pc;
58 
  int leaf_function;
59 
  int f_offset;
60 
};
61 
 
62 
static char *
63 
sh_generic_register_name (int reg_nr)
64 
{
65 
  static char *register_names[] =
66 
  {
67 
    "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
68 
    "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
69 
    "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
70 
    "fpul", "fpscr",
71 
    "fr0",  "fr1",  "fr2",  "fr3",  "fr4",  "fr5",  "fr6",  "fr7",
72 
    "fr8",  "fr9",  "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
73 
    "ssr",  "spc",
74 
    "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
75 
    "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
76 
  };
77 
  if (reg_nr < 0)
78 
    return NULL;
79 
  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
80 
    return NULL;
81 
  return register_names[reg_nr];
82 
}
83 
 
84 
static char *
85 
sh_sh_register_name (int reg_nr)
86 
{
87 
  static char *register_names[] =
88 
  {
89 
    "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
90 
    "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
91 
    "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
92 
    "",     "",
93 
    "",     "",     "",     "",     "",     "",     "",     "",
94 
    "",     "",     "",     "",     "",     "",     "",     "",
95 
    "",     "",
96 
    "",     "",     "",     "",     "",     "",     "",     "",
97 
    "",     "",     "",     "",     "",     "",     "",     "",
98 
  };
99 
  if (reg_nr < 0)
100 
    return NULL;
101 
  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
102 
    return NULL;
103 
  return register_names[reg_nr];
104 
}
105 
 
106 
static char *
107 
sh_sh3_register_name (int reg_nr)
108 
{
109 
  static char *register_names[] =
110 
  {
111 
    "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
112 
    "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
113 
    "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
114 
    "",     "",
115 
    "",     "",     "",     "",     "",     "",     "",     "",
116 
    "",     "",     "",     "",     "",     "",     "",     "",
117 
    "ssr",  "spc",
118 
    "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
119 
    "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
120 
  };
121 
  if (reg_nr < 0)
122 
    return NULL;
123 
  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
124 
    return NULL;
125 
  return register_names[reg_nr];
126 
}
127 
 
128 
static char *
129 
sh_sh3e_register_name (int reg_nr)
130 
{
131 
  static char *register_names[] =
132 
  {
133 
    "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
134 
    "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
135 
    "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
136 
    "fpul", "fpscr",
137 
    "fr0",  "fr1",  "fr2",  "fr3",  "fr4",  "fr5",  "fr6",  "fr7",
138 
    "fr8",  "fr9",  "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
139 
    "ssr",  "spc",
140 
    "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
141 
    "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
142 
  };
143 
  if (reg_nr < 0)
144 
    return NULL;
145 
  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
146 
    return NULL;
147 
  return register_names[reg_nr];
148 
}
149 
 
150 
static char *
151 
sh_sh_dsp_register_name (int reg_nr)
152 
{
153 
  static char *register_names[] =
154 
  {
155 
    "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
156 
    "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
157 
    "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
158 
    "",     "dsr",
159 
    "a0g",  "a0",   "a1g",  "a1",   "m0",   "m1",   "x0",   "x1",
160 
    "y0",   "y1",   "",     "",     "",     "",     "",     "mod",
161 
    "",     "",
162 
    "rs",   "re",   "",     "",     "",     "",     "",     "",
163 
    "",     "",     "",     "",     "",     "",     "",     "",
164 
  };
165 
  if (reg_nr < 0)
166 
    return NULL;
167 
  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
168 
    return NULL;
169 
  return register_names[reg_nr];
170 
}
171 
 
172 
static char *
173 
sh_sh3_dsp_register_name (int reg_nr)
174 
{
175 
  static char *register_names[] =
176 
  {
177 
    "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
178 
    "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
179 
    "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
180 
    "",     "dsr",
181 
    "a0g",  "a0",   "a1g",  "a1",   "m0",   "m1",   "x0",   "x1",
182 
    "y0",   "y1",   "",     "",     "",     "",     "",     "mod",
183 
    "ssr",  "spc",
184 
    "rs",   "re",   "",     "",     "",     "",     "",     "",
185 
    "r0b",  "r1b",  "r2b",  "r3b",  "r4b",  "r5b",  "r6b",  "r7b"
186 
    "",     "",     "",     "",     "",     "",     "",     "",
187 
  };
188 
  if (reg_nr < 0)
189 
    return NULL;
190 
  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
191 
    return NULL;
192 
  return register_names[reg_nr];
193 
}
194 
 
195 
static char *
196 
sh_sh4_register_name (int reg_nr)
197 
{
198 
  static char *register_names[] =
199 
  {
200 
    /* general registers 0-15 */
201 
    "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
202 
    "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
203 
    /* 16 - 22 */
204 
    "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
205 
    /* 23, 24 */
206 
    "fpul", "fpscr",
207 
    /* floating point registers 25 - 40 */
208 
    "fr0",  "fr1",  "fr2",  "fr3",  "fr4",  "fr5",  "fr6",  "fr7",
209 
    "fr8",  "fr9",  "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
210 
    /* 41, 42 */
211 
    "ssr",  "spc",
212 
    /* bank 0 43 - 50 */
213 
    "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
214 
    /* bank 1 51 - 58 */
215 
    "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
216 
    /* double precision (pseudo) 59 - 66 */
217 
    "dr0",  "dr2",  "dr4",  "dr6",  "dr8",  "dr10", "dr12", "dr14",
218 
    /* vectors (pseudo) 67 - 70 */
219 
    "fv0",  "fv4",  "fv8",  "fv12",
220 
    /* FIXME: missing XF 71 - 86 */
221 
    /* FIXME: missing XD 87 - 94 */
222 
  };
223 
  if (reg_nr < 0)
224 
    return NULL;
225 
  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
226 
    return NULL;
227 
  return register_names[reg_nr];
228 
}
229 
 
230 
static unsigned char *
231 
sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
232 
{
233 
  /* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
234 
  static unsigned char breakpoint[] =  {0xc3, 0xc3};
235 
 
236 
  *lenptr = sizeof (breakpoint);
237 
  return breakpoint;
238 
}
239 
 
240 
/* Prologue looks like
241 
   [mov.l       <regs>,@-r15]...
242 
   [sts.l       pr,@-r15]
243 
   [mov.l       r14,@-r15]
244 
   [mov         r15,r14]
245 
 
246 
   Actually it can be more complicated than this.  For instance, with
247 
   newer gcc's:
248 
 
249 
   mov.l   r14,@-r15
250 
   add     #-12,r15
251 
   mov     r15,r14
252 
   mov     r4,r1
253 
   mov     r5,r2
254 
   mov.l   r6,@(4,r14)
255 
   mov.l   r7,@(8,r14)
256 
   mov.b   r1,@r14
257 
   mov     r14,r1
258 
   mov     r14,r1
259 
   add     #2,r1
260 
   mov.w   r2,@r1
261 
 
262 
 */
263 
 
264 
/* STS.L PR,@-r15  0100111100100010
265 
   r15-4-->r15, PR-->(r15) */
266 
#define IS_STS(x)               ((x) == 0x4f22)
267 
 
268 
/* MOV.L Rm,@-r15  00101111mmmm0110
269 
   r15-4-->r15, Rm-->(R15) */
270 
#define IS_PUSH(x)              (((x) & 0xff0f) == 0x2f06)
271 
 
272 
#define GET_PUSHED_REG(x)       (((x) >> 4) & 0xf)
273 
 
274 
/* MOV r15,r14     0110111011110011
275 
   r15-->r14  */
276 
#define IS_MOV_SP_FP(x)         ((x) == 0x6ef3)
277 
 
278 
/* ADD #imm,r15    01111111iiiiiiii
279 
   r15+imm-->r15 */
280 
#define IS_ADD_SP(x)            (((x) & 0xff00) == 0x7f00)
281 
 
282 
#define IS_MOV_R3(x)            (((x) & 0xff00) == 0x1a00)
283 
#define IS_SHLL_R3(x)           ((x) == 0x4300)
284 
 
285 
/* ADD r3,r15      0011111100111100
286 
   r15+r3-->r15 */
287 
#define IS_ADD_R3SP(x)          ((x) == 0x3f3c)
288 
 
289 
/* FMOV.S FRm,@-Rn  Rn-4-->Rn, FRm-->(Rn)     1111nnnnmmmm1011
290 
   FMOV DRm,@-Rn    Rn-8-->Rn, DRm-->(Rn)     1111nnnnmmm01011
291 
   FMOV XDm,@-Rn    Rn-8-->Rn, XDm-->(Rn)     1111nnnnmmm11011 */
292 
#define IS_FMOV(x)              (((x) & 0xf00f) == 0xf00b)
293 
 
294 
/* MOV Rm,Rn            Rm-->Rn          0110nnnnmmmm0011
295 
   MOV.L Rm,@(disp,Rn)  Rm-->(dispx4+Rn) 0001nnnnmmmmdddd
296 
   MOV.L Rm,@Rn         Rm-->(Rn)        0010nnnnmmmm0010
297 
   where Rm is one of r4,r5,r6,r7 which are the argument registers. */
298 
#define IS_ARG_MOV(x) \
299 
(((((x) & 0xf00f) == 0x6003) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
300 
 || ((((x) & 0xf000) == 0x1000) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)) \
301 
 || ((((x) & 0xf00f) == 0x2002) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070)))
302 
 
303 
/* MOV.L Rm,@(disp,r14)  00011110mmmmdddd
304 
   Rm-->(dispx4+r14) where Rm is one of r4,r5,r6,r7 */
305 
#define IS_MOV_R14(x) \
306 
     ((((x) & 0xff00) == 0x1e) && (((x) & 0x00f0) >= 0x0040 && ((x) & 0x00f0) <= 0x0070))
307 
 
308 
#define FPSCR_SZ                (1 << 20)
309 
 
310 
/* Skip any prologue before the guts of a function */
311 
 
312 
/* Skip the prologue using the debug information. If this fails we'll
313 
   fall back on the 'guess' method below. */
314 
static CORE_ADDR
315 
after_prologue (CORE_ADDR pc)
316 
{
317 
  struct symtab_and_line sal;
318 
  CORE_ADDR func_addr, func_end;
319 
 
320 
  /* If we can not find the symbol in the partial symbol table, then
321 
     there is no hope we can determine the function's start address
322 
     with this code.  */
323 
  if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
324 
    return 0;
325 
 
326 
  /* Get the line associated with FUNC_ADDR.  */
327 
  sal = find_pc_line (func_addr, 0);
328 
 
329 
  /* There are only two cases to consider.  First, the end of the source line
330 
     is within the function bounds.  In that case we return the end of the
331 
     source line.  Second is the end of the source line extends beyond the
332 
     bounds of the current function.  We need to use the slow code to
333 
     examine instructions in that case.  */
334 
  if (sal.end < func_end)
335 
    return sal.end;
336 
  else
337 
    return 0;
338 
}
339 
 
340 
/* Here we look at each instruction in the function, and try to guess
341 
   where the prologue ends. Unfortunately this is not always
342 
   accurate. */
343 
static CORE_ADDR
344 
skip_prologue_hard_way (CORE_ADDR start_pc)
345 
{
346 
  CORE_ADDR here, end;
347 
  int updated_fp = 0;
348 
 
349 
  if (!start_pc)
350 
    return 0;
351 
 
352 
  for (here = start_pc, end = start_pc + (2 * 28); here < end;)
353 
    {
354 
      int w = read_memory_integer (here, 2);
355 
      here += 2;
356 
      if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
357 
          || IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w)
358 
          || IS_ARG_MOV (w) || IS_MOV_R14 (w))
359 
        {
360 
          start_pc = here;
361 
        }
362 
      else if (IS_MOV_SP_FP (w))
363 
        {
364 
          start_pc = here;
365 
          updated_fp = 1;
366 
        }
367 
      else
368 
        /* Don't bail out yet, if we are before the copy of sp. */
369 
        if (updated_fp)
370 
          break;
371 
    }
372 
 
373 
  return start_pc;
374 
}
375 
 
376 
static CORE_ADDR
377 
sh_skip_prologue (CORE_ADDR pc)
378 
{
379 
  CORE_ADDR post_prologue_pc;
380 
 
381 
  /* See if we can determine the end of the prologue via the symbol table.
382 
     If so, then return either PC, or the PC after the prologue, whichever
383 
     is greater.  */
384 
 
385 
  post_prologue_pc = after_prologue (pc);
386 
 
387 
  /* If after_prologue returned a useful address, then use it.  Else
388 
     fall back on the instruction skipping code. */
389 
  if (post_prologue_pc != 0)
390 
    return max (pc, post_prologue_pc);
391 
  else
392 
    return (skip_prologue_hard_way (pc));
393 
}
394 
 
395 
/* Immediately after a function call, return the saved pc.
396 
   Can't always go through the frames for this because on some machines
397 
   the new frame is not set up until the new function executes
398 
   some instructions.
399 
 
400 
   The return address is the value saved in the PR register + 4  */
401 
static CORE_ADDR
402 
sh_saved_pc_after_call (struct frame_info *frame)
403 
{
404 
  return (ADDR_BITS_REMOVE(read_register(PR_REGNUM)));
405 
}
406 
 
407 
/* Should call_function allocate stack space for a struct return?  */
408 
static int
409 
sh_use_struct_convention (int gcc_p, struct type *type)
410 
{
411 
  return (TYPE_LENGTH (type) > 1);
412 
}
413 
 
414 
/* Store the address of the place in which to copy the structure the
415 
   subroutine will return.  This is called from call_function.
416 
 
417 
   We store structs through a pointer passed in R0 */
418 
static void
419 
sh_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
420 
{
421 
  write_register (STRUCT_RETURN_REGNUM, (addr));
422 
}
423 
 
424 
/* Disassemble an instruction.  */
425 
static int
426 
gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
427 
{
428 
  if (TARGET_BYTE_ORDER == BIG_ENDIAN)
429 
    return print_insn_sh (memaddr, info);
430 
  else
431 
    return print_insn_shl (memaddr, info);
432 
}
433 
 
434 
/* Given a GDB frame, determine the address of the calling function's frame.
435 
   This will be used to create a new GDB frame struct, and then
436 
   INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
437 
 
438 
   For us, the frame address is its stack pointer value, so we look up
439 
   the function prologue to determine the caller's sp value, and return it.  */
440 
static CORE_ADDR
441 
sh_frame_chain (struct frame_info *frame)
442 
{
443 
  if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
444 
    return frame->frame;        /* dummy frame same as caller's frame */
445 
  if (frame->pc && !inside_entry_file (frame->pc))
446 
    return read_memory_integer (FRAME_FP (frame) + frame->extra_info->f_offset, 4);
447 
  else
448 
    return 0;
449 
}
450 
 
451 
/* Find REGNUM on the stack.  Otherwise, it's in an active register.  One thing
452 
   we might want to do here is to check REGNUM against the clobber mask, and
453 
   somehow flag it as invalid if it isn't saved on the stack somewhere.  This
454 
   would provide a graceful failure mode when trying to get the value of
455 
   caller-saves registers for an inner frame.  */
456 
 
457 
static CORE_ADDR
458 
sh_find_callers_reg (struct frame_info *fi, int regnum)
459 
{
460 
  for (; fi; fi = fi->next)
461 
    if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
462 
      /* When the caller requests PR from the dummy frame, we return PC because
463 
         that's where the previous routine appears to have done a call from. */
464 
      return generic_read_register_dummy (fi->pc, fi->frame, regnum);
465 
    else
466 
      {
467 
        FRAME_INIT_SAVED_REGS (fi);
468 
        if (!fi->pc)
469 
          return 0;
470 
        if (fi->saved_regs[regnum] != 0)
471 
          return read_memory_integer (fi->saved_regs[regnum],
472 
                                      REGISTER_RAW_SIZE (regnum));
473 
      }
474 
  return read_register (regnum);
475 
}
476 
 
477 
/* Put here the code to store, into a struct frame_saved_regs, the
478 
   addresses of the saved registers of frame described by FRAME_INFO.
479 
   This includes special registers such as pc and fp saved in special
480 
   ways in the stack frame.  sp is even more special: the address we
481 
   return for it IS the sp for the next frame. */
482 
static void
483 
sh_nofp_frame_init_saved_regs (struct frame_info *fi)
484 
{
485 
  int where[NUM_REGS];
486 
  int rn;
487 
  int have_fp = 0;
488 
  int depth;
489 
  int pc;
490 
  int opc;
491 
  int insn;
492 
  int r3_val = 0;
493 
  char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
494 
 
495 
  if (fi->saved_regs == NULL)
496 
    frame_saved_regs_zalloc (fi);
497 
  else
498 
    memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
499 
 
500 
  if (dummy_regs)
501 
    {
502 
      /* DANGER!  This is ONLY going to work if the char buffer format of
503 
         the saved registers is byte-for-byte identical to the
504 
         CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
505 
      memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
506 
      return;
507 
    }
508 
 
509 
  fi->extra_info->leaf_function = 1;
510 
  fi->extra_info->f_offset = 0;
511 
 
512 
  for (rn = 0; rn < NUM_REGS; rn++)
513 
    where[rn] = -1;
514 
 
515 
  depth = 0;
516 
 
517 
  /* Loop around examining the prologue insns until we find something
518 
     that does not appear to be part of the prologue.  But give up
519 
     after 20 of them, since we're getting silly then. */
520 
 
521 
  pc = get_pc_function_start (fi->pc);
522 
  if (!pc)
523 
    {
524 
      fi->pc = 0;
525 
      return;
526 
    }
527 
 
528 
  for (opc = pc + (2 * 28); pc < opc; pc += 2)
529 
    {
530 
      insn = read_memory_integer (pc, 2);
531 
      /* See where the registers will be saved to */
532 
      if (IS_PUSH (insn))
533 
        {
534 
          rn = GET_PUSHED_REG (insn);
535 
          where[rn] = depth;
536 
          depth += 4;
537 
        }
538 
      else if (IS_STS (insn))
539 
        {
540 
          where[PR_REGNUM] = depth;
541 
          /* If we're storing the pr then this isn't a leaf */
542 
          fi->extra_info->leaf_function = 0;
543 
          depth += 4;
544 
        }
545 
      else if (IS_MOV_R3 (insn))
546 
        {
547 
          r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
548 
        }
549 
      else if (IS_SHLL_R3 (insn))
550 
        {
551 
          r3_val <<= 1;
552 
        }
553 
      else if (IS_ADD_R3SP (insn))
554 
        {
555 
          depth += -r3_val;
556 
        }
557 
      else if (IS_ADD_SP (insn))
558 
        {
559 
          depth -= ((insn & 0xff) ^ 0x80) - 0x80;
560 
        }
561 
      else if (IS_MOV_SP_FP (insn))
562 
        break;
563 
#if 0 /* This used to just stop when it found an instruction that
564 
         was not considered part of the prologue.  Now, we just
565 
         keep going looking for likely instructions. */
566 
      else
567 
        break;
568 
#endif
569 
    }
570 
 
571 
  /* Now we know how deep things are, we can work out their addresses */
572 
 
573 
  for (rn = 0; rn < NUM_REGS; rn++)
574 
    {
575 
      if (where[rn] >= 0)
576 
        {
577 
          if (rn == FP_REGNUM)
578 
            have_fp = 1;
579 
 
580 
          fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
581 
        }
582 
      else
583 
        {
584 
          fi->saved_regs[rn] = 0;
585 
        }
586 
    }
587 
 
588 
  if (have_fp)
589 
    {
590 
      fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
591 
    }
592 
  else
593 
    {
594 
      fi->saved_regs[SP_REGNUM] = fi->frame - 4;
595 
    }
596 
 
597 
  fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
598 
  /* Work out the return pc - either from the saved pr or the pr
599 
     value */
600 
}
601 
 
602 
static void
603 
sh_fp_frame_init_saved_regs (struct frame_info *fi)
604 
{
605 
  int where[NUM_REGS];
606 
  int rn;
607 
  int have_fp = 0;
608 
  int depth;
609 
  int pc;
610 
  int opc;
611 
  int insn;
612 
  int r3_val = 0;
613 
  char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
614 
 
615 
  if (fi->saved_regs == NULL)
616 
    frame_saved_regs_zalloc (fi);
617 
  else
618 
    memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
619 
 
620 
  if (dummy_regs)
621 
    {
622 
      /* DANGER!  This is ONLY going to work if the char buffer format of
623 
         the saved registers is byte-for-byte identical to the
624 
         CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
625 
      memcpy (fi->saved_regs, dummy_regs, sizeof (fi->saved_regs));
626 
      return;
627 
    }
628 
 
629 
  fi->extra_info->leaf_function = 1;
630 
  fi->extra_info->f_offset = 0;
631 
 
632 
  for (rn = 0; rn < NUM_REGS; rn++)
633 
    where[rn] = -1;
634 
 
635 
  depth = 0;
636 
 
637 
  /* Loop around examining the prologue insns until we find something
638 
     that does not appear to be part of the prologue.  But give up
639 
     after 20 of them, since we're getting silly then. */
640 
 
641 
  pc = get_pc_function_start (fi->pc);
642 
  if (!pc)
643 
    {
644 
      fi->pc = 0;
645 
      return;
646 
    }
647 
 
648 
  for (opc = pc + (2 * 28); pc < opc; pc += 2)
649 
    {
650 
      insn = read_memory_integer (pc, 2);
651 
      /* See where the registers will be saved to */
652 
      if (IS_PUSH (insn))
653 
        {
654 
          rn = GET_PUSHED_REG (insn);
655 
          where[rn] = depth;
656 
          depth += 4;
657 
        }
658 
      else if (IS_STS (insn))
659 
        {
660 
          where[PR_REGNUM] = depth;
661 
          /* If we're storing the pr then this isn't a leaf */
662 
          fi->extra_info->leaf_function = 0;
663 
          depth += 4;
664 
        }
665 
      else if (IS_MOV_R3 (insn))
666 
        {
667 
          r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
668 
        }
669 
      else if (IS_SHLL_R3 (insn))
670 
        {
671 
          r3_val <<= 1;
672 
        }
673 
      else if (IS_ADD_R3SP (insn))
674 
        {
675 
          depth += -r3_val;
676 
        }
677 
      else if (IS_ADD_SP (insn))
678 
        {
679 
          depth -= ((insn & 0xff) ^ 0x80) - 0x80;
680 
        }
681 
      else if (IS_FMOV (insn))
682 
        {
683 
          if (read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & FPSCR_SZ)
684 
            {
685 
              depth += 8;
686 
            }
687 
          else
688 
            {
689 
              depth += 4;
690 
            }
691 
        }
692 
      else if (IS_MOV_SP_FP (insn))
693 
        break;
694 
#if 0 /* This used to just stop when it found an instruction that
695 
         was not considered part of the prologue.  Now, we just
696 
         keep going looking for likely instructions. */
697 
      else
698 
        break;
699 
#endif
700 
    }
701 
 
702 
  /* Now we know how deep things are, we can work out their addresses */
703 
 
704 
  for (rn = 0; rn < NUM_REGS; rn++)
705 
    {
706 
      if (where[rn] >= 0)
707 
        {
708 
          if (rn == FP_REGNUM)
709 
            have_fp = 1;
710 
 
711 
          fi->saved_regs[rn] = fi->frame - where[rn] + depth - 4;
712 
        }
713 
      else
714 
        {
715 
          fi->saved_regs[rn] = 0;
716 
        }
717 
    }
718 
 
719 
  if (have_fp)
720 
    {
721 
      fi->saved_regs[SP_REGNUM] = read_memory_integer (fi->saved_regs[FP_REGNUM], 4);
722 
    }
723 
  else
724 
    {
725 
      fi->saved_regs[SP_REGNUM] = fi->frame - 4;
726 
    }
727 
 
728 
  fi->extra_info->f_offset = depth - where[FP_REGNUM] - 4;
729 
  /* Work out the return pc - either from the saved pr or the pr
730 
     value */
731 
}
732 
 
733 
/* Initialize the extra info saved in a FRAME */
734 
static void
735 
sh_init_extra_frame_info (int fromleaf, struct frame_info *fi)
736 
{
737 
 
738 
  fi->extra_info = (struct frame_extra_info *)
739 
    frame_obstack_alloc (sizeof (struct frame_extra_info));
740 
 
741 
  if (fi->next)
742 
    fi->pc = FRAME_SAVED_PC (fi->next);
743 
 
744 
  if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
745 
    {
746 
      /* We need to setup fi->frame here because run_stack_dummy gets it wrong
747 
         by assuming it's always FP.  */
748 
      fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
749 
                                               SP_REGNUM);
750 
      fi->extra_info->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
751 
                                                               PC_REGNUM);
752 
      fi->extra_info->f_offset = -(CALL_DUMMY_LENGTH + 4);
753 
      fi->extra_info->leaf_function = 0;
754 
      return;
755 
    }
756 
  else
757 
    {
758 
      FRAME_INIT_SAVED_REGS (fi);
759 
      fi->extra_info->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
760 
    }
761 
}
762 
 
763 
/* Extract from an array REGBUF containing the (raw) register state
764 
   the address in which a function should return its structure value,
765 
   as a CORE_ADDR (or an expression that can be used as one).  */
766 
static CORE_ADDR
767 
sh_extract_struct_value_address (char *regbuf)
768 
{
769 
  return (extract_address ((regbuf), REGISTER_RAW_SIZE (0)));
770 
}
771 
 
772 
static CORE_ADDR
773 
sh_frame_saved_pc (struct frame_info *frame)
774 
{
775 
  return ((frame)->extra_info->return_pc);
776 
}
777 
 
778 
/* Discard from the stack the innermost frame,
779 
   restoring all saved registers.  */
780 
static void
781 
sh_pop_frame (void)
782 
{
783 
  register struct frame_info *frame = get_current_frame ();
784 
  register CORE_ADDR fp;
785 
  register int regnum;
786 
 
787 
  if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
788 
    generic_pop_dummy_frame ();
789 
  else
790 
    {
791 
      fp = FRAME_FP (frame);
792 
      FRAME_INIT_SAVED_REGS (frame);
793 
 
794 
      /* Copy regs from where they were saved in the frame */
795 
      for (regnum = 0; regnum < NUM_REGS; regnum++)
796 
        if (frame->saved_regs[regnum])
797 
          write_register (regnum, read_memory_integer (frame->saved_regs[regnum], 4));
798 
 
799 
      write_register (PC_REGNUM, frame->extra_info->return_pc);
800 
      write_register (SP_REGNUM, fp + 4);
801 
    }
802 
  flush_cached_frames ();
803 
}
804 
 
805 
/* Function: push_arguments
806 
   Setup the function arguments for calling a function in the inferior.
807 
 
808 
   On the Hitachi SH architecture, there are four registers (R4 to R7)
809 
   which are dedicated for passing function arguments.  Up to the first
810 
   four arguments (depending on size) may go into these registers.
811 
   The rest go on the stack.
812 
 
813 
   Arguments that are smaller than 4 bytes will still take up a whole
814 
   register or a whole 32-bit word on the stack, and will be
815 
   right-justified in the register or the stack word.  This includes
816 
   chars, shorts, and small aggregate types.
817 
 
818 
   Arguments that are larger than 4 bytes may be split between two or
819 
   more registers.  If there are not enough registers free, an argument
820 
   may be passed partly in a register (or registers), and partly on the
821 
   stack.  This includes doubles, long longs, and larger aggregates.
822 
   As far as I know, there is no upper limit to the size of aggregates
823 
   that will be passed in this way; in other words, the convention of
824 
   passing a pointer to a large aggregate instead of a copy is not used.
825 
 
826 
   An exceptional case exists for struct arguments (and possibly other
827 
   aggregates such as arrays) if the size is larger than 4 bytes but
828 
   not a multiple of 4 bytes.  In this case the argument is never split
829 
   between the registers and the stack, but instead is copied in its
830 
   entirety onto the stack, AND also copied into as many registers as
831 
   there is room for.  In other words, space in registers permitting,
832 
   two copies of the same argument are passed in.  As far as I can tell,
833 
   only the one on the stack is used, although that may be a function
834 
   of the level of compiler optimization.  I suspect this is a compiler
835 
   bug.  Arguments of these odd sizes are left-justified within the
836 
   word (as opposed to arguments smaller than 4 bytes, which are
837 
   right-justified).
838 
 
839 
   If the function is to return an aggregate type such as a struct, it
840 
   is either returned in the normal return value register R0 (if its
841 
   size is no greater than one byte), or else the caller must allocate
842 
   space into which the callee will copy the return value (if the size
843 
   is greater than one byte).  In this case, a pointer to the return
844 
   value location is passed into the callee in register R2, which does
845 
   not displace any of the other arguments passed in via registers R4
846 
   to R7.   */
847 
 
848 
static CORE_ADDR
849 
sh_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
850 
                   int struct_return, CORE_ADDR struct_addr)
851 
{
852 
  int stack_offset, stack_alloc;
853 
  int argreg;
854 
  int argnum;
855 
  struct type *type;
856 
  CORE_ADDR regval;
857 
  char *val;
858 
  char valbuf[4];
859 
  int len;
860 
  int odd_sized_struct;
861 
 
862 
  /* first force sp to a 4-byte alignment */
863 
  sp = sp & ~3;
864 
 
865 
  /* The "struct return pointer" pseudo-argument has its own dedicated
866 
     register */
867 
  if (struct_return)
868 
    write_register (STRUCT_RETURN_REGNUM, struct_addr);
869 
 
870 
  /* Now make sure there's space on the stack */
871 
  for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++)
872 
    stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
873 
  sp -= stack_alloc;            /* make room on stack for args */
874 
 
875 
  /* Now load as many as possible of the first arguments into
876 
     registers, and push the rest onto the stack.  There are 16 bytes
877 
     in four registers available.  Loop thru args from first to last.  */
878 
 
879 
  argreg = ARG0_REGNUM;
880 
  for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
881 
    {
882 
      type = VALUE_TYPE (args[argnum]);
883 
      len = TYPE_LENGTH (type);
884 
      memset (valbuf, 0, sizeof (valbuf));
885 
      if (len < 4)
886 
        {
887 
          /* value gets right-justified in the register or stack word */
888 
          memcpy (valbuf + (4 - len),
889 
                  (char *) VALUE_CONTENTS (args[argnum]), len);
890 
          val = valbuf;
891 
        }
892 
      else
893 
        val = (char *) VALUE_CONTENTS (args[argnum]);
894 
 
895 
      if (len > 4 && (len & 3) != 0)
896 
        odd_sized_struct = 1;   /* such structs go entirely on stack */
897 
      else
898 
        odd_sized_struct = 0;
899 
      while (len > 0)
900 
        {
901 
          if (argreg > ARGLAST_REGNUM || odd_sized_struct)
902 
            {                   /* must go on the stack */
903 
              write_memory (sp + stack_offset, val, 4);
904 
              stack_offset += 4;
905 
            }
906 
          /* NOTE WELL!!!!!  This is not an "else if" clause!!!
907 
             That's because some *&^%$ things get passed on the stack
908 
             AND in the registers!   */
909 
          if (argreg <= ARGLAST_REGNUM)
910 
            {                   /* there's room in a register */
911 
              regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
912 
              write_register (argreg++, regval);
913 
            }
914 
          /* Store the value 4 bytes at a time.  This means that things
915 
             larger than 4 bytes may go partly in registers and partly
916 
             on the stack.  */
917 
          len -= REGISTER_RAW_SIZE (argreg);
918 
          val += REGISTER_RAW_SIZE (argreg);
919 
        }
920 
    }
921 
  return sp;
922 
}
923 
 
924 
/* Function: push_return_address (pc)
925 
   Set up the return address for the inferior function call.
926 
   Needed for targets where we don't actually execute a JSR/BSR instruction */
927 
 
928 
static CORE_ADDR
929 
sh_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
930 
{
931 
  write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
932 
  return sp;
933 
}
934 
 
935 
/* Function: fix_call_dummy
936 
   Poke the callee function's address into the destination part of
937 
   the CALL_DUMMY.  The address is actually stored in a data word
938 
   following the actualy CALL_DUMMY instructions, which will load
939 
   it into a register using PC-relative addressing.  This function
940 
   expects the CALL_DUMMY to look like this:
941 
 
942 
   mov.w @(2,PC), R8
943 
   jsr   @R8
944 
   nop
945 
   trap
946 
   <destination>
947 
 */
948 
 
949 
#if 0
950 
void
951 
sh_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
952 
                   value_ptr *args, struct type *type, int gcc_p)
953 
{
954 
  *(unsigned long *) (dummy + 8) = fun;
955 
}
956 
#endif
957 
 
958 
static int
959 
sh_coerce_float_to_double (struct type *formal, struct type *actual)
960 
{
961 
  return 1;
962 
}
963 
 
964 
/* Find a function's return value in the appropriate registers (in
965 
   regbuf), and copy it into valbuf.  Extract from an array REGBUF
966 
   containing the (raw) register state a function return value of type
967 
   TYPE, and copy that, in virtual format, into VALBUF.  */
968 
static void
969 
sh_extract_return_value (struct type *type, char *regbuf, char *valbuf)
970 
{
971 
  int len = TYPE_LENGTH (type);
972 
  int return_register = R0_REGNUM;
973 
  int offset;
974 
 
975 
  if (len <= 4)
976 
    {
977 
      if (TARGET_BYTE_ORDER == BIG_ENDIAN)
978 
        offset = REGISTER_BYTE (return_register) + 4 - len;
979 
      else
980 
        offset = REGISTER_BYTE (return_register);
981 
      memcpy (valbuf, regbuf + offset, len);
982 
    }
983 
  else if (len <= 8)
984 
    {
985 
      if (TARGET_BYTE_ORDER == BIG_ENDIAN)
986 
        offset = REGISTER_BYTE (return_register) + 8 - len;
987 
      else
988 
        offset = REGISTER_BYTE (return_register);
989 
      memcpy (valbuf, regbuf + offset, len);
990 
    }
991 
  else
992 
    error ("bad size for return value");
993 
}
994 
 
995 
static void
996 
sh3e_sh4_extract_return_value (struct type *type, char *regbuf, char *valbuf)
997 
{
998 
  int return_register;
999 
  int offset;
1000 
  int len = TYPE_LENGTH (type);
1001 
 
1002 
  if (TYPE_CODE (type) == TYPE_CODE_FLT)
1003 
    return_register = FP0_REGNUM;
1004 
  else
1005 
    return_register = R0_REGNUM;
1006 
 
1007 
  if (len == 8 && TYPE_CODE (type) == TYPE_CODE_FLT)
1008 
    {
1009 
      DOUBLEST val;
1010 
      if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1011 
        floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
1012 
                                 (char *) regbuf + REGISTER_BYTE (return_register),
1013 
                                 &val);
1014 
      else
1015 
        floatformat_to_doublest (&floatformat_ieee_double_big,
1016 
                                 (char *) regbuf + REGISTER_BYTE (return_register),
1017 
                                 &val);
1018 
      store_floating (valbuf, len, val);
1019 
    }
1020 
  else if (len <= 4)
1021 
    {
1022 
      if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1023 
        offset = REGISTER_BYTE (return_register) + 4 - len;
1024 
      else
1025 
        offset = REGISTER_BYTE (return_register);
1026 
      memcpy (valbuf, regbuf + offset, len);
1027 
    }
1028 
  else if (len <= 8)
1029 
    {
1030 
      if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1031 
        offset = REGISTER_BYTE (return_register) + 8 - len;
1032 
      else
1033 
        offset = REGISTER_BYTE (return_register);
1034 
      memcpy (valbuf, regbuf + offset, len);
1035 
    }
1036 
  else
1037 
    error ("bad size for return value");
1038 
}
1039 
 
1040 
/* Write into appropriate registers a function return value
1041 
   of type TYPE, given in virtual format.
1042 
   If the architecture is sh4 or sh3e, store a function's return value
1043 
   in the R0 general register or in the FP0 floating point register,
1044 
   depending on the type of the return value. In all the other cases
1045 
   the result is stored in r0. */
1046 
static void
1047 
sh_default_store_return_value (struct type *type, char *valbuf)
1048 
{
1049 
  char buf[32]; /* more than enough... */
1050 
 
1051 
  if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (R0_REGNUM))
1052 
    {
1053 
      /* Add leading zeros to the value. */
1054 
      memset (buf, 0, REGISTER_RAW_SIZE (R0_REGNUM));
1055 
      memcpy (buf + REGISTER_RAW_SIZE (R0_REGNUM) - TYPE_LENGTH (type),
1056 
              valbuf, TYPE_LENGTH (type));
1057 
      write_register_bytes (REGISTER_BYTE (R0_REGNUM), buf,
1058 
                            REGISTER_RAW_SIZE (R0_REGNUM));
1059 
    }
1060 
  else
1061 
    write_register_bytes (REGISTER_BYTE (R0_REGNUM), valbuf,
1062 
                          TYPE_LENGTH (type));
1063 
}
1064 
 
1065 
static void
1066 
sh3e_sh4_store_return_value (struct type *type, char *valbuf)
1067 
{
1068 
  if (TYPE_CODE (type) == TYPE_CODE_FLT)
1069 
    write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
1070 
                          valbuf, TYPE_LENGTH (type));
1071 
  else
1072 
    sh_default_store_return_value (type, valbuf);
1073 
}
1074 
 
1075 
 
1076 
/* Print the registers in a form similar to the E7000 */
1077 
 
1078 
static void
1079 
sh_generic_show_regs (void)
1080 
{
1081 
  printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1082 
                   paddr (read_register (PC_REGNUM)),
1083 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1084 
                   (long) read_register (PR_REGNUM),
1085 
                   (long) read_register (MACH_REGNUM),
1086 
                   (long) read_register (MACL_REGNUM));
1087 
 
1088 
  printf_filtered ("GBR=%08lx VBR=%08lx",
1089 
                   (long) read_register (GBR_REGNUM),
1090 
                   (long) read_register (VBR_REGNUM));
1091 
 
1092 
  printf_filtered ("\nR0-R7  %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1093 
                   (long) read_register (0),
1094 
                   (long) read_register (1),
1095 
                   (long) read_register (2),
1096 
                   (long) read_register (3),
1097 
                   (long) read_register (4),
1098 
                   (long) read_register (5),
1099 
                   (long) read_register (6),
1100 
                   (long) read_register (7));
1101 
  printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1102 
                   (long) read_register (8),
1103 
                   (long) read_register (9),
1104 
                   (long) read_register (10),
1105 
                   (long) read_register (11),
1106 
                   (long) read_register (12),
1107 
                   (long) read_register (13),
1108 
                   (long) read_register (14),
1109 
                   (long) read_register (15));
1110 
}
1111 
 
1112 
static void
1113 
sh3_show_regs (void)
1114 
{
1115 
  printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1116 
                   paddr (read_register (PC_REGNUM)),
1117 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1118 
                   (long) read_register (PR_REGNUM),
1119 
                   (long) read_register (MACH_REGNUM),
1120 
                   (long) read_register (MACL_REGNUM));
1121 
 
1122 
  printf_filtered ("GBR=%08lx VBR=%08lx",
1123 
                   (long) read_register (GBR_REGNUM),
1124 
                   (long) read_register (VBR_REGNUM));
1125 
  printf_filtered (" SSR=%08lx SPC=%08lx",
1126 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1127 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1128 
 
1129 
  printf_filtered ("\nR0-R7  %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1130 
                   (long) read_register (0),
1131 
                   (long) read_register (1),
1132 
                   (long) read_register (2),
1133 
                   (long) read_register (3),
1134 
                   (long) read_register (4),
1135 
                   (long) read_register (5),
1136 
                   (long) read_register (6),
1137 
                   (long) read_register (7));
1138 
  printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1139 
                   (long) read_register (8),
1140 
                   (long) read_register (9),
1141 
                   (long) read_register (10),
1142 
                   (long) read_register (11),
1143 
                   (long) read_register (12),
1144 
                   (long) read_register (13),
1145 
                   (long) read_register (14),
1146 
                   (long) read_register (15));
1147 
}
1148 
 
1149 
 
1150 
static void
1151 
sh3e_show_regs (void)
1152 
{
1153 
  printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1154 
                   paddr (read_register (PC_REGNUM)),
1155 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1156 
                   (long) read_register (PR_REGNUM),
1157 
                   (long) read_register (MACH_REGNUM),
1158 
                   (long) read_register (MACL_REGNUM));
1159 
 
1160 
  printf_filtered ("GBR=%08lx VBR=%08lx",
1161 
                   (long) read_register (GBR_REGNUM),
1162 
                   (long) read_register (VBR_REGNUM));
1163 
  printf_filtered (" SSR=%08lx SPC=%08lx",
1164 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1165 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1166 
  printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1167 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1168 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1169 
 
1170 
  printf_filtered ("\nR0-R7  %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1171 
                   (long) read_register (0),
1172 
                   (long) read_register (1),
1173 
                   (long) read_register (2),
1174 
                   (long) read_register (3),
1175 
                   (long) read_register (4),
1176 
                   (long) read_register (5),
1177 
                   (long) read_register (6),
1178 
                   (long) read_register (7));
1179 
  printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1180 
                   (long) read_register (8),
1181 
                   (long) read_register (9),
1182 
                   (long) read_register (10),
1183 
                   (long) read_register (11),
1184 
                   (long) read_register (12),
1185 
                   (long) read_register (13),
1186 
                   (long) read_register (14),
1187 
                   (long) read_register (15));
1188 
 
1189 
  printf_filtered (("FP0-FP7  %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1190 
                   (long) read_register (FP0_REGNUM + 0),
1191 
                   (long) read_register (FP0_REGNUM + 1),
1192 
                   (long) read_register (FP0_REGNUM + 2),
1193 
                   (long) read_register (FP0_REGNUM + 3),
1194 
                   (long) read_register (FP0_REGNUM + 4),
1195 
                   (long) read_register (FP0_REGNUM + 5),
1196 
                   (long) read_register (FP0_REGNUM + 6),
1197 
                   (long) read_register (FP0_REGNUM + 7));
1198 
  printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1199 
                   (long) read_register (FP0_REGNUM + 8),
1200 
                   (long) read_register (FP0_REGNUM + 9),
1201 
                   (long) read_register (FP0_REGNUM + 10),
1202 
                   (long) read_register (FP0_REGNUM + 11),
1203 
                   (long) read_register (FP0_REGNUM + 12),
1204 
                   (long) read_register (FP0_REGNUM + 13),
1205 
                   (long) read_register (FP0_REGNUM + 14),
1206 
                   (long) read_register (FP0_REGNUM + 15));
1207 
}
1208 
 
1209 
static void
1210 
sh3_dsp_show_regs (void)
1211 
{
1212 
  printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1213 
                   paddr (read_register (PC_REGNUM)),
1214 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1215 
                   (long) read_register (PR_REGNUM),
1216 
                   (long) read_register (MACH_REGNUM),
1217 
                   (long) read_register (MACL_REGNUM));
1218 
 
1219 
  printf_filtered ("GBR=%08lx VBR=%08lx",
1220 
                   (long) read_register (GBR_REGNUM),
1221 
                   (long) read_register (VBR_REGNUM));
1222 
 
1223 
  printf_filtered (" SSR=%08lx SPC=%08lx",
1224 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1225 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1226 
 
1227 
  printf_filtered (" DSR=%08lx",
1228 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1229 
 
1230 
  printf_filtered ("\nR0-R7  %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1231 
                   (long) read_register (0),
1232 
                   (long) read_register (1),
1233 
                   (long) read_register (2),
1234 
                   (long) read_register (3),
1235 
                   (long) read_register (4),
1236 
                   (long) read_register (5),
1237 
                   (long) read_register (6),
1238 
                   (long) read_register (7));
1239 
  printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1240 
                   (long) read_register (8),
1241 
                   (long) read_register (9),
1242 
                   (long) read_register (10),
1243 
                   (long) read_register (11),
1244 
                   (long) read_register (12),
1245 
                   (long) read_register (13),
1246 
                   (long) read_register (14),
1247 
                   (long) read_register (15));
1248 
 
1249 
  printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1250 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1251 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1252 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1253 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1254 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1255 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1256 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1257 
  printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1258 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1259 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1260 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1261 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1262 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1263 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1264 
}
1265 
 
1266 
static void
1267 
sh4_show_regs (void)
1268 
{
1269 
  int pr = read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM) & 0x80000;
1270 
  printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1271 
                   paddr (read_register (PC_REGNUM)),
1272 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1273 
                   (long) read_register (PR_REGNUM),
1274 
                   (long) read_register (MACH_REGNUM),
1275 
                   (long) read_register (MACL_REGNUM));
1276 
 
1277 
  printf_filtered ("GBR=%08lx VBR=%08lx",
1278 
                   (long) read_register (GBR_REGNUM),
1279 
                   (long) read_register (VBR_REGNUM));
1280 
  printf_filtered (" SSR=%08lx SPC=%08lx",
1281 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SSR_REGNUM),
1282 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SPC_REGNUM));
1283 
  printf_filtered (" FPUL=%08lx FPSCR=%08lx",
1284 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
1285 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
1286 
 
1287 
  printf_filtered ("\nR0-R7  %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1288 
                   (long) read_register (0),
1289 
                   (long) read_register (1),
1290 
                   (long) read_register (2),
1291 
                   (long) read_register (3),
1292 
                   (long) read_register (4),
1293 
                   (long) read_register (5),
1294 
                   (long) read_register (6),
1295 
                   (long) read_register (7));
1296 
  printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1297 
                   (long) read_register (8),
1298 
                   (long) read_register (9),
1299 
                   (long) read_register (10),
1300 
                   (long) read_register (11),
1301 
                   (long) read_register (12),
1302 
                   (long) read_register (13),
1303 
                   (long) read_register (14),
1304 
                   (long) read_register (15));
1305 
 
1306 
  printf_filtered ((pr
1307 
                    ? "DR0-DR6  %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1308 
                    : "FP0-FP7  %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1309 
                   (long) read_register (FP0_REGNUM + 0),
1310 
                   (long) read_register (FP0_REGNUM + 1),
1311 
                   (long) read_register (FP0_REGNUM + 2),
1312 
                   (long) read_register (FP0_REGNUM + 3),
1313 
                   (long) read_register (FP0_REGNUM + 4),
1314 
                   (long) read_register (FP0_REGNUM + 5),
1315 
                   (long) read_register (FP0_REGNUM + 6),
1316 
                   (long) read_register (FP0_REGNUM + 7));
1317 
  printf_filtered ((pr
1318 
                    ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
1319 
                    : "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
1320 
                   (long) read_register (FP0_REGNUM + 8),
1321 
                   (long) read_register (FP0_REGNUM + 9),
1322 
                   (long) read_register (FP0_REGNUM + 10),
1323 
                   (long) read_register (FP0_REGNUM + 11),
1324 
                   (long) read_register (FP0_REGNUM + 12),
1325 
                   (long) read_register (FP0_REGNUM + 13),
1326 
                   (long) read_register (FP0_REGNUM + 14),
1327 
                   (long) read_register (FP0_REGNUM + 15));
1328 
}
1329 
 
1330 
static void
1331 
sh_dsp_show_regs (void)
1332 
{
1333 
  printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
1334 
                   paddr (read_register (PC_REGNUM)),
1335 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->SR_REGNUM),
1336 
                   (long) read_register (PR_REGNUM),
1337 
                   (long) read_register (MACH_REGNUM),
1338 
                   (long) read_register (MACL_REGNUM));
1339 
 
1340 
  printf_filtered ("GBR=%08lx VBR=%08lx",
1341 
                   (long) read_register (GBR_REGNUM),
1342 
                   (long) read_register (VBR_REGNUM));
1343 
 
1344 
  printf_filtered (" DSR=%08lx",
1345 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->DSR_REGNUM));
1346 
 
1347 
  printf_filtered ("\nR0-R7  %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1348 
                   (long) read_register (0),
1349 
                   (long) read_register (1),
1350 
                   (long) read_register (2),
1351 
                   (long) read_register (3),
1352 
                   (long) read_register (4),
1353 
                   (long) read_register (5),
1354 
                   (long) read_register (6),
1355 
                   (long) read_register (7));
1356 
  printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
1357 
                   (long) read_register (8),
1358 
                   (long) read_register (9),
1359 
                   (long) read_register (10),
1360 
                   (long) read_register (11),
1361 
                   (long) read_register (12),
1362 
                   (long) read_register (13),
1363 
                   (long) read_register (14),
1364 
                   (long) read_register (15));
1365 
 
1366 
  printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
1367 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->A0G_REGNUM) & 0xff,
1368 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->A0_REGNUM),
1369 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->M0_REGNUM),
1370 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->X0_REGNUM),
1371 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->Y0_REGNUM),
1372 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->RS_REGNUM),
1373 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->MOD_REGNUM));
1374 
  printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
1375 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->A1G_REGNUM) & 0xff,
1376 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->A1_REGNUM),
1377 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->M1_REGNUM),
1378 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->X1_REGNUM),
1379 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->Y1_REGNUM),
1380 
                   (long) read_register (gdbarch_tdep (current_gdbarch)->RE_REGNUM));
1381 
}
1382 
 
1383 
void sh_show_regs_command (char *args, int from_tty)
1384 
{
1385 
  if (sh_show_regs)
1386 
    (*sh_show_regs)();
1387 
}
1388 
 
1389 
static int
1390 
fv_reg_base_num (int fv_regnum)
1391 
{
1392 
  int fp_regnum;
1393 
 
1394 
  fp_regnum = FP0_REGNUM +
1395 
    (fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM) * 4;
1396 
  return fp_regnum;
1397 
}
1398 
 
1399 
static int
1400 
dr_reg_base_num (int dr_regnum)
1401 
{
1402 
  int fp_regnum;
1403 
 
1404 
  fp_regnum = FP0_REGNUM +
1405 
    (dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM) * 2;
1406 
  return fp_regnum;
1407 
}
1408 
 
1409 
/* Index within `registers' of the first byte of the space for
1410 
   register N.  */
1411 
static int
1412 
sh_default_register_byte (int reg_nr)
1413 
{
1414 
  return (reg_nr * 4);
1415 
}
1416 
 
1417 
static int
1418 
sh_sh4_register_byte (int reg_nr)
1419 
{
1420 
  if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1421 
      && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1422 
    return (dr_reg_base_num (reg_nr) * 4);
1423 
  else if  (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1424 
            && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1425 
    return (fv_reg_base_num (reg_nr) * 4);
1426 
  else
1427 
    return (reg_nr * 4);
1428 
}
1429 
 
1430 
/* Number of bytes of storage in the actual machine representation for
1431 
   register REG_NR.  */
1432 
static int
1433 
sh_default_register_raw_size (int reg_nr)
1434 
{
1435 
  return 4;
1436 
}
1437 
 
1438 
static int
1439 
sh_sh4_register_raw_size (int reg_nr)
1440 
{
1441 
  if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1442 
      && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1443 
    return 8;
1444 
  else if  (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1445 
            && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1446 
    return 16;
1447 
  else
1448 
    return 4;
1449 
}
1450 
 
1451 
/* Number of bytes of storage in the program's representation
1452 
   for register N.  */
1453 
static int
1454 
sh_register_virtual_size (int reg_nr)
1455 
{
1456 
  return 4;
1457 
}
1458 
 
1459 
/* Return the GDB type object for the "standard" data type
1460 
   of data in register N.  */
1461 
 
1462 
static struct type *
1463 
sh_sh3e_register_virtual_type (int reg_nr)
1464 
{
1465 
  if ((reg_nr >= FP0_REGNUM
1466 
       && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1467 
      || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1468 
    return builtin_type_float;
1469 
  else
1470 
    return builtin_type_int;
1471 
}
1472 
 
1473 
static struct type *
1474 
sh_sh4_build_float_register_type (int high)
1475 
{
1476 
  struct type *temp;
1477 
 
1478 
  temp = create_range_type (NULL, builtin_type_int, 0, high);
1479 
  return create_array_type (NULL, builtin_type_float, temp);
1480 
}
1481 
 
1482 
static struct type *
1483 
sh_sh4_register_virtual_type (int reg_nr)
1484 
{
1485 
  if ((reg_nr >= FP0_REGNUM
1486 
       && (reg_nr <= gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM))
1487 
      || (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
1488 
    return builtin_type_float;
1489 
  else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1490 
           && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1491 
    return builtin_type_double;
1492 
  else if  (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1493 
           && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1494 
    return sh_sh4_build_float_register_type (3);
1495 
  else
1496 
    return builtin_type_int;
1497 
}
1498 
 
1499 
static struct type *
1500 
sh_default_register_virtual_type (int reg_nr)
1501 
{
1502 
  return builtin_type_int;
1503 
}
1504 
 
1505 
/* On the sh4, the DRi pseudo registers are problematic if the target
1506 
   is little endian. When the user writes one of those registers, for
1507 
   instance with 'ser var $dr0=1', we want the double to be stored
1508 
   like this:
1509 
   fr0 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1510 
   fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1511 
 
1512 
   This corresponds to little endian byte order & big endian word
1513 
   order.  However if we let gdb write the register w/o conversion, it
1514 
   will write fr0 and fr1 this way:
1515 
   fr0 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1516 
   fr1 = 0x00 0x00 0x00 0x00 0x00 0xf0 0x3f
1517 
   because it will consider fr0 and fr1 as a single LE stretch of memory.
1518 
 
1519 
   To achieve what we want we must force gdb to store things in
1520 
   floatformat_ieee_double_littlebyte_bigword (which is defined in
1521 
   include/floatformat.h and libiberty/floatformat.c.
1522 
 
1523 
   In case the target is big endian, there is no problem, the
1524 
   raw bytes will look like:
1525 
   fr0 = 0x3f 0xf0 0x00 0x00 0x00 0x00 0x00
1526 
   fr1 = 0x00 0x00 0x00 0x00 0x00 0x00 0x00
1527 
 
1528 
   The other pseudo registers (the FVs) also don't pose a problem
1529 
   because they are stored as 4 individual FP elements. */
1530 
 
1531 
int
1532 
sh_sh4_register_convertible (int nr)
1533 
{
1534 
  if (TARGET_BYTE_ORDER == LITTLE_ENDIAN)
1535 
    return (gdbarch_tdep (current_gdbarch)->DR0_REGNUM <= nr
1536 
            && nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM);
1537 
  else
1538 
    return 0;
1539 
}
1540 
 
1541 
void
1542 
sh_sh4_register_convert_to_virtual (int regnum, struct type *type,
1543 
                                  char *from, char *to)
1544 
{
1545 
  if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1546 
      && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1547 
    {
1548 
      DOUBLEST val;
1549 
      floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, from, &val);
1550 
      store_floating(to, TYPE_LENGTH(type), val);
1551 
    }
1552 
  else
1553 
    error("sh_register_convert_to_virtual called with non DR register number");
1554 
}
1555 
 
1556 
void
1557 
sh_sh4_register_convert_to_raw (struct type *type, int regnum,
1558 
                              char *from, char *to)
1559 
{
1560 
  if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1561 
      && regnum <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1562 
    {
1563 
      DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
1564 
      floatformat_from_doublest (&floatformat_ieee_double_littlebyte_bigword, &val, to);
1565 
    }
1566 
  else
1567 
    error("sh_register_convert_to_raw called with non DR register number");
1568 
}
1569 
 
1570 
void
1571 
sh_fetch_pseudo_register (int reg_nr)
1572 
{
1573 
  int base_regnum, portion;
1574 
 
1575 
  if (!register_cached (reg_nr))
1576 
    {
1577 
      if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1578 
          && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1579 
        {
1580 
          base_regnum = dr_reg_base_num (reg_nr);
1581 
 
1582 
          /* Read the real regs for which this one is an alias.  */
1583 
          for (portion = 0; portion < 2; portion++)
1584 
            if (!register_cached (base_regnum + portion))
1585 
              target_fetch_registers (base_regnum + portion);
1586 
        }
1587 
      else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1588 
               && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1589 
        {
1590 
          base_regnum = fv_reg_base_num (reg_nr);
1591 
 
1592 
          /* Read the real regs for which this one is an alias.  */
1593 
          for (portion = 0; portion < 4; portion++)
1594 
            if (!register_cached (base_regnum + portion))
1595 
              target_fetch_registers (base_regnum + portion);
1596 
 
1597 
        }
1598 
      register_valid [reg_nr] = 1;
1599 
    }
1600 
}
1601 
 
1602 
void
1603 
sh_store_pseudo_register (int reg_nr)
1604 
{
1605 
  int base_regnum, portion;
1606 
 
1607 
  if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1608 
      && reg_nr <= gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1609 
    {
1610 
      base_regnum = dr_reg_base_num (reg_nr);
1611 
 
1612 
      /* Write the real regs for which this one is an alias.  */
1613 
      for (portion = 0; portion < 2; portion++)
1614 
        {
1615 
          register_valid[base_regnum + portion] = 1;
1616 
          target_store_registers (base_regnum + portion);
1617 
        }
1618 
    }
1619 
  else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1620 
           && reg_nr <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1621 
    {
1622 
      base_regnum = fv_reg_base_num (reg_nr);
1623 
 
1624 
      /* Write the real regs for which this one is an alias.  */
1625 
      for (portion = 0; portion < 4; portion++)
1626 
        {
1627 
          register_valid[base_regnum + portion] = 1;
1628 
          target_store_registers (base_regnum + portion);
1629 
        }
1630 
    }
1631 
}
1632 
 
1633 
static void
1634 
do_fv_register_info (int fv_regnum)
1635 
{
1636 
  int first_fp_reg_num = fv_reg_base_num (fv_regnum);
1637 
  printf_filtered ("fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
1638 
                     fv_regnum - gdbarch_tdep (current_gdbarch)->FV0_REGNUM,
1639 
                     (int) read_register (first_fp_reg_num),
1640 
                     (int) read_register (first_fp_reg_num + 1),
1641 
                     (int) read_register (first_fp_reg_num + 2),
1642 
                     (int) read_register (first_fp_reg_num + 3));
1643 
}
1644 
 
1645 
static void
1646 
do_dr_register_info (int dr_regnum)
1647 
{
1648 
  int first_fp_reg_num = dr_reg_base_num (dr_regnum);
1649 
 
1650 
  printf_filtered ("dr%d\t0x%08x%08x\n",
1651 
                    dr_regnum - gdbarch_tdep (current_gdbarch)->DR0_REGNUM,
1652 
                    (int) read_register (first_fp_reg_num),
1653 
                    (int) read_register (first_fp_reg_num + 1));
1654 
}
1655 
 
1656 
static void
1657 
sh_do_pseudo_register (int regnum)
1658 
{
1659 
  if (regnum < NUM_REGS || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1660 
    internal_error (__FILE__, __LINE__,
1661 
                    "Invalid pseudo register number %d\n", regnum);
1662 
  else if (regnum >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
1663 
           && regnum < gdbarch_tdep (current_gdbarch)->DR_LAST_REGNUM)
1664 
    do_dr_register_info (regnum);
1665 
  else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
1666 
           && regnum <= gdbarch_tdep (current_gdbarch)->FV_LAST_REGNUM)
1667 
    do_fv_register_info (regnum);
1668 
}
1669 
 
1670 
 
1671 
static void
1672 
sh_do_fp_register (int regnum)
1673 
{                               /* do values for FP (float) regs */
1674 
  char *raw_buffer;
1675 
  double flt;   /* double extracted from raw hex data */
1676 
  int inv;
1677 
  int j;
1678 
 
1679 
  /* Allocate space for the float. */
1680 
  raw_buffer = (char *) alloca (REGISTER_RAW_SIZE (FP0_REGNUM));
1681 
 
1682 
  /* Get the data in raw format.  */
1683 
  if (read_relative_register_raw_bytes (regnum, raw_buffer))
1684 
    error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
1685 
 
1686 
  /* Get the register as a number */
1687 
  flt = unpack_double (builtin_type_float, raw_buffer, &inv);
1688 
 
1689 
  /* Print the name and some spaces. */
1690 
  fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1691 
  print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1692 
 
1693 
  /* Print the value. */
1694 
  if (inv)
1695 
    printf_filtered ("<invalid float>");
1696 
  else
1697 
    printf_filtered ("%-10.9g", flt);
1698 
 
1699 
  /* Print the fp register as hex. */
1700 
  printf_filtered ("\t(raw 0x");
1701 
  for (j = 0; j < REGISTER_RAW_SIZE (regnum); j++)
1702 
    {
1703 
      register int idx = TARGET_BYTE_ORDER == BIG_ENDIAN ? j
1704 
        : REGISTER_RAW_SIZE (regnum) - 1 - j;
1705 
      printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
1706 
    }
1707 
  printf_filtered (")");
1708 
  printf_filtered ("\n");
1709 
}
1710 
 
1711 
static void
1712 
sh_do_register (int regnum)
1713 
{
1714 
  char raw_buffer[MAX_REGISTER_RAW_SIZE];
1715 
 
1716 
  fputs_filtered (REGISTER_NAME (regnum), gdb_stdout);
1717 
  print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), gdb_stdout);
1718 
 
1719 
  /* Get the data in raw format.  */
1720 
  if (read_relative_register_raw_bytes (regnum, raw_buffer))
1721 
    printf_filtered ("*value not available*\n");
1722 
 
1723 
  val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1724 
             gdb_stdout, 'x', 1, 0, Val_pretty_default);
1725 
  printf_filtered ("\t");
1726 
  val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, 0,
1727 
             gdb_stdout, 0, 1, 0, Val_pretty_default);
1728 
  printf_filtered ("\n");
1729 
}
1730 
 
1731 
static void
1732 
sh_print_register (int regnum)
1733 
{
1734 
  if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
1735 
    internal_error (__FILE__, __LINE__,
1736 
                    "Invalid register number %d\n", regnum);
1737 
 
1738 
  else if (regnum >= 0 && regnum < NUM_REGS)
1739 
    {
1740 
      if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1741 
        sh_do_fp_register (regnum);     /* FP regs */
1742 
      else
1743 
        sh_do_register (regnum);        /* All other regs */
1744 
    }
1745 
 
1746 
  else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1747 
    sh_do_pseudo_register (regnum);
1748 
}
1749 
 
1750 
void
1751 
sh_do_registers_info (int regnum, int fpregs)
1752 
{
1753 
  if (regnum != -1)             /* do one specified register */
1754 
    {
1755 
      if (*(REGISTER_NAME (regnum)) == '\0')
1756 
        error ("Not a valid register for the current processor type");
1757 
 
1758 
      sh_print_register (regnum);
1759 
    }
1760 
  else
1761 
    /* do all (or most) registers */
1762 
    {
1763 
      regnum = 0;
1764 
      while (regnum < NUM_REGS)
1765 
        {
1766 
          /* If the register name is empty, it is undefined for this
1767 
             processor, so don't display anything.  */
1768 
          if (REGISTER_NAME (regnum) == NULL
1769 
              || *(REGISTER_NAME (regnum)) == '\0')
1770 
            {
1771 
              regnum++;
1772 
              continue;
1773 
            }
1774 
 
1775 
          if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT)
1776 
            {
1777 
              if (fpregs)
1778 
                {
1779 
                  /* true for "INFO ALL-REGISTERS" command */
1780 
                  sh_do_fp_register (regnum);   /* FP regs */
1781 
                  regnum ++;
1782 
                }
1783 
              else
1784 
                regnum += (gdbarch_tdep (current_gdbarch)->FP_LAST_REGNUM - FP0_REGNUM);        /* skip FP regs */
1785 
            }
1786 
          else
1787 
            {
1788 
              sh_do_register (regnum);  /* All other regs */
1789 
              regnum++;
1790 
            }
1791 
        }
1792 
 
1793 
      if (fpregs)
1794 
        while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
1795 
          {
1796 
            sh_do_pseudo_register (regnum);
1797 
            regnum++;
1798 
          }
1799 
    }
1800 
}
1801 
 
1802 
#ifdef SVR4_SHARED_LIBS
1803 
 
1804 
/* Fetch (and possibly build) an appropriate link_map_offsets structure
1805 
   for native i386 linux targets using the struct offsets defined in
1806 
   link.h (but without actual reference to that file).
1807 
 
1808 
   This makes it possible to access i386-linux shared libraries from
1809 
   a gdb that was not built on an i386-linux host (for cross debugging).
1810 
   */
1811 
 
1812 
struct link_map_offsets *
1813 
sh_linux_svr4_fetch_link_map_offsets (void)
1814 
{
1815 
  static struct link_map_offsets lmo;
1816 
  static struct link_map_offsets *lmp = 0;
1817 
 
1818 
  if (lmp == 0)
1819 
    {
1820 
      lmp = &lmo;
1821 
 
1822 
      lmo.r_debug_size = 8;     /* 20 not actual size but all we need */
1823 
 
1824 
      lmo.r_map_offset = 4;
1825 
      lmo.r_map_size   = 4;
1826 
 
1827 
      lmo.link_map_size = 20;   /* 552 not actual size but all we need */
1828 
 
1829 
      lmo.l_addr_offset = 0;
1830 
      lmo.l_addr_size   = 4;
1831 
 
1832 
      lmo.l_name_offset = 4;
1833 
      lmo.l_name_size   = 4;
1834 
 
1835 
      lmo.l_next_offset = 12;
1836 
      lmo.l_next_size   = 4;
1837 
 
1838 
      lmo.l_prev_offset = 16;
1839 
      lmo.l_prev_size   = 4;
1840 
    }
1841 
 
1842 
    return lmp;
1843 
}
1844 
#endif /* SVR4_SHARED_LIBS */
1845 
 
1846 
static gdbarch_init_ftype sh_gdbarch_init;
1847 
 
1848 
static struct gdbarch *
1849 
sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1850 
{
1851 
  static LONGEST sh_call_dummy_words[] = {0};
1852 
  struct gdbarch *gdbarch;
1853 
  struct gdbarch_tdep *tdep;
1854 
  gdbarch_register_name_ftype *sh_register_name;
1855 
  gdbarch_store_return_value_ftype *sh_store_return_value;
1856 
  gdbarch_register_virtual_type_ftype *sh_register_virtual_type;
1857 
 
1858 
  /* Find a candidate among the list of pre-declared architectures. */
1859 
  arches = gdbarch_list_lookup_by_info (arches, &info);
1860 
  if (arches != NULL)
1861 
    return arches->gdbarch;
1862 
 
1863 
  /* None found, create a new architecture from the information
1864 
     provided. */
1865 
  tdep = XMALLOC (struct gdbarch_tdep);
1866 
  gdbarch = gdbarch_alloc (&info, tdep);
1867 
 
1868 
  /* Initialize the register numbers that are not common to all the
1869 
     variants to -1, if necessary thse will be overwritten in the case
1870 
     statement below. */
1871 
  tdep->FPUL_REGNUM = -1;
1872 
  tdep->FPSCR_REGNUM = -1;
1873 
  tdep->SR_REGNUM = 22;
1874 
  tdep->DSR_REGNUM = -1;
1875 
  tdep->FP_LAST_REGNUM = -1;
1876 
  tdep->A0G_REGNUM = -1;
1877 
  tdep->A0_REGNUM = -1;
1878 
  tdep->A1G_REGNUM = -1;
1879 
  tdep->A1_REGNUM = -1;
1880 
  tdep->M0_REGNUM = -1;
1881 
  tdep->M1_REGNUM = -1;
1882 
  tdep->X0_REGNUM = -1;
1883 
  tdep->X1_REGNUM = -1;
1884 
  tdep->Y0_REGNUM = -1;
1885 
  tdep->Y1_REGNUM = -1;
1886 
  tdep->MOD_REGNUM = -1;
1887 
  tdep->RS_REGNUM = -1;
1888 
  tdep->RE_REGNUM = -1;
1889 
  tdep->SSR_REGNUM = -1;
1890 
  tdep->SPC_REGNUM = -1;
1891 
  tdep->DR0_REGNUM = -1;
1892 
  tdep->DR_LAST_REGNUM = -1;
1893 
  tdep->FV0_REGNUM = -1;
1894 
  tdep->FV_LAST_REGNUM = -1;
1895 
 
1896 
  set_gdbarch_fp0_regnum (gdbarch, -1);
1897 
  set_gdbarch_num_pseudo_regs (gdbarch, 0);
1898 
  set_gdbarch_max_register_raw_size (gdbarch, 4);
1899 
  set_gdbarch_max_register_virtual_size (gdbarch, 4);
1900 
  set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1901 
  set_gdbarch_num_regs (gdbarch, 59);
1902 
  set_gdbarch_sp_regnum (gdbarch, 15);
1903 
  set_gdbarch_fp_regnum (gdbarch, 14);
1904 
  set_gdbarch_pc_regnum (gdbarch, 16);
1905 
  set_gdbarch_register_size (gdbarch, 4);
1906 
  set_gdbarch_register_bytes (gdbarch, NUM_REGS * 4);
1907 
  set_gdbarch_fetch_pseudo_register (gdbarch, sh_fetch_pseudo_register);
1908 
  set_gdbarch_store_pseudo_register (gdbarch, sh_store_pseudo_register);
1909 
  set_gdbarch_do_registers_info (gdbarch, sh_do_registers_info);
1910 
  set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
1911 
  set_gdbarch_extract_return_value (gdbarch, sh_extract_return_value);
1912 
  print_sh_insn = gdb_print_insn_sh;
1913 
 
1914 
  switch (info.bfd_arch_info->mach)
1915 
    {
1916 
    case bfd_mach_sh:
1917 
      sh_register_name = sh_sh_register_name;
1918 
      sh_show_regs = sh_generic_show_regs;
1919 
      sh_store_return_value = sh_default_store_return_value;
1920 
      sh_register_virtual_type = sh_default_register_virtual_type;
1921 
      set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1922 
      set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1923 
      set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1924 
      set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1925 
      break;
1926 
    case bfd_mach_sh2:
1927 
      sh_register_name = sh_sh_register_name;
1928 
      sh_show_regs = sh_generic_show_regs;
1929 
      sh_store_return_value = sh_default_store_return_value;
1930 
      sh_register_virtual_type = sh_default_register_virtual_type;
1931 
      set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1932 
      set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1933 
      set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1934 
      set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1935 
      break;
1936 
    case bfd_mach_sh_dsp:
1937 
      sh_register_name = sh_sh_dsp_register_name;
1938 
      sh_show_regs = sh_dsp_show_regs;
1939 
      sh_store_return_value = sh_default_store_return_value;
1940 
      sh_register_virtual_type = sh_default_register_virtual_type;
1941 
      set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1942 
      set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1943 
      set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1944 
      set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1945 
      tdep->DSR_REGNUM = 24;
1946 
      tdep->A0G_REGNUM = 25;
1947 
      tdep->A0_REGNUM = 26;
1948 
      tdep->A1G_REGNUM = 27;
1949 
      tdep->A1_REGNUM = 28;
1950 
      tdep->M0_REGNUM = 29;
1951 
      tdep->M1_REGNUM = 30;
1952 
      tdep->X0_REGNUM = 31;
1953 
      tdep->X1_REGNUM = 32;
1954 
      tdep->Y0_REGNUM = 33;
1955 
      tdep->Y1_REGNUM = 34;
1956 
      tdep->MOD_REGNUM = 40;
1957 
      tdep->RS_REGNUM = 43;
1958 
      tdep->RE_REGNUM = 44;
1959 
      break;
1960 
    case bfd_mach_sh3:
1961 
      sh_register_name = sh_sh3_register_name;
1962 
      sh_show_regs = sh3_show_regs;
1963 
      sh_store_return_value = sh_default_store_return_value;
1964 
      sh_register_virtual_type = sh_default_register_virtual_type;
1965 
      set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1966 
      set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1967 
      set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1968 
      set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1969 
      tdep->SSR_REGNUM = 41;
1970 
      tdep->SPC_REGNUM = 42;
1971 
      break;
1972 
    case bfd_mach_sh3e:
1973 
      sh_register_name = sh_sh3e_register_name;
1974 
      sh_show_regs = sh3e_show_regs;
1975 
      sh_store_return_value = sh3e_sh4_store_return_value;
1976 
      sh_register_virtual_type = sh_sh3e_register_virtual_type;
1977 
      set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
1978 
      set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
1979 
      set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1980 
      set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1981 
      set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1982 
      set_gdbarch_fp0_regnum (gdbarch, 25);
1983 
      tdep->FPUL_REGNUM = 23;
1984 
      tdep->FPSCR_REGNUM = 24;
1985 
      tdep->FP_LAST_REGNUM = 40;
1986 
      tdep->SSR_REGNUM = 41;
1987 
      tdep->SPC_REGNUM = 42;
1988 
      break;
1989 
    case bfd_mach_sh3_dsp:
1990 
      sh_register_name = sh_sh3_dsp_register_name;
1991 
      sh_show_regs = sh3_dsp_show_regs;
1992 
      sh_store_return_value = sh_default_store_return_value;
1993 
      sh_register_virtual_type = sh_default_register_virtual_type;
1994 
      set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
1995 
      set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
1996 
      set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
1997 
      set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
1998 
      tdep->DSR_REGNUM = 24;
1999 
      tdep->A0G_REGNUM = 25;
2000 
      tdep->A0_REGNUM = 26;
2001 
      tdep->A1G_REGNUM = 27;
2002 
      tdep->A1_REGNUM = 28;
2003 
      tdep->M0_REGNUM = 29;
2004 
      tdep->M1_REGNUM = 30;
2005 
      tdep->X0_REGNUM = 31;
2006 
      tdep->X1_REGNUM = 32;
2007 
      tdep->Y0_REGNUM = 33;
2008 
      tdep->Y1_REGNUM = 34;
2009 
      tdep->MOD_REGNUM = 40;
2010 
      tdep->RS_REGNUM = 43;
2011 
      tdep->RE_REGNUM = 44;
2012 
      tdep->SSR_REGNUM = 41;
2013 
      tdep->SPC_REGNUM = 42;
2014 
      break;
2015 
    case bfd_mach_sh4:
2016 
      sh_register_name = sh_sh4_register_name;
2017 
      sh_show_regs = sh4_show_regs;
2018 
      sh_store_return_value = sh3e_sh4_store_return_value;
2019 
      sh_register_virtual_type = sh_sh4_register_virtual_type;
2020 
      set_gdbarch_extract_return_value (gdbarch, sh3e_sh4_extract_return_value);
2021 
      set_gdbarch_frame_init_saved_regs (gdbarch, sh_fp_frame_init_saved_regs);
2022 
      set_gdbarch_fp0_regnum (gdbarch, 25);
2023 
      set_gdbarch_register_raw_size (gdbarch, sh_sh4_register_raw_size);
2024 
      set_gdbarch_register_virtual_size (gdbarch, sh_sh4_register_raw_size);
2025 
      set_gdbarch_register_byte (gdbarch, sh_sh4_register_byte);
2026 
      set_gdbarch_num_pseudo_regs (gdbarch, 12);
2027 
      set_gdbarch_max_register_raw_size (gdbarch, 4 * 4);
2028 
      set_gdbarch_max_register_virtual_size (gdbarch, 4 * 4);
2029 
      set_gdbarch_register_convert_to_raw (gdbarch, sh_sh4_register_convert_to_raw);
2030 
      set_gdbarch_register_convert_to_virtual (gdbarch, sh_sh4_register_convert_to_virtual);
2031 
      set_gdbarch_register_convertible (gdbarch, sh_sh4_register_convertible);
2032 
      tdep->FPUL_REGNUM = 23;
2033 
      tdep->FPSCR_REGNUM = 24;
2034 
      tdep->FP_LAST_REGNUM = 40;
2035 
      tdep->SSR_REGNUM = 41;
2036 
      tdep->SPC_REGNUM = 42;
2037 
      tdep->DR0_REGNUM = 59;
2038 
      tdep->DR_LAST_REGNUM = 66;
2039 
      tdep->FV0_REGNUM = 67;
2040 
      tdep->FV_LAST_REGNUM = 70;
2041 
      break;
2042 
    default:
2043 
      sh_register_name = sh_generic_register_name;
2044 
      sh_show_regs = sh_generic_show_regs;
2045 
      sh_store_return_value = sh_default_store_return_value;
2046 
      sh_register_virtual_type = sh_default_register_virtual_type;
2047 
      set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
2048 
      set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
2049 
      set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
2050 
      set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
2051 
      break;
2052 
    }
2053 
 
2054 
  set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2055 
  set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2056 
  set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2057 
  set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2058 
  set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2059 
  set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2060 
 
2061 
  set_gdbarch_register_name (gdbarch, sh_register_name);
2062 
  set_gdbarch_register_virtual_type (gdbarch, sh_register_virtual_type);
2063 
 
2064 
  set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2065 
  set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2066 
  set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2067 
  set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2068 
  set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2069 
  set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2070 
  set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);/*??should be 8?*/
2071 
 
2072 
  set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2073 
  set_gdbarch_call_dummy_length (gdbarch, 0);
2074 
  set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2075 
  set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2076 
  set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
2077 
  set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2078 
  set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2079 
  set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2080 
  set_gdbarch_call_dummy_words (gdbarch, sh_call_dummy_words);
2081 
  set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (sh_call_dummy_words));
2082 
  set_gdbarch_call_dummy_p (gdbarch, 1);
2083 
  set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2084 
  set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2085 
  set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2086 
  set_gdbarch_coerce_float_to_double (gdbarch,
2087 
                                      sh_coerce_float_to_double);
2088 
 
2089 
  set_gdbarch_push_arguments (gdbarch, sh_push_arguments);
2090 
  set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2091 
  set_gdbarch_push_return_address (gdbarch, sh_push_return_address);
2092 
 
2093 
  set_gdbarch_store_struct_return (gdbarch, sh_store_struct_return);
2094 
  set_gdbarch_store_return_value (gdbarch, sh_store_return_value);
2095 
  set_gdbarch_extract_struct_value_address (gdbarch, sh_extract_struct_value_address);
2096 
  set_gdbarch_use_struct_convention (gdbarch, sh_use_struct_convention);
2097 
  set_gdbarch_init_extra_frame_info (gdbarch, sh_init_extra_frame_info);
2098 
  set_gdbarch_pop_frame (gdbarch, sh_pop_frame);
2099 
  set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
2100 
  set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2101 
  set_gdbarch_decr_pc_after_break (gdbarch, 0);
2102 
  set_gdbarch_function_start_offset (gdbarch, 0);
2103 
 
2104 
  set_gdbarch_frame_args_skip (gdbarch, 0);
2105 
  set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
2106 
  set_gdbarch_frame_chain (gdbarch, sh_frame_chain);
2107 
  set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
2108 
  set_gdbarch_frame_saved_pc (gdbarch, sh_frame_saved_pc);
2109 
  set_gdbarch_frame_args_address (gdbarch, default_frame_address);
2110 
  set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
2111 
  set_gdbarch_saved_pc_after_call (gdbarch, sh_saved_pc_after_call);
2112 
  set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2113 
  set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2114 
  set_gdbarch_ieee_float (gdbarch, 1);
2115 
  tm_print_insn = print_sh_insn;
2116 
 
2117 
  return gdbarch;
2118 
}
2119 
 
2120 
void
2121 
_initialize_sh_tdep (void)
2122 
{
2123 
  struct cmd_list_element *c;
2124 
 
2125 
  register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init);
2126 
 
2127 
  add_com ("regs", class_vars, sh_show_regs_command, "Print all registers");
2128 
}

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