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[/] [or1k/] [trunk/] [insight/] [include/] [sim-d10v.h] - Blame information for rev 1768

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1 578 markom
/* This file defines the interface between the d10v simulator and gdb.
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   Copyright 1999 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
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#if !defined (SIM_D10V_H)
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#define SIM_D10V_H
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#ifdef __cplusplus
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extern "C" { // }
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#endif
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/* GDB interprets addresses as:
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   0x00xxxxxx: Physical unified memory segment     (Unified memory)
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   0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
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   0x02xxxxxx: Physical data memory segment        (On-chip data memory)
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   0x10xxxxxx: Logical data address segment        (DMAP translated memory)
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   0x11xxxxxx: Logical instruction address segment (IMAP translated memory)
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   The remote d10v board interprets addresses as:
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   0x00xxxxxx: Physical unified memory segment     (Unified memory)
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   0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
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   0x02xxxxxx: Physical data memory segment        (On-chip data memory)
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   The following translate a virtual DMAP/IMAP offset into a physical
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   memory segment assigning the translated address to PHYS.  Since a
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   memory access may cross a page boundrary the number of bytes for
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   which the translation is applicable (or 0 for an invalid virtual
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   offset) is returned. */
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enum
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  {
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    SIM_D10V_MEMORY_UNIFIED = 0x00000000,
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    SIM_D10V_MEMORY_INSN = 0x01000000,
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    SIM_D10V_MEMORY_DATA = 0x02000000,
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    SIM_D10V_MEMORY_DMAP = 0x10000000,
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    SIM_D10V_MEMORY_IMAP = 0x11000000
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  };
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extern unsigned long sim_d10v_translate_dmap_addr
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  (unsigned long offset,
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   int nr_bytes,
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   unsigned long *phys,
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   unsigned long (*dmap_register) (int reg_nr));
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extern unsigned long sim_d10v_translate_imap_addr
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  (unsigned long offset,
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   int nr_bytes,
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   unsigned long *phys,
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   unsigned long (*imap_register) (int reg_nr));
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extern unsigned long sim_d10v_translate_addr
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  (unsigned long vaddr,
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   int nr_bytes,
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   unsigned long *phys,
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   unsigned long (*dmap_register) (int reg_nr),
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   unsigned long (*imap_register) (int reg_nr));
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/* The simulator makes use of the following register information. */
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enum
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  {
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    SIM_D10V_R0_REGNUM = 0,
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    SIM_D10V_CR0_REGNUM = 16,
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    SIM_D10V_A0_REGNUM = 32,
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    SIM_D10V_SPI_REGNUM = 34,
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    SIM_D10V_SPU_REGNUM = 35,
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    SIM_D10V_IMAP0_REGNUM = 36,
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    SIM_D10V_DMAP0_REGNUM = 38,
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    SIM_D10V_TS2_DMAP_REGNUM = 40
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  };
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enum
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  {
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    SIM_D10V_NR_R_REGS = 16,
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    SIM_D10V_NR_A_REGS = 2,
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    SIM_D10V_NR_IMAP_REGS = 2,
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    SIM_D10V_NR_DMAP_REGS = 4,
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    SIM_D10V_NR_CR_REGS = 16
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  };
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#ifdef __cplusplus
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}
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#endif
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#endif

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