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133 |
markom |
/* Table of opcodes for the OpenRISC 1000 ISA.
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Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
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Contributed by Damjan Lampret (lampret@opencores.org).
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This file is part of gen_or1k_isa, or1k, GDB and GAS.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* We treat all letters the same in encode/decode routines so
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we need to assign some characteristics to them like signess etc.*/
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "config.h"
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#include "opcode/or32.h"
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/* **INDENT-OFF** */
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CONST struct or32_letter or32_letters[] =
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{
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{ 'A', NUM_UNSIGNED },
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{ 'B', NUM_UNSIGNED },
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{ 'D', NUM_UNSIGNED },
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{ 'I', NUM_SIGNED },
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{ 'K', NUM_UNSIGNED },
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{ 'L', NUM_UNSIGNED },
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{ 'N', NUM_SIGNED },
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{ '0', NUM_UNSIGNED },
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{ '\0', 0 } /* dummy entry */
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};
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/* Opcode encoding:
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machine[31:30]: first two bits of opcode
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00 - neither of source operands is GPR
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01 - second source operand is GPR (rB)
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10 - first source operand is GPR (rA)
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11 - both source operands are GPRs (rA and rB)
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machine[29:26]: next four bits of opcode
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machine[25:00]: instruction operands (specific to individual instruction)
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Recommendation: irrelevant instruction bits should be set with a value of
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bits in same positions of instruction preceding current instruction in the
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code (when assembling).
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*/
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#define EFN &l_none
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#ifdef HAS_EXECUTION
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#define EF(func) &(func)
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#define EFI &l_invalid
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#else /* HAS_EXECUTION */
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#define EF(func) EFN
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#define EFI EFN
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#endif /* HAS_EXECUTION */
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CONST struct or32_opcode or32_opcodes[] =
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{
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{ "l.j", "N", "00 0x0 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_j), OR32_IF_DELAY },
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{ "l.jal", "N", "00 0x1 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_jal), OR32_IF_DELAY },
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{ "l.bnf", "N", "00 0x3 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bnf), OR32_IF_DELAY },
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{ "l.bf", "N", "00 0x4 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bf), OR32_IF_DELAY },
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{ "l.nop", "", "00 0x5 01--- ----- ---- ---- ---- ----", EF(l_nop), 0 },
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{ "l.movhi", "rD,K", "00 0x6 DDDDD ----0 KKKK KKKK KKKK KKKK", EF(l_movhi), 0 }, /*MM*/
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{ "l.macrc", "rD", "00 0x6 DDDDD ----1 0000 0000 0000 0000", EF(l_macrc), 0 }, /*MM*/
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{ "l.mfspr", "rD,rA,K", "00 0x7 DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_mfspr), 0 },
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{ "l.sys", "K", "00 0x8 00000 00000 KKKK KKKK KKKK KKKK", EF(l_sys), 0 },
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{ "l.trap", "K", "00 0x8 01000 00000 KKKK KKKK KKKK KKKK", EFI, 0 },
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{ "l.msync", "", "00 0x8 10000 00000 0000 0000 0000 0000", EFN, 0 },
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{ "l.psync", "", "00 0x8 10100 00000 0000 0000 0000 0000", EFN, 0 },
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{ "l.csync", "", "00 0x8 11000 00000 0000 0000 0000 0000", EFN, 0 },
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{ "l.rfe", "", "00 0x9 ----- ----- ---- ---- ---- ----", EF(l_rfe), OR32_IF_DELAY },
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| 87 |
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{ "lv.all_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
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{ "lv.all_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
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{ "lv.all_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
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| 90 |
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{ "lv.all_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
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{ "lv.all_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
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{ "lv.all_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },
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{ "lv.all_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
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{ "lv.all_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
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{ "lv.all_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
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| 96 |
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{ "lv.all_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
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| 97 |
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{ "lv.all_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
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{ "lv.all_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0 },
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{ "lv.any_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0 },
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| 100 |
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{ "lv.any_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0 },
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| 101 |
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{ "lv.any_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0 },
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| 102 |
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{ "lv.any_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0 },
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| 103 |
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{ "lv.any_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0 },
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| 104 |
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{ "lv.any_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0 },
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| 105 |
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{ "lv.any_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0 },
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| 106 |
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{ "lv.any_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0 },
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| 107 |
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{ "lv.any_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0 },
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| 108 |
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{ "lv.any_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0 },
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| 109 |
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{ "lv.any_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0 },
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| 110 |
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{ "lv.any_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0 },
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| 111 |
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{ "lv.add.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0 },
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| 112 |
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{ "lv.add.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0 },
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| 113 |
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{ "lv.adds.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0 },
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| 114 |
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{ "lv.adds.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0 },
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| 115 |
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{ "lv.addu.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0 },
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| 116 |
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{ "lv.addu.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0 },
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| 117 |
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{ "lv.addus.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0 },
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| 118 |
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{ "lv.addus.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0 },
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| 119 |
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{ "lv.and", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0 },
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| 120 |
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{ "lv.avg.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0 },
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| 121 |
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{ "lv.avg.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0 },
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| 122 |
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{ "lv.cmp_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0 },
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| 123 |
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{ "lv.cmp_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0 },
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| 124 |
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{ "lv.cmp_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0 },
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| 125 |
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{ "lv.cmp_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0 },
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| 126 |
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{ "lv.cmp_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0 },
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| 127 |
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{ "lv.cmp_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0 },
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| 128 |
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{ "lv.cmp_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0 },
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| 129 |
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{ "lv.cmp_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0 },
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| 130 |
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{ "lv.cmp_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0 },
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| 131 |
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{ "lv.cmp_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0 },
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| 132 |
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{ "lv.cmp_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0 },
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| 133 |
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{ "lv.cmp_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0 },
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| 134 |
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{ "lv.madds.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0 },
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| 135 |
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{ "lv.max.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0 },
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| 136 |
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{ "lv.max.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0 },
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| 137 |
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{ "lv.merge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0 },
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| 138 |
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{ "lv.merge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0 },
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| 139 |
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{ "lv.min.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0 },
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| 140 |
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{ "lv.min.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0 },
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| 141 |
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{ "lv.msubs.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0 },
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| 142 |
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{ "lv.muls.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0 },
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| 143 |
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{ "lv.nand", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0 },
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| 144 |
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{ "lv.nor", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0 },
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| 145 |
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{ "lv.or", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0 },
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| 146 |
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{ "lv.pack.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0 },
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| 147 |
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{ "lv.pack.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0 },
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| 148 |
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{ "lv.packs.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0 },
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| 149 |
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{ "lv.packs.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0 },
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| 150 |
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{ "lv.packus.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0 },
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| 151 |
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{ "lv.packus.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0 },
|
| 152 |
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{ "lv.perm.n", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0 },
|
| 153 |
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{ "lv.rl.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0 },
|
| 154 |
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{ "lv.rl.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0 },
|
| 155 |
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{ "lv.sll.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0 },
|
| 156 |
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{ "lv.sll.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0 },
|
| 157 |
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{ "lv.sll", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0 },
|
| 158 |
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{ "lv.srl.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0 },
|
| 159 |
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{ "lv.srl.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0 },
|
| 160 |
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{ "lv.sra.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0 },
|
| 161 |
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{ "lv.sra.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0 },
|
| 162 |
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{ "lv.srl", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0 },
|
| 163 |
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{ "lv.sub.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0 },
|
| 164 |
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{ "lv.sub.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0 },
|
| 165 |
|
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{ "lv.subs.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0 },
|
| 166 |
|
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{ "lv.subs.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0 },
|
| 167 |
|
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{ "lv.subu.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0 },
|
| 168 |
|
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{ "lv.subu.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0 },
|
| 169 |
|
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{ "lv.subus.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0 },
|
| 170 |
|
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{ "lv.subus.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0 },
|
| 171 |
|
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{ "lv.unpack.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0 },
|
| 172 |
|
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{ "lv.unpack.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0 },
|
| 173 |
|
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{ "lv.xor", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0 },
|
| 174 |
|
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{ "lv.cust1", "", "00 0xA ----- ----- ---- ---- 0xC ----", EFI, 0 },
|
| 175 |
|
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{ "lv.cust2", "", "00 0xA ----- ----- ---- ---- 0xD ----", EFI, 0 },
|
| 176 |
|
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{ "lv.cust3", "", "00 0xA ----- ----- ---- ---- 0xE ----", EFI, 0 },
|
| 177 |
|
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{ "lv.cust4", "", "00 0xA ----- ----- ---- ---- 0xF ----", EFI, 0 },
|
| 178 |
|
|
|
| 179 |
|
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{ "lf.add.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
|
| 180 |
|
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{ "lf.sub.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
|
| 181 |
|
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{ "lf.mul.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
|
| 182 |
|
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{ "lf.div.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
|
| 183 |
|
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{ "lf.itof.s", "rD,rA", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
|
| 184 |
|
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{ "lf.ftoi.s", "rD,rA", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },
|
| 185 |
|
|
{ "lf.rem.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
|
| 186 |
|
|
{ "lf.madd.s", "rD,rA,rB", "00 0xB DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
|
| 187 |
|
|
{ "lf.sfeq.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
|
| 188 |
|
|
{ "lf.sfne.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
|
| 189 |
|
|
{ "lf.sfgt.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
|
| 190 |
|
|
{ "lf.sfge.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0 },
|
| 191 |
|
|
{ "lf.sflt.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0 },
|
| 192 |
|
|
{ "lf.sfle.s", "rA,rB", "00 0xB ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0 },
|
| 193 |
|
|
{ "lf.cust1.s", "", "00 0xB ----- ----- ---- ---- 0xE ----", EFI, 0 },
|
| 194 |
|
|
|
| 195 |
|
|
{ "lf.add.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
|
| 196 |
|
|
{ "lf.sub.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
|
| 197 |
|
|
{ "lf.mul.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0 },
|
| 198 |
|
|
{ "lf.div.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0 },
|
| 199 |
|
|
{ "lf.itof.d", "rD,rA", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0 },
|
| 200 |
|
|
{ "lf.ftoi.d", "rD,rA", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0 },
|
| 201 |
|
|
{ "lf.rem.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0 },
|
| 202 |
|
|
{ "lf.madd.d", "rD,rA,rB", "00 0xC DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0 },
|
| 203 |
|
|
{ "lf.sfeq.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0 },
|
| 204 |
|
|
{ "lf.sfne.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0 },
|
| 205 |
|
|
{ "lf.sfgt.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0 },
|
| 206 |
|
|
{ "lf.sfge.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0 },
|
| 207 |
|
|
{ "lf.sflt.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0 },
|
| 208 |
|
|
{ "lf.sfle.d", "rA,rB", "00 0xC ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0 },
|
| 209 |
|
|
{ "lf.cust1.d", "", "00 0xC ----- ----- ---- ---- 0xE ----", EFI, 0 },
|
| 210 |
|
|
|
| 211 |
|
|
{ "lvf.ld", "rD,0(rA)", "00 0xD DDDDD AAAAA ---- ---- 0x0 0x0", EFI, 0 },
|
| 212 |
|
|
{ "lvf.lw", "rD,0(rA)", "00 0xD DDDDD AAAAA ---- ---- 0x0 0x1", EFI, 0 },
|
| 213 |
|
|
{ "lvf.sd", "0(rA),rB", "00 0xD ----- AAAAA BBBB B--- 0x1 0x0", EFI, 0 },
|
| 214 |
|
|
{ "lvf.sw", "0(rA),rB", "00 0xD ----- AAAAA BBBB B--- 0x1 0x1", EFI, 0 },
|
| 215 |
|
|
|
| 216 |
|
|
{ "l.mtspr", "rA,rB,K", "01 0x0 KKKKK AAAAA BBBB BKKK KKKK KKKK", EF(l_mtspr), 0 },
|
| 217 |
|
|
{ "l.jr", "rB", "01 0x1 ----- ----- BBBB B--- ---- ----", EF(l_jr), OR32_IF_DELAY },
|
| 218 |
|
|
{ "l.jalr", "rB", "01 0x2 ----- ----- BBBB B--- ---- ----", EF(l_jalr), OR32_IF_DELAY },
|
| 219 |
|
|
{ "l.cust1", "", "01 0xC ----- ----- ---- ---- ---- ----", EFI, 0 },
|
| 220 |
|
|
{ "l.cust2", "", "01 0xD ----- ----- ---- ---- ---- ----", EFI, 0 },
|
| 221 |
|
|
{ "l.cust3", "", "01 0xE ----- ----- ---- ---- ---- ----", EFI, 0 },
|
| 222 |
|
|
{ "l.cust4", "", "01 0xF ----- ----- ---- ---- ---- ----", EFI, 0 },
|
| 223 |
|
|
|
| 224 |
|
|
{ "l.ld", "rD,I(rA)", "10 0x0 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
|
| 225 |
|
|
{ "l.lwz", "rD,I(rA)", "10 0x1 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lwz), 0 },
|
| 226 |
|
|
{ "l.lws", "rD,I(rA)", "10 0x2 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
|
| 227 |
|
|
{ "l.lbz", "rD,I(rA)", "10 0x3 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbz), 0 },
|
| 228 |
|
|
{ "l.lbs", "rD,I(rA)", "10 0x4 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbs), 0 },
|
| 229 |
|
|
{ "l.lhz", "rD,I(rA)", "10 0x5 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhz), 0 },
|
| 230 |
|
|
{ "l.lhs", "rD,I(rA)", "10 0x6 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhs), 0 },
|
| 231 |
|
|
|
| 232 |
|
|
{ "l.addi", "rD,rA,I", "10 0x7 DDDDD AAAAA IIII IIII IIII IIII", EF(l_add), 0 },
|
| 233 |
|
|
{ "l.addic", "rD,rA,I", "10 0x8 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
|
| 234 |
|
|
{ "l.andi", "rD,rA,K", "10 0x9 DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_and), 0 },
|
| 235 |
|
|
{ "l.ori", "rD,rA,K", "10 0xA DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_or), 0 },
|
| 236 |
|
|
{ "l.xori", "rD,rA,I", "10 0xB DDDDD AAAAA IIII IIII IIII IIII", EF(l_xor), 0 },
|
| 237 |
|
|
{ "l.muli", "rD,rA,I", "10 0xC DDDDD AAAAA IIII IIII IIII IIII", EFI, 0 },
|
| 238 |
|
|
{ "l.maci", "rA,I", "10 0xD ----- AAAAA IIII IIII IIII IIII", EF(l_mac), 0 },
|
| 239 |
|
|
{ "l.slli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 00LL LLLL", EF(l_sll), 0 },
|
| 240 |
|
|
{ "l.srli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 01LL LLLL", EF(l_srl), 0 },
|
| 241 |
|
|
{ "l.srai", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 10LL LLLL", EF(l_sra), 0 },
|
| 242 |
|
|
{ "l.rori", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 11LL LLLL", EFI, 0 },
|
| 243 |
|
|
|
| 244 |
|
|
{ "l.sfeqi", "rA,I", "10 0xF 00000 AAAAA IIII IIII IIII IIII", EF(l_sfeq), 0 },
|
| 245 |
|
|
{ "l.sfnei", "rA,I", "10 0xF 00001 AAAAA IIII IIII IIII IIII", EF(l_sfne), 0 },
|
| 246 |
|
|
{ "l.sfgtui", "rA,I", "10 0xF 00010 AAAAA IIII IIII IIII IIII", EF(l_sfgtu), 0 },
|
| 247 |
|
|
{ "l.sfgeui", "rA,I", "10 0xF 00011 AAAAA IIII IIII IIII IIII", EF(l_sfgeu), 0 },
|
| 248 |
|
|
{ "l.sfltui", "rA,I", "10 0xF 00100 AAAAA IIII IIII IIII IIII", EF(l_sfltu), 0 },
|
| 249 |
|
|
{ "l.sfleui", "rA,I", "10 0xF 00101 AAAAA IIII IIII IIII IIII", EF(l_sfleu), 0 },
|
| 250 |
|
|
{ "l.sfgtsi", "rA,I", "10 0xF 01010 AAAAA IIII IIII IIII IIII", EF(l_sfgts), 0 },
|
| 251 |
|
|
{ "l.sfgesi", "rA,I", "10 0xF 01011 AAAAA IIII IIII IIII IIII", EF(l_sfges), 0 },
|
| 252 |
|
|
{ "l.sfltsi", "rA,I", "10 0xF 01100 AAAAA IIII IIII IIII IIII", EF(l_sflts), 0 },
|
| 253 |
|
|
{ "l.sflesi", "rA,I", "10 0xF 01101 AAAAA IIII IIII IIII IIII", EF(l_sfles), 0 },
|
| 254 |
|
|
|
| 255 |
|
|
{ "l.sd", "I(rA),rB", "11 0x4 IIIII AAAAA BBBB BIII IIII IIII", EFI, 0 },
|
| 256 |
|
|
{ "l.sw", "I(rA),rB", "11 0x5 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sw), 0 },
|
| 257 |
|
|
{ "l.sb", "I(rA),rB", "11 0x6 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sb), 0 },
|
| 258 |
|
|
{ "l.sh", "I(rA),rB", "11 0x7 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 },
|
| 259 |
|
|
|
| 260 |
|
|
{ "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), 0 },
|
| 261 |
|
|
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 },
|
| 262 |
|
|
{ "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
|
| 263 |
|
|
{ "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), 0 },
|
| 264 |
|
|
{ "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },
|
| 265 |
|
|
{ "l.xor", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x5", EF(l_xor), 0 },
|
| 266 |
|
|
{ "l.mul", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0x6", EF(l_mul), 0 },
|
| 267 |
|
|
{ "l.mac", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 0--- 0x7", EF(l_mac), 0 }, /*MM*/
|
| 268 |
|
|
{ "l.msb", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 1--- 0x7", EF(l_msb), 0 }, /*MM*/
|
| 269 |
|
|
{ "l.sll", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0x8", EF(l_sll), 0 },
|
| 270 |
|
|
{ "l.srl", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0x8", EF(l_srl), 0 },
|
| 271 |
|
|
{ "l.sra", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 10-- 0x8", EF(l_sra), 0 },
|
| 272 |
|
|
{ "l.ror", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 11-- 0x8", EFI, 0 },
|
| 273 |
|
|
{ "l.div", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x9", EF(l_div), 0 },
|
| 274 |
|
|
{ "l.divu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xA", EF(l_divu), 0 },
|
| 275 |
|
|
{ "l.mulu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0xB", EFI, 0 },
|
| 276 |
|
|
{ "l.exths", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xC", EFI, 0 },
|
| 277 |
|
|
{ "l.extbs", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xC", EFI, 0 },
|
| 278 |
|
|
{ "l.exthz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xC", EFI, 0 },
|
| 279 |
|
|
{ "l.extbz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xC", EFI, 0 },
|
| 280 |
|
|
{ "l.extws", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xD", EFI, 0 },
|
| 281 |
|
|
{ "l.extwz", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xD", EFI, 0 },
|
| 282 |
|
|
{ "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", EFI, 0 },
|
| 283 |
|
|
{ "l.ff1", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, 0 },
|
| 284 |
|
|
|
| 285 |
|
|
{ "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", EF(l_sfeq), 0 },
|
| 286 |
|
|
{ "l.sfne", "rA,rB", "11 0x9 00001 AAAAA BBBB B--- ---- ----", EF(l_sfne), 0 },
|
| 287 |
|
|
{ "l.sfgtu", "rA,rB", "11 0x9 00010 AAAAA BBBB B--- ---- ----", EF(l_sfgtu), 0 },
|
| 288 |
|
|
{ "l.sfgeu", "rA,rB", "11 0x9 00011 AAAAA BBBB B--- ---- ----", EF(l_sfgeu), 0 },
|
| 289 |
|
|
{ "l.sfltu", "rA,rB", "11 0x9 00100 AAAAA BBBB B--- ---- ----", EF(l_sfltu), 0 },
|
| 290 |
|
|
{ "l.sfleu", "rA,rB", "11 0x9 00101 AAAAA BBBB B--- ---- ----", EF(l_sfleu), 0 },
|
| 291 |
|
|
{ "l.sfgts", "rA,rB", "11 0x9 01010 AAAAA BBBB B--- ---- ----", EF(l_sfgts), 0 },
|
| 292 |
|
|
{ "l.sfges", "rA,rB", "11 0x9 01011 AAAAA BBBB B--- ---- ----", EF(l_sfges), 0 },
|
| 293 |
|
|
{ "l.sflts", "rA,rB", "11 0x9 01100 AAAAA BBBB B--- ---- ----", EF(l_sflts), 0 },
|
| 294 |
|
|
{ "l.sfles", "rA,rB", "11 0x9 01101 AAAAA BBBB B--- ---- ----", EF(l_sfles), 0 },
|
| 295 |
|
|
|
| 296 |
|
|
{ "l.cust5", "", "11 0xC ----- ----- ---- ---- ---- ----", EFI, 0 },
|
| 297 |
|
|
{ "l.cust6", "", "11 0xD ----- ----- ---- ---- ---- ----", EFI, 0 },
|
| 298 |
|
|
{ "l.cust7", "", "11 0xE ----- ----- ---- ---- ---- ----", EFI, 0 },
|
| 299 |
|
|
{ "l.cust8", "", "11 0xF ----- ----- ---- ---- ---- ----", EFI, 0 },
|
| 300 |
|
|
|
| 301 |
|
|
{ "", "", "", EFI, 0 } /* Dummy entry, not included in num_opcodes. This
|
| 302 |
|
|
lets code examine entry i+1 without checking
|
| 303 |
|
|
if we've run off the end of the table. */
|
| 304 |
|
|
};
|
| 305 |
|
|
|
| 306 |
|
|
#undef EFI
|
| 307 |
|
|
#undef EFN
|
| 308 |
|
|
#undef EF
|
| 309 |
|
|
|
| 310 |
|
|
/* **INDENT-ON** */
|
| 311 |
|
|
|
| 312 |
|
|
CONST unsigned int num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1;
|
| 313 |
|
|
|
| 314 |
|
|
/* Calculates instruction length in bytes. Either 2 or 4 for OR16
|
| 315 |
|
|
and always 4 for OR32. */
|
| 316 |
|
|
int insn_len(int insn_index)
|
| 317 |
|
|
{
|
| 318 |
|
|
#ifdef OR16
|
| 319 |
|
|
char *enc;
|
| 320 |
|
|
int len = 0;
|
| 321 |
|
|
|
| 322 |
|
|
if (index < 0) {
|
| 323 |
|
|
printf("insn_len(): Unknown instruction.\n");
|
| 324 |
|
|
exit(1);
|
| 325 |
|
|
} else {
|
| 326 |
|
|
CONST struct or32_opcode *pinsn = or32_opcodes[ins_index];
|
| 327 |
|
|
for (enc = pinsn->encoding; *enc != '\0'; enc++)
|
| 328 |
|
|
if ((*enc == '0') && (*(enc+1) == 'x')) {
|
| 329 |
|
|
len += 4;
|
| 330 |
|
|
enc += 2;
|
| 331 |
|
|
}
|
| 332 |
|
|
else if (!isspace(*enc))
|
| 333 |
|
|
len++;
|
| 334 |
|
|
return len / 8;
|
| 335 |
|
|
}
|
| 336 |
|
|
#else
|
| 337 |
|
|
insn_index = 0; /* Just to get rid that warning. */
|
| 338 |
|
|
return 4;
|
| 339 |
|
|
#endif
|
| 340 |
|
|
}
|
| 341 |
|
|
|
| 342 |
|
|
/* Is individual insn's operand signed or unsigned? */
|
| 343 |
|
|
int letter_signed(char l)
|
| 344 |
|
|
{
|
| 345 |
|
|
CONST struct or32_letter *pletter;
|
| 346 |
|
|
|
| 347 |
|
|
for(pletter = or32_letters; pletter->letter != '\0'; pletter++)
|
| 348 |
|
|
if (pletter->letter == l)
|
| 349 |
|
|
return pletter->sign;
|
| 350 |
|
|
|
| 351 |
|
|
printf("letter_signed(%c): Unknown letter.\n", l);
|
| 352 |
|
|
return 0;
|
| 353 |
|
|
}
|
| 354 |
|
|
|
| 355 |
|
|
/* Number of letters in the individual lettered operand. */
|
| 356 |
|
|
int letter_range(char l)
|
| 357 |
|
|
{
|
| 358 |
|
|
CONST struct or32_opcode *pinsn;
|
| 359 |
|
|
char *enc;
|
| 360 |
|
|
int range = 0;
|
| 361 |
|
|
|
| 362 |
|
|
for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++) {
|
| 363 |
|
|
if (strchr(pinsn->encoding,l)) {
|
| 364 |
|
|
for (enc = pinsn->encoding; *enc != '\0'; enc++)
|
| 365 |
|
|
if ((*enc == '0') && (*(enc+1) == 'x')) {
|
| 366 |
|
|
enc += 2;
|
| 367 |
|
|
}
|
| 368 |
|
|
else if (*enc == l)
|
| 369 |
|
|
range++;
|
| 370 |
|
|
return range;
|
| 371 |
|
|
}
|
| 372 |
|
|
}
|
| 373 |
|
|
printf("\nABORT: letter_range(%c): Never used letter.\n", l);
|
| 374 |
|
|
exit(1);
|
| 375 |
|
|
}
|
| 376 |
|
|
|
| 377 |
|
|
/* MM: Returns index of given instruction name. */
|
| 378 |
|
|
int insn_index (char *insn) {
|
| 379 |
|
|
int i, found = -1;
|
| 380 |
|
|
for (i = 0; (unsigned int)i < num_opcodes; i++)
|
| 381 |
|
|
if (!strcmp (or32_opcodes[i].name, insn)) {
|
| 382 |
|
|
found = i;
|
| 383 |
|
|
break;
|
| 384 |
|
|
}
|
| 385 |
|
|
return found;
|
| 386 |
|
|
}
|
| 387 |
|
|
|
| 388 |
|
|
CONST char *insn_name(int index) {
|
| 389 |
|
|
if (index >= 0 && (unsigned int)index < num_opcodes)
|
| 390 |
|
|
return or32_opcodes[index].name;
|
| 391 |
|
|
else
|
| 392 |
|
|
return "???";
|
| 393 |
|
|
}
|
| 394 |
|
|
|
| 395 |
|
|
void l_none() {
|
| 396 |
|
|
}
|
| 397 |
|
|
|
| 398 |
|
|
|
| 399 |
|
|
/*** Finite automata for instruction decoding building code ***/
|
| 400 |
|
|
|
| 401 |
|
|
/* Find simbols in encoding. */
|
| 402 |
|
|
static unsigned long
|
| 403 |
|
|
insn_extract(param_ch, enc_initial)
|
| 404 |
|
|
char param_ch;
|
| 405 |
|
|
char *enc_initial;
|
| 406 |
|
|
{
|
| 407 |
|
|
char *enc;
|
| 408 |
|
|
unsigned long ret = 0;
|
| 409 |
|
|
unsigned opc_pos = 32;
|
| 410 |
|
|
for (enc = enc_initial; *enc != '\0'; )
|
| 411 |
|
|
if ((*enc == '0') && (*(enc+1) == 'x'))
|
| 412 |
|
|
{
|
| 413 |
|
|
unsigned long tmp = strtol(enc+2, NULL, 16);
|
| 414 |
|
|
opc_pos -= 4;
|
| 415 |
|
|
if (param_ch == '0')
|
| 416 |
|
|
tmp = 15 - tmp;
|
| 417 |
|
|
ret |= tmp << opc_pos;
|
| 418 |
|
|
enc += 3;
|
| 419 |
|
|
}
|
| 420 |
|
|
else {
|
| 421 |
|
|
if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha(*enc) ) {
|
| 422 |
|
|
opc_pos--;
|
| 423 |
|
|
if (param_ch == *enc)
|
| 424 |
|
|
ret |= 1 << opc_pos;
|
| 425 |
|
|
}
|
| 426 |
|
|
enc++;
|
| 427 |
|
|
}
|
| 428 |
|
|
return ret;
|
| 429 |
|
|
}
|
| 430 |
|
|
|
| 431 |
|
|
struct temp_insn_struct {
|
| 432 |
|
|
unsigned long insn;
|
| 433 |
|
|
unsigned long insn_mask;
|
| 434 |
|
|
int in_pass;
|
| 435 |
|
|
};
|
| 436 |
|
|
|
| 437 |
|
|
#define MAX_AUTOMATA_SIZE (1000)
|
| 438 |
|
|
#define LEAF_FLAG (0x80000000)
|
| 439 |
|
|
#define MAX_LEN (8)
|
| 440 |
|
|
|
| 441 |
|
|
#ifndef MIN
|
| 442 |
|
|
# define MIN(x,y) ((x) < (y) ? (x) : (y))
|
| 443 |
|
|
#endif
|
| 444 |
|
|
|
| 445 |
|
|
unsigned long *automata;
|
| 446 |
|
|
int nuncovered;
|
| 447 |
|
|
int curpass = 0;
|
| 448 |
|
|
|
| 449 |
|
|
unsigned long *cover_insn (struct temp_insn_struct *ti, unsigned long *cur, int pass, unsigned int mask) {
|
| 450 |
|
|
int best_first = 0, best_len = 0, i, last_match = -1, ninstr = 0;
|
| 451 |
|
|
unsigned long cur_mask = mask;
|
| 452 |
|
|
unsigned long *next;
|
| 453 |
|
|
|
| 454 |
|
|
for (i = 0; i < num_opcodes; i++)
|
| 455 |
|
|
if (ti[i].in_pass == pass) {
|
| 456 |
|
|
cur_mask &= ti[i].insn_mask;
|
| 457 |
|
|
ninstr++;
|
| 458 |
|
|
last_match = i;
|
| 459 |
|
|
}
|
| 460 |
|
|
|
| 461 |
|
|
printf ("%08X\n", cur_mask);
|
| 462 |
|
|
if (ninstr == 1) {
|
| 463 |
|
|
/* Leaf holds instruction index. */
|
| 464 |
|
|
printf ("%i>I%i\n", cur - automata, last_match);
|
| 465 |
|
|
*cur = LEAF_FLAG | last_match;
|
| 466 |
|
|
cur++;
|
| 467 |
|
|
nuncovered--;
|
| 468 |
|
|
} else {
|
| 469 |
|
|
/* Find longest match. */
|
| 470 |
|
|
for (i = 0; i < 32; i++) {
|
| 471 |
|
|
int len;
|
| 472 |
|
|
for (len = best_len + 1; len < MIN(MAX_LEN, 33 - i); len++) {
|
| 473 |
|
|
unsigned long m = (1UL << ((unsigned long)len)) - 1;
|
| 474 |
|
|
/*debug(" (%i(%08X & %08X>>%i = %08X, %08X)",len,m, cur_mask, i, (cur_mask >> (unsigned)i), (cur_mask >> (unsigned)i) & m);*/
|
| 475 |
|
|
if ((m & (cur_mask >> (unsigned)i)) == m) {
|
| 476 |
|
|
best_len = len;
|
| 477 |
|
|
best_first = i;
|
| 478 |
|
|
/*debug("!");*/
|
| 479 |
|
|
} else break;
|
| 480 |
|
|
}
|
| 481 |
|
|
}
|
| 482 |
|
|
/*debug("\n");*/
|
| 483 |
|
|
if (!best_len) {
|
| 484 |
|
|
fprintf (stderr, "%i instructions match mask 0x%08X\n", ninstr, mask);
|
| 485 |
|
|
exit (1);
|
| 486 |
|
|
}
|
| 487 |
|
|
printf ("%i> #### %i << %i (%i) ####\n", cur - automata, best_len, best_first, ninstr);
|
| 488 |
|
|
*cur = best_first;
|
| 489 |
|
|
cur++;
|
| 490 |
|
|
*cur = (1 << best_len) - 1;
|
| 491 |
|
|
cur++;
|
| 492 |
|
|
next = cur;
|
| 493 |
|
|
/* Allocate space for pointers. */
|
| 494 |
|
|
cur += (1 << best_len) - 1;
|
| 495 |
|
|
cur_mask = 1 << ((unsigned long)best_len) - 1;
|
| 496 |
|
|
|
| 497 |
|
|
for (i = 0; i < (1 << best_len) - 1; i++) {
|
| 498 |
|
|
int j;
|
| 499 |
|
|
curpass++;
|
| 500 |
|
|
for (j = 0; j < num_opcodes; j++)
|
| 501 |
|
|
if (ti[j].in_pass == pass
|
| 502 |
|
|
&& ((ti[j].insn >> best_first) & cur_mask) == i
|
| 503 |
|
|
&& ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask) {
|
| 504 |
|
|
ti[j].in_pass = curpass;
|
| 505 |
|
|
}
|
| 506 |
|
|
printf ("%i> #%X -> %u\n", next - automata, i, cur - automata);
|
| 507 |
|
|
*next = cur - automata;
|
| 508 |
|
|
next++;
|
| 509 |
|
|
cur = cover_insn (ti, cur, curpass, mask & ~cur_mask);
|
| 510 |
|
|
}
|
| 511 |
|
|
}
|
| 512 |
|
|
return cur;
|
| 513 |
|
|
}
|
| 514 |
|
|
|
| 515 |
|
|
void build_automata() {
|
| 516 |
|
|
int i, j;
|
| 517 |
|
|
struct temp_insn_struct *ti = (struct temp_insn_struct *) malloc (sizeof (struct temp_insn_struct) * num_opcodes);
|
| 518 |
|
|
unsigned long *end;
|
| 519 |
|
|
automata = (unsigned long *) malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long));
|
| 520 |
|
|
|
| 521 |
|
|
nuncovered = num_opcodes;
|
| 522 |
|
|
printf ("Building automata.\n");
|
| 523 |
|
|
/* Build temporary information about instructions. */
|
| 524 |
|
|
for (i = 0; i < num_opcodes; i++) {
|
| 525 |
|
|
unsigned long ones, zeros;
|
| 526 |
|
|
char *encoding = or32_opcodes[i].encoding;
|
| 527 |
|
|
ones = insn_extract('1', encoding);
|
| 528 |
|
|
zeros = insn_extract('0', encoding);
|
| 529 |
|
|
ti[i].insn_mask = ones | zeros;
|
| 530 |
|
|
ti[i].insn = ones;
|
| 531 |
|
|
ti[i].in_pass = curpass = 0;
|
| 532 |
|
|
/*printf ("%s: %s %08X %08X\n", or32_opcodes[i].name, or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/
|
| 533 |
|
|
}
|
| 534 |
|
|
|
| 535 |
|
|
/* Until all are covered search for best criteria to separate them. */
|
| 536 |
|
|
end = cover_insn (ti, automata, curpass, 0xFFFFFFFF);
|
| 537 |
|
|
if (end - automata > MAX_AUTOMATA_SIZE) {
|
| 538 |
|
|
fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE.");
|
| 539 |
|
|
exit (1);
|
| 540 |
|
|
}
|
| 541 |
|
|
printf ("Num uncovered: %i/%i\n", nuncovered, num_opcodes);
|
| 542 |
|
|
free (ti);
|
| 543 |
|
|
}
|
| 544 |
|
|
|
| 545 |
|
|
void destruct_automata () {
|
| 546 |
|
|
free (automata);
|
| 547 |
|
|
}
|
| 548 |
|
|
|
| 549 |
|
|
/* Decodes instruction and returns instruction index. */
|
| 550 |
|
|
int decode_insn (unsigned int insn) {
|
| 551 |
|
|
unsigned long *a = automata;
|
| 552 |
|
|
while (!(*a & LEAF_FLAG)) {
|
| 553 |
|
|
unsigned int first = *a, mask;
|
| 554 |
|
|
a++;
|
| 555 |
|
|
mask = (1 << *a) - 1;
|
| 556 |
|
|
a++;
|
| 557 |
|
|
a += (insn >> first) & mask;
|
| 558 |
|
|
a = automata + *a;
|
| 559 |
|
|
}
|
| 560 |
|
|
return *a & ~LEAF_FLAG;
|
| 561 |
|
|
}
|
| 562 |
|
|
|
| 563 |
|
|
/* Parses and returns operand. */
|
| 564 |
|
|
/*unsigned int eval_operand (int insn_index, int operand) {
|
| 565 |
|
|
return 0;
|
| 566 |
|
|
}*/
|
