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/* interrupts.h -- 68HC11 Interrupts Emulation
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Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
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Written by Stephane Carrez (stcarrez@worldnet.fr)
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This file is part of GDB, GAS, and the GNU binutils.
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GDB, GAS, and the GNU binutils are free software; you can redistribute
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them and/or modify them under the terms of the GNU General Public
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License as published by the Free Software Foundation; either version
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1, or (at your option) any later version.
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GDB, GAS, and the GNU binutils are distributed in the hope that they
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will be useful, but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef _M6811_SIM_INTERRUPTS_H
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#define _M6811_SIM_INTERRUPTS_H
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/* Definition of 68HC11 interrupts. These enum are used as an index
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in the interrupt table. */
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enum M6811_INT
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{
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M6811_INT_RESERVED1 = 0,
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M6811_INT_RESERVED2,
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M6811_INT_RESERVED3,
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M6811_INT_RESERVED4,
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M6811_INT_RESERVED5,
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M6811_INT_RESERVED6,
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M6811_INT_RESERVED7,
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M6811_INT_RESERVED8,
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M6811_INT_RESERVED9,
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M6811_INT_RESERVED10,
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M6811_INT_RESERVED11,
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M6811_INT_SCI,
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M6811_INT_SPI,
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M6811_INT_AINPUT,
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M6811_INT_AOVERFLOW,
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M6811_INT_TCTN,
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M6811_INT_OUTCMP5,
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M6811_INT_OUTCMP4,
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M6811_INT_OUTCMP3,
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M6811_INT_OUTCMP2,
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M6811_INT_OUTCMP1,
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M6811_INT_INCMP3,
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M6811_INT_INCMP2,
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M6811_INT_INCMP1,
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M6811_INT_RT,
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M6811_INT_IRQ,
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M6811_INT_XIRQ,
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M6811_INT_SWI,
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M6811_INT_ILLEGAL,
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M6811_INT_COPRESET,
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M6811_INT_COPFAIL,
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M6811_INT_RESET,
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M6811_INT_NUMBER
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};
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/* Structure to describe how to recognize an interrupt in the
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68hc11 IO regs. */
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struct interrupt_def
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{
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enum M6811_INT int_number;
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unsigned char int_paddr;
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unsigned char int_mask;
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unsigned char enable_paddr;
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unsigned char enabled_mask;
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};
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/* Management of 68HC11 interrupts:
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- We use a table of 'interrupt_def' to describe the interrupts that must be
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raised depending on IO register flags (enable and present flags).
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- We keep a mask of pending interrupts. This mask is refreshed by
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calling 'interrupts_update_pending'. It must be refreshed each time
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an IO register is changed.
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- 'interrupts_process' must be called after each insn. It has two purposes:
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first it maintains a min/max count of CPU cycles between which interrupts
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are masked; second it checks for pending interrupts and raise one if
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interrupts are enabled. */
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struct interrupts {
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struct _sim_cpu *cpu;
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/* Mask of current pending interrupts. */
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unsigned long pending_mask;
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/* Address of vector table. This is set depending on the
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68hc11 init mode. */
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uint16 vectors_addr;
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/* Priority order of interrupts. This is controlled by setting the HPRIO
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IO register. */
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enum M6811_INT interrupt_order[M6811_INT_NUMBER];
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/* Simulator statistics to report useful debug information to users. */
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/* - Max/Min number of CPU cycles executed with interrupts masked. */
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signed64 start_mask_cycle;
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signed64 min_mask_cycles;
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signed64 max_mask_cycles;
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signed64 last_mask_cycles;
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/* - Same for XIRQ. */
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signed64 xirq_start_mask_cycle;
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signed64 xirq_min_mask_cycles;
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signed64 xirq_max_mask_cycles;
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signed64 xirq_last_mask_cycles;
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/* - Total number of interrupts raised. */
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unsigned long nb_interrupts_raised;
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};
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extern int interrupts_initialize (struct _sim_cpu* cpu);
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extern void interrupts_update_pending (struct interrupts* interrupts);
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extern int interrupts_get_current (struct interrupts* interrupts);
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extern int interrupts_process (struct interrupts* interrupts);
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extern void interrupts_raise (struct interrupts* interrupts,
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enum M6811_INT number);
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extern void interrupts_info (SIM_DESC sd,
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struct interrupts* interrupts);
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#endif
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