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[/] [or1k/] [trunk/] [insight/] [utils/] [amd-udi/] [include/] [lcb29k.h] - Blame information for rev 1774

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1 578 markom
/* @(#)lcb29k.h 5.18 93/07/30 16:39:53, Srini, AMD. */
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/******************************************************************************
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 * Copyright 1992 Advanced Micro Devices, Inc.
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 *
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 * This software is the property of Advanced Micro Devices, Inc  (AMD)  which
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 * specifically  grants the user the right to modify, use and distribute this
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 * software provided this notice is not removed or altered.  All other rights
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 * are reserved by AMD.
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 *
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 * AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
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 * SOFTWARE.  IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
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 * DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
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 * USE OF THIS SOFTWARE.
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 *
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 * So that all may benefit from your experience, please report  any  problems
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 * or  suggestions about this software to the 29K Technical Support Center at
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 * 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131  in  the  UK,  or
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 * 0031-11-1129 in Japan, toll free.  The direct dial number is 512-462-4118.
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 *
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 * Advanced Micro Devices, Inc.
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 * 29K Systems Engineering
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 * Mail Stop 573
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 * 5204 E. Ben White Blvd.
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 * Austin, TX 78741
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 * 800-292-9263
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 * 29k-support@AMD.COM
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 *****************************************************************************
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 * Engineer: Srini Subramanian.
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 ****************************************************************************
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 **       This file defines values used in accessing the LCB29K (Low
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 **       Cost Board 29K) or "squirt" board from YARC.
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 ****************************************************************************
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 */
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/* Control Port Register (PC_port_base+0) */
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#define LCB29K_RST         0x80     /* 0=Reset, 1=Run */
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#define LCB29K_CLRINPC     0x40     /* Clear PC Interrupt (write only) */
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#define LCB29K_INTEN       0x20     /* Enable interrupts */
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#define LCB29K_WEN         0x10     /* Window Enable */
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#define LCB29K_INT29       0x08     /* Interrupt 29000 (write only) */
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#define LCB29K_INTPC       0x08     /* Interrupt PC (write only) */
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#define LCB29K_FLAG        0x04     /* Flag */
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#define LCB29K_COPDIN      0x02     /* EEPROM Data in */
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#define LCB29K_COPSK       0x01     /* EEPROM Clock in */
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/* Address Register (PC_port_base+2) */
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#define LCB29K_I_MEM       0x00     /* Set window to Instruction Memory */
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#define LCB29K_D_MEM       0x80     /* Set window to Data Memory */
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/*
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** Shared memory definitions
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*/
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/*
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** The "anchors" defined below represent addresses in the Am29000
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** data memory space.  At these addresses are pointers to shared
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** memory buffers.
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*/
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#define LCB29K_RECV_BUF_PTR    0x80000400  /* Host receive buffer pointer */
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#define LCB29K_SEND_BUF        0x80000404  /* Host send buffer */
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