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[/] [or1k/] [trunk/] [insight/] [utils/] [amd-udi/] [mondfe/] [dasm.c] - Blame information for rev 578

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static char _[] = " @(#)dasm.c  5.22 93/08/11 11:43:53, Srini, AMD";
2 
/******************************************************************************
3 
 * Copyright 1991 Advanced Micro Devices, Inc.
4 
 *
5 
 * This software is the property of Advanced Micro Devices, Inc  (AMD)  which
6 
 * specifically  grants the user the right to modify, use and distribute this
7 
 * software provided this notice is not removed or altered.  All other rights
8 
 * are reserved by AMD.
9 
 *
10 
 * AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
11 
 * SOFTWARE.  IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
12 
 * DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
13 
 * USE OF THIS SOFTWARE.
14 
 *
15 
 * So that all may benefit from your experience, please report  any  problems
16 
 * or  suggestions about this software to the 29K Technical Support Center at
17 
 * 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131  in  the  UK,  or
18 
 * 0031-11-1129 in Japan, toll free.  The direct dial number is 512-462-4118.
19 
 *
20 
 * Advanced Micro Devices, Inc.
21 
 * 29K Support Products
22 
 * Mail Stop 573
23 
 * 5900 E. Ben White Blvd.
24 
 * Austin, TX 78741
25 
 * 800-292-9263
26 
 *****************************************************************************
27 
 *      Engineer: Srini Subramanian.
28 
 *****************************************************************************
29 
 **
30 
 **       This code is used to disasseble Am29000 instructions.  Each
31 
 **       instruction is treated as four sequential bytes representing
32 
 **       the instruction in big endian format.  This should permit the
33 
 **       code to run on both big and little endian machines, provided
34 
 **       that the buffer containing the instructions is in big endian
35 
 **       format.
36 
 **
37 
 *****************************************************************************
38 
 */
39 
 
40 
#include <stdio.h>
41 
#include <string.h>
42 
#ifdef  MSDOS
43 
#include <stdlib.h>
44 
#endif
45 
#include "opcodes.h"
46 
#include "memspcs.h"
47 
#include "main.h"
48 
#include "monitor.h"
49 
#include "miniint.h"
50 
#include "error.h"
51 
 
52 
 
53 
/*
54 
** There are approximately 23 different instruction formats for the
55 
** Am29000.  Instructions are disassembled using one of these formats.
56 
** It should be noted that more compact code for doing diassembly
57 
** could have been produced.  It was decided that this approach was
58 
** the easiest to understand and modify and that the structure would
59 
** lend itself to the possibility of automatic code generation in
60 
** future disassemblers (a disassembler-compiler?).
61 
**
62 
** Also note that these functions will correctly disassemble
63 
** instructions in a buffer in big endian format.  Since the data is
64 
** read in from the target as a stream of bytes, no conversion should
65 
** be necessary.  This disassembly code should work on either big or
66 
** little endian hosts.
67 
**
68 
** Note:  Opcodes in the "switch" statement are sorted in numerical
69 
**        order.
70 
**
71 
** Note2: CLASS, CONVERT, SQRT may require a different format.
72 
**
73 
*/
74 
 
75 
 
76 
int  get_addr_29k_m PARAMS((char *, struct addr_29k_t *, INT32));
77 
int  addr_29k_ok PARAMS((struct addr_29k_t *));
78 
void convert32 PARAMS((BYTE *));
79 
INT32 match_entry PARAMS((ADDR32 offset,
80 
                          INT32 space,
81 
                          int *id,
82 
                          struct bkpt_t **table));
83 
 
84 
void dasm_instr PARAMS((ADDR32, struct instr_t *));
85 
 
86 
void dasm_undefined PARAMS((struct instr_t *, ADDR32));
87 
void dasm_ra_const16n PARAMS((struct instr_t *, ADDR32));
88 
void dasm_ra_const16h PARAMS((struct instr_t *, ADDR32));
89 
void dasm_ra_const16 PARAMS((struct instr_t *, ADDR32));
90 
void dasm_spid_const16 PARAMS((struct instr_t *, ADDR32));
91 
void dasm_ce_cntl_ra_rb PARAMS((struct instr_t *, ADDR32));
92 
void dasm_ce_cntl_ra_const8 PARAMS((struct instr_t *, ADDR32));
93 
void dasm_rc_rb PARAMS((struct instr_t *, ADDR32));
94 
void dasm_rc_const8 PARAMS((struct instr_t *, ADDR32));
95 
void dasm_rc_ra_rb PARAMS((struct instr_t *, ADDR32));
96 
void dasm_rc_ra_const8 PARAMS((struct instr_t *, ADDR32));
97 
void dasm_vn_ra_rb PARAMS((struct instr_t *, ADDR32));
98 
void dasm_vn_ra_const8 PARAMS((struct instr_t *, ADDR32));
99 
void dasm_rc_ra PARAMS((struct instr_t *, ADDR32));
100 
void dasm_none PARAMS((struct instr_t *, ADDR32));
101 
void dasm_one PARAMS((struct instr_t *, ADDR32));
102 
void dasm_atarget PARAMS((struct instr_t *, ADDR32));
103 
void dasm_rtarget PARAMS((struct instr_t *, ADDR32));
104 
void dasm_ra_rtarget PARAMS((struct instr_t *, ADDR32));
105 
void dasm_ra_atarget PARAMS((struct instr_t *, ADDR32));
106 
void dasm_ra_rb PARAMS((struct instr_t *, ADDR32));
107 
void dasm_rb PARAMS((struct instr_t *, ADDR32));
108 
void dasm_rc_spid PARAMS((struct instr_t *, ADDR32));
109 
void dasm_spid_rb PARAMS((struct instr_t *, ADDR32));
110 
void dasm_dc_ra_rb PARAMS((struct instr_t *, ADDR32));
111 
void dasm_convert PARAMS((struct instr_t *, ADDR32));
112 
 
113 
 
114 
 
115 
INT32
116 
dasm_cmd(token, token_count)
117 
   char   *token[];
118 
   int     token_count;
119 
   {
120 
   static INT32  memory_space=I_MEM;
121 
   static ADDR32 address=0;
122 
   INT32  byte_count=(16*sizeof(INST32));
123 
   int    i;
124 
   int    result;
125 
   INT32    bytes_returned;
126 
   int    bkpt_index;
127 
   struct instr_t instr;
128 
   struct addr_29k_t addr_29k;
129 
   struct addr_29k_t addr_29k_start;
130 
   struct addr_29k_t addr_29k_end;
131 
 
132 
   INT32        retval;
133 
   INT32        hostendian;
134 
   BYTE         *read_buffer;
135 
 
136 
 
137 
   /* Is it an 'l' (disassemble) command? */
138 
   if (strcmp(token[0], "l") != 0)
139 
      return (EMSYNTAX);
140 
 
141 
   /*
142 
   ** Parse parameters
143 
   */
144 
 
145 
   if (token_count == 1) {
146 
      address = (address & 0xfffffffc) + byte_count;
147 
      }
148 
   else
149 
   if (token_count == 2) {
150 
      result = get_addr_29k_m(token[1], &addr_29k_start, I_MEM);
151 
      if (result != 0)
152 
         return (EMSYNTAX);
153 
      result = addr_29k_ok(&addr_29k_start);
154 
      if (result != 0)
155 
         return (result);
156 
      address = (addr_29k_start.address & 0xfffffffc);
157 
      memory_space = addr_29k_start.memory_space;
158 
      }
159 
   else
160 
   if (token_count == 3) {
161 
      result = get_addr_29k_m(token[1], &addr_29k_start, I_MEM);
162 
      if (result != 0)
163 
         return (EMSYNTAX);
164 
      result = addr_29k_ok(&addr_29k_start);
165 
      if (result != 0)
166 
         return (result);
167 
      result = get_addr_29k_m(token[2], &addr_29k_end, I_MEM);
168 
      if (result != 0)
169 
         return (EMSYNTAX);
170 
      result = addr_29k_ok(&addr_29k_end);
171 
      if (result != 0)
172 
         return (result);
173 
      if (addr_29k_start.memory_space != addr_29k_end.memory_space)
174 
         return (EMBADADDR);
175 
      if (addr_29k_start.address > addr_29k_end.address)
176 
         return (EMBADADDR);
177 
      address = (addr_29k_start.address & 0xfffffffc);
178 
      memory_space = addr_29k_start.memory_space;
179 
      byte_count = (addr_29k_end.address & 0xfffffffc) -
180 
                   (addr_29k_start.address & 0xfffffffc) +
181 
                   sizeof(INT32);
182 
      }
183 
   else
184 
   /* Too many args */
185 
      return (EMSYNTAX);
186 
 
187 
   /* Will the data overflow the message buffer? Done in TIP */
188 
 
189 
   if ((read_buffer = (BYTE *) malloc((unsigned int) byte_count)) == NULL) {
190 
      warning(EMALLOC);
191 
      return(FAILURE);
192 
   };
193 
 
194 
   hostendian = FALSE;
195 
   if ((retval = Mini_read_req(memory_space,
196 
                               address,
197 
                               (byte_count/4),
198 
                               (INT16) 4,  /* I_MEM/I_ROM always size 4 */
199 
                               &bytes_returned,
200 
                               read_buffer,
201 
                               hostendian)) != SUCCESS) {
202 
        return(FAILURE);
203 
   } else if (retval == SUCCESS) {
204 
       for (i=0; i<(int)(bytes_returned*4); i=i+sizeof(INST32)) {
205 
 
206 
          addr_29k.memory_space = memory_space;
207 
          addr_29k.address = address + (ADDR32) i;
208 
 
209 
          if (host_config.target_endian == LITTLE) {
210 
             instr.op = read_buffer[i+3];
211 
             instr.c = read_buffer[i+2];
212 
             instr.a = read_buffer[i+1];
213 
             instr.b = read_buffer[i];
214 
          } else { /* BIG endian assumed */
215 
             instr.op = read_buffer[i];
216 
             instr.c = read_buffer[i+1];
217 
             instr.a = read_buffer[i+2];
218 
             instr.b = read_buffer[i+3];
219 
          }
220 
 
221 
          if (io_config.echo_mode == (INT32) TRUE)
222 
             fprintf(io_config.echo_file, "%08lx    ", addr_29k.address);
223 
          fprintf(stderr, "%08lx    ", addr_29k.address);
224 
 
225 
          /* Is there an breakpoint at this location? */
226 
          match_entry(addr_29k.address, addr_29k.memory_space, &bkpt_index, &bkpt_table);
227 
          if (io_config.echo_mode == (INT32) TRUE)
228 
            if (bkpt_index <= (int) 0)
229 
             fprintf(io_config.echo_file, "%02x%02x%02x%02x    ", instr.op, instr.c,
230 
                    instr.a, instr.b);
231 
             else
232 
                fprintf(io_config.echo_file, "%02x%02x%02x%02x   *", instr.op, instr.c,
233 
                       instr.a, instr.b);
234 
 
235 
          if (bkpt_index <= (int) 0)
236 
             fprintf(stderr, "%02x%02x%02x%02x    ", instr.op, instr.c,
237 
                    instr.a, instr.b);
238 
             else
239 
                fprintf(stderr, "%02x%02x%02x%02x   *", instr.op, instr.c,
240 
                       instr.a, instr.b);
241 
 
242 
          dasm_instr((address + (ADDR32) i),
243 
                     &instr);
244 
          if (io_config.echo_mode == (INT32) TRUE)
245 
             fprintf(io_config.echo_file, "\n");
246 
          fprintf(stderr, "\n");
247 
       }  /* end for loop */
248 
   };
249 
 
250 
   (void) free ((char *) read_buffer);
251 
   return (0);
252 
   }
253 
 
254 
 
255 
 
256 
/*
257 
** This function is used to disassemble a singe Am29000 instruction.
258 
** A pointer to the next free space in the buffer is returned.
259 
*/
260 
 
261 
 
262 
void
263 
dasm_instr(addr, instr)
264 
   ADDR32   addr;
265 
   struct   instr_t *instr;
266 
   {
267 
 
268 
   switch (instr->op) {
269 
 
270 
      /* Opcodes 0x00 to 0x0F */
271 
      case ILLEGAL_00:  dasm_undefined(instr, addr);
272 
                        break;
273 
      case CONSTN:      dasm_ra_const16n(instr, addr);
274 
                        break;
275 
      case CONSTH:      dasm_ra_const16h(instr, addr);
276 
                        break;
277 
      case CONST:       dasm_ra_const16(instr, addr);
278 
                        break;
279 
      case MTSRIM:      dasm_spid_const16(instr, addr);
280 
                        break;
281 
      case CONSTHZ:     dasm_ra_const16(instr, addr);
282 
                        break;
283 
      case LOADL0:      dasm_ce_cntl_ra_rb(instr, addr);
284 
                        break;
285 
      case LOADL1:      dasm_ce_cntl_ra_const8(instr, addr);
286 
                        break;
287 
      case CLZ0:        dasm_rc_rb(instr, addr);
288 
                        break;
289 
      case CLZ1:        dasm_rc_const8(instr, addr);
290 
                        break;
291 
      case EXBYTE0:     dasm_rc_ra_rb(instr, addr);
292 
                        break;
293 
      case EXBYTE1:     dasm_rc_ra_const8(instr, addr);
294 
                        break;
295 
      case INBYTE0:     dasm_rc_ra_rb(instr, addr);
296 
                        break;
297 
      case INBYTE1:     dasm_rc_ra_const8(instr, addr);
298 
                        break;
299 
      case STOREL0:     dasm_ce_cntl_ra_rb(instr, addr);
300 
                        break;
301 
      case STOREL1:     dasm_ce_cntl_ra_const8(instr, addr);
302 
                        break;
303 
 
304 
      /* Opcodes 0x10 to 0x1F */
305 
      case ADDS0:       dasm_rc_ra_rb(instr, addr);
306 
                        break;
307 
      case ADDS1:       dasm_rc_ra_const8(instr, addr);
308 
                        break;
309 
      case ADDU0:       dasm_rc_ra_rb(instr, addr);
310 
                        break;
311 
      case ADDU1:       dasm_rc_ra_const8(instr, addr);
312 
                        break;
313 
      case ADD0:        dasm_rc_ra_rb(instr, addr);
314 
                        break;
315 
      case ADD1:        dasm_rc_ra_const8(instr, addr);
316 
                        break;
317 
      case LOAD0:       dasm_ce_cntl_ra_rb(instr, addr);
318 
                        break;
319 
      case LOAD1:       dasm_ce_cntl_ra_const8(instr, addr);
320 
                        break;
321 
      case ADDCS0:      dasm_rc_ra_rb(instr, addr);
322 
                        break;
323 
      case ADDCS1:      dasm_rc_ra_const8(instr, addr);
324 
                        break;
325 
      case ADDCU0:      dasm_rc_ra_rb(instr, addr);
326 
                        break;
327 
      case ADDCU1:      dasm_rc_ra_const8(instr, addr);
328 
                        break;
329 
      case ADDC0:       dasm_rc_ra_rb(instr, addr);
330 
                        break;
331 
      case ADDC1:       dasm_rc_ra_const8(instr, addr);
332 
                        break;
333 
      case STORE0:      dasm_ce_cntl_ra_rb(instr, addr);
334 
                        break;
335 
      case STORE1:      dasm_ce_cntl_ra_const8(instr, addr);
336 
                        break;
337 
 
338 
      /* Opcodes 0x20 to 0x2F */
339 
      case SUBS0:       dasm_rc_ra_rb(instr, addr);
340 
                        break;
341 
      case SUBS1:       dasm_rc_ra_const8(instr, addr);
342 
                        break;
343 
      case SUBU0:       dasm_rc_ra_rb(instr, addr);
344 
                        break;
345 
      case SUBU1:       dasm_rc_ra_const8(instr, addr);
346 
                        break;
347 
      case SUB0:        dasm_rc_ra_rb(instr, addr);
348 
                        break;
349 
      case SUB1:        dasm_rc_ra_const8(instr, addr);
350 
                        break;
351 
      case LOADSET0:    dasm_ce_cntl_ra_rb(instr, addr);
352 
                        break;
353 
      case LOADSET1:    dasm_ce_cntl_ra_const8(instr, addr);
354 
                        break;
355 
      case SUBCS0:      dasm_rc_ra_rb(instr, addr);
356 
                        break;
357 
      case SUBCS1:      dasm_rc_ra_const8(instr, addr);
358 
                        break;
359 
      case SUBCU0:      dasm_rc_ra_rb(instr, addr);
360 
                        break;
361 
      case SUBCU1:      dasm_rc_ra_const8(instr, addr);
362 
                        break;
363 
      case SUBC0:       dasm_rc_ra_rb(instr, addr);
364 
                        break;
365 
      case SUBC1:       dasm_rc_ra_const8(instr, addr);
366 
                        break;
367 
      case CPBYTE0:     dasm_rc_ra_rb(instr, addr);
368 
                        break;
369 
      case CPBYTE1:     dasm_rc_ra_const8(instr, addr);
370 
                        break;
371 
 
372 
 
373 
      /* Opcodes 0x30 to 0x3F */
374 
      case SUBRS0:      dasm_rc_ra_rb(instr, addr);
375 
                        break;
376 
      case SUBRS1:      dasm_rc_ra_const8(instr, addr);
377 
                        break;
378 
      case SUBRU0:      dasm_rc_ra_rb(instr, addr);
379 
                        break;
380 
      case SUBRU1:      dasm_rc_ra_const8(instr, addr);
381 
                        break;
382 
      case SUBR0:       dasm_rc_ra_rb(instr, addr);
383 
                        break;
384 
      case SUBR1:       dasm_rc_ra_const8(instr, addr);
385 
                        break;
386 
      case LOADM0:      dasm_ce_cntl_ra_rb(instr, addr);
387 
                        break;
388 
      case LOADM1:      dasm_ce_cntl_ra_const8(instr, addr);
389 
                        break;
390 
      case SUBRCS0:     dasm_rc_ra_rb(instr, addr);
391 
                        break;
392 
      case SUBRCS1:     dasm_rc_ra_const8(instr, addr);
393 
                        break;
394 
      case SUBRCU0:     dasm_rc_ra_rb(instr, addr);
395 
                        break;
396 
      case SUBRCU1:     dasm_rc_ra_const8(instr, addr);
397 
                        break;
398 
      case SUBRC0:      dasm_rc_ra_rb(instr, addr);
399 
                        break;
400 
      case SUBRC1:      dasm_rc_ra_const8(instr, addr);
401 
                        break;
402 
      case STOREM0:     dasm_ce_cntl_ra_rb(instr, addr);
403 
                        break;
404 
      case STOREM1:     dasm_ce_cntl_ra_const8(instr, addr);
405 
                        break;
406 
 
407 
      /* Opcodes 0x40 to 0x4F */
408 
      case CPLT0:       dasm_rc_ra_rb(instr, addr);
409 
                        break;
410 
      case CPLT1:       dasm_rc_ra_const8(instr, addr);
411 
                        break;
412 
      case CPLTU0:      dasm_rc_ra_rb(instr, addr);
413 
                        break;
414 
      case CPLTU1:      dasm_rc_ra_const8(instr, addr);
415 
                        break;
416 
      case CPLE0:       dasm_rc_ra_rb(instr, addr);
417 
                        break;
418 
      case CPLE1:       dasm_rc_ra_const8(instr, addr);
419 
                        break;
420 
      case CPLEU0:      dasm_rc_ra_rb(instr, addr);
421 
                        break;
422 
      case CPLEU1:      dasm_rc_ra_const8(instr, addr);
423 
                        break;
424 
      case CPGT0:       dasm_rc_ra_rb(instr, addr);
425 
                        break;
426 
      case CPGT1:       dasm_rc_ra_const8(instr, addr);
427 
                        break;
428 
      case CPGTU0:      dasm_rc_ra_rb(instr, addr);
429 
                        break;
430 
      case CPGTU1:      dasm_rc_ra_const8(instr, addr);
431 
                        break;
432 
      case CPGE0:       dasm_rc_ra_rb(instr, addr);
433 
                        break;
434 
      case CPGE1:       dasm_rc_ra_const8(instr, addr);
435 
                        break;
436 
      case CPGEU0:      dasm_rc_ra_rb(instr, addr);
437 
                        break;
438 
      case CPGEU1:      dasm_rc_ra_const8(instr, addr);
439 
                        break;
440 
 
441 
      /* Opcodes 0x50 to 0x5F */
442 
      case ASLT0:       dasm_vn_ra_rb(instr, addr);
443 
                        break;
444 
      case ASLT1:       dasm_vn_ra_const8(instr, addr);
445 
                        break;
446 
      case ASLTU0:      dasm_vn_ra_rb(instr, addr);
447 
                        break;
448 
      case ASLTU1:      dasm_vn_ra_const8(instr, addr);
449 
                        break;
450 
      case ASLE0:       dasm_vn_ra_rb(instr, addr);
451 
                        break;
452 
      case ASLE1:       dasm_vn_ra_const8(instr, addr);
453 
                        break;
454 
      case ASLEU0:      dasm_vn_ra_rb(instr, addr);
455 
                        break;
456 
      case ASLEU1:      dasm_vn_ra_const8(instr, addr);
457 
                        break;
458 
      case ASGT0:       dasm_vn_ra_rb(instr, addr);
459 
                        break;
460 
      case ASGT1:       dasm_vn_ra_const8(instr, addr);
461 
                        break;
462 
      case ASGTU0:      dasm_vn_ra_rb(instr, addr);
463 
                        break;
464 
      case ASGTU1:      dasm_vn_ra_const8(instr, addr);
465 
                        break;
466 
      case ASGE0:       dasm_vn_ra_rb(instr, addr);
467 
                        break;
468 
      case ASGE1:       dasm_vn_ra_const8(instr, addr);
469 
                        break;
470 
      case ASGEU0:      dasm_vn_ra_rb(instr, addr);
471 
                        break;
472 
      case ASGEU1:      dasm_vn_ra_const8(instr, addr);
473 
                        break;
474 
 
475 
      /* Opcodes 0x60 to 0x6F */
476 
      case CPEQ0:       dasm_rc_ra_rb(instr, addr);
477 
                        break;
478 
      case CPEQ1:       dasm_rc_ra_const8(instr, addr);
479 
                        break;
480 
      case CPNEQ0:      dasm_rc_ra_rb(instr, addr);
481 
                        break;
482 
      case CPNEQ1:      dasm_rc_ra_const8(instr, addr);
483 
                        break;
484 
      case MUL0:        dasm_rc_ra_rb(instr, addr);
485 
                        break;
486 
      case MUL1:        dasm_rc_ra_const8(instr, addr);
487 
                        break;
488 
      case MULL0:       dasm_rc_ra_rb(instr, addr);
489 
                        break;
490 
      case MULL1:       dasm_rc_ra_const8(instr, addr);
491 
                        break;
492 
      case DIV0_OP0:    dasm_rc_rb(instr, addr);
493 
                        break;
494 
      case DIV0_OP1:    dasm_rc_const8(instr, addr);
495 
                        break;
496 
      case DIV_OP0:    dasm_rc_ra_rb(instr, addr);
497 
                        break;
498 
      case DIV_OP1:     dasm_rc_ra_const8(instr, addr);
499 
                        break;
500 
      case DIVL0:       dasm_rc_ra_rb(instr, addr);
501 
                        break;
502 
      case DIVL1:       dasm_rc_ra_const8(instr, addr);
503 
                        break;
504 
      case DIVREM0:     dasm_rc_ra_rb(instr, addr);
505 
                        break;
506 
      case DIVREM1:     dasm_rc_ra_const8(instr, addr);
507 
                        break;
508 
 
509 
      /* Opcodes 0x70 to 0x7F */
510 
      case ASEQ0:       dasm_vn_ra_rb(instr, addr);
511 
                        break;
512 
      case ASEQ1:       dasm_vn_ra_const8(instr, addr);
513 
                        break;
514 
      case ASNEQ0:      dasm_vn_ra_rb(instr, addr);
515 
                        break;
516 
      case ASNEQ1:      dasm_vn_ra_const8(instr, addr);
517 
                        break;
518 
      case MULU0:       dasm_rc_ra_rb(instr, addr);
519 
                        break;
520 
      case MULU1:       dasm_rc_ra_const8(instr, addr);
521 
                        break;
522 
      case ILLEGAL_76:  dasm_undefined(instr, addr);
523 
                        break;
524 
      case ILLEGAL_77:  dasm_undefined(instr, addr);
525 
                        break;
526 
      case INHW0:       dasm_rc_ra_rb(instr, addr);
527 
                        break;
528 
      case INHW1:       dasm_rc_ra_const8(instr, addr);
529 
                        break;
530 
      case EXTRACT0:    dasm_rc_ra_rb(instr, addr);
531 
                        break;
532 
      case EXTRACT1:    dasm_rc_ra_const8(instr, addr);
533 
                        break;
534 
      case EXHW0:       dasm_rc_ra_rb(instr, addr);
535 
                        break;
536 
      case EXHW1:       dasm_rc_ra_const8(instr, addr);
537 
                        break;
538 
      case EXHWS:       dasm_rc_ra(instr, addr);
539 
                        break;
540 
      case ILLEGAL_7F:  dasm_undefined(instr, addr);
541 
                        break;
542 
 
543 
      /* Opcodes 0x80 to 0x8F */
544 
      case SLL0:        dasm_rc_ra_rb(instr, addr);
545 
                        break;
546 
      case SLL1:        dasm_rc_ra_const8(instr, addr);
547 
                        break;
548 
      case SRL0:        dasm_rc_ra_rb(instr, addr);
549 
                        break;
550 
      case SRL1:        dasm_rc_ra_const8(instr, addr);
551 
                        break;
552 
      case ILLEGAL_84:  dasm_undefined(instr, addr);
553 
                        break;
554 
      case ILLEGAL_85:  dasm_undefined(instr, addr);
555 
                        break;
556 
      case SRA0:        dasm_rc_ra_rb(instr, addr);
557 
                        break;
558 
      case SRA1:        dasm_rc_ra_const8(instr, addr);
559 
                        break;
560 
      case IRET:        dasm_none(instr, addr);
561 
                        break;
562 
      case HALT_OP:     dasm_none(instr, addr);
563 
                        break;
564 
      case ILLEGAL_8A:  dasm_undefined(instr, addr);
565 
                        break;
566 
      case ILLEGAL_8B:  dasm_undefined(instr, addr);
567 
                        break;
568 
      case IRETINV:
569 
                        if ((target_config.processor_id & 0x60) == 0x60)
570 
                           dasm_one(instr, addr);
571 
                        else
572 
                           dasm_none(instr, addr);
573 
                        break;
574 
      case ILLEGAL_8D:  dasm_undefined(instr, addr);
575 
                        break;
576 
      case ILLEGAL_8E:  dasm_undefined(instr, addr);
577 
                        break;
578 
      case ILLEGAL_8F:  dasm_undefined(instr, addr);
579 
                        break;
580 
 
581 
      /* Opcodes 0x90 to 0x9F */
582 
      case AND_OP0:     dasm_rc_ra_rb(instr, addr);
583 
                        break;
584 
      case AND_OP1:     dasm_rc_ra_const8(instr, addr);
585 
                        break;
586 
      case OR_OP0:      dasm_rc_ra_rb(instr, addr);
587 
                        break;
588 
      case OR_OP1:      dasm_rc_ra_const8(instr, addr);
589 
                        break;
590 
      case XOR_OP0:     dasm_rc_ra_rb(instr, addr);
591 
                        break;
592 
      case XOR_OP1:     dasm_rc_ra_const8(instr, addr);
593 
                        break;
594 
      case XNOR0:       dasm_rc_ra_rb(instr, addr);
595 
                        break;
596 
      case XNOR1:       dasm_rc_ra_const8(instr, addr);
597 
                        break;
598 
      case NOR0:        dasm_rc_ra_rb(instr, addr);
599 
                        break;
600 
      case NOR1:        dasm_rc_ra_const8(instr, addr);
601 
                        break;
602 
      case NAND0:       dasm_rc_ra_rb(instr, addr);
603 
                        break;
604 
      case NAND1:       dasm_rc_ra_const8(instr, addr);
605 
                        break;
606 
      case ANDN0:       dasm_rc_ra_rb(instr, addr);
607 
                        break;
608 
      case ANDN1:       dasm_rc_ra_const8(instr, addr);
609 
                        break;
610 
      case SETIP:       dasm_rc_ra_rb(instr, addr);
611 
                        break;
612 
      case INV:
613 
                        if ((target_config.processor_id & 0x60) == 0x60)
614 
                           dasm_one(instr, addr);
615 
                        else
616 
                           dasm_none(instr, addr);
617 
                        break;
618 
 
619 
      /* Opcodes 0xA0 to 0xAF */
620 
      case JMP0:        dasm_rtarget(instr, addr);
621 
                        break;
622 
      case JMP1:        dasm_atarget(instr, addr);
623 
                        break;
624 
      case ILLEGAL_A2:  dasm_undefined(instr, addr);
625 
                        break;
626 
      case ILLEGAL_A3:  dasm_undefined(instr, addr);
627 
                        break;
628 
      case JMPF0:       dasm_ra_rtarget(instr, addr);
629 
                        break;
630 
      case JMPF1:       dasm_ra_atarget(instr, addr);
631 
                        break;
632 
      case ILLEGAL_A6:  dasm_undefined(instr, addr);
633 
                        break;
634 
      case ILLEGAL_A7:  dasm_undefined(instr, addr);
635 
                        break;
636 
      case CALL0:       dasm_ra_rtarget(instr, addr);
637 
                        break;
638 
      case CALL1:       dasm_ra_atarget(instr, addr);
639 
                        break;
640 
      case ORN_OP0:     dasm_undefined(instr, addr);
641 
                        break;
642 
      case ORN_OP1:     dasm_undefined(instr, addr);
643 
                        break;
644 
      case JMPT0:       dasm_ra_rtarget(instr, addr);
645 
                        break;
646 
      case JMPT1:       dasm_ra_atarget(instr, addr);
647 
                        break;
648 
      case ILLEGAL_AE:  dasm_undefined(instr, addr);
649 
                        break;
650 
      case ILLEGAL_AF:  dasm_undefined(instr, addr);
651 
                        break;
652 
 
653 
      /* Opcodes 0xB0 to 0xBF */
654 
      case ILLEGAL_B0:  dasm_undefined(instr, addr);
655 
                        break;
656 
      case ILLEGAL_B1:  dasm_undefined(instr, addr);
657 
                        break;
658 
      case ILLEGAL_B2:  dasm_undefined(instr, addr);
659 
                        break;
660 
      case ILLEGAL_B3:  dasm_undefined(instr, addr);
661 
                        break;
662 
      case JMPFDEC0:    dasm_ra_rtarget(instr, addr);
663 
                        break;
664 
      case JMPFDEC1:    dasm_ra_atarget(instr, addr);
665 
                        break;
666 
      case MFTLB:       dasm_rc_ra(instr, addr);
667 
                        break;
668 
      case ILLEGAL_B7:  dasm_undefined(instr, addr);
669 
                        break;
670 
      case ILLEGAL_B8:  dasm_undefined(instr, addr);
671 
                        break;
672 
      case ILLEGAL_B9:  dasm_undefined(instr, addr);
673 
                        break;
674 
      case ILLEGAL_BA:  dasm_undefined(instr, addr);
675 
                        break;
676 
      case ILLEGAL_BB:  dasm_undefined(instr, addr);
677 
                        break;
678 
      case ILLEGAL_BC:  dasm_undefined(instr, addr);
679 
                        break;
680 
      case ILLEGAL_BD:  dasm_undefined(instr, addr);
681 
                        break;
682 
      case MTTLB:       dasm_ra_rb(instr, addr);
683 
                        break;
684 
      case ILLEGAL_BF:  dasm_undefined(instr, addr);
685 
                        break;
686 
 
687 
      /* Opcodes 0xC0 to 0xCF */
688 
      case JMPI:        dasm_rb(instr, addr);
689 
                        break;
690 
      case ILLEGAL_C1:  dasm_undefined(instr, addr);
691 
                        break;
692 
      case ILLEGAL_C2:  dasm_undefined(instr, addr);
693 
                        break;
694 
      case ILLEGAL_C3:  dasm_undefined(instr, addr);
695 
                        break;
696 
      case JMPFI:       dasm_ra_rb(instr, addr);
697 
                        break;
698 
      case ILLEGAL_C5:  dasm_undefined(instr, addr);
699 
                        break;
700 
      case MFSR:        dasm_rc_spid(instr, addr);
701 
                        break;
702 
      case ILLEGAL_C7:  dasm_undefined(instr, addr);
703 
                        break;
704 
      case CALLI:       dasm_ra_rb(instr, addr);
705 
                        break;
706 
      case ILLEGAL_C9:  dasm_undefined(instr, addr);
707 
                        break;
708 
      case ILLEGAL_CA:  dasm_undefined(instr, addr);
709 
                        break;
710 
      case ILLEGAL_CB:  dasm_undefined(instr, addr);
711 
                        break;
712 
      case JMPTI:       dasm_ra_rb(instr, addr);
713 
                        break;
714 
      case ILLEGAL_CD:  dasm_undefined(instr, addr);
715 
                        break;
716 
      case MTSR:        dasm_spid_rb(instr, addr);
717 
                        break;
718 
      case ILLEGAL_CF:  dasm_undefined(instr, addr);
719 
                        break;
720 
 
721 
      /* Opcodes 0xD0 to 0xDF */
722 
      case ILLEGAL_D0:  dasm_undefined(instr, addr);
723 
                        break;
724 
      case ILLEGAL_D1:  dasm_undefined(instr, addr);
725 
                        break;
726 
      case ILLEGAL_D2:  dasm_undefined(instr, addr);
727 
                        break;
728 
      case ILLEGAL_D3:  dasm_undefined(instr, addr);
729 
                        break;
730 
      case ILLEGAL_D4:  dasm_undefined(instr, addr);
731 
                        break;
732 
      case ILLEGAL_D5:  dasm_undefined(instr, addr);
733 
                        break;
734 
      case ILLEGAL_D6:  dasm_undefined(instr, addr);
735 
                        break;
736 
      case EMULATE:     dasm_vn_ra_rb(instr, addr);
737 
                        break;
738 
      case ILLEGAL_D8:  dasm_undefined(instr, addr);
739 
                        break;
740 
      case ILLEGAL_D9:  dasm_undefined(instr, addr);
741 
                        break;
742 
      case ILLEGAL_DA:  dasm_undefined(instr, addr);
743 
                        break;
744 
      case ILLEGAL_DB:  dasm_undefined(instr, addr);
745 
                        break;
746 
      case ILLEGAL_DC:  dasm_undefined(instr, addr);
747 
                        break;
748 
      case ILLEGAL_DD:  dasm_undefined(instr, addr);
749 
                        break;
750 
      case MULTM:       dasm_rc_ra_rb(instr, addr);
751 
                        break;
752 
      case MULTMU:      dasm_rc_ra_rb(instr, addr);
753 
                        break;
754 
 
755 
      /* Opcodes 0xE0 to 0xEF */
756 
      case MULTIPLY:    dasm_rc_ra_rb(instr, addr);
757 
                        break;
758 
      case DIVIDE:      dasm_rc_ra_rb(instr, addr);
759 
                        break;
760 
      case MULTIPLU:    dasm_rc_ra_rb(instr, addr);
761 
                        break;
762 
      case DIVIDU:      dasm_rc_ra_rb(instr, addr);
763 
                        break;
764 
      case CONVERT:     dasm_convert(instr, addr);
765 
                        break;
766 
      case SQRT:        dasm_rc_ra_const8(instr, addr);
767 
                        break;
768 
      case CLASS:       dasm_dc_ra_rb(instr, addr);
769 
                        break;
770 
      case ILLEGAL_E7:  dasm_undefined(instr, addr);
771 
                        break;
772 
      case ILLEGAL_E8:  dasm_undefined(instr, addr);
773 
                        break;
774 
      case ILLEGAL_E9:  dasm_undefined(instr, addr);
775 
                        break;
776 
      case FEQ:         dasm_rc_ra_rb(instr, addr);
777 
                        break;
778 
      case DEQ:         dasm_rc_ra_rb(instr, addr);
779 
                        break;
780 
      case FGT:         dasm_rc_ra_rb(instr, addr);
781 
                        break;
782 
      case DGT:         dasm_rc_ra_rb(instr, addr);
783 
                        break;
784 
      case FGE:         dasm_rc_ra_rb(instr, addr);
785 
                        break;
786 
      case DGE:         dasm_rc_ra_rb(instr, addr);
787 
                        break;
788 
 
789 
      /* Opcodes 0xF0 to 0xFF */
790 
      case FADD:        dasm_rc_ra_rb(instr, addr);
791 
                        break;
792 
      case DADD:        dasm_rc_ra_rb(instr, addr);
793 
                        break;
794 
      case FSUB:        dasm_rc_ra_rb(instr, addr);
795 
                        break;
796 
      case DSUB:        dasm_rc_ra_rb(instr, addr);
797 
                        break;
798 
      case FMUL:        dasm_rc_ra_rb(instr, addr);
799 
                        break;
800 
      case DMUL:        dasm_rc_ra_rb(instr, addr);
801 
                        break;
802 
      case FDIV:        dasm_rc_ra_rb(instr, addr);
803 
                        break;
804 
      case DDIV:        dasm_rc_ra_rb(instr, addr);
805 
                        break;
806 
      case ILLEGAL_F8:  dasm_undefined(instr, addr);
807 
                        break;
808 
      case FDMUL:       dasm_rc_ra_rb(instr, addr);
809 
                        break;
810 
      case ILLEGAL_FA:  dasm_undefined(instr, addr);
811 
                        break;
812 
      case ILLEGAL_FB:  dasm_undefined(instr, addr);
813 
                        break;
814 
      case ILLEGAL_FC:  dasm_undefined(instr, addr);
815 
                        break;
816 
      case ILLEGAL_FD:  dasm_undefined(instr, addr);
817 
                        break;
818 
      case ILLEGAL_FE:  dasm_undefined(instr, addr);
819 
                        break;
820 
      case ILLEGAL_FF:  dasm_undefined(instr, addr);
821 
                        break;
822 
      }  /* end switch */
823 
 
824 
   }  /* End dasm_instr() */
825 
 
826 
 
827 
 
828 
 
829 
/*
830 
** The following functions are used to format an instruction
831 
** into human-readable form.  All of the Am29000 instruction
832 
** formats are supported below.
833 
*/
834 
 
835 
 
836 
/*
837 
** Format:  0xnnnnnnnn
838 
*/
839 
/*ARGSUSED*/
840 
 
841 
void
842 
dasm_undefined(instr, pc)
843 
   struct   instr_t *instr;
844 
   ADDR32   pc;
845 
   {
846 
   if (io_config.echo_mode == (INT32) TRUE)
847 
    fprintf(io_config.echo_file, ".word    0x%02x%02x%02x%02x", instr->op,
848 
                 instr->c, instr->a, instr->b);
849 
   (void) fprintf(stderr, ".word    0x%02x%02x%02x%02x", instr->op,
850 
                 instr->c, instr->a, instr->b);
851 
   }
852 
 
853 
 
854 
 
855 
/*
856 
** Format:  <Mnemonic>  ra, const16
857 
**
858 
** (See CONSTN)
859 
*/
860 
/*ARGSUSED*/
861 
 
862 
void
863 
dasm_ra_const16n(instr, pc)
864 
   struct   instr_t *instr;
865 
   ADDR32   pc;
866 
   {
867 
   INT32  const16;
868 
   const16 = (INT32) ((instr->b | (instr->c << 8)) | 0xffff0000);
869 
   if (io_config.echo_mode == (INT32) TRUE)
870 
   (void) fprintf(io_config.echo_file, "%s %s,0x%lx", opcode_name[instr->op],
871 
                 reg[instr->a], const16);
872 
   (void) fprintf(stderr, "%s %s,0x%lx", opcode_name[instr->op],
873 
                 reg[instr->a], const16);
874 
   }
875 
 
876 
 
877 
 
878 
/*
879 
** Format:  <Mnemonic>  ra, const16
880 
**
881 
** (See CONSTH)
882 
*/
883 
/*ARGSUSED*/
884 
 
885 
void
886 
dasm_ra_const16h(instr, pc)
887 
   struct   instr_t *instr;
888 
   ADDR32   pc;
889 
   {
890 
   INT32  const32;
891 
   INT32  i_15_8;
892 
   INT32  i_7_0;
893 
 
894 
   i_15_8 = (INT32) instr->c;
895 
   i_7_0  = (INT32) instr->b;
896 
   const32 = ((i_15_8 << 24) | (i_7_0 << 16));
897 
   if (io_config.echo_mode == (INT32) TRUE)
898 
   (void) fprintf(io_config.echo_file, "%s %s,0x%lx", opcode_name[instr->op],
899 
                 reg[instr->a], const32);
900 
   (void) fprintf(stderr, "%s %s,0x%lx", opcode_name[instr->op],
901 
                 reg[instr->a], const32);
902 
   }
903 
 
904 
 
905 
 
906 
/*
907 
** Format:  <Mnemonic>  ra, const16
908 
**
909 
** (See CONST)
910 
*/
911 
/*ARGSUSED*/
912 
 
913 
void
914 
dasm_ra_const16(instr, pc)
915 
   struct   instr_t *instr;
916 
   ADDR32   pc;
917 
   {
918 
   INT32  const16;
919 
   const16 = (INT32) (instr->b | (instr->c << 8));
920 
   if (io_config.echo_mode == (INT32) TRUE)
921 
   (void) fprintf(io_config.echo_file, "%s %s,0x%x", opcode_name[instr->op],
922 
                 reg[instr->a], const16);
923 
   (void) fprintf(stderr, "%s %s,0x%x", opcode_name[instr->op],
924 
                 reg[instr->a], const16);
925 
   }
926 
 
927 
 
928 
 
929 
/*
930 
** Format:  <Mnemonic>  spid, const16
931 
**
932 
** (See MTSRIM)
933 
*/
934 
/*ARGSUSED*/
935 
 
936 
void
937 
dasm_spid_const16(instr, pc)
938 
   struct   instr_t *instr;
939 
   ADDR32   pc;
940 
   {
941 
   INT32  const16;
942 
   INT32  i_15_8;
943 
   INT32  i_7_0;
944 
 
945 
   i_15_8 = (INT32) instr->c;
946 
   i_7_0  = (INT32) instr->b;
947 
 
948 
   const16 = ((i_15_8 << 8) | i_7_0);
949 
   if (io_config.echo_mode == (INT32) TRUE)
950 
   (void) fprintf(io_config.echo_file, "%s %s,0x%x", opcode_name[instr->op],
951 
                 spreg[instr->a], const16);
952 
   (void) fprintf(stderr, "%s %s,0x%x", opcode_name[instr->op],
953 
                 spreg[instr->a], const16);
954 
   }
955 
 
956 
 
957 
 
958 
 
959 
/*
960 
** Format:  <Mnemonic>  ce, cntl, ra, rb
961 
**
962 
** (See LOADM, LOADSET, STORE, STOREL, etc...)
963 
*/
964 
/*ARGSUSED*/
965 
 
966 
void
967 
dasm_ce_cntl_ra_rb(instr, pc)
968 
   struct   instr_t *instr;
969 
   ADDR32   pc;
970 
   {
971 
   int ce;
972 
   int cntl;
973 
 
974 
   ce = (int) ((instr->c >> 7) & 0x01);
975 
   cntl = (int) (instr->c & 0x7f);
976 
   if (io_config.echo_mode == (INT32) TRUE)
977 
   (void) fprintf(io_config.echo_file, "%s %x,0x%x,%s,%s",
978 
                 opcode_name[instr->op], ce, cntl,
979 
                 reg[instr->a], reg[instr->b]);
980 
   (void) fprintf(stderr, "%s %x,0x%x,%s,%s",
981 
                 opcode_name[instr->op], ce, cntl,
982 
                 reg[instr->a], reg[instr->b]);
983 
   }
984 
 
985 
 
986 
 
987 
/*
988 
** Format:  <Mnemonic>  ce, cntl, ra, const8
989 
**
990 
** (See LOADM, LOADSET, STORE, STOREL, etc...)
991 
*/
992 
/*ARGSUSED*/
993 
 
994 
void
995 
dasm_ce_cntl_ra_const8(instr, pc)
996 
   struct   instr_t *instr;
997 
   ADDR32   pc;
998 
   {
999 
   int ce;
1000 
   int cntl;
1001 
 
1002 
   ce = (int) ((instr->c >> 7) & 0x01);
1003 
   cntl = (int) (instr->c & 0x7f);
1004 
   if (io_config.echo_mode == (INT32) TRUE)
1005 
   (void) fprintf(io_config.echo_file, "%s %x,0x%x,%s,0x%x",
1006 
                 opcode_name[instr->op], ce, cntl,
1007 
                 reg[instr->a], instr->b);
1008 
   (void) fprintf(stderr, "%s %x,0x%x,%s,0x%x",
1009 
                 opcode_name[instr->op], ce, cntl,
1010 
                 reg[instr->a], instr->b);
1011 
   }
1012 
 
1013 
 
1014 
 
1015 
/*
1016 
** Format:  <Mnemonic>  rc, rb
1017 
**
1018 
** (See CLZ, DIV0)
1019 
*/
1020 
/*ARGSUSED*/
1021 
 
1022 
void
1023 
dasm_rc_rb(instr, pc)
1024 
   struct   instr_t *instr;
1025 
   ADDR32   pc;
1026 
   {
1027 
   if (io_config.echo_mode == (INT32) TRUE)
1028 
   (void) fprintf(io_config.echo_file, "%s %s,%s", opcode_name[instr->op],
1029 
                 reg[instr->c], reg[instr->b]);
1030 
   (void) fprintf(stderr, "%s %s,%s", opcode_name[instr->op],
1031 
                 reg[instr->c], reg[instr->b]);
1032 
   }
1033 
 
1034 
 
1035 
 
1036 
/*
1037 
** Format:  <Mnemonic>  rc, const8
1038 
**
1039 
** (See CLZ, DIV0)
1040 
*/
1041 
/*ARGSUSED*/
1042 
 
1043 
void
1044 
dasm_rc_const8(instr, pc)
1045 
   struct   instr_t *instr;
1046 
   ADDR32   pc;
1047 
   {
1048 
   if (io_config.echo_mode == (INT32) TRUE)
1049 
   (void) fprintf(io_config.echo_file, "%s %s,0x%x", opcode_name[instr->op],
1050 
                 reg[instr->c], instr->b);
1051 
   (void) fprintf(stderr, "%s %s,0x%x", opcode_name[instr->op],
1052 
                 reg[instr->c], instr->b);
1053 
   }
1054 
 
1055 
 
1056 
 
1057 
/*
1058 
** Format:  <Mnemonic>  rc, ra, rb
1059 
**
1060 
** (See ADD, AND, etc...)
1061 
*/
1062 
/*ARGSUSED*/
1063 
 
1064 
void
1065 
dasm_rc_ra_rb(instr, pc)
1066 
   struct   instr_t *instr;
1067 
   ADDR32   pc;
1068 
   {
1069 
   if (io_config.echo_mode == (INT32) TRUE)
1070 
   (void) fprintf(io_config.echo_file, "%s %s,%s,%s", opcode_name[instr->op],
1071 
                 reg[instr->c], reg[instr->a], reg[instr->b]);
1072 
   (void) fprintf(stderr, "%s %s,%s,%s", opcode_name[instr->op],
1073 
                 reg[instr->c], reg[instr->a], reg[instr->b]);
1074 
   }
1075 
 
1076 
 
1077 
 
1078 
/*
1079 
** Format:  <Mnemonic>  rc, ra, const8
1080 
**
1081 
** (See ADD, AND, etc...)
1082 
*/
1083 
/*ARGSUSED*/
1084 
 
1085 
void
1086 
dasm_rc_ra_const8(instr, pc)
1087 
   struct   instr_t *instr;
1088 
   ADDR32   pc;
1089 
   {
1090 
   if (io_config.echo_mode == (INT32) TRUE)
1091 
   (void) fprintf(io_config.echo_file, "%s %s,%s,0x%x", opcode_name[instr->op],
1092 
                 reg[instr->c], reg[instr->a], instr->b);
1093 
   (void) fprintf(stderr, "%s %s,%s,0x%x", opcode_name[instr->op],
1094 
                 reg[instr->c], reg[instr->a], instr->b);
1095 
   }
1096 
 
1097 
 
1098 
 
1099 
/*
1100 
** Format:  <Mnemonic>  vn, ra, rb
1101 
**
1102 
** (See ASEQ, ASGE, etc...)
1103 
**
1104 
** Note:  This function also prints out a "nop" if the
1105 
**        instruction is an ASEQ and RA == RB.
1106 
**
1107 
*/
1108 
/*ARGSUSED*/
1109 
 
1110 
void
1111 
dasm_vn_ra_rb(instr, pc)
1112 
   struct   instr_t *instr;
1113 
   ADDR32   pc;
1114 
   {
1115 
   if ((instr->op == ASEQ0) &&
1116 
       (instr->a == instr->b))  {
1117 
      if (io_config.echo_mode == (INT32) TRUE)
1118 
      (void) fprintf(io_config.echo_file, "nop");
1119 
      (void) fprintf(stderr, "nop");
1120 
      } else {
1121 
         if (io_config.echo_mode == (INT32) TRUE)
1122 
         (void) fprintf(io_config.echo_file, "%s 0x%x,%s,%s", opcode_name[instr->op],
1123 
                       instr->c, reg[instr->a], reg[instr->b]);
1124 
         (void) fprintf(stderr, "%s 0x%x,%s,%s", opcode_name[instr->op],
1125 
                       instr->c, reg[instr->a], reg[instr->b]);
1126 
      }
1127 
   }
1128 
 
1129 
 
1130 
/*
1131 
** Format:  <Mnemonic>  vn, ra, const8
1132 
**
1133 
** (See ASEQ, ASGE, etc...)
1134 
*/
1135 
/*ARGSUSED*/
1136 
 
1137 
void
1138 
dasm_vn_ra_const8(instr, pc)
1139 
   struct   instr_t *instr;
1140 
   ADDR32   pc;
1141 
   {
1142 
   if (io_config.echo_mode == (INT32) TRUE)
1143 
   (void) fprintf(io_config.echo_file, "%s 0x%x,%s,0x%x", opcode_name[instr->op],
1144 
                 instr->c, reg[instr->a], instr->b);
1145 
   (void) fprintf(stderr, "%s 0x%x,%s,0x%x", opcode_name[instr->op],
1146 
                 instr->c, reg[instr->a], instr->b);
1147 
   }
1148 
 
1149 
 
1150 
 
1151 
/*
1152 
** Format:  <Mnemonic>  rc, ra
1153 
**
1154 
** (See MFTBL)
1155 
*/
1156 
/*ARGSUSED*/
1157 
 
1158 
void
1159 
dasm_rc_ra(instr, pc)
1160 
   struct   instr_t *instr;
1161 
   ADDR32   pc;
1162 
   {
1163 
   if (io_config.echo_mode == (INT32) TRUE)
1164 
   (void) fprintf(io_config.echo_file, "%s %s,%s", opcode_name[instr->op],
1165 
                 reg[instr->c], reg[instr->a]);
1166 
   (void) fprintf(stderr, "%s %s,%s", opcode_name[instr->op],
1167 
                 reg[instr->c], reg[instr->a]);
1168 
   }
1169 
 
1170 
 
1171 
 
1172 
/*
1173 
** Format:  <Mnemonic>
1174 
**
1175 
** (See HALT, IRET)
1176 
*/
1177 
/*ARGSUSED*/
1178 
 
1179 
void
1180 
dasm_none(instr, pc)
1181 
   struct   instr_t *instr;
1182 
   ADDR32   pc;
1183 
   {
1184 
   (void) fprintf(stderr, "%s", opcode_name[instr->op]);
1185 
   if (io_config.echo_mode == (INT32) TRUE)
1186 
   (void) fprintf(io_config.echo_file, "%s", opcode_name[instr->op]);
1187 
   }
1188 
 
1189 
void
1190 
dasm_one(instr, pc)
1191 
   struct   instr_t *instr;
1192 
   ADDR32   pc;
1193 
   {
1194 
   (void) fprintf(stderr, "%s 0x%x", opcode_name[instr->op],(int) (instr->c & 0x3));
1195 
   if (io_config.echo_mode == (INT32) TRUE)
1196 
   (void) fprintf(io_config.echo_file, "%s 0x%x", opcode_name[instr->op], (int) (instr->c & 0x3));
1197 
   }
1198 
 
1199 
 
1200 
/*
1201 
** Format:  <Mnemonic>  target
1202 
**
1203 
** (See JMP, etc...)
1204 
*/
1205 
/*ARGSUSED*/
1206 
 
1207 
void
1208 
dasm_atarget(instr, pc)
1209 
   struct   instr_t *instr;
1210 
   ADDR32   pc;
1211 
   {
1212 
   INT32  const16;
1213 
   INT32  i_17_10;
1214 
   INT32  i_9_2;
1215 
 
1216 
   i_17_10 = ((INT32) instr->c) << 10;
1217 
   i_9_2 = ((INT32) instr->b) << 2;
1218 
   const16 = (i_17_10 | i_9_2);
1219 
   (void) fprintf(stderr, "%s 0x%lx", opcode_name[instr->op],
1220 
                 const16);
1221 
   if (io_config.echo_mode == (INT32) TRUE)
1222 
   (void) fprintf(io_config.echo_file, "%s 0x%lx", opcode_name[instr->op],
1223 
                 const16);
1224 
   }
1225 
 
1226 
 
1227 
 
1228 
/*
1229 
** Format:  <Mnemonic>  target+pc
1230 
**
1231 
** (See JMP, etc...)
1232 
*/
1233 
 
1234 
void
1235 
dasm_rtarget(instr, pc)
1236 
   struct   instr_t *instr;
1237 
   ADDR32   pc;
1238 
   {
1239 
   INT32  const16;
1240 
   INT32  i_17_10;
1241 
   INT32  i_9_2;
1242 
 
1243 
   i_17_10 = ((INT32) instr->c) << 10;
1244 
   i_9_2 = ((INT32) instr->b) << 2;
1245 
   const16 = (i_17_10 | i_9_2);
1246 
   if ((const16 & 0x00020000) != 0)  /* Sign extend (bit 17) */
1247 
      const16 = (const16 | 0xfffc0000);
1248 
   (void) fprintf(stderr, "%s 0x%lx", opcode_name[instr->op],
1249 
                 (const16+pc));
1250 
   if (io_config.echo_mode == (INT32) TRUE)
1251 
   (void) fprintf(io_config.echo_file, "%s 0x%lx", opcode_name[instr->op],
1252 
                 (const16+pc));
1253 
   }
1254 
 
1255 
 
1256 
 
1257 
/*
1258 
** Format:  <Mnemonic>  ra, target
1259 
**
1260 
** (See CALL, JMPFDEC, JMPT, etc...)
1261 
*/
1262 
/*ARGSUSED*/
1263 
 
1264 
void
1265 
dasm_ra_atarget(instr, pc)
1266 
   struct   instr_t *instr;
1267 
   ADDR32   pc;
1268 
   {
1269 
   INT32  const16;
1270 
   INT32  i_17_10;
1271 
   INT32  i_9_2;
1272 
 
1273 
   i_17_10 = ((INT32) instr->c) << 10;
1274 
   i_9_2 = ((INT32) instr->b) << 2;
1275 
   const16 = (i_17_10 | i_9_2);
1276 
   (void) fprintf(stderr, "%s %s,0x%lx", opcode_name[instr->op],
1277 
                 reg[instr->a], const16);
1278 
   if (io_config.echo_mode == (INT32) TRUE)
1279 
   (void) fprintf(io_config.echo_file, "%s %s,0x%lx", opcode_name[instr->op],
1280 
                 reg[instr->a], const16);
1281 
   }
1282 
 
1283 
 
1284 
 
1285 
/*
1286 
** Format:  <Mnemonic>  ra, target
1287 
**
1288 
** (See CALL, JMPFDEC, JMPT, etc...)
1289 
*/
1290 
 
1291 
void
1292 
dasm_ra_rtarget(instr, pc)
1293 
   struct   instr_t *instr;
1294 
   ADDR32   pc;
1295 
   {
1296 
   INT32  const16;
1297 
   INT32  i_17_10;
1298 
   INT32  i_9_2;
1299 
 
1300 
   i_17_10 = ((INT32) instr->c) << 10;
1301 
   i_9_2 = ((INT32) instr->b) << 2;
1302 
   const16 = (i_17_10 | i_9_2);
1303 
   if ((const16 & 0x00020000) != 0)  /* Sign extend (bit 17) */
1304 
      const16 = (const16 | 0xfffc0000);
1305 
   (void) fprintf(stderr, "%s %s,0x%lx", opcode_name[instr->op],
1306 
                 reg[instr->a], (const16+pc));
1307 
   if (io_config.echo_mode == (INT32) TRUE)
1308 
   (void) fprintf(io_config.echo_file, "%s %s,0x%lx", opcode_name[instr->op],
1309 
                 reg[instr->a], (const16+pc));
1310 
   }
1311 
 
1312 
 
1313 
 
1314 
/*
1315 
** Format:  <Mnemonic>  ra, rb
1316 
**
1317 
** (See CALLI, JMPFI)
1318 
*/
1319 
/*ARGSUSED*/
1320 
 
1321 
void
1322 
dasm_ra_rb(instr, pc)
1323 
   struct   instr_t *instr;
1324 
   ADDR32   pc;
1325 
   {
1326 
   (void) fprintf(stderr, "%s %s,%s", opcode_name[instr->op],
1327 
                 reg[instr->a], reg[instr->b]);
1328 
   if (io_config.echo_mode == (INT32) TRUE)
1329 
   (void) fprintf(io_config.echo_file, "%s %s,%s", opcode_name[instr->op],
1330 
                 reg[instr->a], reg[instr->b]);
1331 
   }
1332 
 
1333 
 
1334 
 
1335 
/*
1336 
** Format:  <Mnemonic>  rb
1337 
**
1338 
** (See JMPI)
1339 
*/
1340 
/*ARGSUSED*/
1341 
 
1342 
void
1343 
dasm_rb(instr, pc)
1344 
   struct   instr_t *instr;
1345 
   ADDR32   pc;
1346 
   {
1347 
   (void) fprintf(stderr, "%s %s", opcode_name[instr->op],
1348 
                 reg[instr->b]);
1349 
   if (io_config.echo_mode == (INT32) TRUE)
1350 
   (void) fprintf(io_config.echo_file, "%s %s", opcode_name[instr->op],
1351 
                 reg[instr->b]);
1352 
   }
1353 
 
1354 
 
1355 
 
1356 
/*
1357 
** Format:  <Mnemonic>  rc, spid
1358 
**
1359 
** (See MFSR)
1360 
*/
1361 
/*ARGSUSED*/
1362 
 
1363 
void
1364 
dasm_rc_spid(instr, pc)
1365 
   struct   instr_t *instr;
1366 
   ADDR32   pc;
1367 
   {
1368 
   (void) fprintf(stderr, "%s %s,%s", opcode_name[instr->op],
1369 
                 reg[instr->c], spreg[instr->a]);
1370 
   if (io_config.echo_mode == (INT32) TRUE)
1371 
   (void) fprintf(io_config.echo_file, "%s %s,%s", opcode_name[instr->op],
1372 
                 reg[instr->c], spreg[instr->a]);
1373 
   }
1374 
 
1375 
 
1376 
 
1377 
/*
1378 
** Format:  <Mnemonic>  spid, rb
1379 
**
1380 
** (See MTSR)
1381 
*/
1382 
/*ARGSUSED*/
1383 
 
1384 
void
1385 
dasm_spid_rb(instr, pc)
1386 
   struct   instr_t *instr;
1387 
   ADDR32   pc;
1388 
   {
1389 
   if (io_config.echo_mode == (INT32) TRUE)
1390 
   (void) fprintf(io_config.echo_file, "%s %s,%s", opcode_name[instr->op],
1391 
                 spreg[instr->a], reg[instr->b]);
1392 
   (void) fprintf(stderr, "%s %s,%s", opcode_name[instr->op],
1393 
                 spreg[instr->a], reg[instr->b]);
1394 
   }
1395 
 
1396 
 
1397 
 
1398 
/*
1399 
** Format:  <Mnemonic>  dc, ra, rb
1400 
**
1401 
** (See CLASS)
1402 
*/
1403 
/*ARGSUSED*/
1404 
 
1405 
void
1406 
dasm_dc_ra_rb(instr, pc)
1407 
   struct   instr_t *instr;
1408 
   ADDR32   pc;
1409 
   {
1410 
   (void) fprintf(stderr, "%s %s,%s", opcode_name[instr->op],
1411 
                 reg[instr->c], reg[instr->a]);
1412 
   if (io_config.echo_mode == (INT32) TRUE)
1413 
   (void) fprintf(io_config.echo_file, "%s %s,%s", opcode_name[instr->op],
1414 
                 reg[instr->c], reg[instr->a]);
1415 
   }
1416 
 
1417 
 
1418 
 
1419 
/*
1420 
** Format:  <Mnemonic>  rc, ra, UI, RND, FD, FS
1421 
**
1422 
** (See CONVERT)
1423 
*/
1424 
/*ARGSUSED*/
1425 
 
1426 
void
1427 
dasm_convert(instr, pc)
1428 
   struct   instr_t *instr;
1429 
   ADDR32   pc;
1430 
   {
1431 
   int ui;
1432 
   int rnd;
1433 
   int fd;
1434 
   int fs;
1435 
 
1436 
   ui = (int) ((instr->b >> 7) & 0x01);
1437 
   rnd = (int) ((instr->b >> 4) & 0x07);
1438 
   fd = (int) ((instr->b >> 2) & 0x03);
1439 
   fs = (int) (instr->b & 0x03);
1440 
   if (io_config.echo_mode == (INT32) TRUE)
1441 
   (void) fprintf(io_config.echo_file, "%s %s,%s,%x,%x,%x,%x",
1442 
                 opcode_name[instr->op],
1443 
                 reg[instr->c], reg[instr->a],
1444 
                 ui, rnd, fd, fs);
1445 
   (void) fprintf(stderr, "%s %s,%s,%x,%x,%x,%x",
1446 
                 opcode_name[instr->op],
1447 
                 reg[instr->c], reg[instr->a],
1448 
                 ui, rnd, fd, fs);
1449 
   }
1450 
 
1451 
 
1452 
 

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