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The following describes the current state of the NetWinder's floating point

emulator.

In the following nomenclature is used to describe the floating point

instructions.  It follows the conventions in the ARM manual.

 = , no default

{P|M|Z} = {round to +infinity,round to -infinity,round to zero},

          default = round to nearest

Note: items enclosed in {} are optional.

Floating Point Coprocessor Data Transfer Instructions (CPDT)

------------------------------------------------------------

LDF/STF - load and store floating

{cond} Fd, Rn

{cond} Fd, [Rn, #]{!}

{cond} Fd, [Rn], #

These instructions are fully implemented.

LFM/SFM - load and store multiple floating

Form 1 syntax:

{cond} Fd, , [Rn]

{cond} Fd, , [Rn, #]{!}

{cond} Fd, , [Rn], #

Form 2 syntax:

{cond} Fd, , [Rn]{!}

These instructions are fully implemented.  They store/load three words

for each floating point register into the memory location given in the

instruction.  The format in memory is unlikely to be compatible with

other implementations, in particular the actual hardware.  Specific

mention of this is made in the ARM manuals.

Floating Point Coprocessor Register Transfer Instructions (CPRT)

----------------------------------------------------------------

Conversions, read/write status/control register instructions

FLT{cond}{P,M,Z} Fn, Rd          Convert integer to floating point

FIX{cond}{P,M,Z} Rd, Fn                 Convert floating point to integer

WFS{cond} Rd                            Write floating point status register

RFS{cond} Rd                            Read floating point status register

WFC{cond} Rd                            Write floating point control register

RFC{cond} Rd                            Read floating point control register

FLT/FIX are fully implemented.

RFS/WFS are fully implemented.

RFC/WFC are fully implemented.  RFC/WFC are supervisor only instructions, and

presently check the CPU mode, and do an invalid instruction trap if not called

from supervisor mode.

Compare instructions

CMF{cond} Fn, Fm        Compare floating

CMFE{cond} Fn, Fm       Compare floating with exception

CNF{cond} Fn, Fm        Compare negated floating

CNFE{cond} Fn, Fm       Compare negated floating with exception

These are fully implemented.

Floating Point Coprocessor Data Instructions (CPDT)

---------------------------------------------------

Dyadic operations:

ADF{cond}{P,M,Z} Fd, Fn,  - add

SUF{cond}{P,M,Z} Fd, Fn,  - subtract

RSF{cond}{P,M,Z} Fd, Fn,  - reverse subtract

MUF{cond}{P,M,Z} Fd, Fn,  - multiply

DVF{cond}{P,M,Z} Fd, Fn,  - divide

RDV{cond}{P,M,Z} Fd, Fn,  - reverse divide

These are fully implemented.

FML{cond}{P,M,Z} Fd, Fn,  - fast multiply

FDV{cond}{P,M,Z} Fd, Fn,  - fast divide

FRD{cond}{P,M,Z} Fd, Fn,  - fast reverse divide

These are fully implemented as well.  They use the same algorithm as the

non-fast versions.  Hence, in this implementation their performance is

equivalent to the MUF/DVF/RDV instructions.  This is acceptable according

to the ARM manual.  The manual notes these are defined only for single

operands, on the actual FPA11 hardware they do not work for double or

extended precision operands.  The emulator currently does not check

the requested permissions conditions, and performs the requested operation.

RMF{cond}{P,M,Z} Fd, Fn,  - IEEE remainder

This is fully implemented.

Monadic operations:

MVF{cond}{P,M,Z} Fd,  - move

MNF{cond}{P,M,Z} Fd,  - move negated

These are fully implemented.

ABS{cond}{P,M,Z} Fd,  - absolute value

SQT{cond}{P,M,Z} Fd,  - square root

RND{cond}{P,M,Z} Fd,  - round

These are fully implemented.

URD{cond}{P,M,Z} Fd,  - unnormalized round

NRM{cond}{P,M,Z} Fd,  - normalize

These are implemented.  URD is implemented using the same code as the RND

instruction.  Since URD cannot return a unnormalized number, NRM becomes

a NOP.

Library calls:

POW{cond}{P,M,Z} Fd, Fn,  - power

RPW{cond}{P,M,Z} Fd, Fn,  - reverse power

POL{cond}{P,M,Z} Fd, Fn,  - polar angle (arctan2)

LOG{cond}{P,M,Z} Fd,  - logarithm to base 10

LGN{cond}{P,M,Z} Fd,  - logarithm to base e

EXP{cond}{P,M,Z} Fd,  - exponent

SIN{cond}{P,M,Z} Fd,  - sine

COS{cond}{P,M,Z} Fd,  - cosine

TAN{cond}{P,M,Z} Fd,  - tangent

ASN{cond}{P,M,Z} Fd,  - arcsine

ACS{cond}{P,M,Z} Fd,  - arccosine

ATN{cond}{P,M,Z} Fd,  - arctangent

These are not implemented.  They are not currently issued by the compiler,

and are handled by routines in libc.  These are not implemented by the FPA11

hardware, but are handled by the floating point support code.  They should

be implemented in future versions.

Signalling:

Signals are implemented.  However current ELF kernels produced by Rebel.com

have a bug in them that prevents the module from generating a SIGFPE.  This

is caused by a failure to alias fp_current to the kernel variable

current_set[0] correctly.

The kernel provided with this distribution (vmlinux-nwfpe-0.93) contains

a fix for this problem and also incorporates the current version of the

emulator directly.  It is possible to run with no floating point module

loaded with this kernel.  It is provided as a demonstration of the

technology and for those who want to do floating point work that depends

on signals.  It is not strictly necessary to use the module.

A module (either the one provided by Russell King, or the one in this

distribution) can be loaded to replace the functionality of the emulator

built into the kernel.