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1275 |
phoenix |
@ libgcc1 routines for ARM cpu.
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@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
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/* Copyright (C) 1995, 1996, 1998 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file with other programs, and to distribute
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those programs without any restriction coming from the use of this
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file. (The General Public License restrictions do apply in other
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respects; for example, they cover modification of the file, and
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distribution when not linked into another program.)
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* As a special exception, if you link this library with other files,
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some of which are compiled with GCC, to produce an executable,
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this library does not by itself cause the resulting executable
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to be covered by the GNU General Public License.
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This exception does not however invalidate any other reasons why
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the executable file might be covered by the GNU General Public License.
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*/
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/* This code is derived from gcc 2.95.3 */
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/* I Molton 29/07/01 */
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#include
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#include
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#include
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#include
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#ifdef CONFIG_CPU_26
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#define RET movs
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#define RETc(x) mov##x##s
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#define RETCOND ^
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#else
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#define RET mov
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#define RETc(x) mov##x
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#define RETCOND
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#endif
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dividend .req r0
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divisor .req r1
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result .req r2
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overdone .req r2
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curbit .req r3
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ip .req r12
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sp .req r13
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lr .req r14
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pc .req r15
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ENTRY(__udivsi3)
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cmp divisor, #0
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beq Ldiv0
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mov curbit, #1
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mov result, #0
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cmp dividend, divisor
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bcc Lgot_result_udivsi3
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1:
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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cmp divisor, #0x10000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #4
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movcc curbit, curbit, lsl #4
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bcc 1b
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2:
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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cmp divisor, #0x80000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #1
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movcc curbit, curbit, lsl #1
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bcc 2b
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3:
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@ Test for possible subtractions, and note which bits
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@ are done in the result. On the final pass, this may subtract
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@ too much from the dividend, but the result will be ok, since the
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@ "bit" will have been shifted out at the bottom.
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cmp dividend, divisor
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subcs dividend, dividend, divisor
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orrcs result, result, curbit
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cmp dividend, divisor, lsr #1
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subcs dividend, dividend, divisor, lsr #1
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orrcs result, result, curbit, lsr #1
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cmp dividend, divisor, lsr #2
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subcs dividend, dividend, divisor, lsr #2
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orrcs result, result, curbit, lsr #2
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cmp dividend, divisor, lsr #3
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subcs dividend, dividend, divisor, lsr #3
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orrcs result, result, curbit, lsr #3
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cmp dividend, #0 @ Early termination?
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movnes curbit, curbit, lsr #4 @ No, any more bits to do?
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movne divisor, divisor, lsr #4
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bne 3b
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Lgot_result_udivsi3:
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mov r0, result
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RET pc, lr
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Ldiv0:
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str lr, [sp, #-4]!
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bl __div0
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mov r0, #0 @ about as wrong as it could be
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ldmia sp!, {pc}RETCOND
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/* __umodsi3 ----------------------- */
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ENTRY(__umodsi3)
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cmp divisor, #0
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beq Ldiv0
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mov curbit, #1
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cmp dividend, divisor
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RETc(cc) pc, lr
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1:
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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cmp divisor, #0x10000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #4
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movcc curbit, curbit, lsl #4
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bcc 1b
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2:
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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cmp divisor, #0x80000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #1
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movcc curbit, curbit, lsl #1
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bcc 2b
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3:
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@ Test for possible subtractions. On the final pass, this may
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@ subtract too much from the dividend, so keep track of which
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@ subtractions are done, we can fix them up afterwards...
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mov overdone, #0
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cmp dividend, divisor
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subcs dividend, dividend, divisor
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cmp dividend, divisor, lsr #1
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subcs dividend, dividend, divisor, lsr #1
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orrcs overdone, overdone, curbit, ror #1
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cmp dividend, divisor, lsr #2
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subcs dividend, dividend, divisor, lsr #2
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orrcs overdone, overdone, curbit, ror #2
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cmp dividend, divisor, lsr #3
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subcs dividend, dividend, divisor, lsr #3
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orrcs overdone, overdone, curbit, ror #3
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mov ip, curbit
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cmp dividend, #0 @ Early termination?
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movnes curbit, curbit, lsr #4 @ No, any more bits to do?
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movne divisor, divisor, lsr #4
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bne 3b
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@ Any subtractions that we should not have done will be recorded in
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@ the top three bits of "overdone". Exactly which were not needed
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@ are governed by the position of the bit, stored in ip.
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@ If we terminated early, because dividend became zero,
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@ then none of the below will match, since the bit in ip will not be
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@ in the bottom nibble.
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ands overdone, overdone, #0xe0000000
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RETc(eq) pc, lr @ No fixups needed
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tst overdone, ip, ror #3
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addne dividend, dividend, divisor, lsr #3
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tst overdone, ip, ror #2
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addne dividend, dividend, divisor, lsr #2
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tst overdone, ip, ror #1
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addne dividend, dividend, divisor, lsr #1
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RET pc, lr
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ENTRY(__divsi3)
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eor ip, dividend, divisor @ Save the sign of the result.
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mov curbit, #1
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mov result, #0
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cmp divisor, #0
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rsbmi divisor, divisor, #0 @ Loops below use unsigned.
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beq Ldiv0
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cmp dividend, #0
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rsbmi dividend, dividend, #0
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cmp dividend, divisor
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bcc Lgot_result_divsi3
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1:
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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cmp divisor, #0x10000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #4
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movcc curbit, curbit, lsl #4
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bcc 1b
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2:
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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cmp divisor, #0x80000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #1
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movcc curbit, curbit, lsl #1
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bcc 2b
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3:
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@ Test for possible subtractions, and note which bits
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@ are done in the result. On the final pass, this may subtract
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@ too much from the dividend, but the result will be ok, since the
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@ "bit" will have been shifted out at the bottom.
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cmp dividend, divisor
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subcs dividend, dividend, divisor
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orrcs result, result, curbit
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cmp dividend, divisor, lsr #1
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subcs dividend, dividend, divisor, lsr #1
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orrcs result, result, curbit, lsr #1
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cmp dividend, divisor, lsr #2
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subcs dividend, dividend, divisor, lsr #2
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orrcs result, result, curbit, lsr #2
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cmp dividend, divisor, lsr #3
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subcs dividend, dividend, divisor, lsr #3
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orrcs result, result, curbit, lsr #3
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cmp dividend, #0 @ Early termination?
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movnes curbit, curbit, lsr #4 @ No, any more bits to do?
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movne divisor, divisor, lsr #4
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bne 3b
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Lgot_result_divsi3:
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mov r0, result
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cmp ip, #0
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rsbmi r0, r0, #0
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RET pc, lr
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ENTRY(__modsi3)
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mov curbit, #1
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cmp divisor, #0
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rsbmi divisor, divisor, #0 @ Loops below use unsigned.
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beq Ldiv0
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@ Need to save the sign of the dividend, unfortunately, we need
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@ ip later on; this is faster than pushing lr and using that.
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| 254 |
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str dividend, [sp, #-4]!
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cmp dividend, #0
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rsbmi dividend, dividend, #0
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cmp dividend, divisor
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| 258 |
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bcc Lgot_result_modsi3
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| 259 |
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| 260 |
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1:
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| 261 |
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@ Unless the divisor is very big, shift it up in multiples of
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| 262 |
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@ four bits, since this is the amount of unwinding in the main
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| 263 |
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@ division loop. Continue shifting until the divisor is
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| 264 |
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@ larger than the dividend.
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| 265 |
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cmp divisor, #0x10000000
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| 266 |
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cmpcc divisor, dividend
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| 267 |
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movcc divisor, divisor, lsl #4
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| 268 |
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movcc curbit, curbit, lsl #4
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| 269 |
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bcc 1b
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| 270 |
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| 271 |
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2:
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| 272 |
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@ For very big divisors, we must shift it a bit at a time, or
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| 273 |
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@ we will be in danger of overflowing.
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| 274 |
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cmp divisor, #0x80000000
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| 275 |
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cmpcc divisor, dividend
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| 276 |
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movcc divisor, divisor, lsl #1
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| 277 |
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movcc curbit, curbit, lsl #1
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| 278 |
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bcc 2b
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| 279 |
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| 280 |
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3:
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| 281 |
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@ Test for possible subtractions. On the final pass, this may
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| 282 |
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@ subtract too much from the dividend, so keep track of which
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| 283 |
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@ subtractions are done, we can fix them up afterwards...
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| 284 |
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mov overdone, #0
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| 285 |
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cmp dividend, divisor
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| 286 |
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subcs dividend, dividend, divisor
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| 287 |
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cmp dividend, divisor, lsr #1
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| 288 |
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subcs dividend, dividend, divisor, lsr #1
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| 289 |
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orrcs overdone, overdone, curbit, ror #1
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| 290 |
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cmp dividend, divisor, lsr #2
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| 291 |
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subcs dividend, dividend, divisor, lsr #2
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| 292 |
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orrcs overdone, overdone, curbit, ror #2
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| 293 |
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cmp dividend, divisor, lsr #3
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| 294 |
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subcs dividend, dividend, divisor, lsr #3
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| 295 |
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orrcs overdone, overdone, curbit, ror #3
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| 296 |
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mov ip, curbit
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| 297 |
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cmp dividend, #0 @ Early termination?
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| 298 |
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movnes curbit, curbit, lsr #4 @ No, any more bits to do?
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| 299 |
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movne divisor, divisor, lsr #4
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| 300 |
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bne 3b
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| 301 |
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|
| 302 |
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@ Any subtractions that we should not have done will be recorded in
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| 303 |
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@ the top three bits of "overdone". Exactly which were not needed
|
| 304 |
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@ are governed by the position of the bit, stored in ip.
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| 305 |
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@ If we terminated early, because dividend became zero,
|
| 306 |
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@ then none of the below will match, since the bit in ip will not be
|
| 307 |
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@ in the bottom nibble.
|
| 308 |
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ands overdone, overdone, #0xe0000000
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| 309 |
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beq Lgot_result_modsi3
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| 310 |
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tst overdone, ip, ror #3
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| 311 |
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addne dividend, dividend, divisor, lsr #3
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| 312 |
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tst overdone, ip, ror #2
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| 313 |
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addne dividend, dividend, divisor, lsr #2
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| 314 |
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tst overdone, ip, ror #1
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| 315 |
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addne dividend, dividend, divisor, lsr #1
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| 316 |
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Lgot_result_modsi3:
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| 317 |
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ldr ip, [sp], #4
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| 318 |
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cmp ip, #0
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| 319 |
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rsbmi dividend, dividend, #0
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| 320 |
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RET pc, lr
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