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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [arch/] [ia64/] [kernel/] [entry.h] - Blame information for rev 1765

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1 1275 phoenix
#include <linux/config.h>
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/*
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 * Preserved registers that are shared between code in ivt.S and entry.S.  Be
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 * careful not to step on these!
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 */
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#define pLvSys          p1      /* set 1 if leave from syscall; otherwise, set 0*/
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#define pKern           p2      /* will leave_kernel return to kernel-mode? */
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#define pUser           p3      /* will leave_kernel return to user-mode? */
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#define pSys            p4      /* are we processing a (synchronous) system call? */
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#define pNonSys         p5      /* complement of pSys */
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#define PT(f)           (IA64_PT_REGS_##f##_OFFSET)
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#define SW(f)           (IA64_SWITCH_STACK_##f##_OFFSET)
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#define PT_REGS_SAVES(off)                      \
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        .unwabi 3, 'i';                         \
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        .fframe IA64_PT_REGS_SIZE+16+(off);     \
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        .spillsp rp, PT(CR_IIP)+16+(off);       \
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        .spillsp ar.pfs, PT(CR_IFS)+16+(off);   \
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        .spillsp ar.unat, PT(AR_UNAT)+16+(off); \
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        .spillsp ar.fpsr, PT(AR_FPSR)+16+(off); \
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        .spillsp pr, PT(PR)+16+(off);
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#define PT_REGS_UNWIND_INFO(off)                \
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        .prologue;                              \
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        PT_REGS_SAVES(off);                     \
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        .body
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#define SWITCH_STACK_SAVES(off)                                                 \
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        .savesp ar.unat,SW(CALLER_UNAT)+16+(off);                               \
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        .savesp ar.fpsr,SW(AR_FPSR)+16+(off);                                   \
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        .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off);               \
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        .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off);               \
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        .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off);           \
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        .spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off);           \
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        .spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off);           \
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        .spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off);           \
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        .spillsp f24,SW(F24)+16+(off); .spillsp f25,SW(F25)+16+(off);           \
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        .spillsp f26,SW(F26)+16+(off); .spillsp f27,SW(F27)+16+(off);           \
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        .spillsp f28,SW(F28)+16+(off); .spillsp f29,SW(F29)+16+(off);           \
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        .spillsp f30,SW(F30)+16+(off); .spillsp f31,SW(F31)+16+(off);           \
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        .spillsp r4,SW(R4)+16+(off); .spillsp r5,SW(R5)+16+(off);               \
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        .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off);               \
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        .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off);               \
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        .spillsp b2,SW(B2)+16+(off); .spillsp b3,SW(B3)+16+(off);               \
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        .spillsp b4,SW(B4)+16+(off); .spillsp b5,SW(B5)+16+(off);               \
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        .spillsp ar.pfs,SW(AR_PFS)+16+(off); .spillsp ar.lc,SW(AR_LC)+16+(off); \
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        .spillsp @priunat,SW(AR_UNAT)+16+(off);                                 \
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        .spillsp ar.rnat,SW(AR_RNAT)+16+(off);                                  \
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        .spillsp ar.bspstore,SW(AR_BSPSTORE)+16+(off);                          \
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        .spillsp pr,SW(PR)+16+(off))
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#define DO_SAVE_SWITCH_STACK                    \
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        movl r28=1f;                            \
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        ;;                                      \
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        .fframe IA64_SWITCH_STACK_SIZE;         \
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        adds sp=-IA64_SWITCH_STACK_SIZE,sp;     \
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        mov.ret.sptk b7=r28,1f;                 \
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        SWITCH_STACK_SAVES(0);                   \
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        br.cond.sptk.many save_switch_stack;    \
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1:
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#define DO_LOAD_SWITCH_STACK                    \
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        movl r28=1f;                            \
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        ;;                                      \
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        invala;                                 \
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        mov.ret.sptk b7=r28,1f;                 \
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        br.cond.sptk.many load_switch_stack;    \
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1:      .restore sp;                            \
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        adds sp=IA64_SWITCH_STACK_SIZE,sp

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