1 |
1275 |
phoenix |
/*
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2 |
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* Architecture-specific trap handling.
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3 |
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*
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4 |
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* Copyright (C) 1998-2002 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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7 |
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* 05/12/00 grao <goutham.rao@intel.com> : added isr in siginfo for SIGFPE
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8 |
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*/
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9 |
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10 |
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/*
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11 |
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* fp_emulate() needs to be able to access and update all floating point registers. Those
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12 |
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* saved in pt_regs can be accessed through that structure, but those not saved, will be
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* accessed directly. To make this work, we need to ensure that the compiler does not end
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14 |
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* up using a preserved floating point register on its own. The following achieves this
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* by declaring preserved registers that are not marked as "fixed" as global register
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16 |
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* variables.
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17 |
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*/
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18 |
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register double f2 asm ("f2"); register double f3 asm ("f3");
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19 |
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register double f4 asm ("f4"); register double f5 asm ("f5");
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20 |
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21 |
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register long f16 asm ("f16"); register long f17 asm ("f17");
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22 |
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register long f18 asm ("f18"); register long f19 asm ("f19");
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23 |
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register long f20 asm ("f20"); register long f21 asm ("f21");
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24 |
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register long f22 asm ("f22"); register long f23 asm ("f23");
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25 |
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26 |
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register double f24 asm ("f24"); register double f25 asm ("f25");
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27 |
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register double f26 asm ("f26"); register double f27 asm ("f27");
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28 |
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register double f28 asm ("f28"); register double f29 asm ("f29");
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29 |
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register double f30 asm ("f30"); register double f31 asm ("f31");
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30 |
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31 |
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#include <linux/config.h>
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32 |
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#include <linux/kernel.h>
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33 |
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#include <linux/init.h>
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34 |
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#include <linux/sched.h>
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35 |
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#include <linux/vt_kern.h> /* For unblank_screen() */
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36 |
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37 |
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#include <asm/hardirq.h>
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38 |
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#include <asm/ia32.h>
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39 |
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#include <asm/processor.h>
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40 |
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#include <asm/uaccess.h>
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41 |
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42 |
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#include <asm/fpswa.h>
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43 |
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44 |
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extern spinlock_t timerlist_lock;
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45 |
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46 |
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static fpswa_interface_t *fpswa_interface;
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47 |
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48 |
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void __init
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49 |
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trap_init (void)
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50 |
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{
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51 |
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if (ia64_boot_param->fpswa) {
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52 |
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/* FPSWA fixup: make the interface pointer a kernel virtual address: */
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53 |
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fpswa_interface = __va(ia64_boot_param->fpswa);
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54 |
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printk(KERN_INFO "FPSWA interface at 0x%lx, revision %d.%d\n",
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55 |
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ia64_boot_param->fpswa,
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56 |
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fpswa_interface->revision >> 16,
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57 |
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fpswa_interface->revision & 0xffff);
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58 |
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} else
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59 |
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printk(KERN_INFO "No FPSWA interface\n");
|
60 |
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}
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61 |
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|
62 |
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/*
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63 |
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* Unlock any spinlocks which will prevent us from getting the message out (timerlist_lock
|
64 |
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* is acquired through the console unblank code)
|
65 |
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*/
|
66 |
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void
|
67 |
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bust_spinlocks (int yes)
|
68 |
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{
|
69 |
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spin_lock_init(&timerlist_lock);
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70 |
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if (yes) {
|
71 |
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oops_in_progress = 1;
|
72 |
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#ifdef CONFIG_SMP
|
73 |
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global_irq_lock = 0; /* Many serial drivers do __global_cli() */
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74 |
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#endif
|
75 |
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} else {
|
76 |
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int loglevel_save = console_loglevel;
|
77 |
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#ifdef CONFIG_VT
|
78 |
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unblank_screen();
|
79 |
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#endif
|
80 |
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oops_in_progress = 0;
|
81 |
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/*
|
82 |
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* OK, the message is on the console. Now we call printk() without
|
83 |
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* oops_in_progress set so that printk will give klogd a poke. Hold onto
|
84 |
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* your hats...
|
85 |
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*/
|
86 |
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console_loglevel = 15; /* NMI oopser may have shut the console up */
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87 |
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printk(" ");
|
88 |
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console_loglevel = loglevel_save;
|
89 |
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}
|
90 |
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}
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91 |
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|
92 |
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void
|
93 |
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die (const char *str, struct pt_regs *regs, long err)
|
94 |
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{
|
95 |
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static struct {
|
96 |
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spinlock_t lock;
|
97 |
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int lock_owner;
|
98 |
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int lock_owner_depth;
|
99 |
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} die = {
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100 |
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.lock = SPIN_LOCK_UNLOCKED,
|
101 |
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.lock_owner = -1,
|
102 |
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.lock_owner_depth = 0
|
103 |
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};
|
104 |
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|
105 |
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if (die.lock_owner != smp_processor_id()) {
|
106 |
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console_verbose();
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107 |
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spin_lock_irq(&die.lock);
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108 |
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die.lock_owner = smp_processor_id();
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109 |
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die.lock_owner_depth = 0;
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110 |
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bust_spinlocks(1);
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111 |
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}
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112 |
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113 |
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if (++die.lock_owner_depth < 3) {
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114 |
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printk("%s[%d]: %s %ld\n", current->comm, current->pid, str, err);
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115 |
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show_regs(regs);
|
116 |
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} else
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117 |
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printk(KERN_ERR "Recursive die() failure, output suppressed\n");
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118 |
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119 |
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bust_spinlocks(0);
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120 |
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die.lock_owner = -1;
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121 |
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spin_unlock_irq(&die.lock);
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122 |
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do_exit(SIGSEGV);
|
123 |
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}
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124 |
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125 |
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void
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126 |
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die_if_kernel (char *str, struct pt_regs *regs, long err)
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127 |
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{
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128 |
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if (!user_mode(regs))
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129 |
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die(str, regs, err);
|
130 |
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}
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131 |
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132 |
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void
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133 |
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ia64_bad_break (unsigned long break_num, struct pt_regs *regs)
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134 |
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{
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135 |
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siginfo_t siginfo;
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136 |
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int sig, code;
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137 |
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138 |
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/* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */
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139 |
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siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
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140 |
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siginfo.si_imm = break_num;
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141 |
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siginfo.si_flags = 0; /* clear __ISR_VALID */
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142 |
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siginfo.si_isr = 0;
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143 |
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|
144 |
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switch (break_num) {
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145 |
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case 0: /* unknown error (used by GCC for __builtin_abort()) */
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146 |
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die_if_kernel("Bad break", regs, break_num);
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147 |
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sig = SIGILL; code = ILL_ILLOPC;
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148 |
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break;
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149 |
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150 |
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case 1: /* integer divide by zero */
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151 |
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sig = SIGFPE; code = FPE_INTDIV;
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152 |
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break;
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153 |
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154 |
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case 2: /* integer overflow */
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155 |
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sig = SIGFPE; code = FPE_INTOVF;
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156 |
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break;
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157 |
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158 |
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case 3: /* range check/bounds check */
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159 |
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sig = SIGFPE; code = FPE_FLTSUB;
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160 |
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break;
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161 |
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162 |
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case 4: /* null pointer dereference */
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163 |
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sig = SIGSEGV; code = SEGV_MAPERR;
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164 |
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break;
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165 |
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166 |
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case 5: /* misaligned data */
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167 |
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sig = SIGSEGV; code = BUS_ADRALN;
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168 |
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break;
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169 |
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170 |
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case 6: /* decimal overflow */
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171 |
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sig = SIGFPE; code = __FPE_DECOVF;
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172 |
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break;
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173 |
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174 |
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case 7: /* decimal divide by zero */
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175 |
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sig = SIGFPE; code = __FPE_DECDIV;
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176 |
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break;
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177 |
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178 |
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case 8: /* packed decimal error */
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179 |
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sig = SIGFPE; code = __FPE_DECERR;
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180 |
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break;
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181 |
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182 |
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case 9: /* invalid ASCII digit */
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183 |
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sig = SIGFPE; code = __FPE_INVASC;
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184 |
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break;
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185 |
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186 |
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case 10: /* invalid decimal digit */
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187 |
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sig = SIGFPE; code = __FPE_INVDEC;
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188 |
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break;
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189 |
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|
190 |
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case 11: /* paragraph stack overflow */
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191 |
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sig = SIGSEGV; code = __SEGV_PSTKOVF;
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192 |
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break;
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193 |
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|
194 |
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case 0x3f000 ... 0x3ffff: /* bundle-update in progress */
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195 |
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sig = SIGILL; code = __ILL_BNDMOD;
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196 |
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break;
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197 |
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198 |
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default:
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199 |
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if (break_num < 0x40000 || break_num > 0x100000)
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200 |
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die_if_kernel("Bad break", regs, break_num);
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201 |
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|
202 |
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if (break_num < 0x80000) {
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203 |
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sig = SIGILL; code = __ILL_BREAK;
|
204 |
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} else {
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205 |
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sig = SIGTRAP; code = TRAP_BRKPT;
|
206 |
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}
|
207 |
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}
|
208 |
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siginfo.si_signo = sig;
|
209 |
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siginfo.si_errno = 0;
|
210 |
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siginfo.si_code = code;
|
211 |
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force_sig_info(sig, &siginfo, current);
|
212 |
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}
|
213 |
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|
214 |
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/*
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215 |
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* Unimplemented system calls. This is called only for stuff that
|
216 |
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* we're supposed to implement but haven't done so yet. Everything
|
217 |
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* else goes to sys_ni_syscall.
|
218 |
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*/
|
219 |
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asmlinkage long
|
220 |
|
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ia64_ni_syscall (unsigned long arg0, unsigned long arg1, unsigned long arg2, unsigned long arg3,
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221 |
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unsigned long arg4, unsigned long arg5, unsigned long arg6, unsigned long arg7,
|
222 |
|
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unsigned long stack)
|
223 |
|
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{
|
224 |
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return -ENOSYS;
|
225 |
|
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}
|
226 |
|
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|
227 |
|
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/*
|
228 |
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* disabled_fph_fault() is called when a user-level process attempts to access f32..f127
|
229 |
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* and it doesn't own the fp-high register partition. When this happens, we save the
|
230 |
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* current fph partition in the task_struct of the fpu-owner (if necessary) and then load
|
231 |
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* the fp-high partition of the current task (if necessary). Note that the kernel has
|
232 |
|
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* access to fph by the time we get here, as the IVT's "Disabled FP-Register" handler takes
|
233 |
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* care of clearing psr.dfh.
|
234 |
|
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*/
|
235 |
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static inline void
|
236 |
|
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disabled_fph_fault (struct pt_regs *regs)
|
237 |
|
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{
|
238 |
|
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struct ia64_psr *psr = ia64_psr(regs);
|
239 |
|
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|
240 |
|
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/* first, grant user-level access to fph partition: */
|
241 |
|
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psr->dfh = 0;
|
242 |
|
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#ifndef CONFIG_SMP
|
243 |
|
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{
|
244 |
|
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struct task_struct *fpu_owner
|
245 |
|
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= (struct task_struct *)ia64_get_kr(IA64_KR_FPU_OWNER);
|
246 |
|
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|
247 |
|
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if (ia64_is_local_fpu_owner(current))
|
248 |
|
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return;
|
249 |
|
|
|
250 |
|
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if (fpu_owner)
|
251 |
|
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ia64_flush_fph(fpu_owner);
|
252 |
|
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}
|
253 |
|
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#endif /* !CONFIG_SMP */
|
254 |
|
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ia64_set_local_fpu_owner(current);
|
255 |
|
|
if ((current->thread.flags & IA64_THREAD_FPH_VALID) != 0) {
|
256 |
|
|
__ia64_load_fpu(current->thread.fph);
|
257 |
|
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psr->mfh = 0;
|
258 |
|
|
} else {
|
259 |
|
|
__ia64_init_fpu();
|
260 |
|
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/*
|
261 |
|
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* Set mfh because the state in thread.fph does not match the state in
|
262 |
|
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* the fph partition.
|
263 |
|
|
*/
|
264 |
|
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psr->mfh = 1;
|
265 |
|
|
}
|
266 |
|
|
}
|
267 |
|
|
|
268 |
|
|
static inline int
|
269 |
|
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fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs,
|
270 |
|
|
struct pt_regs *regs)
|
271 |
|
|
{
|
272 |
|
|
fp_state_t fp_state;
|
273 |
|
|
fpswa_ret_t ret;
|
274 |
|
|
|
275 |
|
|
if (!fpswa_interface)
|
276 |
|
|
return -1;
|
277 |
|
|
|
278 |
|
|
memset(&fp_state, 0, sizeof(fp_state_t));
|
279 |
|
|
|
280 |
|
|
/*
|
281 |
|
|
* compute fp_state. only FP registers f6 - f11 are used by the
|
282 |
|
|
* kernel, so set those bits in the mask and set the low volatile
|
283 |
|
|
* pointer to point to these registers.
|
284 |
|
|
*/
|
285 |
|
|
fp_state.bitmask_low64 = 0xfc0; /* bit6..bit11 */
|
286 |
|
|
|
287 |
|
|
fp_state.fp_state_low_volatile = (fp_state_low_volatile_t *) ®s->f6;
|
288 |
|
|
/*
|
289 |
|
|
* unsigned long (*EFI_FPSWA) (
|
290 |
|
|
* unsigned long trap_type,
|
291 |
|
|
* void *Bundle,
|
292 |
|
|
* unsigned long *pipsr,
|
293 |
|
|
* unsigned long *pfsr,
|
294 |
|
|
* unsigned long *pisr,
|
295 |
|
|
* unsigned long *ppreds,
|
296 |
|
|
* unsigned long *pifs,
|
297 |
|
|
* void *fp_state);
|
298 |
|
|
*/
|
299 |
|
|
ret = (*fpswa_interface->fpswa)((unsigned long) fp_fault, bundle,
|
300 |
|
|
(unsigned long *) ipsr, (unsigned long *) fpsr,
|
301 |
|
|
(unsigned long *) isr, (unsigned long *) pr,
|
302 |
|
|
(unsigned long *) ifs, &fp_state);
|
303 |
|
|
|
304 |
|
|
return ret.status;
|
305 |
|
|
}
|
306 |
|
|
|
307 |
|
|
/*
|
308 |
|
|
* Handle floating-point assist faults and traps.
|
309 |
|
|
*/
|
310 |
|
|
static int
|
311 |
|
|
handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr)
|
312 |
|
|
{
|
313 |
|
|
long exception, bundle[2];
|
314 |
|
|
unsigned long fault_ip;
|
315 |
|
|
struct siginfo siginfo;
|
316 |
|
|
static int fpu_swa_count = 0;
|
317 |
|
|
static unsigned long last_time;
|
318 |
|
|
|
319 |
|
|
fault_ip = regs->cr_iip;
|
320 |
|
|
if (!fp_fault && (ia64_psr(regs)->ri == 0))
|
321 |
|
|
fault_ip -= 16;
|
322 |
|
|
if (copy_from_user(bundle, (void *) fault_ip, sizeof(bundle)))
|
323 |
|
|
return -1;
|
324 |
|
|
|
325 |
|
|
if (jiffies - last_time > 5*HZ)
|
326 |
|
|
fpu_swa_count = 0;
|
327 |
|
|
if ((fpu_swa_count < 4) && !(current->thread.flags & IA64_THREAD_FPEMU_NOPRINT)) {
|
328 |
|
|
last_time = jiffies;
|
329 |
|
|
++fpu_swa_count;
|
330 |
|
|
printk(KERN_WARNING "%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n",
|
331 |
|
|
current->comm, current->pid, regs->cr_iip + ia64_psr(regs)->ri, isr);
|
332 |
|
|
}
|
333 |
|
|
|
334 |
|
|
exception = fp_emulate(fp_fault, bundle, ®s->cr_ipsr, ®s->ar_fpsr, &isr, ®s->pr,
|
335 |
|
|
®s->cr_ifs, regs);
|
336 |
|
|
if (fp_fault) {
|
337 |
|
|
if (exception == 0) {
|
338 |
|
|
/* emulation was successful */
|
339 |
|
|
ia64_increment_ip(regs);
|
340 |
|
|
} else if (exception == -1) {
|
341 |
|
|
printk(KERN_ERR "handle_fpu_swa: fp_emulate() returned -1\n");
|
342 |
|
|
return -1;
|
343 |
|
|
} else {
|
344 |
|
|
/* is next instruction a trap? */
|
345 |
|
|
if (exception & 2) {
|
346 |
|
|
ia64_increment_ip(regs);
|
347 |
|
|
}
|
348 |
|
|
siginfo.si_signo = SIGFPE;
|
349 |
|
|
siginfo.si_errno = 0;
|
350 |
|
|
siginfo.si_code = __SI_FAULT; /* default code */
|
351 |
|
|
siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
|
352 |
|
|
if (isr & 0x11) {
|
353 |
|
|
siginfo.si_code = FPE_FLTINV;
|
354 |
|
|
} else if (isr & 0x22) {
|
355 |
|
|
/* denormal operand gets the same si_code as underflow
|
356 |
|
|
* see arch/i386/kernel/traps.c:math_error() */
|
357 |
|
|
siginfo.si_code = FPE_FLTUND;
|
358 |
|
|
} else if (isr & 0x44) {
|
359 |
|
|
siginfo.si_code = FPE_FLTDIV;
|
360 |
|
|
}
|
361 |
|
|
siginfo.si_isr = isr;
|
362 |
|
|
siginfo.si_flags = __ISR_VALID;
|
363 |
|
|
siginfo.si_imm = 0;
|
364 |
|
|
force_sig_info(SIGFPE, &siginfo, current);
|
365 |
|
|
}
|
366 |
|
|
} else {
|
367 |
|
|
if (exception == -1) {
|
368 |
|
|
printk(KERN_ERR "handle_fpu_swa: fp_emulate() returned -1\n");
|
369 |
|
|
return -1;
|
370 |
|
|
} else if (exception != 0) {
|
371 |
|
|
/* raise exception */
|
372 |
|
|
siginfo.si_signo = SIGFPE;
|
373 |
|
|
siginfo.si_errno = 0;
|
374 |
|
|
siginfo.si_code = __SI_FAULT; /* default code */
|
375 |
|
|
siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
|
376 |
|
|
if (isr & 0x880) {
|
377 |
|
|
siginfo.si_code = FPE_FLTOVF;
|
378 |
|
|
} else if (isr & 0x1100) {
|
379 |
|
|
siginfo.si_code = FPE_FLTUND;
|
380 |
|
|
} else if (isr & 0x2200) {
|
381 |
|
|
siginfo.si_code = FPE_FLTRES;
|
382 |
|
|
}
|
383 |
|
|
siginfo.si_isr = isr;
|
384 |
|
|
siginfo.si_flags = __ISR_VALID;
|
385 |
|
|
siginfo.si_imm = 0;
|
386 |
|
|
force_sig_info(SIGFPE, &siginfo, current);
|
387 |
|
|
}
|
388 |
|
|
}
|
389 |
|
|
return 0;
|
390 |
|
|
}
|
391 |
|
|
|
392 |
|
|
struct illegal_op_return {
|
393 |
|
|
unsigned long fkt, arg1, arg2, arg3;
|
394 |
|
|
};
|
395 |
|
|
|
396 |
|
|
struct illegal_op_return
|
397 |
|
|
ia64_illegal_op_fault (unsigned long ec, unsigned long arg1, unsigned long arg2,
|
398 |
|
|
unsigned long arg3, unsigned long arg4, unsigned long arg5,
|
399 |
|
|
unsigned long arg6, unsigned long arg7, unsigned long stack)
|
400 |
|
|
{
|
401 |
|
|
struct pt_regs *regs = (struct pt_regs *) &stack;
|
402 |
|
|
struct illegal_op_return rv;
|
403 |
|
|
struct siginfo si;
|
404 |
|
|
char buf[128];
|
405 |
|
|
|
406 |
|
|
#ifdef CONFIG_IA64_BRL_EMU
|
407 |
|
|
{
|
408 |
|
|
extern struct illegal_op_return ia64_emulate_brl (struct pt_regs *, unsigned long);
|
409 |
|
|
|
410 |
|
|
rv = ia64_emulate_brl(regs, ec);
|
411 |
|
|
if (rv.fkt != (unsigned long) -1)
|
412 |
|
|
return rv;
|
413 |
|
|
}
|
414 |
|
|
#endif
|
415 |
|
|
|
416 |
|
|
sprintf(buf, "IA-64 Illegal operation fault");
|
417 |
|
|
die_if_kernel(buf, regs, 0);
|
418 |
|
|
|
419 |
|
|
memset(&si, 0, sizeof(si));
|
420 |
|
|
si.si_signo = SIGILL;
|
421 |
|
|
si.si_code = ILL_ILLOPC;
|
422 |
|
|
si.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
|
423 |
|
|
force_sig_info(SIGILL, &si, current);
|
424 |
|
|
rv.fkt = 0;
|
425 |
|
|
return rv;
|
426 |
|
|
}
|
427 |
|
|
|
428 |
|
|
void
|
429 |
|
|
ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,
|
430 |
|
|
unsigned long iim, unsigned long itir, unsigned long arg5,
|
431 |
|
|
unsigned long arg6, unsigned long arg7, unsigned long stack)
|
432 |
|
|
{
|
433 |
|
|
struct pt_regs *regs = (struct pt_regs *) &stack;
|
434 |
|
|
unsigned long code, error = isr;
|
435 |
|
|
struct siginfo siginfo;
|
436 |
|
|
char buf[128];
|
437 |
|
|
int result, sig;
|
438 |
|
|
static const char *reason[] = {
|
439 |
|
|
"IA-64 Illegal Operation fault",
|
440 |
|
|
"IA-64 Privileged Operation fault",
|
441 |
|
|
"IA-64 Privileged Register fault",
|
442 |
|
|
"IA-64 Reserved Register/Field fault",
|
443 |
|
|
"Disabled Instruction Set Transition fault",
|
444 |
|
|
"Unknown fault 5", "Unknown fault 6", "Unknown fault 7", "Illegal Hazard fault",
|
445 |
|
|
"Unknown fault 9", "Unknown fault 10", "Unknown fault 11", "Unknown fault 12",
|
446 |
|
|
"Unknown fault 13", "Unknown fault 14", "Unknown fault 15"
|
447 |
|
|
};
|
448 |
|
|
|
449 |
|
|
if ((isr & IA64_ISR_NA) && ((isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) {
|
450 |
|
|
/*
|
451 |
|
|
* This fault was due to lfetch.fault, set "ed" bit in the psr to cancel
|
452 |
|
|
* the lfetch.
|
453 |
|
|
*/
|
454 |
|
|
ia64_psr(regs)->ed = 1;
|
455 |
|
|
return;
|
456 |
|
|
}
|
457 |
|
|
|
458 |
|
|
switch (vector) {
|
459 |
|
|
case 24: /* General Exception */
|
460 |
|
|
code = (isr >> 4) & 0xf;
|
461 |
|
|
sprintf(buf, "General Exception: %s%s", reason[code],
|
462 |
|
|
(code == 3) ? ((isr & (1UL << 37))
|
463 |
|
|
? " (RSE access)" : " (data access)") : "");
|
464 |
|
|
if (code == 8) {
|
465 |
|
|
# ifdef CONFIG_IA64_PRINT_HAZARDS
|
466 |
|
|
printk("%s[%d]: possible hazard @ ip=%016lx (pr = %016lx)\n",
|
467 |
|
|
current->comm, current->pid, regs->cr_iip + ia64_psr(regs)->ri,
|
468 |
|
|
regs->pr);
|
469 |
|
|
# endif
|
470 |
|
|
return;
|
471 |
|
|
}
|
472 |
|
|
break;
|
473 |
|
|
|
474 |
|
|
case 25: /* Disabled FP-Register */
|
475 |
|
|
if (isr & 2) {
|
476 |
|
|
disabled_fph_fault(regs);
|
477 |
|
|
return;
|
478 |
|
|
}
|
479 |
|
|
sprintf(buf, "Disabled FPL fault---not supposed to happen!");
|
480 |
|
|
break;
|
481 |
|
|
|
482 |
|
|
case 26: /* NaT Consumption */
|
483 |
|
|
if (user_mode(regs)) {
|
484 |
|
|
void *addr;
|
485 |
|
|
|
486 |
|
|
if (((isr >> 4) & 0xf) == 2) {
|
487 |
|
|
/* NaT page consumption */
|
488 |
|
|
sig = SIGSEGV;
|
489 |
|
|
code = SEGV_ACCERR;
|
490 |
|
|
addr = (void *) ifa;
|
491 |
|
|
} else {
|
492 |
|
|
/* register NaT consumption */
|
493 |
|
|
sig = SIGILL;
|
494 |
|
|
code = ILL_ILLOPN;
|
495 |
|
|
addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
|
496 |
|
|
}
|
497 |
|
|
siginfo.si_signo = sig;
|
498 |
|
|
siginfo.si_code = code;
|
499 |
|
|
siginfo.si_errno = 0;
|
500 |
|
|
siginfo.si_addr = addr;
|
501 |
|
|
siginfo.si_imm = vector;
|
502 |
|
|
siginfo.si_flags = __ISR_VALID;
|
503 |
|
|
siginfo.si_isr = isr;
|
504 |
|
|
force_sig_info(sig, &siginfo, current);
|
505 |
|
|
return;
|
506 |
|
|
} else if (done_with_exception(regs))
|
507 |
|
|
return;
|
508 |
|
|
sprintf(buf, "NaT consumption");
|
509 |
|
|
break;
|
510 |
|
|
|
511 |
|
|
case 31: /* Unsupported Data Reference */
|
512 |
|
|
if (user_mode(regs)) {
|
513 |
|
|
siginfo.si_signo = SIGILL;
|
514 |
|
|
siginfo.si_code = ILL_ILLOPN;
|
515 |
|
|
siginfo.si_errno = 0;
|
516 |
|
|
siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
|
517 |
|
|
siginfo.si_imm = vector;
|
518 |
|
|
siginfo.si_flags = __ISR_VALID;
|
519 |
|
|
siginfo.si_isr = isr;
|
520 |
|
|
force_sig_info(SIGILL, &siginfo, current);
|
521 |
|
|
return;
|
522 |
|
|
}
|
523 |
|
|
sprintf(buf, "Unsupported data reference");
|
524 |
|
|
break;
|
525 |
|
|
|
526 |
|
|
case 29: /* Debug */
|
527 |
|
|
case 35: /* Taken Branch Trap */
|
528 |
|
|
case 36: /* Single Step Trap */
|
529 |
|
|
switch (vector) {
|
530 |
|
|
case 29:
|
531 |
|
|
siginfo.si_code = TRAP_HWBKPT;
|
532 |
|
|
#ifdef CONFIG_ITANIUM
|
533 |
|
|
/*
|
534 |
|
|
* Erratum 10 (IFA may contain incorrect address) now has
|
535 |
|
|
* "NoFix" status. There are no plans for fixing this.
|
536 |
|
|
*/
|
537 |
|
|
if (ia64_psr(regs)->is == 0)
|
538 |
|
|
ifa = regs->cr_iip;
|
539 |
|
|
#endif
|
540 |
|
|
break;
|
541 |
|
|
case 35: siginfo.si_code = TRAP_BRANCH; ifa = 0; break;
|
542 |
|
|
case 36: siginfo.si_code = TRAP_TRACE; ifa = 0; break;
|
543 |
|
|
}
|
544 |
|
|
siginfo.si_signo = SIGTRAP;
|
545 |
|
|
siginfo.si_errno = 0;
|
546 |
|
|
siginfo.si_flags = 0;
|
547 |
|
|
siginfo.si_isr = 0;
|
548 |
|
|
siginfo.si_addr = (void *) ifa;
|
549 |
|
|
siginfo.si_imm = 0;
|
550 |
|
|
force_sig_info(SIGTRAP, &siginfo, current);
|
551 |
|
|
return;
|
552 |
|
|
|
553 |
|
|
case 32: /* fp fault */
|
554 |
|
|
case 33: /* fp trap */
|
555 |
|
|
result = handle_fpu_swa((vector == 32) ? 1 : 0, regs, isr);
|
556 |
|
|
if ((result < 0) || (current->thread.flags & IA64_THREAD_FPEMU_SIGFPE)) {
|
557 |
|
|
siginfo.si_signo = SIGFPE;
|
558 |
|
|
siginfo.si_errno = 0;
|
559 |
|
|
siginfo.si_code = FPE_FLTINV;
|
560 |
|
|
siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
|
561 |
|
|
siginfo.si_flags = __ISR_VALID;
|
562 |
|
|
siginfo.si_isr = isr;
|
563 |
|
|
siginfo.si_imm = 0;
|
564 |
|
|
force_sig_info(SIGFPE, &siginfo, current);
|
565 |
|
|
}
|
566 |
|
|
return;
|
567 |
|
|
|
568 |
|
|
case 34: /* Unimplemented Instruction Address Trap */
|
569 |
|
|
if (user_mode(regs)) {
|
570 |
|
|
siginfo.si_signo = SIGILL;
|
571 |
|
|
siginfo.si_code = ILL_BADIADDR;
|
572 |
|
|
siginfo.si_errno = 0;
|
573 |
|
|
siginfo.si_flags = 0;
|
574 |
|
|
siginfo.si_isr = 0;
|
575 |
|
|
siginfo.si_imm = 0;
|
576 |
|
|
siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
|
577 |
|
|
force_sig_info(SIGILL, &siginfo, current);
|
578 |
|
|
return;
|
579 |
|
|
}
|
580 |
|
|
sprintf(buf, "Unimplemented Instruction Address fault");
|
581 |
|
|
break;
|
582 |
|
|
|
583 |
|
|
case 45:
|
584 |
|
|
#ifdef CONFIG_IA32_SUPPORT
|
585 |
|
|
if (ia32_exception(regs, isr) == 0)
|
586 |
|
|
return;
|
587 |
|
|
#endif
|
588 |
|
|
printk(KERN_ERR "Unexpected IA-32 exception (Trap 45)\n");
|
589 |
|
|
printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n",
|
590 |
|
|
regs->cr_iip, ifa, isr);
|
591 |
|
|
force_sig(SIGSEGV, current);
|
592 |
|
|
break;
|
593 |
|
|
|
594 |
|
|
case 46:
|
595 |
|
|
#ifdef CONFIG_IA32_SUPPORT
|
596 |
|
|
if (ia32_intercept(regs, isr) == 0)
|
597 |
|
|
return;
|
598 |
|
|
#endif
|
599 |
|
|
printk(KERN_ERR "Unexpected IA-32 intercept trap (Trap 46)\n");
|
600 |
|
|
printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim - 0x%lx\n",
|
601 |
|
|
regs->cr_iip, ifa, isr, iim);
|
602 |
|
|
force_sig(SIGSEGV, current);
|
603 |
|
|
return;
|
604 |
|
|
|
605 |
|
|
case 47:
|
606 |
|
|
sprintf(buf, "IA-32 Interruption Fault (int 0x%lx)", isr >> 16);
|
607 |
|
|
break;
|
608 |
|
|
|
609 |
|
|
default:
|
610 |
|
|
sprintf(buf, "Fault %lu", vector);
|
611 |
|
|
break;
|
612 |
|
|
}
|
613 |
|
|
die_if_kernel(buf, regs, error);
|
614 |
|
|
force_sig(SIGILL, current);
|
615 |
|
|
}
|