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1275 |
phoenix |
/*
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*
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*
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* Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it would be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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* Further, this software is distributed without any warranty that it is
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* free of the rightful claim of any third person regarding infringement
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* or the like. Any license provided herein, whether implied or
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* otherwise, applies only to this software file. Patent licenses, if
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* any, provided herein do not apply to combinations of this program with
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* other software, or any other product whatsoever.
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*
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* You should have received a copy of the GNU General Public
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* License along with this program; if not, write the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
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* Mountain View, CA 94043, or:
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*
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* http://www.sgi.com
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*
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* For further information regarding this notice, see:
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*
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* http://oss.sgi.com/projects/GenInfo/NoticeExplan
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*/
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#include <linux/config.h>
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#include <asm/sn/nodepda.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/arch.h>
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#include <asm/sn/sn_cpuid.h>
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#include <asm/sn/pda.h>
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#include <asm/sn/sn2/shubio.h>
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#include <asm/nodedata.h>
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#include <linux/bootmem.h>
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#include <linux/string.h>
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#include <linux/sched.h>
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#include <asm/sn/bte.h>
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/*
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* The base address of for each set of bte registers.
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*/
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static int bte_offsets[] = { IIO_IBLS0, IIO_IBLS1 };
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/************************************************************************
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* Block Transfer Engine copy related functions.
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*
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***********************************************************************/
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/*
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* bte_copy(src, dest, len, mode, notification)
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*
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* Use the block transfer engine to move kernel memory from src to dest
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* using the assigned mode.
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*
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* Paramaters:
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* src - physical address of the transfer source.
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* dest - physical address of the transfer destination.
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* len - number of bytes to transfer from source to dest.
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* mode - hardware defined. See reference information
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* for IBCT0/1 in the SHUB Programmers Reference
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* notification - kernel virtual address of the notification cache
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* line. If NULL, the default is used and
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* the bte_copy is synchronous.
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*
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* NOTE: This function requires src, dest, and len to
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* be cacheline aligned.
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*/
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bte_result_t
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bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
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{
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int bte_to_use;
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u64 transfer_size;
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struct bteinfo_s *bte;
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bte_result_t bte_status;
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unsigned long irq_flags;
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BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n",
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src, dest, len, mode, notification));
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if (len == 0) {
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return BTE_SUCCESS;
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}
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ASSERT(!((len & L1_CACHE_MASK) ||
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(src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK)));
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ASSERT(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT));
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do {
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local_irq_save(irq_flags);
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bte_to_use = 0;
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/* Attempt to lock one of the BTE interfaces. */
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while ((bte_to_use < BTES_PER_NODE) &&
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BTE_LOCK_IF_AVAIL(bte_to_use)) {
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bte_to_use++;
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}
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if (bte_to_use < BTES_PER_NODE) {
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break;
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}
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local_irq_restore(irq_flags);
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if (!(mode & BTE_WACQUIRE)) {
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return BTEFAIL_NOTAVAIL;
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}
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/* Wait until a bte is available. */
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udelay(10);
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} while (1);
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bte = pda.cpu_bte_if[bte_to_use];
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BTE_PRINTKV(("Got a lock on bte %d\n", bte_to_use));
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if (notification == NULL) {
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/* User does not want to be notified. */
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bte->most_rcnt_na = &bte->notify;
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} else {
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bte->most_rcnt_na = notification;
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}
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/* Calculate the number of cache lines to transfer. */
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transfer_size = ((len >> L1_CACHE_SHIFT) & BTE_LEN_MASK);
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/* Initialize the notification to a known value. */
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*bte->most_rcnt_na = -1L;
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/* Set the status reg busy bit and transfer length */
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BTE_PRINTKV(("IBLS - HUB_S(0x%p, 0x%lx)\n",
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BTEREG_LNSTAT_ADDR, IBLS_BUSY | transfer_size));
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HUB_S(BTEREG_LNSTAT_ADDR, (IBLS_BUSY | transfer_size));
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/* Set the source and destination registers */
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BTE_PRINTKV(("IBSA - HUB_S(0x%p, 0x%lx)\n", BTEREG_SRC_ADDR,
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(TO_PHYS(src))));
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HUB_S(BTEREG_SRC_ADDR, (TO_PHYS(src)));
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BTE_PRINTKV(("IBDA - HUB_S(0x%p, 0x%lx)\n", BTEREG_DEST_ADDR,
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(TO_PHYS(dest))));
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HUB_S(BTEREG_DEST_ADDR, (TO_PHYS(dest)));
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/* Set the notification register */
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BTE_PRINTKV(("IBNA - HUB_S(0x%p, 0x%lx)\n", BTEREG_NOTIF_ADDR,
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(TO_PHYS(ia64_tpa(bte->most_rcnt_na)))));
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HUB_S(BTEREG_NOTIF_ADDR, (TO_PHYS(ia64_tpa(bte->most_rcnt_na))));
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/* Initiate the transfer */
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BTE_PRINTK(("IBCT - HUB_S(0x%p, 0x%lx)\n", BTEREG_CTRL_ADDR,
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BTE_VALID_MODE(mode)));
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HUB_S(BTEREG_CTRL_ADDR, BTE_VALID_MODE(mode));
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spin_unlock_irqrestore(&bte->spinlock, irq_flags);
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if (notification != NULL) {
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return BTE_SUCCESS;
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}
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while (*bte->most_rcnt_na == -1UL) {
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}
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BTE_PRINTKV((" Delay Done. IBLS = 0x%lx, most_rcnt_na = 0x%lx\n",
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HUB_L(BTEREG_LNSTAT_ADDR), *bte->most_rcnt_na));
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if (*bte->most_rcnt_na & IBLS_ERROR) {
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bte_status = *bte->most_rcnt_na & ~IBLS_ERROR;
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*bte->most_rcnt_na = 0L;
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} else {
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bte_status = BTE_SUCCESS;
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}
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BTE_PRINTK(("Returning status is 0x%lx and most_rcnt_na is 0x%lx\n",
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HUB_L(BTEREG_LNSTAT_ADDR), *bte->most_rcnt_na));
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return bte_status;
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}
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/*
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* bte_unaligned_copy(src, dest, len, mode)
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*
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* use the block transfer engine to move kernel
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* memory from src to dest using the assigned mode.
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*
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* Paramaters:
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* src - physical address of the transfer source.
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* dest - physical address of the transfer destination.
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* len - number of bytes to transfer from source to dest.
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* mode - hardware defined. See reference information
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* for IBCT0/1 in the SGI documentation.
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*
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* NOTE: If the source, dest, and len are all cache line aligned,
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* then it would be _FAR_ preferrable to use bte_copy instead.
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*/
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bte_result_t
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bte_unaligned_copy(u64 src, u64 dest, u64 len, u64 mode)
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{
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int destFirstCacheOffset;
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u64 headBteSource;
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u64 headBteLen;
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u64 headBcopySrcOffset;
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u64 headBcopyDest;
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u64 headBcopyLen;
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u64 footBteSource;
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u64 footBteLen;
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u64 footBcopyDest;
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u64 footBcopyLen;
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bte_result_t rv;
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char *bteBlock;
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if (len == 0) {
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return BTE_SUCCESS;
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}
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/* temporary buffer used during unaligned transfers */
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bteBlock = pda.cpu_bte_if[0]->scratch_buf;
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headBcopySrcOffset = src & L1_CACHE_MASK;
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destFirstCacheOffset = dest & L1_CACHE_MASK;
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/*
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* At this point, the transfer is broken into
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* (up to) three sections. The first section is
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* from the start address to the first physical
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* cache line, the second is from the first physical
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* cache line to the last complete cache line,
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* and the third is from the last cache line to the
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* end of the buffer. The first and third sections
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* are handled by bte copying into a temporary buffer
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* and then bcopy'ing the necessary section into the
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* final location. The middle section is handled with
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* a standard bte copy.
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*
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* One nasty exception to the above rule is when the
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* source and destination are not symetrically
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* mis-aligned. If the source offset from the first
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* cache line is different from the destination offset,
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* we make the first section be the entire transfer
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* and the bcopy the entire block into place.
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*/
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if (headBcopySrcOffset == destFirstCacheOffset) {
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/*
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* Both the source and destination are the same
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* distance from a cache line boundary so we can
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* use the bte to transfer the bulk of the
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* data.
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*/
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headBteSource = src & ~L1_CACHE_MASK;
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headBcopyDest = dest;
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if (headBcopySrcOffset) {
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headBcopyLen =
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(len >
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(L1_CACHE_BYTES -
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headBcopySrcOffset) ? L1_CACHE_BYTES
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- headBcopySrcOffset : len);
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headBteLen = L1_CACHE_BYTES;
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| 274 |
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} else {
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| 275 |
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headBcopyLen = 0;
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| 276 |
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headBteLen = 0;
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| 277 |
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}
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| 278 |
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| 279 |
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if (len > headBcopyLen) {
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| 280 |
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footBcopyLen =
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(len - headBcopyLen) & L1_CACHE_MASK;
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| 282 |
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footBteLen = L1_CACHE_BYTES;
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| 283 |
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footBteSource = src + len - footBcopyLen;
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footBcopyDest = dest + len - footBcopyLen;
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| 286 |
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| 287 |
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if (footBcopyDest ==
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| 288 |
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(headBcopyDest + headBcopyLen)) {
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| 289 |
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/*
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| 290 |
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* We have two contigous bcopy
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| 291 |
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* blocks. Merge them.
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| 292 |
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*/
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| 293 |
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headBcopyLen += footBcopyLen;
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headBteLen += footBteLen;
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| 295 |
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} else if (footBcopyLen > 0) {
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| 296 |
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rv = bte_copy(footBteSource,
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| 297 |
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ia64_tpa(bteBlock),
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| 298 |
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footBteLen, mode, NULL);
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| 299 |
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if (rv != BTE_SUCCESS) {
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| 300 |
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return rv;
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| 301 |
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}
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| 302 |
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| 303 |
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| 304 |
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memcpy(__va(footBcopyDest),
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| 305 |
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(char *) bteBlock, footBcopyLen);
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| 306 |
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}
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| 307 |
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} else {
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| 308 |
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footBcopyLen = 0;
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| 309 |
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footBteLen = 0;
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| 310 |
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}
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| 311 |
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| 312 |
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if (len > (headBcopyLen + footBcopyLen)) {
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| 313 |
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/* now transfer the middle. */
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| 314 |
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rv = bte_copy((src + headBcopyLen),
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| 315 |
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(dest +
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| 316 |
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headBcopyLen),
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| 317 |
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(len - headBcopyLen -
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| 318 |
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footBcopyLen), mode, NULL);
|
| 319 |
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if (rv != BTE_SUCCESS) {
|
| 320 |
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return rv;
|
| 321 |
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}
|
| 322 |
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| 323 |
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}
|
| 324 |
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} else {
|
| 325 |
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|
| 326 |
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|
| 327 |
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/*
|
| 328 |
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* The transfer is not symetric, we will
|
| 329 |
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* allocate a buffer large enough for all the
|
| 330 |
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* data, bte_copy into that buffer and then
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| 331 |
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* bcopy to the destination.
|
| 332 |
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*/
|
| 333 |
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|
| 334 |
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/* Add the leader from source */
|
| 335 |
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headBteLen = len + (src & L1_CACHE_MASK);
|
| 336 |
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/* Add the trailing bytes from footer. */
|
| 337 |
|
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headBteLen +=
|
| 338 |
|
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L1_CACHE_BYTES - (headBteLen & L1_CACHE_MASK);
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| 339 |
|
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headBteSource = src & ~L1_CACHE_MASK;
|
| 340 |
|
|
headBcopySrcOffset = src & L1_CACHE_MASK;
|
| 341 |
|
|
headBcopyDest = dest;
|
| 342 |
|
|
headBcopyLen = len;
|
| 343 |
|
|
}
|
| 344 |
|
|
|
| 345 |
|
|
if (headBcopyLen > 0) {
|
| 346 |
|
|
rv = bte_copy(headBteSource,
|
| 347 |
|
|
ia64_tpa(bteBlock), headBteLen, mode, NULL);
|
| 348 |
|
|
if (rv != BTE_SUCCESS) {
|
| 349 |
|
|
return rv;
|
| 350 |
|
|
}
|
| 351 |
|
|
|
| 352 |
|
|
memcpy(__va(headBcopyDest), ((char *) bteBlock +
|
| 353 |
|
|
headBcopySrcOffset),
|
| 354 |
|
|
headBcopyLen);
|
| 355 |
|
|
}
|
| 356 |
|
|
return BTE_SUCCESS;
|
| 357 |
|
|
}
|
| 358 |
|
|
|
| 359 |
|
|
|
| 360 |
|
|
/************************************************************************
|
| 361 |
|
|
* Block Transfer Engine initialization functions.
|
| 362 |
|
|
*
|
| 363 |
|
|
***********************************************************************/
|
| 364 |
|
|
|
| 365 |
|
|
|
| 366 |
|
|
/*
|
| 367 |
|
|
* bte_init_node(nodepda, cnode)
|
| 368 |
|
|
*
|
| 369 |
|
|
* Initialize the nodepda structure with BTE base addresses and
|
| 370 |
|
|
* spinlocks.
|
| 371 |
|
|
*/
|
| 372 |
|
|
void
|
| 373 |
|
|
bte_init_node(nodepda_t * mynodepda, cnodeid_t cnode)
|
| 374 |
|
|
{
|
| 375 |
|
|
int i;
|
| 376 |
|
|
|
| 377 |
|
|
|
| 378 |
|
|
/*
|
| 379 |
|
|
* Indicate that all the block transfer engines on this node
|
| 380 |
|
|
* are available.
|
| 381 |
|
|
*/
|
| 382 |
|
|
|
| 383 |
|
|
/*
|
| 384 |
|
|
* Allocate one bte_recover_t structure per node. It holds
|
| 385 |
|
|
* the recovery lock for node. All the bte interface structures
|
| 386 |
|
|
* will point at this one bte_recover structure to get the lock.
|
| 387 |
|
|
*/
|
| 388 |
|
|
spin_lock_init(&mynodepda->bte_recovery_lock);
|
| 389 |
|
|
init_timer(&mynodepda->bte_recovery_timer);
|
| 390 |
|
|
mynodepda->bte_recovery_timer.function = bte_error_handler;
|
| 391 |
|
|
mynodepda->bte_recovery_timer.data = (unsigned long) mynodepda;
|
| 392 |
|
|
|
| 393 |
|
|
for (i = 0; i < BTES_PER_NODE; i++) {
|
| 394 |
|
|
/* >>> Don't know why the 0x1800000L is here. Robin */
|
| 395 |
|
|
mynodepda->bte_if[i].bte_base_addr =
|
| 396 |
|
|
(char *) LOCAL_MMR_ADDR(bte_offsets[i] | 0x1800000L);
|
| 397 |
|
|
|
| 398 |
|
|
/*
|
| 399 |
|
|
* Initialize the notification and spinlock
|
| 400 |
|
|
* so the first transfer can occur.
|
| 401 |
|
|
*/
|
| 402 |
|
|
mynodepda->bte_if[i].most_rcnt_na =
|
| 403 |
|
|
&(mynodepda->bte_if[i].notify);
|
| 404 |
|
|
mynodepda->bte_if[i].notify = 0L;
|
| 405 |
|
|
spin_lock_init(&mynodepda->bte_if[i].spinlock);
|
| 406 |
|
|
|
| 407 |
|
|
mynodepda->bte_if[i].scratch_buf =
|
| 408 |
|
|
alloc_bootmem_node(NODE_DATA(cnode), BTE_MAX_XFER);
|
| 409 |
|
|
mynodepda->bte_if[i].bte_cnode = cnode;
|
| 410 |
|
|
mynodepda->bte_if[i].bte_error_count = 0;
|
| 411 |
|
|
mynodepda->bte_if[i].bte_num = i;
|
| 412 |
|
|
mynodepda->bte_if[i].cleanup_active = 0;
|
| 413 |
|
|
mynodepda->bte_if[i].bh_error = 0;
|
| 414 |
|
|
}
|
| 415 |
|
|
|
| 416 |
|
|
}
|
| 417 |
|
|
|
| 418 |
|
|
/*
|
| 419 |
|
|
* bte_init_cpu()
|
| 420 |
|
|
*
|
| 421 |
|
|
* Initialize the cpupda structure with pointers to the
|
| 422 |
|
|
* nodepda bte blocks.
|
| 423 |
|
|
*
|
| 424 |
|
|
*/
|
| 425 |
|
|
void
|
| 426 |
|
|
bte_init_cpu(void)
|
| 427 |
|
|
{
|
| 428 |
|
|
/* Called by setup.c as each cpu is being added to the nodepda */
|
| 429 |
|
|
if (local_node_data->active_cpu_count & 0x1) {
|
| 430 |
|
|
pda.cpu_bte_if[0] = &(nodepda->bte_if[0]);
|
| 431 |
|
|
pda.cpu_bte_if[1] = &(nodepda->bte_if[1]);
|
| 432 |
|
|
} else {
|
| 433 |
|
|
pda.cpu_bte_if[0] = &(nodepda->bte_if[1]);
|
| 434 |
|
|
pda.cpu_bte_if[1] = &(nodepda->bte_if[0]);
|
| 435 |
|
|
}
|
| 436 |
|
|
}
|