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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [arch/] [mips64/] [kernel/] [head.S] - Blame information for rev 1765

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Line No. Rev Author Line
1 1275 phoenix
/*
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 * This file is subject to the terms and conditions of the GNU General Public
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 * License.  See the file "COPYING" in the main directory of this archive
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 * for more details.
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 *
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 * Head.S contains the MIPS exception handler and startup code.
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 *
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 * Copyright (C) 1994, 1995 Waldorf Electronics
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 * Written by Ralf Baechle and Andreas Busse
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 * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999 Ralf Baechle
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 * Copyright (C) 1999 Silicon Graphics, Inc.
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 */
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#include 
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#include 
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#include 
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#include 
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#include 
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#include 
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#include 
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#include 
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#include 
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#include 
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#include 
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        .macro  ARC64_TWIDDLE_PC
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#if defined(CONFIG_ARC64) || defined(CONFIG_MAPPED_KERNEL)
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        /* We get launched at a XKPHYS address but the kernel is linked to
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           run at a KSEG0 address, so jump there.  */
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        PTR_LA  t0, \@f
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        jr      t0
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\@:
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#endif
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        .endm
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#ifdef CONFIG_SGI_IP27
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        /*
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         * outputs the local nasid into res.  IP27 stuff.
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         */
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        .macro GET_NASID_ASM res
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        dli     \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
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        ld      \res, (\res)
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        and     \res, NSRI_NODEID_MASK
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        dsrl    \res, NSRI_NODEID_SHFT
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        .endm
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#endif /* CONFIG_SGI_IP27 */
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        /*
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         * inputs are the text nasid in t1, data nasid in t2.
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         */
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        .macro MAPPED_KERNEL_SETUP_TLB
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#ifdef CONFIG_MAPPED_KERNEL
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        /*
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         * This needs to read the nasid - assume 0 for now.
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         * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
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         * 0+DVG in tlblo_1.
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         */
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        dli     t0, 0xffffffffc0000000
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        dmtc0   t0, CP0_ENTRYHI
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        li      t0, 0x1c000             # Offset of text into node memory
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        dsll    t1, NASID_SHFT          # Shift text nasid into place
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        dsll    t2, NASID_SHFT          # Same for data nasid
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        or      t1, t1, t0              # Physical load address of kernel text
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        or      t2, t2, t0              # Physical load address of kernel data
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        dsrl    t1, 12                  # 4K pfn
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        dsrl    t2, 12                  # 4K pfn
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        dsll    t1, 6                   # Get pfn into place
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        dsll    t2, 6                   # Get pfn into place
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        li      t0, ((_PAGE_GLOBAL|_PAGE_VALID| _CACHE_CACHABLE_COW) >> 6)
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        or      t0, t0, t1
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        mtc0    t0, CP0_ENTRYLO0        # physaddr, VG, cach exlwr
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        li      t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
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        or      t0, t0, t2
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        mtc0    t0, CP0_ENTRYLO1        # physaddr, DVG, cach exlwr
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        li      t0, 0x1ffe000           # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
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        mtc0    t0, CP0_PAGEMASK
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        li      t0, 0                   # KMAP_INX
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        mtc0    t0, CP0_INDEX
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        li      t0, 1
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        mtc0    t0, CP0_WIRED
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        tlbwi
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#else
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        mtc0    zero, CP0_WIRED
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#endif
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        .endm
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        .text
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EXPORT(stext)                                   # used for profiling
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EXPORT(_stext)
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        __INIT
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NESTED(kernel_entry, 16, sp)                    # kernel entry point
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        ori     sp, 0xf                         # align stack on 16 byte.
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        xori    sp, 0xf
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#ifdef CONFIG_SGI_IP27
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        GET_NASID_ASM   t1
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        move    t2, t1                          # text and data are here
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        MAPPED_KERNEL_SETUP_TLB
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#endif /* IP27 */
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        ARC64_TWIDDLE_PC
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        CLI                                     # disable interrupts
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        /*
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         * The firmware/bootloader passes argc/argp/envp
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         * to us as arguments.  But clear bss first because
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         * the romvec and other important info is stored there
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         * by prom_init().
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         */
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        PTR_LA  t0, _edata
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        sd      zero, (t0)
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        PTR_LA  t1, (_end - 8)
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1:
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        daddiu  t0, 8
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        sd      zero, (t0)
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        bne     t0, t1, 1b
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        PTR_LA  $28, init_task_union            # init current pointer
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        daddiu  sp, $28, KERNEL_STACK_SIZE-32
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        set_saved_sp    sp, t0, t1
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        dsubu   sp, 4*SZREG                     # init stack pointer
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        j       init_arch
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        END(kernel_entry)
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#ifdef CONFIG_SMP
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/*
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 * SMP slave cpus entry point.  Board specific code for bootstrap calls this
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 * function after setting up the stack and gp registers.
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 */
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NESTED(smp_bootstrap, 16, sp)
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#ifdef CONFIG_SGI_IP27
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        GET_NASID_ASM   t1
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        dli     t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
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                    KLDIR_OFF_POINTER + K0BASE
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        dsll    t1, NASID_SHFT
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        or      t0, t0, t1
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        ld      t0, 0(t0)                       # t0 points to kern_vars struct
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        lh      t1, KV_RO_NASID_OFFSET(t0)
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        lh      t2, KV_RW_NASID_OFFSET(t0)
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        MAPPED_KERNEL_SETUP_TLB
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        ARC64_TWIDDLE_PC
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#endif /* CONFIG_SGI_IP27 */
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        CLI
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        /*
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         * For the moment set ST0_KU so the CPU will not spit fire when
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         * executing 64-bit instructions.  The full initialization of the
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         * CPU's status register is done later in per_cpu_trap_init().
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         */
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        mfc0    t0, CP0_STATUS
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        or      t0, ST0_KX
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        mtc0    t0, CP0_STATUS
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        jal     start_secondary                 # XXX: IP27: cboot
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        END(smp_bootstrap)
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#endif /* CONFIG_SMP */
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        __FINIT
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        declare_saved_sp
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        .macro  page name, order=0
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        .globl  \name
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\name:  .size   \name, (_PAGE_SIZE << \order)
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        .org    . + (_PAGE_SIZE << \order)
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        .type   \name, @object
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        .endm
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        .data
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        .align  12
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        page    swapper_pg_dir, _PGD_ORDER
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        page    invalid_pmd_table, _PMD_ORDER
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        page    invalid_pte_table, _PTE_ORDER
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        page    kptbl, _PGD_ORDER
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        .globl  ekptbl
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        page    kpmdtbl, 0
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ekptbl:

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