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This is a port of Linux to OpenRISC 1000 family of microprocessors. More
information can be found at:
 
         http://www.opencores.org/projects/or1k/
 
Changes:
18. 11. 2003    Matjaz Breskvar (phoenix@opencores.org)
        initial port of linux to OpenRISC/or32 architecture.
        all the core stuff is implemented and seams usable.
 
08. 12. 2003    Matjaz Breskvar (phoenix@opencores.org)
        complete change of TLB miss handling.
        rewrite of exceptions handling.
        fully functional sash-3.6 in default initrd.
        a much improved version with changes all around.
 
10. 04. 2004    Matjaz Breskvar (phoenix@opencores.org)
        alot of bugfixes all over.
        ethernet support, functional http and telnet servers.
        running many standard linux apps.

Line No.	Rev	Author	Line
1	1275	phoenix	`This is a port of Linux to OpenRISC 1000 family of microprocessors. More`
2			`information can be found at:`
3
4			`http://www.opencores.org/projects/or1k/`
5
6			`Changes:`
7			`18. 11. 2003 Matjaz Breskvar (phoenix@opencores.org)`
8			`initial port of linux to OpenRISC/or32 architecture.`
9			`all the core stuff is implemented and seams usable.`
10
11			`08. 12. 2003 Matjaz Breskvar (phoenix@opencores.org)`
12			`complete change of TLB miss handling.`
13			`rewrite of exceptions handling.`
14			`fully functional sash-3.6 in default initrd.`
15			`a much improved version with changes all around.`
16
17			`10. 04. 2004 Matjaz Breskvar (phoenix@opencores.org)`
18			`alot of bugfixes all over.`
19			`ethernet support, functional http and telnet servers.`
20			`running many standard linux apps.`

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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [arch/] [or32/] [README.or32] - Blame information for rev 1765