| 1 |
1275 |
phoenix |
#
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# arch/s390/boot/ipleckd.S
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# IPL record for 3380/3390 DASD
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#
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# S390 version
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# Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
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# Author(s): Holger Smolinski
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#
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#
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# FIXME: should use the countarea to determine the blocksize
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# FIXME: should insert zeroes into memory when filling holes
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# FIXME: calculate blkpertrack from rdc data and blksize
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# change 09/20/00 removed obsolete store of ipldevice to textesegment
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# Usage of registers
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# r1: ipl subchannel ( general use, dont overload without save/restore !)
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# r10:
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# r13: base register index to 0x0000
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# r14: callers address
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# r15: temporary save register (we have no stack!)
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# storage layout:
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#include
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.org 0
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.psw: .long 0x00080000,0x80000000+_start
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.ccw1: .long 0x06000000,0x00001000 # Re-Read enough of bootsector to start
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.ccw2: .long 0x00000000,0x00000000 # read countarea of record 1 to s/w.
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.org 0x58
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| 33 |
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.Lextn: .long 0x000a0000,0x00000000+.Lextn
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| 34 |
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.Lsvcn: .long 0x000a0000,0x00000000+.Lsvcn
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| 35 |
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.Lprgn: .long 0x00080000,0x00000000+.Lecs
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.Lmcn: .long 0x000a0000,0x00000000+.Lmcn
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.Lion: .long 0x00080000,0x80000000+.Lionewaddr
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.org 0xe0
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.Llstad:.long 0x00000000,0x00000000 # sectorno + ct of bootlist
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.org 0xf0 # Lets start now...
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_start: .globl _start
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l %r1,__LC_SUBCHANNEL_ID # get IPL-subchannel from lowcore
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st %r1,__LC_IPLDEV # keep it for reipl
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stsch .Lrdcdata
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oi .Lrdcdata+5,0x84 # enable ssch and multipath mode
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.Lecs: xi .Lrdcdata+27,0x01 # enable concurrent sense
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msch .Lrdcdata
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xi .Lprgn,6 # restore Wait and d/a bit in PCnew PSW
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l %r2,.Lparm
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mvc 0x0(8,%r2),.Lnull # set parmarea to null
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lctl %c6,%c6,.Lc6 # enable all interrupts
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.Lrdc: # read device characteristics
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la %r6,.Lrdcccw
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st %r6,.Lorb+8 # store cp-address to orb
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bras %r15,.Lssch # start I/O
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oi .Llodata+1,0x80
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lh %r5,.Lcountarea+6 # init r5 from countarea
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stcm %r5,3,.Lrdccw+2 # and store into rd template *FIXME*
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stcm %r5,3,.Llodata+14 # and store into lodata *FIXME*
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.Lbootlist:
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l %r2,.Llstad
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l %r3,.Lblklst
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lhi %r4,1
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bras %r14,.Lreadblks
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.Lloader:
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l %r10,.Lblklst # r10 is index to bootlist
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lhi %r5,4 # r5: skip 4 blocks = firstpage....
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.Lkloop:
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clc .Lnull(8),0(%r10) # test blocklist
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jz .Lchkparm # end of list?
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l %r2,0(%r10) # get startblock to r2
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slr %r4,%r4 # erase r4
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icm %r4,1,7(%r10) # get blockcount
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slr %r3,%r3 # get address to r3
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icm %r3,0xe,4(%r10)
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chi %r5,0 # still blocks to skip?
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jz .Ldoread # no: start reading
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cr %r5,%r4 # #skipblocks >= blockct?
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jm .L007 # no: skip the blocks one by one
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.L006:
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sr %r5,%r4 # decrease number of blocks to skip
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j .Lkcont # advance to next entry
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.L007:
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ahi %r2,1 # skip 1 block...
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bctr %r4,0 # update blockct
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| 88 |
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ah %r3,.Lcountarea+6 # increment address
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bct %r5,.L007 # 4 blocks skipped?
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| 90 |
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.Ldoread:
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ltr %r2,%r2 # test startblock
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jz .Lzeroes # startblocks is zero (hole)
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.Ldiskread:
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bras %r14,.Lreadblks
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j .Lkcont
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.Lzeroes:
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lr %r2,%r3
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.L001: slr %r3,%r3
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icm %r3,3,.Lcountarea+6 # get blocksize
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slr %r5,%r5 # no bytes to move
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.L008: mvcle %r2,%r4,0 # fill zeroes to storage
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jo .L008 # until block is filled
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brct %r4,.L001 # skip to next block
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.Lkcont:
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ahi %r10,8
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j .Lkloop
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.Lchkparm:
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lm %r3,%r4,.Lstart # load .Lstart and .Lparm
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clc 0x0(4,%r4),.Lnull
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| 110 |
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je .Lrunkern
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mvc 0x480(128,%r3),0(%r4) # move 1k-0x80 to parmarea
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| 112 |
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mvc 0x500(256,%r3),0x80(%r4)
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mvc 0x600(256,%r3),0x180(%r4)
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| 114 |
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mvc 0x700(256,%r3),0x280(%r4)
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| 115 |
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.Lrunkern:
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| 116 |
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# lhi %r2,17
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| 117 |
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# sll %r2,12
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| 118 |
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# st %r1,0xc6c(%r2) # store iplsubchannel to lowcore
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| 119 |
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# st %r1,0xc6c # store iplsubchannel to lowcore
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| 120 |
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br %r3
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# This function does the start IO
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| 122 |
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# r2: number of first block to read ( input by caller )
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# r3: address to read data to ( input by caller )
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| 124 |
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# r4: number of blocks to read ( input by caller )
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| 125 |
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# r5: destroyed
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| 126 |
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# r6: blocks per track ( input by caller )
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| 127 |
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# r7: number of heads
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| 128 |
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# r8:
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| 129 |
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# r9:
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| 130 |
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# r10:
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| 131 |
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# r11: temporary register
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| 132 |
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# r12: local use for base address
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| 133 |
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# r13: base address for module
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| 134 |
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# r14: address of caller for subroutine
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| 135 |
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# r15: temporary save register (since we have no stack)
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| 136 |
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.Lreadblks:
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| 137 |
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la %r12,.Ldeccw
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| 138 |
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st %r12,8+.Lorb # store cpaddr to orb
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| 139 |
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ahi %r12,0x10 # increment r12 to point to rdccw
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| 140 |
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oi 1(%r12),0x40 # set CC in rd template
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| 141 |
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# first setup the read CCWs
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| 142 |
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lr %r15,%r4 # save number or blocks
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| 143 |
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slr %r7,%r7
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| 144 |
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icm %r7,3,.Lrdcdata+14 # load heads to r7
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| 145 |
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lhi %r6,9
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| 146 |
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clc .Lrdcdata+3(2),.L9345
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| 147 |
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je .L011
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lhi %r6,10
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| 149 |
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clc .Lrdcdata+3(2),.L3380
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| 150 |
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je .L011
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| 151 |
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lhi %r6,12
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| 152 |
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clc .Lrdcdata+3(2),.L3390
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| 153 |
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je .L011
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| 154 |
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bras %r14,.Ldisab
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.L011:
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| 156 |
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# loop for nbl times
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| 157 |
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.Lrdloop:
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| 158 |
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mvc 0(8,%r12),.Lrdccw # copy template to this ccw
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| 159 |
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st %r3,4(%r12) # store target address to this ccw
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| 160 |
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bct %r4,.L005 # decrement no of blks still to do
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| 161 |
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ni 1(%r12),0x3f # delete CC from last ccw
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| 162 |
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lr %r4,%r15 # restore number of blocks
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| 163 |
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# read CCWs are setup now
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| 164 |
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stcm %r4,3,.Llodata+2 # store blockno to lodata clears r4
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| 165 |
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ar %r4,%r2 # r4 (clear): ebl = blk + nbl
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| 166 |
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bctr %r4,0 # decrement r4 ( last blk touched
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| 167 |
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srda %r2,32 # trk = blk / bpt, bot = blk % bpt
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| 168 |
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dr %r2,%r6 # r3: trk, r2: bot
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| 169 |
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ahi %r2,1 # bot++ ( we start counting at 1 )
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| 170 |
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stcm %r2,1,.Llodata+12 # store bot to lodata
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| 171 |
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xr %r2,%r2 # cy = trk / heads, hd = trk % heads
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| 172 |
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dr %r2,%r7 # r3: cy, r2: hd
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| 173 |
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sll %r3,16 # combine to CCHH in r3
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| 174 |
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or %r3,%r2
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| 175 |
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st %r3,.Ldedata+8 # store cchh to dedata
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| 176 |
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st %r3,.Llodata+4 # store cchh to lodata
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| 177 |
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st %r3,.Llodata+8 # store cchh to lodata
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| 178 |
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lr %r15,%r5 # save r5
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| 179 |
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srda %r4,32 # tr2 = ebl / bpt
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| 180 |
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dr %r4,%r6 # r5: tr2, r4: bot2
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| 181 |
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xr %r4,%r4 # cy2 = tr2 / heads, hd2 = hd2 % heads
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| 182 |
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dr %r4,%r7 # r5: cy2, r4: hd2
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| 183 |
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stcm %r5,3,.Ldedata+12 # store cy2,hd2 to dedata
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| 184 |
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stcm %r4,3,.Ldedata+14 # store cy2,hd2 to dedata
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| 185 |
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lr %r5,%r15 # restore r5
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| 186 |
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# CCWs are setup now, arent they?
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| 187 |
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bras %r15,.Lssch # start I/O
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| 188 |
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br %r14 # return to caller
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| 189 |
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.L005:
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| 190 |
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ah %r3,.Lcountarea+6 # add blocksize to target address
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| 191 |
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ahi %r12,8 # add sizeof(ccw) to base address
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| 192 |
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j .Lrdloop
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| 193 |
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# end of function
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| 194 |
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# This function does the start IO
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| 195 |
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# r1: Subchannel number
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| 196 |
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# r8: ORB address
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| 197 |
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# r9: IRB address
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| 198 |
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.Lssch:
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| 199 |
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lhi %r13,10 # initialize retries
|
| 200 |
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.L012:
|
| 201 |
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ssch .Lorb # start I/O
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| 202 |
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jz .Ltpi # ok?
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| 203 |
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bras %r14,.Ldisab # error
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| 204 |
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.Ltpi:
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| 205 |
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lpsw .Lwaitpsw # load wait-PSW
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| 206 |
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.Lionewaddr:
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| 207 |
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c %r1,0xb8 # compare to ipl subhchannel
|
| 208 |
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jnz .Ltpi # not equal: loop
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| 209 |
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clc 0xbc(4),.Lorb # cross check the intparm
|
| 210 |
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jnz .Ltpi # not equal: loop
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| 211 |
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tsch .Lirb # get status
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| 212 |
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tm .Lirb+9,0xff # channel status ?
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| 213 |
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jz .L003 # CS == 0x00
|
| 214 |
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bras %r14,.Ldisab # error
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| 215 |
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.L003:
|
| 216 |
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tm .Lirb+8,0xf3 # DS different from CE/DE
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| 217 |
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jz .L004 # ok ?
|
| 218 |
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bct %r13,.L012 # retries <= 5 ?
|
| 219 |
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bras %r14,.Ldisab # error
|
| 220 |
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.L004:
|
| 221 |
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tm .Lirb+8,0x04 # DE set?
|
| 222 |
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jz .Ltpi # DE not set, loop
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| 223 |
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.Lsschend:
|
| 224 |
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br %r15 # return to caller
|
| 225 |
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# end of function
|
| 226 |
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# In case of error goto disabled wait with %r14 containing the caller
|
| 227 |
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.Ldisab:
|
| 228 |
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st %r14,.Ldisabpsw+4
|
| 229 |
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lpsw .Ldisabpsw
|
| 230 |
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|
| 231 |
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# FIXME pre-initialized data should be listed first
|
| 232 |
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# NULLed storage can be taken from anywhere ;)
|
| 233 |
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.Lblklst:
|
| 234 |
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.long 0x00002000
|
| 235 |
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.align 8
|
| 236 |
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.Ldisabpsw:
|
| 237 |
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.long 0x000a0000,0x00000000
|
| 238 |
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.Lwaitpsw:
|
| 239 |
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.long 0x020a0000,0x00000000+.Ltpi
|
| 240 |
|
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.Lorb:
|
| 241 |
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.long 0x0049504c,0x0080ff00 # intparm is " IPL"
|
| 242 |
|
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.Lc6: .long 0xff000000
|
| 243 |
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.Lstart:
|
| 244 |
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.long 0x00010000 # do not separate .Lstart and .Lparm
|
| 245 |
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.Lparm:
|
| 246 |
|
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.long 0x00008000 # they are loaded with a LM
|
| 247 |
|
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.L3390:
|
| 248 |
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.word 0x3390
|
| 249 |
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.L9345:
|
| 250 |
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.word 0x9345
|
| 251 |
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.L3380:
|
| 252 |
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.word 0x3380
|
| 253 |
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.Lnull:
|
| 254 |
|
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.long 0x00000000,0x00000000
|
| 255 |
|
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.align 4
|
| 256 |
|
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.Lrdcdata:
|
| 257 |
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.long 0x00000000,0x00000000
|
| 258 |
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.long 0x00000000,0x00000000
|
| 259 |
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.long 0x00000000,0x00000000
|
| 260 |
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.long 0x00000000,0x00000000
|
| 261 |
|
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.long 0x00000000,0x00000000
|
| 262 |
|
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.long 0x00000000,0x00000000
|
| 263 |
|
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.long 0x00000000,0x00000000
|
| 264 |
|
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.long 0x00000000,0x00000000
|
| 265 |
|
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.Lirb:
|
| 266 |
|
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.long 0x00000000,0x00000000
|
| 267 |
|
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.long 0x00000000,0x00000000
|
| 268 |
|
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.long 0x00000000,0x00000000
|
| 269 |
|
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.long 0x00000000,0x00000000
|
| 270 |
|
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.long 0x00000000,0x00000000
|
| 271 |
|
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.long 0x00000000,0x00000000
|
| 272 |
|
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.long 0x00000000,0x00000000
|
| 273 |
|
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.long 0x00000000,0x00000000
|
| 274 |
|
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.Lcountarea:
|
| 275 |
|
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.word 0x0000 # cyl;
|
| 276 |
|
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.word 0x0000 # head;
|
| 277 |
|
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.byte 0x00 # record;
|
| 278 |
|
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.byte 0x00 # key length;
|
| 279 |
|
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.word 0x0000 # data length == blocksize;
|
| 280 |
|
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.Ldedata:
|
| 281 |
|
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.long 0x40c00000,0x00000000
|
| 282 |
|
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.long 0x00000000,0x00000000
|
| 283 |
|
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.Llodata:
|
| 284 |
|
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.long 0x06000001,0x00000000
|
| 285 |
|
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.long 0x00000000,0x01000000
|
| 286 |
|
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.long 0x12345678
|
| 287 |
|
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.org 0x7c8
|
| 288 |
|
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.Lrdcccw: # CCW read device characteristics
|
| 289 |
|
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.long 0x64400040,0x00000000+.Lrdcdata
|
| 290 |
|
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.long 0x63400010,0x00000000+.Ldedata
|
| 291 |
|
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.long 0x47400010,0x00000000+.Llodata
|
| 292 |
|
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.long 0x12000008,0x00000000+.Lcountarea
|
| 293 |
|
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.Ldeccw:
|
| 294 |
|
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.long 0x63400010,0x00000000+.Ldedata
|
| 295 |
|
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.Lloccw:
|
| 296 |
|
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.long 0x47400010,0x00000000+.Llodata
|
| 297 |
|
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.Lrdccw:
|
| 298 |
|
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.long 0x86400000,0x00000000
|
| 299 |
|
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.org 0x800
|
| 300 |
|
|
# end of pre initialized data is here CCWarea follows
|
| 301 |
|
|
# from here we load 1k blocklist
|
| 302 |
|
|
# end of function
|
| 303 |
|
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|
