OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [arch/] [x86_64/] [kernel/] [time.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1275 phoenix
/*
2
 *  linux/arch/x86-64/kernel/time.c
3
 *
4
 *  "High Precision Event Timer" based timekeeping.
5
 *
6
 *  Copyright (c) 1991,1992,1995  Linus Torvalds
7
 *  Copyright (c) 1994  Alan Modra
8
 *  Copyright (c) 1995  Markus Kuhn
9
 *  Copyright (c) 1996  Ingo Molnar
10
 *  Copyright (c) 1998  Andrea Arcangeli
11
 *  Copyright (c) 2002  Vojtech Pavlik
12
 *
13
 */
14
 
15
#include <linux/kernel.h>
16
#include <linux/sched.h>
17
#include <linux/interrupt.h>
18
#include <linux/init.h>
19
#include <linux/mc146818rtc.h>
20
#include <linux/irq.h>
21
#include <linux/ioport.h>
22
#include <asm/vsyscall.h>
23
#include <asm/timex.h>
24
 
25
extern rwlock_t xtime_lock;
26
spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
27
spinlock_t i8253_lock = SPIN_LOCK_UNLOCKED;
28
 
29
unsigned int cpu_khz;                                   /* TSC clocks / usec, not used here */
30
unsigned long hpet_address;
31
unsigned long hpet_period;                              /* fsecs / HPET clock */
32
unsigned int hpet_tick;                                 /* HPET clocks / interrupt */
33
unsigned long vxtime_hz = 1193182;
34
int report_lost_ticks;                                  /* command line option */
35
 
36
struct vxtime_data __vxtime __section_vxtime;           /* data for vsyscall */
37
 
38
volatile unsigned long __jiffies __section_jiffies;
39
unsigned long __wall_jiffies __section_wall_jiffies;
40
struct timeval __xtime __section_xtime;
41
struct timezone __sys_tz __section_sys_tz;
42
 
43
static inline void rdtscll_sync(unsigned long *tsc)
44
{
45
        sync_core();
46
        rdtscll(*tsc);
47
}
48
 
49
/*
50
 * do_gettimeoffset() returns microseconds since last timer interrupt was
51
 * triggered by hardware.
52
 */
53
 
54
static unsigned int do_gettimeoffset_tsc(void)
55
{
56
        unsigned long t;
57
        rdtscll_sync(&t);
58
        return ((t  - vxtime.last_tsc) * vxtime.tsc_quot) >> 32;
59
}
60
 
61
static unsigned int do_gettimeoffset_hpet(void)
62
{
63
        return ((hpet_readl(HPET_COUNTER) - vxtime.last) * vxtime.quot) >> 32;
64
}
65
 
66
static unsigned int do_gettimeoffset_nop(void)
67
{
68
        return 0;
69
}
70
 
71
unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
72
 
73
/*
74
 * This version of gettimeofday() has microsecond resolution and better than
75
 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
76
 * MHz) HPET timer.
77
 */
78
 
79
void do_gettimeofday(struct timeval *tv)
80
{
81
        unsigned long sequence;
82
        unsigned int sec, usec;
83
 
84
        do {
85
                sequence = __vxtime_sequence[1];
86
                rmb();
87
 
88
        sec = xtime.tv_sec;
89
        usec = xtime.tv_usec
90
                + (jiffies - wall_jiffies) * tick
91
                        + do_gettimeoffset();
92
 
93
                rmb();
94
        } while (sequence != __vxtime_sequence[0]);
95
 
96
        tv->tv_sec = sec + usec / 1000000;
97
        tv->tv_usec = usec % 1000000;
98
}
99
 
100
/*
101
 * settimeofday() first undoes the correction that gettimeofday would do
102
 * on the time, and then saves it. This is ugly, but has been like this for
103
 * ages already.
104
 */
105
 
106
void do_settimeofday(struct timeval *tv)
107
{
108
        write_lock_irq(&xtime_lock);
109
        vxtime_lock();
110
 
111
        tv->tv_usec -= (jiffies - wall_jiffies) * tick
112
                        + do_gettimeoffset();
113
 
114
        while (tv->tv_usec < 0) {
115
                tv->tv_usec += 1000000;
116
                tv->tv_sec--;
117
        }
118
 
119
        xtime = *tv;
120
        vxtime_unlock();
121
 
122
        time_adjust = 0;         /* stop active adjtime() */
123
        time_status |= STA_UNSYNC;
124
        time_maxerror = NTP_PHASE_LIMIT;
125
        time_esterror = NTP_PHASE_LIMIT;
126
 
127
        write_unlock_irq(&xtime_lock);
128
}
129
 
130
/*
131
 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
132
 * ms after the second nowtime has started, because when nowtime is written
133
 * into the registers of the CMOS clock, it will jump to the next second
134
 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
135
 * sheet for details.
136
 */
137
 
138
static void set_rtc_mmss(unsigned long nowtime)
139
{
140
        int real_seconds, real_minutes, cmos_minutes;
141
        unsigned char control, freq_select;
142
 
143
/*
144
 * IRQs are disabled when we're called from the timer interrupt,
145
 * no need for spin_lock_irqsave()
146
 */
147
 
148
        spin_lock(&rtc_lock);
149
 
150
/*
151
 * Tell the clock it's being set and stop it.
152
 */
153
 
154
        control = CMOS_READ(RTC_CONTROL);
155
        CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
156
 
157
        freq_select = CMOS_READ(RTC_FREQ_SELECT);
158
        CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
159
 
160
        cmos_minutes = CMOS_READ(RTC_MINUTES);
161
        BCD_TO_BIN(cmos_minutes);
162
 
163
/*
164
 * since we're only adjusting minutes and seconds, don't interfere with hour
165
 * overflow. This avoids messing with unknown time zones but requires your RTC
166
 * not to be off by more than 15 minutes. Since we're calling it only when
167
 * our clock is externally synchronized using NTP, this shouldn't be a problem.
168
 */
169
 
170
        real_seconds = nowtime % 60;
171
        real_minutes = nowtime / 60;
172
        if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
173
                real_minutes += 30;     /* correct for half hour time zone */
174
        real_minutes %= 60;
175
 
176
        if (abs(real_minutes - cmos_minutes) < 30) {
177
                BIN_TO_BCD(real_seconds);
178
                BIN_TO_BCD(real_minutes);
179
                CMOS_WRITE(real_seconds, RTC_SECONDS);
180
                CMOS_WRITE(real_minutes, RTC_MINUTES);
181
        } else
182
                printk(KERN_WARNING "time.c: can't update CMOS clock from %d to %d\n",
183
                        cmos_minutes, real_minutes);
184
 
185
/*
186
 * The following flags have to be released exactly in this order, otherwise the
187
 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
188
 * not reset the oscillator and will not update precisely 500 ms later. You
189
 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
190
 * believes data sheets anyway ... -- Markus Kuhn
191
 */
192
 
193
        CMOS_WRITE(control, RTC_CONTROL);
194
        CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
195
 
196
        spin_unlock(&rtc_lock);
197
}
198
 
199
static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
200
{
201
        static unsigned long rtc_update = 0;
202
 
203
/*
204
 * Here we are in the timer irq handler. We have irqs locally disabled (so we
205
 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
206
 * on the other CPU, so we need a lock. We also need to lock the vsyscall
207
 * variables, because both do_timer() and us change them -arca+vojtech
208
 */
209
 
210
        write_lock(&xtime_lock);
211
        vxtime_lock();
212
 
213
        {
214
                long tsc;
215
                int delay, offset = 0;
216
 
217
                if (hpet_address) {
218
 
219
                        offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
220
                        delay = hpet_readl(HPET_COUNTER) - offset;
221
 
222
                } else {
223
 
224
                        spin_lock(&i8253_lock);
225
                        outb_p(0x00, 0x43);
226
                        delay = inb_p(0x40);
227
                        delay |= inb(0x40) << 8;
228
                        spin_unlock(&i8253_lock);
229
                        delay = LATCH - 1 - delay;
230
                }
231
 
232
                rdtscll_sync(&tsc);
233
 
234
                if (vxtime.mode == VXTIME_HPET) {
235
 
236
                        if (offset - vxtime.last > hpet_tick) {
237
                                if (report_lost_ticks)
238
                                        printk(KERN_WARNING "time.c: Lost %d timer tick(s)! (rip %016lx)\n",
239
                                                (offset - vxtime.last) / hpet_tick - 1, regs->rip);
240
                                jiffies += (offset - vxtime.last) / hpet_tick - 1;
241
                        }
242
 
243
                        vxtime.last = offset;
244
 
245
                } else {
246
 
247
                        offset = (((tsc - vxtime.last_tsc) * vxtime.tsc_quot) >> 32) - tick;
248
 
249
                        if (offset > tick) {
250
                                if (report_lost_ticks)
251
                                        printk(KERN_WARNING "time.c: lost %ld tick(s) (rip %016lx)\n",
252
                                                 offset / tick, regs->rip);
253
                                jiffies += offset / tick;
254
                                offset %= tick;
255
                        }
256
 
257
                        vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
258
 
259
                        if ((((tsc - vxtime.last_tsc) * vxtime.tsc_quot) >> 32) < offset)
260
                                vxtime.last_tsc = tsc - (((long)offset << 32) / vxtime.tsc_quot) - 1;
261
 
262
                }
263
        }
264
 
265
/*
266
 * Do the timer stuff.
267
 */
268
 
269
        do_timer(regs);
270
 
271
/*
272
 * If we have an externally synchronized Linux clock, then update CMOS clock
273
 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
274
 * closest to exactly 500 ms before the next second. If the update fails, we
275
 * don'tcare, as it'll be updated on the next turn, and the problem (time way
276
 * off) isn't likely to go away much sooner anyway.
277
 */
278
 
279
        if ((~time_status & STA_UNSYNC) && xtime.tv_sec > rtc_update &&
280
                abs(xtime.tv_usec - 500000) <= tick / 2) {
281
                set_rtc_mmss(xtime.tv_sec);
282
                rtc_update = xtime.tv_sec + 660;
283
        }
284
 
285
        vxtime_unlock();
286
        write_unlock(&xtime_lock);
287
}
288
 
289
static unsigned long get_cmos_time(void)
290
{
291
        unsigned int timeout, year, mon, day, hour, min, sec;
292
        unsigned char last, this;
293
 
294
/*
295
 * The Linux interpretation of the CMOS clock register contents: When the
296
 * Update-In-Progress (UIP) flag goes from 1 to 0, the RTC registers show the
297
 * second which has precisely just started. Waiting for this can take up to 1
298
 * second, we timeout approximately after 2.4 seconds on a machine with
299
 * standard 8.3 MHz ISA bus.
300
 */
301
 
302
        spin_lock(&rtc_lock);
303
 
304
        timeout = 1000000;
305
        last = this = 0;
306
 
307
        while (timeout && last && !this) {
308
                last = this;
309
                this = CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP;
310
                timeout--;
311
        }
312
 
313
/*
314
 * Here we are safe to assume the registers won't change for a whole second, so
315
 * we just go ahead and read them.
316
 */
317
 
318
        sec = CMOS_READ(RTC_SECONDS);
319
        min = CMOS_READ(RTC_MINUTES);
320
        hour = CMOS_READ(RTC_HOURS);
321
        day = CMOS_READ(RTC_DAY_OF_MONTH);
322
        mon = CMOS_READ(RTC_MONTH);
323
        year = CMOS_READ(RTC_YEAR);
324
 
325
        spin_unlock(&rtc_lock);
326
 
327
/*
328
 * We know that x86-64 always uses BCD format, no need to check the config
329
 * register.
330
 */
331
 
332
        BCD_TO_BIN(sec);
333
        BCD_TO_BIN(min);
334
        BCD_TO_BIN(hour);
335
        BCD_TO_BIN(day);
336
        BCD_TO_BIN(mon);
337
        BCD_TO_BIN(year);
338
 
339
/*
340
 * This will work up to Dec 31, 2069.
341
 */
342
 
343
        if ((year += 1900) < 1970)
344
                year += 100;
345
 
346
        return mktime(year, mon, day, hour, min, sec);
347
}
348
 
349
/*
350
 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
351
 * it to the HPET timer of known frequency.
352
 */
353
 
354
#define TICK_COUNT 100000000
355
 
356
static unsigned int __init hpet_calibrate_tsc(void)
357
{
358
        int tsc_start, hpet_start;
359
        int tsc_now, hpet_now;
360
        unsigned long flags;
361
 
362
        __save_flags(flags);
363
        __cli();
364
 
365
        hpet_start = hpet_readl(HPET_COUNTER);
366
        rdtscl(tsc_start);
367
 
368
        do {
369
                __cli();
370
                hpet_now = hpet_readl(HPET_COUNTER);
371
                sync_core();
372
                rdtscl(tsc_now);
373
                __restore_flags(flags);
374
        } while ((tsc_now - tsc_start) < TICK_COUNT && (hpet_now - hpet_start) < TICK_COUNT);
375
 
376
        return (tsc_now - tsc_start) * 1000000000L
377
                / ((hpet_now - hpet_start) * hpet_period / 1000);
378
}
379
 
380
/*
381
 * pit_calibrate_tsc() uses the speaker output (channel 2) of
382
 * the PIT. This is better than using the timer interrupt output,
383
 * because we can read the value of the speaker with just one inb(),
384
 * where we need three i/o operations for the interrupt channel.
385
 * We count how many ticks the TSC does in 50 ms.
386
 */
387
 
388
static unsigned int __init pit_calibrate_tsc(void)
389
{
390
        unsigned long start, end;
391
 
392
        outb((inb(0x61) & ~0x02) | 0x01, 0x61);
393
 
394
        spin_lock_irq(&i8253_lock);
395
 
396
        outb(0xb0, 0x43);
397
        outb((1193182 / (1000 / 50)) & 0xff, 0x42);
398
        outb((1193182 / (1000 / 50)) >> 8, 0x42);
399
        rdtscll(start);
400
 
401
        while ((inb(0x61) & 0x20) == 0);
402
        rdtscll(end);
403
 
404
        spin_unlock_irq(&i8253_lock);
405
 
406
        return (end - start) / 50;
407
}
408
 
409
static int hpet_init(void)
410
{
411
        unsigned int cfg, id;
412
 
413
        if (!hpet_address)
414
                return -1;
415
        set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
416
 
417
/*
418
 * Read the period, compute tick and quotient.
419
 */
420
 
421
        id = hpet_readl(HPET_ID);
422
 
423
        if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER) || !(id & HPET_ID_LEGSUP))
424
                return -1;
425
 
426
        hpet_period = hpet_readl(HPET_PERIOD);
427
        if (hpet_period < 100000 || hpet_period > 100000000)
428
                return -1;
429
 
430
        hpet_tick = (1000000000L * tick + hpet_period / 2) / hpet_period;
431
 
432
/*
433
 * Stop the timers and reset the main counter.
434
 */
435
 
436
        cfg = hpet_readl(HPET_CFG);
437
        cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
438
        hpet_writel(cfg, HPET_CFG);
439
        hpet_writel(0, HPET_COUNTER);
440
        hpet_writel(0, HPET_COUNTER + 4);
441
 
442
/*
443
 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
444
 * and period also hpet_tick.
445
 */
446
 
447
        hpet_writel(HPET_T0_ENABLE | HPET_T0_PERIODIC | HPET_T0_SETVAL | HPET_T0_32BIT, HPET_T0_CFG);
448
        hpet_writel(hpet_tick, HPET_T0_CMP);
449
        hpet_writel(hpet_tick, HPET_T0_CMP);
450
 
451
/*
452
 * Go!
453
 */
454
 
455
        cfg |= HPET_CFG_ENABLE | HPET_CFG_LEGACY;
456
        hpet_writel(cfg, HPET_CFG);
457
 
458
        return 0;
459
}
460
 
461
void __init pit_init(void)
462
{
463
        spin_lock_irq(&i8253_lock);
464
        outb_p(0x34, 0x43);             /* binary, mode 2, LSB/MSB, ch 0 */
465
        outb_p(LATCH & 0xff, 0x40);     /* LSB */
466
        outb_p(LATCH >> 8, 0x40);       /* MSB */
467
        spin_unlock_irq(&i8253_lock);
468
}
469
 
470
static int __init time_setup(char *str)
471
{
472
        report_lost_ticks = 1;
473
        return 1;
474
}
475
 
476
/* Only used on SMP */
477
static int notsc __initdata = 0;
478
 
479
static int __init notsc_setup(char *str)
480
{
481
#ifdef CONFIG_SMP
482
        printk(KERN_INFO "notsc ignored on non SMP kernel\n");
483
#endif
484
        notsc = 1;
485
        return 1;
486
}
487
 
488
static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL};
489
 
490
void __init time_init(void)
491
{
492
        char *timename;
493
 
494
#ifdef HPET_HACK_ENABLE_DANGEROUS
495
        if (!hpet_address) {
496
                printk(KERN_WARNING "time.c: WARNING: Enabling HPET base manually!\n");
497
                outl(0x800038a0, 0xcf8);
498
                outl(0xff000001, 0xcfc);
499
                outl(0x800038a0, 0xcf8);
500
                hpet_address = inl(0xcfc) & 0xfffffffe;
501
                printk(KERN_WARNING "time.c: WARNING: Enabled HPET at at %#lx.\n", hpet_address);
502
        }
503
#endif
504
 
505
#ifndef CONFIG_HPET_TIMER
506
        hpet_address = 0;
507
#endif
508
 
509
        write_lock(&xtime_lock);
510
        xtime.tv_sec = get_cmos_time();
511
        xtime.tv_usec = 0;
512
        write_unlock(&xtime_lock);
513
 
514
        if (!hpet_init()) {
515
                vxtime_hz = (1000000000000000L + hpet_period / 2) / hpet_period;
516
                cpu_khz = hpet_calibrate_tsc();
517
                timename = "HPET";
518
        } else {
519
                pit_init();
520
                cpu_khz = pit_calibrate_tsc();
521
                timename = "PIT";
522
        }
523
 
524
        vxtime.mode = VXTIME_TSC;
525
        vxtime.quot = (1000000L << 32) / vxtime_hz;
526
        vxtime.tsc_quot = (1000L << 32) / cpu_khz;
527
        rdtscll_sync(&vxtime.last_tsc);
528
 
529
        setup_irq(0, &irq0);
530
 
531
        printk(KERN_INFO "time.c: Detected %ld.%06ld MHz %s timer.\n",
532
                vxtime_hz / 1000000, vxtime_hz % 1000000, timename);
533
        printk(KERN_INFO "time.c: Detected %d.%03d MHz TSC timer.\n",
534
                        cpu_khz / 1000, cpu_khz % 1000);
535
}
536
 
537
void __init time_init_smp(void)
538
{
539
        char *timetype;
540
 
541
        if (hpet_address) {
542
                if (notsc) {
543
                        timetype = "HPET";
544
                        vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
545
                        vxtime.mode = VXTIME_HPET;
546
                        do_gettimeoffset = do_gettimeoffset_hpet;
547
                } else {
548
                        timetype = "HPET/TSC";
549
                        vxtime.mode = VXTIME_TSC;
550
                }
551
        } else {
552
                if (notsc) {
553
                        timetype = "PIT";
554
                        vxtime.mode = VXTIME_STUPID;
555
                        do_gettimeoffset = do_gettimeoffset_nop;
556
                } else {
557
                        timetype = "PIT/TSC";
558
                        vxtime.mode = VXTIME_TSC;
559
        }
560
        }
561
        printk(KERN_INFO "time.c: Using %s based timekeeping.\n", timetype);
562
}
563
 
564
__setup("notsc", notsc_setup);
565
__setup("report_lost_ticks", time_setup);
566
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.