OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [char/] [specialix_io8.h] - Blame information for rev 1774

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1275 phoenix
/*
2
 *      linux/drivers/char/specialix_io8.h  --
3
 *                                   Specialix IO8+ multiport serial driver.
4
 *
5
 *      Copyright (C) 1997 Roger Wolff (R.E.Wolff@BitWizard.nl)
6
 *      Copyright (C) 1994-1996  Dmitry Gorodchanin (pgmdsg@ibi.com)
7
 *
8
 *
9
 *      Specialix pays for the development and support of this driver.
10
 *      Please DO contact io8-linux@specialix.co.uk if you require
11
 *      support.
12
 *
13
 *      This driver was developped in the BitWizard linux device
14
 *      driver service. If you require a linux device driver for your
15
 *      product, please contact devices@BitWizard.nl for a quote.
16
 *
17
 *      This code is firmly based on the riscom/8 serial driver,
18
 *      written by Dmitry Gorodchanin. The specialix IO8+ card
19
 *      programming information was obtained from the CL-CD1865 Data
20
 *      Book, and Specialix document number 6200059: IO8+ Hardware
21
 *      Functional Specification.
22
 *
23
 *      This program is free software; you can redistribute it and/or
24
 *      modify it under the terms of the GNU General Public License as
25
 *      published by the Free Software Foundation; either version 2 of
26
 *      the License, or (at your option) any later version.
27
 *
28
 *      This program is distributed in the hope that it will be
29
 *      useful, but WITHOUT ANY WARRANTY; without even the implied
30
 *      warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
31
 *      PURPOSE.  See the GNU General Public License for more details.
32
 *
33
 *      You should have received a copy of the GNU General Public
34
 *      License along with this program; if not, write to the Free
35
 *      Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
36
 *      USA.
37
 * */
38
 
39
#ifndef __LINUX_SPECIALIX_H
40
#define __LINUX_SPECIALIX_H
41
 
42
#include <linux/serial.h>
43
 
44
#ifdef __KERNEL__
45
 
46
/* You can have max 4 ISA cards in one PC, and I recommend not much
47
more than a few  PCI versions of the card. */
48
 
49
#define SX_NBOARD               8
50
 
51
/* NOTE: Specialix decoder recognizes 4 addresses, but only two are used.... */
52
#define SX_IO_SPACE             4
53
/* The PCI version decodes 8 addresses, but still only 2 are used. */
54
#define SX_PCI_IO_SPACE         8
55
 
56
/* eight ports per board. */
57
#define SX_NPORT                8
58
#define SX_BOARD(line)          ((line) / SX_NPORT)
59
#define SX_PORT(line)           ((line) & (SX_NPORT - 1))
60
 
61
 
62
#define SX_DATA_REG 0     /* Base+0 : Data register */
63
#define SX_ADDR_REG 1     /* base+1 : Address register. */
64
 
65
#define MHz *1000000    /* I'm ashamed of myself. */
66
 
67
/* On-board oscillator frequency */
68
#define SX_OSCFREQ      (25 MHz/2)
69
/* There is a 25MHz crystal on the board, but the chip is in /2 mode */
70
 
71
 
72
/* Ticks per sec. Used for setting receiver timeout and break length */
73
#define SPECIALIX_TPS           4000
74
 
75
/* Yeah, after heavy testing I decided it must be 6.
76
 * Sure, You can change it if needed.
77
 */
78
#define SPECIALIX_RXFIFO        6       /* Max. receiver FIFO size (1-8) */
79
 
80
#define SPECIALIX_MAGIC         0x0907
81
 
82
#define SX_CCR_TIMEOUT 10000   /* CCR timeout. You may need to wait upto
83
                                  10 milliseconds before the internal
84
                                  processor is available again after
85
                                  you give it a command */
86
 
87
#define SX_IOBASE1      0x100
88
#define SX_IOBASE2      0x180
89
#define SX_IOBASE3      0x250
90
#define SX_IOBASE4      0x260
91
 
92
struct specialix_board {
93
        unsigned long   flags;
94
        unsigned short  base;
95
        unsigned char   irq;
96
        signed   char   count;
97
        unsigned char   DTR;
98
        int reg;
99
};
100
 
101
#define SX_BOARD_PRESENT        0x00000001
102
#define SX_BOARD_ACTIVE         0x00000002
103
#define SX_BOARD_IS_PCI         0x00000004
104
 
105
 
106
struct specialix_port {
107
        int                     magic;
108
        int                     baud_base;
109
        int                     flags;
110
        struct tty_struct       * tty;
111
        int                     count;
112
        int                     blocked_open;
113
        int                     event;
114
        int                     timeout;
115
        int                     close_delay;
116
        long                    session;
117
        long                    pgrp;
118
        unsigned char           * xmit_buf;
119
        int                     custom_divisor;
120
        int                     xmit_head;
121
        int                     xmit_tail;
122
        int                     xmit_cnt;
123
        struct termios          normal_termios;
124
        struct termios          callout_termios;
125
        wait_queue_head_t       open_wait;
126
        wait_queue_head_t       close_wait;
127
        struct tq_struct        tqueue;
128
        struct tq_struct        tqueue_hangup;
129
        short                   wakeup_chars;
130
        short                   break_length;
131
        unsigned short          closing_wait;
132
        unsigned char           mark_mask;
133
        unsigned char           IER;
134
        unsigned char           MSVR;
135
        unsigned char           COR2;
136
#ifdef SX_REPORT_OVERRUN
137
        unsigned long           overrun;
138
#endif  
139
#ifdef SX_REPORT_FIFO
140
        unsigned long           hits[10];
141
#endif
142
};
143
 
144
#endif /* __KERNEL__ */
145
#endif /* __LINUX_SPECIALIX_H */
146
 
147
 
148
 
149
 
150
 
151
 
152
 
153
 
154
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.